analog devices cd reference - electronic...

PART DESCRIPTION

ANALOG DEVICES CD REFERENCE

1B21 Vin Ranges=0>1,0>5, 0>10,CMRR=90dB, Isolation=1500Vrms, Accuracy=0.05%, Input Power=+/-15V @10/5mA, External Loop Current Input=4>20mA, External Loop Current Output Programmable=0>20mA or 4>20mA

1B22 Vin Ranges=0>5, 0>10,CMRR=90dB, Isolation=1500Vrms, Accuracy=0.05%, Input Power=+/-15V @7.5/7.5mA, External Loop Current Generated on Chip=0>20mA or 4>20mA

1B31 Gain Range/Accuracy=2>5000/3%, Prgm Bridge Excitation=+4>+15V, CMRR=100dB, Linearity=0.005%, TCVos=2uV/C, Vsys=+/-15V @ 10mA

1B32 Gain Range/Accuracy=100>5000/3%, Prgm Bridge Excitation=+4>+15V, CMRR=100dB, Linearity=0.005%, TCVos=2uV/C, Vsys=+/-15V @ 4/1mA, w/ 2 Pole Filter

1B41 RTD, ISOLATED, 5ohms to 5Kohms FS, CMRR=160dB, Linearity= 0.025%, GAIN ERROR=5% FS

1B51 ISOLATED THERMOCOUPLE or mV SIGNAL CONDITIONER, 1500VRMS, CMRR=170dB, Linearity=0.05%

5962-00517 Amplifier: Generic=OP484

5962-00530 A/D Converter: Generic=AD1320AZ

5962-85127 A/D Converter: Generic=AD574A

5962-86716 Switches: Generic=ADG201HS

5962-86802 A/D Converter: Generic=AD570/AD571

5962-86861 Reference: Generic=AD580


5962-87540 Sample/Track & Holds: Generic=AD585

5962-87571 Sensor: Generic=AD590

5962-87591 A/D Converter: Generic=AD7572


5962-87701 D/A Converter: Generic=AD7528



5962-87716 Multiplexer: Generic=MUX08



5962-87719 Instrumentation Amplifier: Generic=AD625








5962-88505 AD573SD/883B




5962-88565 Amplifier: Generic=OP470/OP471

5962-88579 Amplifier: Generic=HOS050/060


5962-88630 Instrumentation Amplifier: Generic=AMP01




Click on a Part to See the Datasheet (If Available)

PART DESCRIPTION





5962-88764 A/D Converter: Generic=AD7824 & AD7828


5962-88766 D/A Converter: Generic=AD7245A & AD7248A

5962-89481 D/A Converter: Generic=AD7541A


5962-89541 Sample/Track & Holds: Generic=SMP11


5962-89581 Reference: Generic=REF01


5962-89629 AD7569SE/883B

5962-89637 RMS to DC Converter: Generic=AD637

5962-89641 Amplifier: Generic=AD841



5962-89645 Amplifier: Generic=AD845SQ/883B



5962-89655 A/D Converter: Generic=AD7672-10

5962-89657 AD7547UQ/883B

5962-89669 Switches: Generic=SW06

5962-89671 D/A Converter: Generic=DAC8221





5962-89710 Multiplexer: Generic=ADG526A & ADG527A



5962-89805 RMS to DC Converter: Generic=AD536A

5962-89807 Modulator/Demodulator: Generic=AD630


5962-89809 MultiplyDivider: Generic=AD539






5962-90633 AD713SQ/883B

5962-90635 Multiplexers: Generic=ADG528A & ADG529A

5962-90671 Signal Conditioner: Generic=AD598

5962-90785 D/A Converter Gereric=AD7237/47ATQ/883B



PART DESCRIPTION




5962-90955 Log Amplifiers: Generic=AD640

5962-90962 Motion Control: Generic=AD2S80A






5962-91690 A/D Converter: Generic=AD674B

5962-91764 D/A Converter: Generic=DAC8412 & DAC8413

5962-92013 Sample/Track & Holds: Generic=AD684


5962-92042 Multiplexer: Generic=ADG408 & ADG409











5962-93222 V/F Converters: Generic=AD652


5962-94518 D/A Converter: Generic=AD7837 & AD7847


5962-94572 Amplifier: Generic=AD600 & AD602 & AD603







5962-95567 Amplifier: Generic=BUF04






5962-95639 Instrumentation Amplifier: Generic=AMP03





PART DESCRIPTION



5962-97506 Digital Signal Processing: Generic=AD14060

5962-97507 Digital Signal Processing: Generic=AD14160



5962-98659 AD10265BZ


83002 D/A Converter: Generic=ADDAC87

85030 AD2700SD/883B

85514 Reference: Generic=REF02

AC1226 8 PIN MONOLITH COLD END COMPENSATOR, for THERMOCOUPLES

AC2626 AD590 MOUNTED IN A STAINLESS STEEL PROBE

AD10200 12 Bit Dual, 105MSPS>10min, BW=1>200MHz, INL=3 LSB, DNL=1 LSB, SNR/SINAD=64/63dB @ 41MHz, 2nd/3rd= ns, SFDR=73dB @ 41MHz, THD=ns,Vsys= +5V @ 410mA & +3Vdrive @ 40mA, I/O= 2 P12 w/Vdrive +3V, 2 Tone IMD= -70dBc @ 71/72MHz, w/AC Coupled AFE

AD10200/PCB Evaluation Board, AD10200

AD10201 12 Bit Dual, 105MSPS>10min, BW=250>300MHz, INL=1.5 LSB, DNL=1 LSB, SNR/SINAD=63.5/63dB @ 71MHz, 2nd/3rd= ns, SFDR=71dB @ 71MHz, THD=ns,Vsys= +5V @ 410mA & +3Vdrive @ 40mA, I/O= 2 P12 w/Vdrive +3V, 2 Tone IMD= -66dBc @ 71/72MHz, w/AC Coupled AFE


AD10226 12 Bit Dual, 125MSPS>10min, BW=1>226MHz, INL=3 LSB, DNL=1 LSB, SNR/SINAD=26.5/65dB @ 41MHz, 2nd/3rd= ns, SFDR=81dB @ 41MHz, THD=ns,Vsys= +5V @ 540mA & +3Vdrive @ 80mA, I/O= 2 P12 w/Vdrive +3V, 2 Tone IMD= -dBc @ 12/72MHz, w/AC Coupled AFE

AD10235 12 Bit Dual, 210MSPS>40min, BW=4000MHz, INL=1 1/2 LSB, DNL=1 LSB, SNR/SINAD=64/63.4dB @ 100MHz, 2nd/3rd= ns, SFDR=76dB @ 100MHz, THD=ns,Vsys= +3.3 @ 640mA & +3.3V @ 110mA, I/O= 2 P12 w/LVDS Mode, w/AC Couptled Signal Conditioner Front End

AD10242 12 Bit Dual, 45MSPS>5min, BW=120MHz, INL=2 LSB, DNL=2 LSB, SNR/SINAD=60/58dB @ 19.5MHz, 2nd/3rd= ns, SFDR=60dB @ 19.5MHz, THD=ns,Vsys= +/-5V @ 260/55mA & +5V @ 25mA, I/O= 2 P12, 2 Tone IMD= -70dBc @ 10MHz, w/DC Coupled AFE


AD10265 12 Bit Dual, 65MSPS>5min, BW=160MHz, INL=1 1/4 LSB, DNL=1 1/2 LSB, SNR/SINAD=61/61dB @ 32MHz, 2nd/3rd= ns SFDR=72dB @ 32MHz, THD=ns,Vsys= +/-5V @ 336/66mA & +3V @ 20mA, I/O= 2 P12, 2 Tone IMD= -72dBc @ f1=17MHz f2=18MHz, w/AC Couptled Signal Conditioner Frontend

AD10410 14 Bit Dual, 10MSPS, BW=30MHz, INL=ns, DNL=ns, SNR/SINAD=73/70dB @ 1MHz, 2nd/3rd=ns, SFDR=85dB @ 1MHz, THD=ns,Vsys= +/-5V @ tbdmA & +3Vdrive @ tbdmA, I/O= 2 P14 +3V w/Vdrive, 2 Tone IMD= -80dBc @ 2.5MHz, w/DC Coupled AFE

AD10465 12 Bit Dual, 65MSPS>20min, BW=100MHz, INL=ns LSB, DNL=ns LSB, SNR/SINAD=69/65dB @ 19.5MHz, 2nd/3rd= ns, SFDR=72dB @ 19.5MHz, THD=ns,Vsys= +/-5V @ 308/49mA & +3V drive@ 42mA, I/O= 2 P12 +3V w/Vdrive, 2 Tone IMD= -68dBc @ 31/32MHz, w/DC Coupled AFE

AD10677 16 Bit Single, 65/80/105MSPS>10min, BW=250MHz, INL=SB, DNL=NMC, SNR/SINAD=78/72dB @ 32MHz, 2nd/3rd= 83/83, SFDR, THD=ns,Vsys= +5V @1000mA & +3V @ 600mA & Drive @ 510mA, I/O= P16 w/Vdrive +3>5V, 2 Tone IMD= -90dBc @ 10/12MHz, w/AC Coupled AFE

AD13280 12 Bit Dual, 80MSPS>20min, BW=100MHz, INL=ns LSB, DNL=ns LSB, SNR/SINAD=67.5/65dB @ 21MHz, 2nd/3rd= ns, SFDR=68dB @ 21MHz, THD=ns, Vsys= +/-5V @ 308/49mA & +3V drive@ 42mA, I/O= 2 P12 +3V w/Vdrive, 2 Tone IMD= -75dBc @ 9.1/10.1MHz, w/DC Coupled AFE


AD13465 14 Bit Dual, 65MSPS>20min, BW=100MHz, INL=ns LSB, DNL=ns LSB, SFDR=70dB @ 21MHz, THD=ns, Vsys= +/-5V @ 308/49mA & +3V drive@ 42mA, I/O= 2 P12 +3V w/Vdrive, 2 Tone IMD= -77.5dBc @ 9.1/10.1MHz, w/DC Coupled AFE, SE or DIFF


AD1376 16 Bit, 17usec, Hybrid, See AD676/677 for new designs

AD14060 Quad ADSP21060 Multi-Chip Module, 40 MHz Instruction Rate, 480 MFLOPS Peak, 320 MFLOPS Sustained, Vsys=+5V

AD14060L Quad ADSP21060 Multi-Chip Module, 40 MHz Instruction Rate, 480 MFLOPS Peak, 320 MFLOPS Sustained, Vsys=+3.3V


PART DESCRIPTION


AD14160 Quad ADSP21060 Multi-Chip Module, 480 MFLOPS Peak, 320 MFLOPS Sustained, Vsys=+5V, 452 Lead Ceramic ball grid array

AD14160L Quad ADSP21060 Multi-Chip Module, 480 MFLOPS Peak, 320 MFLOPS Sustained, Vsys==3V, 452 Lead Ceramic ball grid array

AD15004 Quad, 14 Bit, Iout= +/- 250 mA, INL=1LSB, DNL=1LSB, Settling Time=5us, Vsys=+/5V @ mA, I/O=SPI w/Serial Out Pin, w/Power on /Reset=0mA

AD1555 24 Bit, 4th order, Dynamic Range=116dB, THD=-111dB, fclk=1.024MHz, Sample Rate=256KSPS, Output Rate=250SPS to 16KSPS, PGA Gains=1, 2.5, 8.5, 34, 128dB, Vsys=+2.85>5.5V @ 4mA, w/Continous time Filter

AD1556 Digital Filter for AD1555, Equi-ripple FIR Filter, +/-0.05 pass band ripple, Word Rates=250SPS>16KBPS

AD15700 16 Bit ADC, 1MSPS, INL=2.5LSB, SNR=90dB@20KHz; 14 Bit DAC,voltage ouput, Settling time= 1us, INL=0.15LSB, DNL=0.15LSB, Dual 80 Mhz Buffer amps, Vsys=+5V @ ma, w/Dual Precision gain setting resistor networks

AD1580 +1.2V, Vos=10mV, TCVos=50>100ppm/C, enoise 10Hz>10KHz=20uVrms, In=100uA

AD1582 +2.5V, 0.1>1% Accuracy 50/100 ppm, 3 Terminal, Iq=50uA, Band GAP, Source/Sink 5mA

AD1583 +3.0V, 0.1>1% Accuracy 50/100 ppm, 3 Terminal, Iq=50uA, Band GAP, Source/Sink 5mA

AD1584 +4.096V, 0.1>1/% Accuracy 50/100 ppm, 3 Terminal, Iq=50uA, Band GAP, Source/Sink 5mA

AD1585 +5.0V, 0.1>1/% Accuracy 50/100 ppm, 3 Terminal, Iq=50uA, Band GAP, Source/Sink 5mA

AD1672 12 Bit, 3MSPS, INL=2.5 LSB, DNL=1>2 LSB, Aperature Delay/Jitter=9nsec/10psec_rms, Vin=0>+2.5V, 0>+5V, +/-2.5V, Rin=1.5K or 3K, SSBW=20MHz, FPBW=5MHz, THD= -75dB, SFDR=65dB, SNR= 66dB, SINAD @ fin 500KHz=63dB, Vsys=+5V @ 67mA & Vdrive=+3>+5V @ 2mA, I/O= P12 w/Vdrive +3V or +5V, 2SC or BIN

AD1674 12 Bit, 100KSPS, INL=1/2>1 LSB, DNL=1/2 LSB, Vin=0>+5V, 0>+10V, 0+20V, +/-5V +/-10V, Rin=5>10K, Vref Int=+10V, FPBW=1MHz, SFDR=82dB, THD= -82dB, SINAD @ fin 10KHz=69>70dB, 2 Tone IMD (f1 9.0KHz f 2 9.55KHz) 2nd/3rd= 80/80dB, Vsys=+5V &+/-12>15V @ 8/14/18mA, I/O= P8/12 Tri-State

AD1803 Modem/Voice/Telephony Codec, AC’97 or DSP Style Serial Interface, 16-Bit, Multiple Clock Rates, Programmable Gain, Attenuation and Mute, On-Chip Signal Filters, Digital Monitor Speaker Output, Supports Wake-up on Ring from D3 Cold System State.

AD1819B 16-Bit, AC-97 REV-1.03, SoundMax Audio Codec, Sample Rate=8>48KHz w/1Hz Resolution, AD//DA Dynamic Range=84/85dB min, Inputs=1 Line Level Stereo, 2 Mono (Mux’d), 1 CD w/Gnd Sense, 1 video, 1 Aux, 1 Phone, Outputs=1 Line 800 ohms, Vsys=+ 5V @ 120mA, I/O= Serial DSP, w/PHAT Stereo Enhancement

AD1833 Surround DAC w/3 Stereo D/A’s 16//20/24 Bit Data, 192KHz sampling 2 ch mode, 48/96KHz 6 ch mode, SNR/DR=108dB, THD+N= -97dB, on chip volume control 256/512x Fs Master Mode Clk.

AD1835 4 Stereo D/A’s, w/diff outputs, 1 Stereo A/D’s, 16/18/20/24 Bit Data, 96KHz Sampling, ADC/DAC SNR/DR=105/108dB, THD+N= -92dB, Volume control=10 Bit, Vss=+5V @ 167mA, 1 D/A Mode=192KHz

AD1836 16 Bit, w/3 Stereo D/A’s 2 Stereo A/D’s, 16/18/20/24 Bit Data, 96KHz Sampling, ADC & DAC SNR/DR=105dB, THD+N= -97dB, on chip volume control/ADC gain control, Vsys=+5V @ 186mA, w/3 Line to Line Inputs

AD1837 4 Stereo D/A’s w/SE outputs 1 Stereo A/D’s, 16/18/20/24 Bit Data, 96KHz Sampling, ADC/DAC SNR/DR=105/105dB, THD+N= -92dB, Volume control=10 Bit, Vss=+5V @ 105mA, 1 D/A Mode=192KHz

AD1838 3 Stereo D/A’s w/Diff Outputs, A/D’s, 16/18/20/24 Bit Data, 96KHz Sampling, ADC/DAC SNR/DR=105/108dB, THD+N= -92dB, Volume control=10 Bit, Vss=+5V @ 105mA, 1 D/A Mode=192KHz

AD1839 3 Stereo D/A’s w/SE Outputs, A/D’s, 16/18/20/24 Bit Data, 96KHz Sampling, ADC/DAC SNR/DR=105/105dB, THD+N= -92dB, Volume control=10 Bit, Vss=+5V @ 105mA, 1 D/A Mode=192KHz

AD1843 16 Bit, 2 CH A/D w/13 Inputs, 4 CH D/A w/7 Outputs, Intergrated Speech, Audio, Fax & Support for V.32 .V.32Bis, Modem, w/Video Sync, Vsys=250mA

AD1845 16 Bit Stereo Codec, Playback & Capture FIFO, Dual DMA for full Duplex Operation, Sample Rate=4KHz TO 50KHz, I/O=Parallel (ISA or EISA)

AD1849K 16 Bit, Sample Rate=5.5>48KHz, ADC Dynamic Range/THD+N=78dB/0.06%, DAC Dynmic Range/THD+N==80dB/0.02%, PGA Gain=0>22.5dB, Mic Gain=20dB, Vsys=+5V @ 130mA, I/O=Serial

AD1851 Single, 16 Bit, fclock=12.5Mhz max, 16xFS, THD= 0.004%, SNR=107dB, Vref Int=+2.5V, Vsys=+/-5V @13/15mA


PART DESCRIPTION


AD1852 Dual, 24 Bit, Date Size=16/18/20/24 Bit, 192KHz, Over Sampling interpolation filter, Volume Control=14 Bit, Dynamic Range=114dB, THD+N= -104dB, Compatible with all DVD formats, Vsys=+5V @ 50mA, SPI I/O for control, all I/O types

AD1853 Dual, 24 Bit, Date Size=16/18/20/24 Bit, 192KHz, Over Sampling interpolation filter, Volume Control=14 Bit, Dynamic Range=116dB, THD+N= -104dB, SNR=117dB, Compatible with all DVD formats, Vsys=+5V @ 75mA, SPI I/O for control, all I/O types

AD1854 Dual, 20 Bit, Date Size=16/18/20/24 Bit, 196KHz, Over Sampling interpolation filter, Volume Control=10 Bit, Dynamic Range=113dB, THD+N= -101dB, Compatible with all DVD formats, Vsys=+5V @ 50mA, SPI I/O for control, all I/O types

AD1855 Dual, 20 Bit, Date Size=16/18/20/24 Bit, Over Sampling interpolation filter, Volume Control=10 Bit, Dynamic Range=113dB, THD+N= -97dB, Compatible with all DVD formats, Vsys=+5V @ 67mA, SPI I/O for control, all I/O types

AD1857 Dual, 18 Bit, Date Size=16/18/20/24 Bit, 48KHz, Over Sampling interpolation filter, Volume Control=na, Dynamic Range=90dB, THD+N= -90dB, Compatible with all DVD formats, Vsys=+5V @ 60mA, SPI I/O for control, all I/O types

AD1858 Dual, 16 Bit, Date Size=16/18/20/24 Bit, 48KHz, Over Sampling interpolation filter, Volume Control=na, Dynamic Range=90dB, THD+N= -90dB, Compatible with all DVD formats, Vsys=+5V @60mA, SPI I/O for control, all I/O types

AD1859 Dual, 18 Bit, Data Size=16/18, Programmable Sample Rate, 27MHz Master Clock, Vsys=+5V @ 53mA I/O=I2S/RIGHT/LEFT & DSP Serial

AD1859EB Evaluation Board for AD1859

AD1861 Single, 18 Bit, 16xFS, THD= 0.008%, SNR=107dB, +/-5V @15mA

AD1865 Dual, 18 Bit, 8xFS, THD= 0.006%, SNR=107dB, Channel Seperation=110dB, +/-5V @26mA

AD1866 Dual, 16 Bit, 8xFS, THD= 0.01%, SNR=95dB, Channel Seperation=108dB, Vsys=+5V @3mA

AD1868 Dual, 18 Bit, 8xFS, THD= 0.01%, SNR=95dB, Channel Seperation=108dB, Vsys=+5V @14mA

AD1870 Dual, 16/20/24 Bit w/ 4th Order Modulator, 256Fs or 386xFs, DR w/wo A weight filter=92/89dB, THD+N=86.5dB, Vsys= +5V @ 64mA

AD1871 Dual, 16/20/24 Bit, 128x Oversampling, THD+N=-97dB, Dynamic Range=112dB, Fclk=12.288MHz, (256 or 512 or 768)*Fs Master Clock, w/Shutdown, Vsys=+5V @tbd mA, w/+3V Logic Interface

AD1877 Dual A/D, 16 Bit, 256or 386xFs, +5V @80mA, THD=-98dB, SNR=90dB, Serial I/O, 92dB SNR

AD1881A 16-Bit, AC-97 REV-2.1, SoundMax Audio Codec, Sample Rate=8>48KHz w/1Hz Resolution, AD//DA Dynamic Range=87/90dB typ, Inputs=1 Line Level Stereo, 2 Mono (Mux’d), 1 CD w/Gnd Sense, 1 video, 1 Aux, 1 Phone, Outputs=2 Line 500 ohms, 1 Mono, Vsys=+3V & 5V @ 23/40mA, I/O= Serial DSP, w/PHAT Stereo Enhancement

AD1885 16-Bit, AC-97 REV-2.1, SoundMax Audio Codec, Sample Rate=7>48KHz w/1Hz Resolution, AD//DA Dynamic Range=84/85dB min, Inputs=1 Line Level Stereo, 2 Mono (Mux’d), 1 CD w/Gnd Sense, 1 video, 1 Aux, 1 Phone, Outputs=1 Headphone 32 ohms, 1 Line 800 ohms, 1 Mono, Vsys=+3V & 5V @ 21/50mA, I/O= Serial DSP, w/PHAT Stereo Enhancement & Jack Sense

AD1886A 16-Bit, AC-97 REV-2.1, SOUNDMAX, Full Duplex Variable Sample RAte= 7KHz>48KHz 1Hz Resolution, S/PDIF Output Sample Rates=32/44.1/48KHz, Stereo Integrated Headphone Drivers, 2 Mono Inputs, PHAT 3D Stereo Enhancements, S/N>90dB

AD1887 16-Bit, AC-97 REV-2.2, SoundMax Audio Codec, Sample Rate=7>48KHz w/1Hz Resolution, AD//DA Dynamic Range=84/85B min, Inputs=1 Line Level Stereo, 1 Mono, 1 CD w/Gnd Sense, Outputs=1 Headphone 32 ohms, Vsys=+3V & 5V @ 22/36mA, w/PHAT Stereo 3D Enhancement, I/O= Serial DSP, for IBM

AD1890 4 to 20 Bits, Ratio Between Sample Clocks=1:2 & 2:1, Dynamic Range=120dB, THD+N=-106dB, Dynamic Range=120dB, w/Long or Short Group Delays, Vsys=+3V>+5V @ 40mA,

AD1891 4 to 20 Bits, Ratio Between Sample Clocks=1:2 & 2:1, Dynamic Range=96dB, THD+N=-96dB, Dynamic Range=120dB, w/Long or Short Group Delays, Vsys=+3V>+5V @ 40mA,

AD1892 20 Bit, fmasterclock=25MHz, THD+N=96dB, Dynamic Range=120dB, Sample Rate Conversion =8>48KHz, Vsys=+5V @ 60mA, wShutdown Iq=6mA, SPI I/O

AD1893 Stereo Asynchronous Sample Rate Converter, 1 - 192KHz, 125dB DNR, 110dB THD, 16>24 Bit Input and Output Support, I/O Ratios 1:8 to 7.75:1, Vsys=+3.3 @ 43mA

AD1895 Stereo Asynchronous Sample Rate Converter, 1 - 192KHz, 125dB DNR, 110dB THD, 16 - 24Bit In- and Output support, I/O Ratios 1:8 to 7.75:1

AD1896 16/18/20/24 Bit, fmasterclock=33Mhz, Sample Rate 1KHz to 196KHz, I/O Ratios =7.75:1> to 1:8, THD+N=124dB, Dynamic Range=136dB, Vsys= +3 or +5V @ 46mA, I/O=Serial +3V


PART DESCRIPTION


AD1953 Triple, 24 Bit , w/ 26x22 DSP Core, DSP=26MIPS, THD+N=100dB, SNR=112dB, Stopband Atten=75 dB, 7 Biquad Digital Filter Sections/CH, Variable delay=0>6msec for Speaker Align, Volume Control=8 H/Ware, Data I/O=All, Vsys=+5V @ mA, w/Phat Stereo & 6 Digital Outputs DMA Mode

AD1954 Triple, 24 Bit , w/ 26x22 DSP Core, DSP=26MIPS, THD+N=100dB, SNR=112dB, Stopband Atten=75 dB, 7 Biquad Digital Filter Sections/CH, Variable delay=0>6msec for Speaker Align, Volume Control=3 H/Ware, Data I/O=All, Vsys=+5V @ mA, w/Phat Stereo

AD1955 Dual, 24 Bit, Data Size=16/18/20/24 Bit, 216KHz, fs=246/384/512/768*Fsclock, Volume Control=14 bit Clickless, Dynamic Range=122dB, THD+N= -108dB, SNR=120dB, Vsys=+5V @ 59mA, SPI I/O for control, Digital I/O=all types, Analog Output Diff, w/SCAD phase modulation & mute Detect, fclk=12.288MHz

AD1958 Dual, 24 Bit, Data Size=16/18/20/24 Bit, 192KHz w/ Prgm Dual Fractional-N PLL, fclk outputs=S0=33.868MHz, S1=fs=384/256*fs, S2=512*fsOver Sampling Interpolation Filter 2x4x8,Volume Control=14 bit Clickless, Dynamic Range=108dB, THD+N= -92dB, Compatible with all DVD formats, Vsys=+5V @ 53mA, SPI I/O for control, Digital I/O=all types, Analog Output Single Ended, fclk=12.288MHz

AD1959 Dual, 24 Bit, Data Size=16/18/20/24 Bit, 192KHz w/ Prgm Dual Fractional-N PLL, fclk outputs=S0=33.868MHz, S1=fs=384/256*fs, S2=512*fsOver Sampling Interpolation Filter 2x4x8,Volume Control=14 bit Clickless, Dynamic Range=108dB, THD+N= -92dB, Compatible with all DVD formats, Vsys=+5V @ 53mA, SPI I/O for control, Digital I/O=all types, Analog Output Single Ended, fclk=12.288MHz

AD1980 2 16-Bit A/D’s, 4 20-Bit D/A’s, AC-97 REV-2.2, SoundMax Audio Codec, Sample Rate=7 to 48KHz w/1Hz Resolution, AD//DA Dynamic Range=84/85dB min, Inputs=1 Line Level Stereo, 2 Mike, 1 CD w/Gnd Sense,1 Phone, 1 Aux, Output=1 Headphone/Surround 32 ohms, 1 Line 800 ohms, 1 Mono, Vsys=+3V & 5V @ mA, I/O= Serial DSP, w/Jack Sense

AD1981A 4 16-Bit A/D’s, 2 20-Bit D/A’s, AC-97 REV-2.2, SoundMax Audio Codec, Sample Rate=7 to 48KHz w/1Hz Resolution, AD//DA Dynamic Range=84/85dB min, Inputs=1 Line Level Stereo, 1 Mono, 1 CD w/Gnd Sense, Output=1 Headphone 32 ohms, 1 Line 800 ohms, 1 Mono, Vsys=+3V & 5V @ mA, I/O= Serial DSP, w/Jack Sense

AD1991 Class D, Power Output=16Watts @ THD+N=0.1%, Rload=8ohms, PVdd=20V, 8 Transistor Output Configurable as 1, 2 or 4 channel, AVdd=DVdd=+5V @ mA, PVdd=8>20V @ mA

AD202 2 Port, Av=1>100, INL=±0.025>±0.05%, Vosrti=(±5+5mV/G)>(±15+15mV/G), Ib= ±30pA, CMV=±1000>±2000V, CMRR=110dB, BW=5KHz, S/Time=1msec, Vsys=Clock Powered 15Vpp @ 25KHz

AD203 2 Port, Av=1>100, INL=±0.025%, Vosrti=(±5+25mV/G), Ib= ±30pA, CMV=±1500V, CMRR=110dB, BW=10KHz, S/Time=160usec, Vsys=+15V @ 20mA, Temp Range= --55>+125C

AD204 2 Port, Av=1>100, INL=±0.025>±0.05%, Vosrti=(±5+5mV/G)>(±15+15mV/G), Ib= ±30pA, CMV=±1000>±2000V, CMRR=105dB, BW=2KHz, S/Time=1msec, Vsys=+15V @ 5mA

AD208 2 Port, Av=1>1000, INL=±0.015>0.03%, Vosrti=(±0.25+15mV/G), Ib= ±10nA, CMV=±1000>±2000V, CMRR=100dB, BW=4KHz, S/Time=2msec, Vsys=Clock Powered +15Vpp @ 25KHz

AD210 3 Port, Av=1>100, INL=±0.012>0.025%, Vosrti=(±5+15mV/G)>(±15+45mV/G), Ib= ±30pA, CMV=±3500, CMRR=120dB, BW=20KHz, S/Time=150usec, Vsys= +15V @ 50mA

AD215 2 Port, INL=0.015>0.025%, Vosin=±2mV, TCVosin=2uV/C, Vosout=0>+80mV, TCVosout=30uV/C,Ib= ±300nA, CMV=±750>1500Vrms, CMRR=100dB, BW=100KHz, S/Time=9usec, Vsys=±15V @ +40/ -18mA

AD22050 Vos RTI=1mV, TCVosi=30uV/C, Gain Error/Drift=1%/62.5ppm, CMV= +24V, @ Av=20 CMRR=60dB @ fin 10KHz, BW=0.5MHz, SR=0.2V/usec, S/time=ns, Vsys=+5>36V @ 0.5mA,Fixed Gain=20 Adj 1>160, w/offset adj, Transient spike & RFI filters

AD22057 Vos RTI=1mV, TCVosi=12uV/C, Gain Error/Drift=1%/62.5ppm, CMV= +24V, @ Av=20 CMRR=80dB @ fin 1KHz, BW=0.5MHz, SR=0.2V/usec, S/time=ns, Vsys=+5>36V @ 0.5mA,Fixed Gain=20 Adj 1>160, w/offset adj, Transient spike & RFI filters

AD22100 Transfer Function=Vdd/+5V*(1.375+22.5mV*Ta), Error=2%, Vdd=+5V @ 650uA, Output is ratiometric to Vdd

AD22103 Transfer Function=Vout=Vdd/3.3V*[0.25V+28mV/C*Ta)], Total Error=2C, Vsys=+2.7V>+5V @ 350uA

AD22105 Temp AccuracySetpoint Accuracy=2C/3C, Hysteresis=4C, Output=Open Collector w/internal pullup=200K, ton ssettling time=5usec, Vs=+2.7 to +7V, Iq=75uA,

AD22151 INL=0.1%FSR, Gain Error=1%, Gain Adjustable from 2>6mV/Gauss, Ratiometric output to Vcc, Vin Sensitivity=160uV/G/V, Vs=+4.5>6V @ 6mA,

AD22157 PWM Output Current Pulse Nominal Field Left/Right=90/180 degrees, Low Field Left Right=360/720 degrees, Low Field Threshold=Bth20V @ 7/14mA Ioutlow/Iouthigh, Timing Wheel Speed Sensor for ABS Systems


PART DESCRIPTION


AD246 Output=25KHz Square Wave 15Vpp, Fanout=32, Power Supply=15V @ 3.5mA no load +2mA for each AD204 Driven, Clock Oscillator to Power AD204

AD260 5 Channel Logic Isolator, CMV=4KV, 20MHZ, Time Delay 29nsec, Edge to Edge Error=4nsec, +5V @ 7mA, w/3 Internal 3Watt Transformer

AD261 5 Channel Logic Isolator, Operating CMV, Dash-A=375Vrms, Dash B=1250Vrms, Logic freq.=20MHZ, Time Delay 25nsec, Edge to Edge Error=4nsec, +5V @ 18mA

AD2700 Vout=+10V, Vos=2.5>5mV, TCVos=3>10ppm, enosie 0.1Hz to 10Hz=50uVpp, Vsys=+/-15V @ 14mA, See AD581 for new designs

AD2701 Vout= -10V, Vos=2.5>5mV, TCVos=3>10ppm, enosie 0.1Hz to 10Hz=50uVpp, Vsys=+/-15V @ 14mA, See AD688 for new designs

AD2702 Vout=±10V, Vos=2.5>5mV, TCVos=3>10ppm, enosie 0.1Hz to 10Hz=50uVpp, Vsys= ±15V @ 17/-4mA, See AD688 for new designs

AD2712 Vout=±10V, Vos=1mV, TCVos=1>3ppm, enosie 0.1Hz to 10Hz=50uVpp, Vsys= ±15V @ 16/-4mA, See AD688 for new designs

AD2S80A 10>16 Bit, Accuracy Options=2/4/8 arc minutes,Tracking Rate @10/12/14/16 Bit Mode=1024/260/65/16.25 RPS, Vsys=+/-12V Rails @ 23mA

AD2S81A 12 Bit, 30 ARC MIN Accuracy, 28 PIN CERAMIC DIP

AD2S82A 10>16 Bit, Accuracy Options=2/4/8/22 arc minutes,Tracking Rate @10/12/14/16 Bit Mode=1024/260/65/16.25 RPS, Vsys=+/-12V Rails @ 23mA

AD2S83 10,12,14,16 Bit, HIGH Accuracy VELOCITY Output .25%, 44 LEAD PLCC

AD2S90 12 Bit, 375Hz tracking range, +/-5V Rail @ 7mA, INCREMENTAL ENCODER TYPE Serial I/O

AD2S90EB AD2S90/AD2S99 Evaluation Board

AD2S99 Sine and Cosine Outputs, Programmable Output=2KHz to 20KHz, Amplitude Accuracy=5>10%, Reference Frequency Output Squarewave, Vsys=+/-5V @ 15mA

AD390 Quad, 12 Bit, Vout=+/-10, Gain Error=0.05>0.1FSR, Gain Error TC=30>40ppm/C, Bipolar Zero Offset/TC=0.025.0.05%FSR/5>10ppm, INL=1/2.3/4 LSB, DNL=1/2>3/4 LSB, ST=8usec to 1/2LSB, Vref Int.=10V, Vsys=+/-15V @ 20/20mA I/O= P12 Double Buffered Latches, See AD664 for new designs

AD420 Single, 16 Bit, INL=0.012%FSR, Iout Pin Prgm=0>20, 0>24, 4>20mA, Ioutoffset=0.05%FSR, Vout=0>5V, S/Time to 0.1%=2.5msnsec, Vref Int=+5V, Vsys=24>32V @ 5mA, I/O=Serial w/Clear Pin, 1 Latch

AD420EB Evaluation Board FOR AD420

AD421 Single, 16 Bit, Loop Powered, "HART" Compatible, Iout=0 to 24mA Output, Iq=500uA, Serial I/O

AD5011 1or 2 Pair HDSL ETSI Compatible AFE: Data Rate=1.168>2.32MBPS, 14-bit DAC, 12-bit ADC, Programmble Adaptive Filters TX/RX=6 Pole Bessel/4 Pole Butterworth, PGA Rx= -6>+9dB, Line Driver Output=+13.5dBm, Input=4 Wire Hybrid, Vsys=+3.3V @ 32mA, w/Line Driver 75mA

AD5200 1 CH, 256 Position (Allows going to top of the pot), INL=2 LSB, DNL=1 LSB, Rpot Options=10K, 50K, TC=500ppm,Vsys=+3 or +5V or +/-3V, @ 60uA, I//O=Serial 3 Wire, w/AC Specs

AD5201 1 CH, 33 Position (Allows going to top of the pot), INL=2 LSB, DNL=1 LSB, Rpot Options=10K, 50K, TC=500ppm,Vsys=+3 or +5V or +/-3V, @ 60uA, I//O=Serial 3 Wire, w/AC Specs

AD5203 4 CH, 6 Bit, INL=0.5 LSB's, DNL=1/4 LSB, Rpot Options= 10K or 100K, TC=700ppm, Vsys=+2.7>+5.5V @ 5uA, AC Specs, 3/wire 10MHz SPI I/O, Mid Scale Preset

AD5204 4 CH, 8 Bit, INL=2 LSB's, DNL=1LSB, Rpot Options=10K, 50K, 100K, TC=700ppm, Vsys=+3V or +5V or +/-3V @ 10uA, AC Specs, I/O=Serial 3 wire 10MHz, w/Power on reset to midscale

AD5206 6 CH, 8 Bit, INL=2 LSB's, DNL=1LSB, Rpot Options=10K, 50K, 100K, TC=700ppm, Vsys=+3V or +5V or +/-3V @ 10uA, AC Specs, I/O=Serial 3 wire 10MHz, w/Power on reset to midscale

AD5207 2 CH, 8 Bit, INL=2 LSB's, DNL=1LSB, Rpot Options=10K, 50K, 100K, TC=500ppm,Vsys=+3>5V @ 60uA, AC Specs, I/O=Serial 3 wire 10MHz, w/Serial Data Output Pin, w/Power on reset to midscale,

AD521 Vos RTI=1>3mV, TCVosi=2>15uV/C, Vos RTO=100>400mV, TCVoso=75>400uV/C, Ib=40>80nA, @ Av=1 CMRR=70>74dB BW=2MHz S/Time=7usec, Vsys=+/-5>+/-15V @ 5mA, Av=1 to 1000

AD5212 12 Bit, 13usec, INL=1/2, DNL=1/2LSB, Gain Error=2LSB, Gain Error TC=0.4%FSR, Unipolar Offset=1 LSB, Vref=Int, Vin=+/-10V, Rin=5K, Vsys=+5V & +/-15V @ 42/16/28mA, I/O=Parallel 12, Tri-State Ouputs

AD5215 12 Bit, 13usec, INL=1/2, DNL=1/2LSB, Gain Error=2LSB, Gain Error TC=0.4%FSR, Unipolar Offset=1 LSB, Vref=Int, Vin=+/-10V, Rin=5K, Vsys=+5V & +/-15V @ 42/16/28mA, I/O=Parallel 12, Tri-State Ouputs

AD522 Vos RTI=100>400uV, TCVosi=25>100uV/C, Vos RTO=0V, TCVoso=0uV/C, Ib=25nA, @ Av=1 CMRR=75>80dB BW=300KHz S/Time=500usec, Vsys=+/-15V @ 10mA, Av=1 to 1000


PART DESCRIPTION


AD5220 1 CH, 7 Bit, INL and DNL=1 LSB, Rpot Options=10K, 50K, 100K, TC=800ppm,Vsys=+3V>+5V @ 41uA, AC Specs, I/O=2/wire serial to Up/Down Counter

AD5222 2 CH, 7 Bit, INL and DNL=1LSB, Rpot Options=10K, 50K, 100K, TC=35ppm, Vsys=+3V>+5V @ 41uA, AC Specs, I/O=2/wire serial to Up/Down Counter

AD5231 1 CH, 10 Bit, w/Nonvolatile Memory (30 Bytes) Preset, INL=0.4 LSB, DNL=1 LSB, Rpot Options=10K, 50K 100K, TC=600ppm, Vsys=+3V or +5V or +/-2.75V, Iq=10uA, I/O=Serial 3 wire

AD5232 2 CH, 8 Bit, w/Nonvolatile Memory (30 Bytes) Preset, INL=1 LSB, DNL=1 LSB, Rpot Options=10K, 50K 100K, TC=600ppm,-3dB BW=500KHz (10K), ST=0.65/3/6 usec, Vsys=+3V or +5V or +/-3V, Iq=10uA, I/O=Serial 3 wire

AD5232EVAL Evaluation Board for the AD5232 or AD5235 Digtial Pot w/EEPROM

AD5233 4 CH, 6 Bit, w/Nonvolatile Memory (30 Bytes) Preset, INL=2 LSB, DNL=1 LSB, Rpot Options=10K, 50K 100K, TC=500ppm, Vsys=+3V or +5V or +/-3V, Iq=10uA, I/O=Serial 3 wire

AD5235 2 CH, 10 Bit, INL=4 LSB, DNL=2 LSB, Rpot Options=25K, 250K, TC+5V @ 60uA, I/O=SPI w/up down counter or Shift Right/Left Options, w/Nonvolatile Memory Preset, AC Specs

AD5235EVAL Evaluation Board for the AD5235 or AD5235 Digtial Pot w/EEPROM

AD524 Vos RTI=50>250uV, TCVosi=0.5>2uV/C, Vos RTO=2>5mV, TCVoso=25>100uV/C, Ib=15>50nA, @ Av=1 CMRR=70>80dB BW=1MHz S/Time=15usec, Vsys=+/-6>+/-15V @ 5mA, Av=Pin Prgrm 1, 10, 100, 1000

AD5241 1 CH, 8 Bit, INL=2 LSB, DNL=1LSB, Rpot Options=10K, 100K, 1M, TC=50ppm, Vsys=+3V or +5V or +/-3V, Iq=50uA, I/O=Serial I2C

AD5242 2 CH, 8 Bit, INL=2 LSB, DNL=1LSB, Rpot Options=10K, 100K, 1M, TC=50ppm, Vsys=+3V or +5V or +/-3V, Iq=50uA, I/O=Serial I2C

AD5255 2 CH, 9 Bit, INL=2 LSB, DNL=1 LSB, Rpot Options=25K, 250K, TC+5V @ 60uA, I/O= I2C w/up down counter or Shift Right/Left Options, w/Nonvolatile Memory Preset, AC Specs

AD526 Vos RTI=0.5>1.5mV, TCVosi=10>20uV/C, Vos RTO=0V, TCVoso=0uV/C, Ib=150pA, @ Av=1 CMRR=na BW=4MHz S/Time=4usec, Vsys=+/-4.5.+/-15V @14 mA, Av=Digitally Prgm. 1, 2, 4, 8, 16

AD5260 1 CH, 8 Bit, INL=1 LSB, DNL=1 LSB, Rpot Options=20K, 50K, 200K,TC=50ppm, fclk=0>400KHz, S/Time=2usec, Vsys=+/-5V or +15V @ 1uA and Vlogic=+5V@ 60uA, I/O=SPI

AD5262 2 CH, 8 Bit, INL=1 LSB, DNL=1 LSB, Rpot Options=20K, 50K, 200K,TC=50ppm, fclk=0>400KHz, S/Time=2usec, Vsys=+/-5V or +15V @ 1uA and Vlogic=+5V@ 60uA, I/O=SPI

AD5280 1 CH, 8 Bit, INL=1 LSB, DNL=1 LSB, Rpot Options=20K, 50K, 200K,TC=50ppm, fclk=0>400KHz, S/Time=2usec, Vsys=+/-5V or +15V @ 1uA and Vlogic=+5V@ 60uA, I/O=I2C

AD5282 2 CH, 8 Bit, INL=1 LSB, DNL=1 LSB, Rpot Options=20K, 50K, 200K,TC=50ppm, fclk=0>400KHz, S/Time=2usec, Vsys=+/-5V or +15V @ 1uA and Vlogic=+5V@ 60uA, I/O=I2C

AD5300 Single, 8 Bit, INL=1 LSB, DNL=1/4 LSB, Vref=Vdd, Vsys=+2.7V, Iq=250uA, w/Powerdown, I/O=3 Wire Serial, w/Power on Reset to Zero, Rail to Rail Output

AD5301 Single, 8 Bit, INL=1 LSB, DNL=/14 LSB, Vref=Vdd, Vsys=+2.7V @ 250uA, w/Pdown & Readback, I/O=I2C, w/Power on Reset to Zero, Rail to Rail Output,

AD5302 Dual, 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25> Vdd Buffered or Unbuffered (Softwar Prgm), Vout=Rail to Rail, Vsys=+2.5>5.5V @ 0.45mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Schmitt Triggers), w/LDAC

AD53020 4 Channel, Programmable ECL Delay Line, 14>29.3 nsec, Vee= -5.2V @ 290mA

AD5303 Dual 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Schmitt Triggers, w/LDAC & Clear, SDO

AD53032 Active Load Toggle Rate=250Mhz, Vout=+/-2V, Pin Driver Toggle Rate=250MHz, Vout=-3>+8V, Iout=30mA, Window Comp S/T=25nsec, Prop Delay=1.8nsec, Vsys=-7V &+12V @ 270mA, w/Schottky Diode Bridge

AD53033 Driver, comparator, 250MHz

AD5304 Quad, 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25> Vdd Unbuffered, Vout=Rail to Rail, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI, w/S’Ware LDAC

AD53040 500MHz Update Rate, Vrange=, -3V to +8V,

AD53041 1.7nsec prop delay, Linearity=0.12% FS, Three Selectabel Ranges= 5/16/50mA


PART DESCRIPTION


AD5305 Octal, 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25>Vdd Unbuffered, Vout=Rail to Rail, Vsys=+2.5>5.5V @ 0.9mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=I2S, w/LDAC, Software Clear, R’Back

AD5306 Quad 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 4 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout Prgm=0>4 Vref or 24 Vref, Vays=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=I2S, w/LDAC, S’ware Clear, R’Back

AD5307 Quad 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout Prgm=0>4 Vref or 24 Vref, Vays=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI, w/LDAC, Hardware Clear

AD5308 Octal, 8 Bit, INL=1 LSB, DNL=1/4 LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout=0>Vdd, Vays=+2.5>5.5V @ 1.8mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI, w/LDAC Pin & S’Ware LDAC

AD5310 Single, 10 Bit, INL=4 LSB, DNL=1/2 LSB, Vref,=Vdd, Vsys=+2.7V, Iq=250uA, w/Powerdown, I/O=SPI w/Schnitt Triggers, w/Power on Reset to Zero, Rail to Rail Output

AD5311 Single, 10 Bit, INL=4 LSB, DNL=/12 LSB, Vref,=Vdd, Vsys=+2.7V @ 250uA, w/Pdown & Readback, I/O=I2C, w/Power on Reset to Zero, Rail to Rail Output,

AD5312 Dual, 10, Bit, INL=4 LSB, DNL=1/2 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25> Vdd Buffered or Unbuffered (Softwar Prgm), Vout=Rail to Rail, Vsys=+2.5>5.5V @ 0.45mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Schmitt Triggers), w/LDACR’Back

AD5313 Dual, 10 Bit, INL=3 LSB, DNL=1/2LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Scmitt Triggers) w/LDAC & Clear, SDO

AD5314 Quad, 10, Bit, INL=4 LSB, DNL=1/2 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25> Vdd Unbuffered, Vout=Rail to Rail, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Schmitt Triggers), w/S’Ware LDACR’Back

AD5315 Octal, 10, Bit, INL=4 LSB, DNL=1/2 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25>Vdd Unbuffered, Vout=Rail to Rail, Vsys=+2.5>5.5V @ 0.9mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=I2S, w/LDAC, Software Clear, R’Back

AD5316 Quad, 10 Bit, INL=4 LSB, DNL=1/2LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 4 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout Prgm=0>4 Vref or 24 Vref, Vays=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=I2S, w/LDAC, S’ware Clear, R’Back

AD5317 Quad, 10 Bit, INL=4 LSB, DNL=1/2LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout Prgm=0>4 Vref or 24 Vref, Vays=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI, w/LDAC, Hareware Clear

AD5318 Octal, 10 Bit, INL=4 LSB, DNL=1/2LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout=0>Vdd, Vays=+2.5>5.5V @ 1.8mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI, w/LDAC Pin & S’Ware LDAC

AD532 Vout=(Vx1-Vx2)*(Vy1-Vy2)/10, Total Error=1%>4%, INL X Input=0.5%>0.8%, INL Y Input=0.2%>0.3%, BW=1MHz, SR=45V/usec, Vsys= +/-15V @6mA, Laser Trimmed, see AD633 for new designs

AD5320 Single, 12 Bit, INL=16 LSB, DNL=1 LSB, Vref,=Vdd, Vsys=+2.7V, Iq=250uA, w/Powerdown, I/O=SPI w/Schmitt Triggers, Power on Reset to Zero, Rail to Rail Output

AD5321 Single, 12 Bit, INL=16 LSB, DNL=/ LSB, Vref,=Vdd, Vsys=+2.7V @ 250uA, w/Pdown & Readback, I/O=I2C, w/Power on Reset to Zero, Rail to Rail Output,

AD5322 Dual, 12, Bit, INL=12 LSB, DNL=1 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25> Vdd Buffered or Unbuffered (Softwar Prgm), Vout=Rail to Rail, Vsys=+2.5>5.5V @ 0.45mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Schmitt Triggers), w/LDAC

AD5323 Dual, 12 Bit, INL=12 LSB, DNL=1 LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Scmitt Triggers) w/LDAC & Clear, SDO


PART DESCRIPTION


AD5324 Quad, 12, Bit, INL=12 LSB, DNL=1 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25> Vdd Unbuffered, Vout=Rail to Rail, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI (Schmitt Triggers), w/S’Ware LDAC

AD5325 Quad, 12, Bit, INL=16 LSB, DNL=1 LSB, Vos=3% FSR, Gain Error=1% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0.25>Vdd Unbuffered, Vout=Rail to Rail, Vsys=+2.5>5.5V @ 0.9mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=I2S, w/LDAC, Software Clear, R’Back

AD5326 Quad, 12 Bit, INL=16 LSB, DNL=1LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 4 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout Prgm=0>4 Vref or 24 Vref, Vays=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=I2S, w/LDAC, S’ware Clear, R’Back

AD5328 Octal, 12 Bit, INL=16 LSB, DNL=1LSB, Vos=60mV, Gain Error=1.25% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered, Vout=0>Vdd Vays=+2.5>5.5V @ 1.8mA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=SPI, w/LDAC Pin & S’Ware LDAC

AD5330 Single, 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 250uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P8, w/LDAC & Clear

AD5331 Single, 10, Bit, INL=4 LSB, DNL=1/2 LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 250uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P10, w/LDAC & Clear

AD5332 Dual, 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P8, w/LDAC & Clear

AD5333 Dual, 10, Bit, INL=4 LSB, DNL=1/2 LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P10, w/LDAC & Clear

AD5334 Quad, 8, Bit, INL=1 LSB, DNL=1/4 LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P8, w/LDAC & Clear

AD5335 Quad, 10, Bit, INL=4 LSB, DNL=1/2 LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P10, w/LDAC & Clear

AD5336 Quad, 12, Bit, INL=16 LSB, DNL=1LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P12, w/LDAC & Clear

AD534 Vout=(Vx1-Vx2)*(Vy1-Vy2)/10+Z, Total Error=0.25%>1%, INL X Input=0.12%>0.4%, INL Y Input=0.1%, BW=1MHz, SR=20V/usec, Vsys= +/-15V @ 6mA, Laser Trimmed,

AD5340 Single, 12, Bit, INL=16 LSB, DNL=1LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 250uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P12, w/LDAC & Clear

AD5341 Single, 12, Bit, INL=16 LSB, DNL=1LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>Vref or 2Vref, Vsys=+2.5>5.5V @ 250uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P8, w/LDAC & Clear

AD5342 Dual, 12, Bit, INL=16 LSB, DNL=1LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P12, w/LDAC & Clear

AD5343 Dual, 12, Bit, INL=16 LSB, DNL=1LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 450uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P8, w/LDAC & Clear


PART DESCRIPTION


AD5344 Quad, 12, Bit, INL=16 LSB, DNL=1LSB, Vos=3% FSR, Gain Error=1.% FSR, Multiply BW=200KHz, SR=0.7V/usec, ST=8usec, THD= -70dB @ 10KHz, 2 Vref Ext=0>Vdd/2 Buffered or Unbuffered (Pin Strap), Vout Prgm=0>2 Vref or 22 Vref, Vsys=+2.5>5.5V @ 900uA, w/Powerdown Iq=1uA, Power on Reset to Zero, I/O=P8, w/LDAC & Clear

AD53500 300MHz Update Rate, Vout= -2V to +8V

AD53508 Four Quadrant/PIN V/I source, Iforce=204.8uA to 2.048mA, Vout= -4V>+9V, parametric Measurement Circuit

AD53509 Active Load Toggle Rate=250Mhz, Vout=+/-2V, Pin Driver Toggle Rate=250MHz, Vout=-3>+8V, Iout=120mA, Window Comp S/T=25nsec, Prop Delay=1.8nsec, Vsys=-7V &+12V @ 270mA, w/Schottky Diode Bridge

AD53513 Quad, 1000MHz Update Rate, Vout= -0.2V to +8V

AD53522 Dual, Active Load Toggle Rate=1000Mhz, Vout= -0.5V>+6.5V, Pin Driver Toggle Rate=1000MHz, Vout= -0.5V>+6.5V, Iout=50mA, Window Comp S/T=25nsec, Prop Delay=1.1nsec, Vsys=-7V &+12V @ 270mA, w/Schottky Diode Bridge

AD536A Total Error= ±2mV ±0.2% of Reading>±5mV ±0.5% of Reading, Iout=40uA/Vrms, -3dB BW @ Vin=10mV=6KHz, Vin Range @ Vsys ±15V= +/-20V, Vsys= ±15V @ 2mA, w/dB Output & Buffer Output Amp

AD537 Fout=0>150KHz, INL=0.07>0.25%, FS Calibration Error/TC=5>7%/50>150ppm/C, Vos=2>5mV, TCVos=1>10uV/C, Ib=100nA, Vin= -Vs> +Vs-4V, Vs=+5>+/-15V, Iq=1.2mA, w/1mV/K Temp Output & Vref=1.0V

AD5379 13 Bit, 40 Channel, INL=2LSB, DNL-1LSB, Settling Time=16usec, Vsys=+/12V & 40mA, Vcc=+3.3V & 5mA, Vref Ext=+1.5>5V & -3.5>0V, Vout Range= +/-8.5V, User Calibration of Gain & Offset=I/O=SPI & Parallel

AD538 ANALOG COMPUTATION UNIT, Vout=Vy(Vz/Vx)^m

AD539 Dual Channel, Vout1=(-Vx*Vy1)/Vq Vout=(-Vx*Vy2)/Vq, Total Error=1.5>4%, -3dB BW=30MHz, SR=20V/usec, Vin= +/-2V, Vq=0>3V, Vsys= +/-5V @ 10.2/22.2mA, Laser Trimmed,

AD5399 Dual, 12 Bit, INL=10 LSB, DNL=1 LSB, Vout=+2V +/-2V, S/'Time=0.8usec, Vref Int=+2V, Vsys=+5V @ 2.5mA, I/O=Serial 3 Wire 25MHz, w/Power on Reset, 2SC's

AD5424 Single, 8 Bit, 4 Quad Multiply, INL=1 LSB, DNL=1/2 LSB, Vref Mult BW=10MHz, S/Time=15nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O=SPI 50MHz, wLDAC Pin

AD5425 Single, 8 Bit, 4 Quad Multipy, INL=1 LSB, DNL=1/2 LSB, Vref Mult BW=10MHz, S/Time=15nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O= SPI 50MHz, w/Serial Out Pin

AD5426 Single, 8 Bit, 4 Quad Multipy, INL=1 LSB, DNL=1/2 LSB, Vref Mult BW=10MHz, S/Time=15nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O= SPI 50MHz, w/Load Dac Pin

AD5432 Single, 10 Bit, 4 Quad Multipy, INL=1 LSB, DNL=1/2 LSB, Vref Mult BW=10MHz, S/Time=15nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O= SPI 30MHz

AD5433 Single, 10 Bit, INL=1 LSB, DNL=1 LSB, Vref Mult BW=10MHz, S/Time=22nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O=P10

AD5443 Single, 12 Bit, INL=2 LSB, DNL=1 LSB, Vref Mult BW=10MHz, S/Time=30nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O=SPI 30MHz

AD5445 Single, 12 Bit, INL=2 LSB, DNL=1 LSB, Vref Mult BW=10MHz, S/Time=33nsec, THD @ 1KHz Tone= -85dB, Iout=Vref/10K, Double Buffered, Vsys=+2.5>5V @ 10uA, I/O=P12

AD549 Single, Vos=0.25>1mV, TCVos=5>20uV/C, Ib=60>250fA, enoise=35nV/sqrthz, CMRR=80>90dB, BW=0.7MHZ, SR=2V/usec, S/Time to 0.01%=5usec, Vsys=+/-5>+/-15V @ 700uA

AD5516 12 Bit, 16 Channel, INL=2 LSB, DNL=1 LSB, Settling Time=20usec, Vref Ext=+2.5V, Vout= +/-2.5 or +/-5V or +/-10V, Vss=-5 to -12V & Vdd=+5 to +12V @ 7.5mA, & +5V @ 16.5mA & Vdrive=+3>+5V @ 1.5mA, I/O=SPI 25MHz +3V w/Vdrive, Rout=3 Options 0.5/500/100 ohms

AD5520 1 Channel, Force Voltage= -11V>+11V, Voltage Measure= -9V>+9V, 4 Programmable Iout=4uA, 40uA, 400uA, 4mA, Vsys= +/-15V @ 12/12mA, w/Comparator % Guard Driver

AD5530 Single 12 Bit,, INL=1 LSB, DNL=1 LSB, Vref Ex=+5V, S/Time=20usec, Vout= +/-10V, Vsys=+/-15V @ 2mA, I/O=SPI, w/Serial Output Pin, Power on Reset, Power Down,

AD5531 Single 14 Bit,, INL=2 LSB, DNL=1 LSB, Vref Ex=+5V, S/Time=20usec, Vout= +/-10V, Vsys=+/-15V @ 2mA, I/O=SPI, w/Serial Output Pin, Power on Reset, Power Down,

AD5532 14 Bit, 32 Channel, INL=64 LSB, DNL=1 LSB, Settling Time=22usec, Vref Int=+3V, Vout= Vss+2V>Vdd-2V, Vss=-5 to -16.5V @15mA, Vdd=+8 to +16.5V @ 15mA, AVcc= +5V @ 33mA & Vdrive=+3>=5V @ 1.5mA, I/O=SPI 14MHz +3V w/Vdrive, Rout=3 Options 0.5/500/100 ohms


PART DESCRIPTION


AD5532B 14 Bit, 32 Channel, INL=64 LSB, DNL=1 LSB, Settling Time=22usec, Vref Int=+3V, Vout= Vss+2V>Vdd-2V, Vss=-5 to -16.5V @15mA, Vdd=+8 to +16.5V @ 15mA, AVcc= +5V @ 33mA & Vdrive=+3>=5V @ 1.5mA, I/O=SPI 14MHz +3V w/Vdrive, Rout= 0.5, Trimmed Version of AD5532

AD5532HS 14 Bit, 32 Channel, INL=64 LSB, DNL=1 LSB, Settling Time=2usec, Vref Ext=+2.5V, Vout= 0>Vref or +/-Vref, Vss=-5 to -12V & Vdd=+5 to +12V @ 15mA, & +5V @ 33mA & Vdrive=+3>=5V @ 1.5mA, I/O=SPI 30MHz +3V w/Vdrive,

AD5533 14 Bit, 1 Channel Input, 32 Channel Out, Acquistion Time=16usec, Settling Time=3usec, Vref Int=+3V, Vout= Vss+2V>Vdd-2V, Vdd=+8>16.5 @15mA, Vss=-5>-16.5 @ 15mA, AVcc= +5V @ 33mA & Vdrive=+3>=5V @ 1.5mA, I/O=SPI 14MHz +3V w/Vdrive, Rout=3 Options 0.5/500/1000 ohms

AD5533B 14 Bit, 1 Channel Input, 32 Channel Out, Acquistion Time=16usec, Settling Time=3usec, Vref Int=+3V, Vout= Vss+2V>Vdd-2V, Vdd=+8>16.5 @15mA, Vss=-5>-16.5 @ 15mA, AVcc= +5V @ 33mA & Vdrive=+3>=5V @ 1.5mA, I/O=SPI 14MHz +3V w/Vdrive, Rout= 0.5, Trimmed version of AD5533

AD5541 Single, 16 Bit, INL=1>4 LSB, DNL=1>1.5 LSB, Gain Error=5 LSB, Zero Error=1 LSB, S/TIME=1ussec, SR=25V/usec, Vref Ext=2V>Vdd, Vout=0 to +Vref unbuffered,Vsys=+5V @ 1.1mA, I/O=SPI 25MHz w/Schmitt Trigger Input

AD5542 Single, 16 Bit, INL=1>4 LSB, DNL=1>1.5 LSB, Gain Error=5 LSB, Zero Error=1 LSB, S/TIME=1ussec, SR=25V/usec, Vref Ext=2V>Vdd, Vout=0 to +Vref unbuffered,Vsys=+5V @ 1.1mA, I/O=SPI 25MHz w/Schmitt Trigger Input, w/Rfb for Bipolar Operation, Kelvin Sense Pin for Vref, /LDAC Pin

AD5543 Single, 16 Bit, Current Output, I fullscale=2mA, Vref Range=+10/-10V, Settling Time= 0.5usec, INL=1> 4 LSB’s, DNL=1>1.5.LSB’s, Glitch=1.2nV-sec, Vsys= +5V @ 10uA, Double Buffered, I/O= Serial 40MHz

AD5544 Quad, 16 Bit, Current Output, I fullscale=2mA, 4 Vref=+10/-10V bandwith=2.0MHz,Settling Time= 2usec,INL= 4 LSB’s, DNL=1.5 LSB’s, Glitch=1.2nV-sec, Crosstalk=-90dB, Vss +5V @ 250uA, -Vss=-300mV

AD5544EVAL Evaluation Board for the AD5544 Quad 16 Bit D/A

AD5545 Dual, 16 Bit, Current Output, I fullscale=2mA, Vref Range=+12/-12V, Settling Time= 0.5usec, INL= 2 LSB’s, DNL=1>1.5.LSB’s, Glitch=7nV-sec, Vss +5V @ 10uA, w/Power On Reset, Double Buffered, I/O=Serial, w/LDAC Pin

AD5551 Single, 14 Bit, INL=1 Bit, DNL=0.8 Bit, Gain Error=0>1.75LSB, Zero Error=0>1/2 LSB, S/Time= 1usec, SR=25V/usec,Vref Ext=2V>Vdd, Vout=0>Vref Unbeffered, Vsys=+5V @ 1.1mA, I/O=SPI 25MHz, w/Schmitt Triggers

AD5552 Single, 14 Bit, INL=1 Bit, DNL=0.8 Bit, Gain Error=0>1.75LSB, Zero Error=0>1/2 LSB, S/Time= 1usec, SR=25V/usec,Vref Ext=2V>Vdd, Voutt=0>Vref Unbeffered, Vsys=+5V @ 1.1mA, I/O=SPI 25MHz w/Schmitt Triggers, w/Rfb for Bipolar Operation, Kelvin Sense Pin for Vref, /LDAC Pin

AD5553 Single, 14 Bit, Current Output, I fullscale=2mA, Vref Range=+10/-10V, Settling Time= 0.5usec, INL=1> 4 LSB’s, DNL=1>1.5.LSB’s, Glitch=1.2nV-sec, Vsys= +5V @ 10uA, Double Buffered, I/O= Serial 40MHz

AD5554 Quad, 14 Bit, Current Output, I fullscale=2mA, 4 Vref=+10/-10V bandwith=2.0MHz, Settling Time= 2usec,INL= 1 LSB’s, DNL=1 LSB’s, Glitch=1.2nV-sec, Crosstalk=-90dB, Vsys= +5V @ 250uA, -Vss=-300mV

AD5555 Dual, 14 Bit, Current Output, I fullscale=2mA, Vref Range=+12/-12V, Settling Time= 0.5usec, INL= 1 LSB’s, DNL=1LSB’s, Glitch=7nV-sec, Vss +5V @ 10uA, w/Power On Reset, Double Buffered, I/O=Serial, w/LDAC Pin

AD557 Single, 8 Bit, Vout=0>2.56V, Gain Error=2.5 LSB, Gain Error over Temp=1 1/2LSB, Zero Offset=3LSB, INL=1 LSB, DNL=1 LSB, S/Time=1.5usec to 1/2LSB, Vref Int.==2.56V, Vsys=+5V @ 25mA I/O= P8 Single Latch

AD558 Single, 8 Bit, Vout=0>2.56V Vsys=+5V, 0>+10 Vsys=+15V, Gain Error=0.5>1.5 LSB, Gain Error over Temp=1/2>1LSB, Zero Offset=1/2>1 LSB, INL=1/4>1 LSB, DNL=1 LSB, S/Time=1.5usec to 1/2LSB, Vref Int.=+2.56V, Vsys=+5V or +15V @ 25mA I/O= P8 Single Latch

AD5582 Quad, 12 Bit, INL=1 LSB, DNL=1LSB, Gain Error=2 LSB, Zero Error=2 LSB, Vrefext=4 Vrefhi & 4Vreflow, Vout=Vref hi to Vref low, ST=5usec, Vsys=+5>+15 or +/-5V @ 12mA, I/O=P12, w/Reset to Zero or Midscale & Readback, Multiplying BW=1MHz

AD5583 Quad, 10 Bit, INL=1 LSB, DNL=1LSB, Gain Error=2 LSB, Zero Error=2 LSB, Vrefext=4 Vrefhi & 4Vreflow, Vout=Vref hi to Vref low, ST=5usec, Vsys=+5>+15 or +/-5V @ 12mA, I/O=P12, w/Reset to Zero or Midscale & Readback, Multiplying BW=1MHz

AD561 Single, 8 Bit, Iout=0>-2.0mA, Gain Error=0.1%FSR, Gain Error TC=30>80ppm/C, Zero Offset=0.05%FSR, INL=1/4>1/2, DNL=1/2 LSB, S/Time=250nsec to 1/2LSB, Vref Int.=+2.5V, Vsys=+5>15V & -15V @ 10/16mA I/O= P10, On chip resistors for Vout=0>+10V or +/-5V

AD565A Single, 12 Bit, Iout=0>-2.0 or +/-1mA, Gain Error=0.25%FSR, Gain Error TC=20>50ppm/C, Zero Offset=0.05%FSR, INL=1/4>1/2 LSB, DNL=1/2>3/4 LSB, S/Time=250nsec to 1/2LSB, Vref Int.=+10V, Vsys=+12>+15V & -12>-15V @ 10/25mA I/O= P12, On chip resistors for Vout=0>+5 / +10/ +/-2.5/ +/-5/ +/-10V


PART DESCRIPTION


AD567 Single, 12 Bit, Iout=0>-2.0 or +/-1mA, Gain Error=0.25%FSR, Gain Error TC=20>50ppm/C, Zero Offset=0.05%FSR, INL=1/4>1/2 LSB, DNL=1/2>3/4 LSB, S/Time=250nsec to 1/2LSB, Vref Int.=+10V, Vsys=+12>+15V & -12>-15V @ 5/25mA I/O= P4/8/12 w/Double Buffered Latch, On chip Resistors for Vout=0>+5 / +10/ +/-2.5/ +/-5/ +/-10V

AD568 Single, 12 Bit, Iout=0>+10.24 or +/-5.12mA, Gain Error=1%FSR, Gain Error TC=50ppm/C, Zero Offset=0.2%FSR, INL=1/4>1/2 LSB, DNL=1 LSB, S/Time=35nsec to 1 LSB, Vref INT=+1.4V, Vsys=+12>+15V & -13>-15V @ 32/8mA I/O= P12, Glitch Inpulse/Peak Amplitude-350pV-secs/15%FSR, rise/fall time=11nsec, Rout=200ohms,

AD569 Single, 16 Bit Segmented 4 Quadrant Multipling, Vout=+/-5V @ 5mA, Gain Error=+/-2 LSB, Zero Offset=200>400uV, INL=0.02>0.025%FSR, DNL=1/2>1 LSB, S/Time=6usec to 1 LSB, Vref Ext= -5>+5V, Vsys=+12>+15V & -12>+15V @ 8/6mA I/O= P8/16, Double Buffered, Glitch Impulse=500nV-secs, Full Power Vref=10KHz

AD570 8 Bit, 40usec, INL=1/2, DNL=1/2LSB, Gain Error=2 LSB, Gain Error TC=2LSB, Unipolar Offset=1/2 LSB, Bipolar Offset=1/2 LSB, Vref=Int, Vin=0>+10V or +/-5V,Rin=3K, Vsys=+5V & +/-15V @ 5/10/10mA, I/O=Parallel 8, Tri-State Ouputs

AD571 10 Bit, 40usec, INL=1/2>1, DNL=1/2>1LSB, Gain Error=2 LSB, Gain Error TC=2>5LSB, Unipolar Offset=1/2 LSB, Bipolar Offset=1 LSB, Vref=Int, Vin=0>+10V or +/-5V,Rin=3K, Vsys=+5V & +/-15V @ 5/10/10mA, I/O=Parallel 10, Tri-State Ouputs

AD573 10 Bit, 40usec, INL=1/2>1, DNL=1/2>1LSB, Gain Error=2 LSB, Gain Error TC=2>5LSB, Unipolar Offset=1/2 LSB, Bipolar Offset=1 LSB, Vref=Int, Vin=0>+10V or +/-5V,Rin=3K, Vsys=+5V & +/-15V @ 5/10/10mA, I/O=Parallel 10 or 8 Byte, Tri-State Ouputs

AD574A 12 Bit, 25usec, INL=1/2>1, DNL=1/2>1LSB, Gain Error=0.25%FSR, Gain Error TC=10>50ppm, Unipolar Offset=2 LSB, Bipolar Offset=4>10 LSB, Vref=Int, Vin=0>+10V or +/-5V,Rin=3K, Vsys=+5V & +/-12>15V @ 40/5/30mA, I/O=Parallel 8/12, Tri-State Ouputs

AD578 12 Bit, 3>6usec, INL=1/2, DNL=1LSB, Gain Error=0.25%FSR, Gain Error TC=30ppm, Unipolar Offset=0.24%FSR, Bipolar Offset=0.25FSR, Vref Int=+10V, Vin=0>+10V 0>+20V +/-5V +/-10,Rin=5/10K, Vsys=+5V & +/-12>15V @ 150/8/35mA, I/O=Parallel 12, or Serial

AD580 Vout=+2.5V, Vout Error=10>75mV, TCVout=10>85ppm, enoise 0.1>10hz=60uVpp, Vcc=+4.5>30V @ 1.5mA, Band Gap, See AD680 or AD780 for new designs

AD581 Vout=+10V, Vout Error=5>30mV, TCVout=5>30ppm, enoise 0.1>10hz=50uVpp, Vcc=+13>30V @ 1mA, Band Gap,

AD582 Single, Acq. Time=6usec to .1%, Aperture Time/Jitter=150nsec/15nsec, Vin=+/-10V, Vout=+/-10V, S/H Offset=0.5mV, Vos=6mV, Ib=3uA, CMRR=60dB, SSBW=1.5MHZ, SR=3V/sec,FPBW=70KHz, Vsys=+/->15V @ 4.5mA,

AD584 Vout Pin Strap=+2.5, +5, +7.5, +10V, Vout Error=2.55>30mV, TCVout=5>30ppm, enoise 0.1>10hz=50uVpp, Vcc=+15>30V @ 1mA, Band Gap,

AD585 Single, Acq. Time=3usec to .1%, Aperture Time/Jitter=35nsec/0.5nsec, Vin=+/-10V, Vout=+/-10V, S/H Offset=no spec, Vos=3mV, Ib=2nA, CMRR=80dB, SSBW=2MHZ, SR=10V/sec,FPBW=160KHz, Vsys=+/->15V @ 10mA,

AD586 +5V, Vos=2>25mV, TCVos=2 >25 ppm, Buried Zener

AD587 +10V, Vos=5>10mV, TCVos=5 >20 ppm, Buried Zener

AD588 PIN PROGRAMMABLE, +10, +5, ±5, -5, -10V, Buried Zener

AD589 Vout=+1.2V, Vout Error=0>50mV, TCVout=10>100ppm, enoise 10Hz+/-10C, INL=0.3C>3C, Vcc= +5V>+30V, 3 Pin Header

AD592 Iout=1uA/Degree Kelvin @25CIout=298.2uA, Calibtation Error= +/-0.15C>+/2.5C, INL=0.15C>0.35C, Vcc= +5V>+30V, 8 Pin Dip

AD594 Vin=J Thermocouple (51.7uV/C), Vout=10mV/C, Internal Cold Junction Compensation, Gain=193.4, Gain Error= =0.75>=1.5%, Calibration Error/TC=1C>3C/0.025>0.05C/C, Ib=100pA, Vsys=+5V @ 300uA or +/-15V @ 300/100uA, non Isolated, w/High Low Set Points for set point controller mode & open thermocouple alarm Output

AD595 Vin=K Thermocouple (40.44uV/C), Vout=10mVC, Internal Cold Junction Compensation, Gain=247.3, Gain Error= =0.75>=1.5%, Calibration Error/TC=1C>3C/0.025>0.05C/C, Ib=100pA, Vsys=+5V @ 300uA or +/-15V @ 300/100uA, non Isolated, w/High Low Set Points for set point controller mode & open thermocouple alarm Output

AD596 Vin=J Thermocouple (51.70uv/C), Vout=10mV/C, Internal Cold Junction Compensation, Gain=180.6, Gain Error=1.5%, Calibration Error/TC=4C/0.05C/C, Ib=100pA, Vsys=+5V @ 300uA or +/-15V @ 300/100uA, non Isolated, w/High Low Set Points for set point controller mode & open thermocouple alarm Output


PART DESCRIPTION


AD597 Vin=K Thermocouple (40.44)uV/C, Vout=10mV/C, Internal Cold Junction Compensation, Gain=245.3 Gain Error=1.5%, Calibration Error/TC=4C/0.05C/C, Ib=100pA, Vsys=+5V @ 300uA or +/-15V @ 300/100uA, non Isolated, w/High Low Set Points for set point controller mode & open thermocouple alarm Output

AD598 LVDT, 5 Wire, Vout=(A-B)/(A+B)*(500uA*R2), Gain Error=1%, Gain Error Drift=50ppm,Vsys=+17.5V @ 15mA or +/-13V @ 15mA

AD600 Dual, -3dB BW=35MHz, Slew Rate=275V/usec, Gain Range=0>+40dB, Enoise=1.4nV/sqrtHz, Rin=100ohms, Accuracy=0.5>1.5%, Vsys=+/-5V @ 12.5/14mA

AD602 Dual, -3dB BW=35MHz, Slew Rate=275V/usec, Gain Range=-10>+30dB, Enoise=1.4nV/sqrtHz, Rin=100ohms, Accuracy=0.5>1.5%, Vsys=+/-5V @ 12.5/14mA

AD603 Single, -3dB BW Pin Select =9 or 90MHz, Slew Rate=275V/usec, Gain Range Pin Select = -11 to +31dB or +9 to +59dB, Enoise=0.8nV/sqrtHz, Rin=100ohms, Accuracy=1%, Vsys=+/-5V @ 17/20.4mA

AD603EB Evaluation Board FOR AD703, $49, Part Included

AD604 Dual, -3dB BW=40 MHz, Slew Rate=170V/usec, Gain Range= 0 to +48dB (PGA Gain=+14dB) or +6 to +54dB (PGA Gain=+20dB), Enoise=0.8nV/sqrtHz, Rin=300K, Accuracy=1>3%, Vsys=+/-5V @ 36/15mA, w/Pin Programmable Pre-Amp,


AD605 Dual, -3dB BW=40 MHz, Slew Rate=170V/usec, Gain Range= -14 to +34dB or 0 to 48dB, Enoise=0.8nV/sqrtHz, Rin=175ohms, Accuracy=1>3%, Vsys=+5V @ 23mA, w/Pin Strap Gain Ranges


AD606 LOG Amp BW=200Hz>50 MHz, Rin=500ohms, Log Range -60dB>+20dB, RSSI BW=100MHz, RSI Slope=37.5mV/dBm, RSSI intercept= -88.3dB, RSSI Response=400nsec, Vsys=+5V @ 13mA, w/P/Down


AD607 Dual Conversion Mixer/AGC/RSSI, +2.95V @ 8.5mA w/Powerdown Iq=550uA, IF=First 21.4>300MHz Second, 450KHz>12MHz, IF Type=Linear IF amplifier/Linear in dB gain Control, Output Single Ended I/Q


AD608 Dual Conversion Mixer/AGC/RSSI, +2.7V @7.3mA w/Powerdown Iq=550uA, IF=First 21.4>300MHz Second 450KHz>21.4MHz, IF Type=Log Amp, Output Limited IF and RSSI


AD6190 900MHz RF Transceiver,, RX 93mA TX, Single conversion IF=10.7MHz, IF amp=LOG, IF Outputs=Limited IF and RSSI, Vsys=+2.7V @ 59mA,for ISM Cordless Phones

AD6190-EB-Z1 Evaluation Board Top View for the AD6190, Complete RF Module, used with Zilog Wave Chip

AD6190-EB-Z2 Evaluation Board Schematic for the AD6190, Complete RF Module, used with Zilog Wave Chip

AD6190-EB-Z3 Evaluation Board Specs for the Z5 Radio, Complete RF Module, used with Zilog Wave Chip

AD6190-EB-Z4 Evaluation Board Operating Notes for the Z5 Radio, Complete RF Module, used with Zilog Wave Chip

AD6190-EBTP Evaluation Board Test Procedures for the AD6190, Stand Alone

AD6190-EBV Evaluation Board Operating Notes for the AD6190

AD620 Vos RTI=50>125uV, TCVosi=0.6>1uV/C, Vos RTO=0.5>1mV, TCVoso=7>15uV/C, Ib=1>2nA, @ Av=1 CMRR=73>80dB, BW=1MHz, S/Time=15usec, Vsys=+/-5>+/-15V @ 1.3mA, Av=1 to 1000

AD621 Vos RTI=125>250uV, TCVosi=1.5>2.5uV/C, Vos RTO=0mV, TCVoso=0uV/C, Ib=1>2nA, @ Av=10 CMRR=93>100dB, BW=800KHz, S/Time=12usec, Vsys=+/-2.3>+/-15V @ 5mA, Av=Pin Prgrm 10, 100

AD622 Vos RTI=125uV, TCVosi=1uV/C, Vos RTO=1.5mV, TCVoso=15uV/C, Ib=5nA, @ Av=1 CMRR=66dB, BW=1MHz, S/Time=10usec, Vsys=+/-5>+/-15V @ 1.3mA, Av=1 to 1000

AD623 Vos RTI=1>500uV, TCVosi=1>2uV/C, Vos RTO=0.5>2mV, TCVoso=10uV/C, Ib=25nA, @ Av=1 CMRR=70>77dB, BW=0.8MHz, S/Time=30usec, Vsys=+5>+/-6V @ 0.575mA, Av=1 to 1000

AD624 Vos RTI=25>200uV, TCVosi=0.25>2uV/C, Vos RTO=2>5mV, TCVoso=10>50uV/C, Ib=15>50nA, @ Av=1 CMRR=70>80dB, BW=1MHz, S/Time=15usec, Vsys=+/-6>+/-15V @ 5mA, Av=Pin Prgrm 1, 10, 100, 500, 1000

AD625 Vos RTI=25>200uV, TCVosi=0.5>2uV/C, Vos RTO=2>5mV, TCVoso=2>5uV/C, Ib=15>50nA, @ Av=1 CMRR=70>80dB, BW=0.65MHz, S/Time=15usec, Vsys=+/-6>+/-15V @ 5mA, Av=1 to 10,000

AD626 Vos RTI=2.5mV, TCVosi=6uV/C, Rin=200K, CMV=6*(Vsys-1), @ Av=10 CMRR=66>80dB, BW=100KHz, S/Time=24usec, Vsys=+5>+/-6V @ 0.2mA, Pin Prgm.Av=10, 100, Transient spike & RFI filters

AD627 Vos RTI=150>250uV, TCVosi=1>3uV/C, Vos RTO=0.5>1mV, TCVoso=10uV/C, Ib=10nA, @ Av=5 CMRR=77>83dB BW=80KHz, S/Time=65usec, Vsys=+3>+/-15V @ 85uA, Av=5 to 1000


PART DESCRIPTION


AD628 Vos RTI=100uV, TCVosi=1uV/C, Gain Error=0.05%, @ Av=0.1 CMV= +/-100V, CMRR=80dB, BW=0.5MHz, SR=0.3V/usec, S/time=usec, Vsys=+5>+/-15V @ 1.5mA, Av Range=0.1>10,000

AD629 Vos RTI=0.5>1mV, TCVosi=10>20uV/C, Gain Error=0.03>05%, CMV= +/-250V, @ Av=1 CMRR=77>86dB BW=0.5MHz SR=1.7V/usec,S/time=15usec, Vsys=+/-2.5>+/-15V @ 1mA, Av=1 (380K/20K 4 resistor Bridge)

AD630 Closed Loop Gain Error & Match @ Av= +/-1 or +/-2 =0.05>0,1%, VOS=160>800Uv, Ib=300>500nA, CMRR=85>90dB, BW=2MHz, SR=45V/usec, Vsys= +/-15V @ 5mA,

AD632 Vout=(Vx1-Vx2)*(Vy1-Vy2)/10+Z2, Total Error=0.5%>1%, INL X Input=0.25%>0.5%, INL Y Input=0.1%, BW=1MHz, SR=20V/usec, Vsys= +/-15V @6mA, Laser Trimmed

AD633 Vout=(Vx1-Vx2)*(Vy1-Vy2)/10+Z2, Total Error=2%, INL X Input=1%, INL Y Input=0.4%, BW=1MHz, SR=20V/usec, Vsys= +/-15V @6mA, Laser Trimmed

AD636 Total Error= ±2mV ±1% of Reading>±0.2mV ±0.3% of Reading, Iout=100uA/Vrms, -3dB BW @ Vin=20mV=100KHz, Vin Range=±5V @ Vsy=+/-5V, Vsys=±2.5>5V, Iq=1mA, w/dB Output & Buffer Output Amp

AD637 Total Error= ±1mV ±0.5% of Reading>±0.5mV ±0.2% of Reading, Iout=na, -3dB BW @ Vin=20mV=150KHz, Vin Range=±5V @ Vsy=+/-5V, Vsys=±2.5>5V, Iq=1mA, w/dB Output & Buffer Output Amp

AD640 Input=DC to 120 MHz, -50>0dB, Rin=500K, Vys=+/-5V @ 15/60mA

AD640EB Evaluation Board FOR AD640, $250, 2 PARTS INCLUDED

AD641 Input=DC to 250 MHz, -50>0dB, Rin=500K, Vys=+/-5V @ 15/60mA

AD6411 DECT RF Transceiver, Receiver: Mixer IF Amplifier, PLL demod, RSSI Transmitter: Baseband Data, VCO at 1/2 the R/F Frequency, Vsys=3.3>+5V @ 75mA

AD641EB Evaluation Board FOR AD641, $250, 2 PARTS INCLUDED

AD6472 HDSL AFE, Supports 1168KBPS or 2.32MBPS, 12 Bit A/D & D/A

AD650 Fout=0>1MHz, INL=0.005>0.05%, FS Calibration Error/TC=5%/75>150ppm/C, Vos=4mV, TCVos=30uV/C, Ib=100nA, Iin=0>0.6mA or Vin= 0>-10V, Vs=+/-9V>+/-15V, Iq=9mA

AD652 2MHz SYNCHRONOUS, Vcc=+/-15V, Iq=15mA, Accuracy=0.75>1.5% @2MHz, 100KHz F/V Mode

AD654 500 KHz, Vcc=+5V, Iq=2.5mA, Accuracy=.4% @500KHz

AD660 Single, 16 Bit, INL=1>2LSB, DNL=1>2 LSB, Gain Error=0.1%FSR, Vout=0>+10V, +/-10V, Vref Int=+10V, S/Time to 0.0008%FSR=13usec, Feedthrough=2 nV-sec, Glitch Impulse=15nV-sec, @ fin (0dB)=9995.5Hz THD/SNR=0.009%/83dB, Vsys=+5V & +/-15V@ 2/18/18mA, I/O=P8 or Serial, w//LDAC & Clear Pins, Double Buffered Latch

AD6600 11 Bit, 8 Bit MANTISSA, 3 Bit EXPONENT, 20MSPS, Input CAN TRACT 200MHz Signal, Dual Channel, (D/Range=92dB 30dB Variable Atten.+62dB A/D GAIN RANGING & RSSI, for NARROW BAND APPL.

AD6600/6620 DIVERSITY BASE STATION RECEIVER, FOR NEW AIR STANDARDS (GLOSSY), H3017-7.5-2/97

AD6600ST/PCB Evaluation Board for AD6600, $150, Part Included

AD6620 Dual Channel Decimating Receiver, 65/32.5MHz Single Channel Real/Diversity, w/32 Bit Quadrature NCO, Quadrature Mixer, 2nd & 5th order Comb FIR Filters w/ programmable decimation rates, Std's=IS-136, GSM, EDGE

AD6620S/PCB Evaluation Board for AD6620, $500, Part Included

AD6622 Quad, 75 MSPS Digital Transmitter: Digital Up Converter, RF Phase & Frequency tuners, Programmable Coefficient Cascaded Integrator Comb Interpolating Filter (RDC/CIC), and Numberically Controlled Oscillator/Tuner NCO, part of Softcell̂ TM chipset

AD6622S/PCB Evaluation Board for AD6622, $500, Part Included

AD6623 Quad, Digital Transmitter, 104 MSPS, Digital Up Converter, RF Phase & Frequency tuners, Programmable Coefficient Cascaded Integrator Comb Interpolating Filter (RDC/CIC), and Numberically Controlled Oscillator/Tuner NCO, AD6622 Upgrade

AD6624 Quad, Digital Receiver, 80MSPS 14 Linear Bits, 3 RSSI Bits, Programmable Decimating RAM Coefficient FIR Filters, Re-Sampling for Non-Interger Decimation Rates, Vsys=+2.5V @ 400mA, Vdrive=+3.3V @ 60mA, part of Softcell^TM chipset, Stds.=GSM, EDGE, IS-136, PHS

AD6624A Quad, Digital Receiver, 100MSPS 14 Linear Bits, 3 RSSI Bits, Programmable Decimating RAM Coefficient FIR Filters, Re-Sampling for Non-Interger Decimation Rates, Vsys=+2.5V @ 545mA, Vdrive=+3.3V @ 60mA, part of Softcell̂ TM chipset, Stds.=GSM, EDGE, IS-136, PHS

AD6624S/PCB Evaluation Board for AD6624 & AD6624A

AD6630 Differential Input, Differential Output, IF Gain Block, 70 to 250MHz IF Range, -3dB=700MHz, 3700V/usec, Av=24dB, @70/250MHz Output IP3 =+22/19dB, 1dB Compression Pt. 11/7.5dBm, NF=4dB, Zin=200ohms, Zout=400ohms, with Output Clamp


PART DESCRIPTION


AD6634 Quad w/4 Inputs, Digital Receiver: Signal Processor, 80MSPS 16 Bit Input, Programmable Decimating RAM Coefficient FIR Filters, Re-Sampling for Non-Interger Decimation Rates, part of Softcell̂ TM chipset, Stds.=IS-95, CDMA2000, UMTS

AD664 Quad 12 Bit, Vout=0>+10, +/-10V, Gain Error=5>7 LSB, Gain Error TC=10>12ppm/C, Zero Offset=1>2LSB, INL=1/2>3/4 LSB, DNL=1/2>3/4 LSB, S/Time=10usec to 1/2LSB, Vref Ext.= -10V>+10V, Vsys=+5V &+12>+15V & -12>-15V @ 1/15/19mA I/O= P4/8/12 Tri-State, w/Double Buffered Latch, Vref -3dB BW=70KHz

AD6640 12 Bit, 65MSPS >6.5min, BW=300MHz, INL=1.25, DNL=-1>+1.5, SNR/SINAD=66/d65.5B @ 69MHz, 2nd/3rd=78.5, Worst Harm>4th= 83 @ 69MHz, THD=ns,Vsys= +5V @ 160mA & Vdd=+3V @ 20mA, I/O= P12 +3V or +5V, 2 Tone IMD=80dBc @ f1 14.9MHz f2=16MHz

AD6640/6620 MULTI-Channel/MULTI-MODE BASE STATION RECEIVER, FOR NEW AIR STANDARDS (GLOSSY), H3016-7.5-2/97


AD6644 14 Bit, 40/65 MSPS, BW=250MHz, INL=1/2, DNL=-1>+1.5 SNR/SINAD=73.5/73dB @ 30.5 MHz, Worst Harm>4th= -92dB, Vsys= +5V @ 276mA & Vdd=+3V @ 36mA, I/O= P14 +3V w/Vdrive, 2 Tone IMD=90dBc @ f1 15.5MHz f2=15.9MHz


AD6645ST-105/PCB Evaluation Board for AD6645-105, $150, Part Included

AD6645ST-80/PCB Evaluation Board for AD6645-80, $150, Part Included

AD667 Single, 12 Bit, Vout=0>+5 / +10/ +/-2.5/ +/-5/ +/-10V, Gain Error=0.25%FSR, Gain Error TC=15>30ppm/C, Zero Offset=2 LSB, INL=1/4>1/2 LSB, DNL=1/2>3/4 LSB, S/Time=4usec to 1/2LSB, Vref Int.=+10V, Vsys=+12>+15V & -12>-15V @ 8.5/25mA I/O= P4/8/12 w/Double Buffered Latch

AD668 Single, 12 Bit, Iout=0>+10.24 or +/-5.12mA, Gain Error=1%FSR, Gain Error TC=15>40ppm/C, Zero Offset=0.2%FSR, INL=1/4>1/2 LSB, DNL=1/2>1 LSB, S/Time=90nsec to 0.1%, Vref=Ext, Vsys=+/-12>15V @ 32/9mA I/O= P12, Glitch Inpulse/Peak Amplitude=350pV-secs/20%FSR, rise/fall time=11nsec, Rout=200ohms, w/2Quadrant Multipying Vref FPBW=10MHz

AD669 Single, 16 Bit, INL=1>2LSB, DNL=1>2 LSB, Gain Error=0.1>0.15%FSR, Vout=0>+10V, +/-10V, Vref Int=+10V, S/Time to 0.0008%FSR=13usec, Feedthrough=2 nV-sec, Glitch Impulse=15nV-sec, @ fin (0dB)=9995.5Hz THD/SNR=0.009%/83dB, Vsys=+5V & +/-15V@ 2/18/18mA, I/O=P16, w//LDAC, Double Buffered Latch

AD670 10 Bit, 10usec, INL=1/4>1/2, DNL=1LSB, Gain Error=1/2>1 LSB, Gain Error TC=1 LSB, Unipolar Offset=1/2>1 LSB, Bipolar Offset=1/2>1 LSB, Vref Int=+10V, Vin=0>255mV, 0>2.55V, +/-128mV, +/-1.28V, Rin=5/10K, Vsys=+5V @ 45mA, I/O=Parallel 10, Tri-State

AD673 8 Bit, 30usec, INL=1/2, DNL=1LSB, Gain Error=2 LSB, Gain Error TC=2 LSB, Unipolar Offset=1/2 LSB, Bipolar Offset=1/2 LSB, Vref= Int, Vin=0>255mV, 0>+10V, +/-5V, Rin=5K, Vsys=+5V & -12>15V @ 25/15mA, I/O=Parallel 8, Tri-State

AD674B 12 Bit, 8>12usec, INL=1/2>1, DNL=1LSB, Gain Error=0.1>0.25%FSR, Gain Error TC=2>6 LSB, Unipolar Offset=1>2 LSB, Bipolar Offset=1> LSB, Vref=+10V, Vin=0>+10V, 0>20V +/-5V,+/-10V, Rin=5>10K, Vsys=+5V & +/-12>15V @ 7/7/14mA, I/O=Parallel 8/12, Tri-State Ouputs

AD676 16 Bit, 100KSPS, INL=1.5 LSB, DNL=1 LSB, Aperature Delay/Jitter=6nsec/100psec_rms, Vin= +/-Vref, Rin=no spec, Vref ext=+5>+10V, SSBW=no spec, FPBW=1MHz, THD= -88>90dB, SINAD @ fin 83KHz=85>87dB, 2 Tone IMD (fin 1.008KHz & 1.055KHz) 2nd/3rd= -102/-98dB, Vsys=+/-15V @ 5/18/18mA, I/O= P16, w/Autocalibration

AD676EB AD676, Evaluation Board, $200, Part Included

AD677 16 Bit, 100KSPS, INL=1.5 LSB, DNL=1 LSB, Aperature Delay/Jitter=6nsec/100psec_rms, Vin= +/-Vref, Rin=no spec, Vre Ext=+5V>+10V, SSBW=no spec, FPBW=1MHz, THD= -92>95dB, SINAD @ Fin 83KHz=88>90dB, 2 Tone IMD (Fin 1.008KHz & 1.055KHz) 2nd/3rd= -102/-98dB, Vsys=+/-15V @ 5/24/24mA, I/O= Serial, w/Aautocalibration

AD677EB AD677, Evaluation Board, $220, Part Included

AD678 12 Bit, 200KSPS, INL=1 LSB, DNL=1 LSB, Aperature Delay/Jitter=20nsec/150psec_rms, Vin= 0>+10, +/-10V, Rin=10M, Vref ext=+5V, SSBW=no spec, FPBW=1MHz, THD= -80dB, SINAD @ fin 10.6KHz=70dB, 2 Tone IMD (fin 9.008KHz&9.58KHz) 2nd/3rd= -80/80dB, Vsys=+5V & +/-15V @ 12/20/34mA, I/O= P8/12

AD679 14 Bit, 128KSPS, INL=2 LSB, DNL=1 LSB, Aperature Delay/Jitter=20nsec/150psec_rms, Vin= 0>+10, +/-10V, Rin=10M, Vref ext=+5V, SSBW=no spec, FPBW=1MHz, THD= -84dB, SINAD @ fin 10.009KHz=78>80dB, 2 Tone IMD (fin 9.008KHz&9.58KHz) 2nd/3rd= -84/84dB, Vsys=+5V & +/-15V @ 12/20/34mA, I/O= P8

AD680 +2.5V, Iq=250uA,Vos=50>100mV, TCVos= 25>50ppm

AD684 Quad, 4MHz, 700 nsec to 0.01%, +/-5V Input RANGE


PART DESCRIPTION


AD688 ±10V, Vos=2>5mV, TCVos=3>6ppm, eN=6uVpp, Buried Zener

AD693 TRANSMITTER, LOOP POWERED, 4 to 20 mA Output, CALIBRATED 30/70mV RANGES, Accuracy= 0.05%

AD694 TRANSMITTER, LOCALLY POWERED, REQUIRES EXTERNAL LOOP Supply, 4 to 20 mA Output, CALIBRATED 2 and 10V RANGES, Accuracy=0.05%

AD698 LVDT, 4 WIRE, Vout=A/B, Gain Error=1%, Gain Error Drift=100ppm

AD7008 10 Bit D/A, 32 Bit DDS, Update Rate=20>50MSPS, Phase Registers=1 12 Bit, INL=1 LSB, DNL=1 LSB, Iout=20mA, SNR/THD=50/-53@ fout=2Mhz, SFDR Narrow Band=70 @ 50KHz & fclk=6.25MHz, SFDR Wide Band=55dB @ 2MHz, Vsys=+5V @ 160mA, I/O=P16 or Serial, w/on chip 10 Bit I/Q Modulator & Summer

AD7011 BASEBAND TRANSMITTER DAC for TIA (NORTH AMERICA) DigitAL RADIO

AD704 Quad, Vos=75>150uV, TCVos=1>1.5uV/C, Ib=150>270pA, enoise=22nV/sqrthz, CMRR=94>110dB, BW=0.8Mhz, Slew Rate=.15V/usec, S/Time=no spec, Vsys=+/-2>+/-15V @ 2.4mA, Super Beta Input Stage

AD706 Dual, Vos=50>100uV, TCVos=0.6>1.5uV/C, Ib=120>200pA, enoise=22nV/sqrthz, CMRR=106>110dB, BW=0.8Mhz, Slew Rate=.15V/usec, S/Time=no spec, Vsys=+/-2>+/-15V @ 1.2mA, Super Beta Input Stage

AD708 Dual, Vos=30>100uV, Ib=1>2.5nA, TCVos=0.3>1uV/C, CMRR=120>130dB, enoise=11nV/SQRTHZ, BW=0.5MHz, SR=0.15V/usec, S/Time=no spec, Vdd=+/-3>+/-15V @ 5.5mA

AD711 Single, Vos=0.25>2mV, TCVos=3>20uV/C, Ib=25>50pA, enoise=18nV/sqrthz, CMRR=76>86dB, BW=3.4MHZ, SR=18V/usec, S/Time to 0.01%=1.2usecc, Vsys=+/-4.5>+/-15V @ 2.8>3.4mA, See AD8510

AD7111 Single, 8 Bit Log D/A, Attenuation=0>-88.5 dB, Resolution= 0.375dB, f Range= 20Hz>20KHz, Atten Accuracy=+/-0.17dB Range=0>-36dB, THD= -91dB, IMD= no spec, BW=no spec, Rin=9K, Vsys= +5V @ 4mA, I/O=8P w/Single Latch

AD7111A Single, 8 Bit Log D/A, Attenuation=0>-88.5 dB, Resolution= 0.375dB, f Range= 20Hz>20KHz, Atten Accuracy=+/-0.17dB Range=0>-36dB, THD= -91dB, IMD= no spec, BW=no spec, Rin=9K, Vsys= +5V @ 2mA, I/O=P8 w/Single Latch

AD7112 Dual, 8 Bit Log D/A, Attenuation=0>-88.5 dB, Resolution= 0.375dB, f Range= 20Hz>20KHz, Atten Accuracy=+/-0.17dB Range=0>-36dB, THD= -91dB, IMD= no spec, BW=no spec, Rin=9K, Vsys= +5V @ 2mA, I/O=P8 w/Double Buffered Latch

AD712 Dual, Vos=0.3>3mV, TCVos=5>20uV/C, Ib=50>75pA, enoise=18nV/sqrthz, CMRR=76>86dB, BW=3.4MHZ, SR=18V/usec, S/Time to 0.01%=1.2usecc, Vsys=+/-4.5>+/-15V @ 5.6>6.8mA, See AD8512

AD713 Quad, Vos=0.5>1.5mV, TCVos=15>20uV/C, Ib=75>150pA, enoise=18nV/sqrthz, CMRR=78>84dB, BW=3.4MHZ, SR=18V/usec, S/Time to 0.01%=1.2usecc, Vsys=+/-4.5>+/-15V @ 12>13.5mA

AD7224 Single, 8 Bit, INL=1/2>1 LSB, DNL=1/2>1 LSB, Full Scale Error=1/2>1 LSB, Zero Error=10>30mV, Vout=Vref, Vref Ext=+2>+10V, Vref Rin=2K, S/Time=5usec, Slew Rate=2V/usec, Vsys=+12>+15V & -5V @ 16/14mA or +/-5V @ 14/16mA or +15V @ 15mA, 8 Bit I/O, Double Buffered Latch

AD7225 Quad, 8 Bit, INL=1 LSB, DNL=1 LSB, Full Scale Error=1/2>1 LSB, Zero Error=15>20mV, Vout=Vref, 4 Vref Ext=+2>+10V, Vref Rin=11K, S/Time=5usec, Slew Rate=2.5V/usec, Vsys=+12>+15V & -5V @ 10/9mA or +5V @ 12mA, 8 Bit I/O, Double Buffered Latch Latch

AD7226 Quad, 8 Bit, INL=1 LSB, DNL=1 LSB, Full Scale Error=1 1/2 LSB, Zero Error=30mV, Vout=Vref, Vref Ext=+2>+10V, Vref Rin=8K, S/Time=5usec, Slew Rate=2.5V/usec, Vsys=+12>+15V & -5V @ 12/9mA or +5V @ 12mA, 8 Bit I/O, Single Latch

AD7228 Octal, 8 Bit, INL=1/2>1 LSB, DNL=1 LSB, Full Scale Error=1 1/2 LSB, Zero Error=15>25mV, Vout=Vref, Vref Ext=+2>+10V, Vref Rin=8K, S/Time=5usec, Slew Rate=2.5V/usec, Vsys=+12>+15V & -5V @ 12/9mA or +5V @ 12mA, 8 Bit I/O, Single Latch, See AD7228A

AD7228A Octal, 8 Bit, INL=1/2>1 LSB, DNL=1 LSB, Full Scale Error=1 1/2 LSB, Zero Error=15>25mV, Vout=Vref, Vref Ext=+2>+10V, Vref Rin=8K, S/Time=5usec, Slew Rate=2.5V/usec, Vsys=+12>+15V & -5V @ 12/9mA or +5V @ 12mA, 8 Bit I/O, Single Latch

AD723 Luma Gain Error=-6.25>+1.5%, Chroma Gain/Phase Error= 4%/3degrees, Composite Output=DC Coupled, Diff Phase/Gain Error=0.95 degrrees/0.9%, Vsys=+3V @ 29mA, w/ Triple Switch Enabled RGB Terminations

AD7233 Single, 12 Bit, INL=1/2>1 LSB, DNL=0.9 LSB, Full Scale Error=8 LSB, Bipolar Zero Error=6 LSB, Vout=+/-5V, Vref Int=+2.5V, S/Time=10usec, Glich=30nV-sec, Vsys=+12>+15V & -12>-15V @ 10/4mA, I/O=Serial w/LDAC, Double Buffered Latch


PART DESCRIPTION


AD7237 Dual, 12 Bit, INL=1/2LSB, DNL=0.9 LSB, Full Scale Error=3 LSB, Unipolar/Bipolar Zero Error=4 LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=8>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P8 w/LDAC, Double Buffered Latch

AD7237A Dual, 12 Bit, INL=1/2LSB, DNL=0.9 LSB, Full Scale Error=5>6 LSB, Unipolar/Bipolar Zero Error=3>4/4>6 LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=8>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P8 w/LDAC, Double Buffered Latch

AD724 Luma Gain Error=+/-7%, Chroma Gain/Phase Error= 5%/3degrees, Composite Output Diff Phase/Gain Error=2 degrrees/0.5%, Outputs AC Coupled, Vsys=+5V @ 42mA, w/ 4x Sub Carrier Clock Oscillator

AD7243 Single, 12 Bit, INL=1/2>1LSB, DNL=0.9 LSB, Full Scale Error=6>7 LSB, Unipolar/Bipolar Zero Error=4>5/>6 LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=10>12usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=Serial w/LDAC, Double Buffered Latch, Vrefout

AD7244 Single, 14 Bit, INL=2 LSB, DNL=1 LSB, Full Scale Error=10>15LSB, Bipolar Zero Error=10>15 LSB, Vout= +/-Vref, Vref Int=+3V, Vref Rin=Buffered, S/Time=4usec, Slew Rate=1V/usec, Vsys=+/-5V @ 28/15mA, I/O=Dual Serial w/2 LDAC

AD7245 Single, 12 Bit, INL=1/2>3/4LSB, DNL=1 LSB, Full Scale Error=0.2%fsr Unipolar/Bipolar Zero Error=3/5LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=7>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P12 w/LDAC, Double Buffered Latch, Vrefout, See AD7245A

AD7245A Single, 12 Bit, INL=1/2>3/4LSB, DNL=1 LSB, Full Scale Error=0.2%fsr Unipolar/Bipolar Zero Error=3/5LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=7>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P12 w/LDAC, Double Buffered Latch, Vrefout,

AD7247 Dual, 12 Bit, INL=1/2LSB, DNL=0.9 LSB, Full Scale Error=3 LSB, Unipolar/Bipolar Zero Error=4 LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=8>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P12, Single Latch

AD7247A Dual, 12 Bit, INL=1/2LSB, DNL=0.9 LSB, Full Scale Error=5>6 LSB, Unipolar/Bipolar Zero Error=3>4/4>6 LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=8>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P12, Single Latch

AD7248 Single, 12 Bit, INL=1/2>3/4LSB, DNL=1 LSB, Full Scale Error=0.2%fsr Unipolar/Bipolar Zero Error=3/5LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=7>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P8 w/LDAC, Double Buffered Latch, Vrefout, See AD7248A

AD7248A Single, 12 Bit, INL=1/2>3/4LSB, DNL=1 LSB, Full Scale Error=0.2%fsr Unipolar/Bipolar Zero Error=3/5LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=7>10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=P8 w/LDAC, Double Buffered Latch, Vrefout,

AD7249 Dual, 12 Bit, INL=1/2>1LSB, DNL=0.9 LSB, Full Scale Error=6>7 LSB, Unipolar/Bipolar Zero Error=5>6/5>7 LSB, Vout= Single Supply 0>+5V, 0>+10V, Dual Supply 0>+5V, 0>+10V, +/-5V, Vref Int=+5V, S/Time=10usec, Glich=30nV-sec, Vsys=+12>+15V & 0 or -12>-15V @ 15/5mA, I/O=Serial w/LDAC SYNC CLR, Double Buffered Latch, Vrefout


AD725 Luma Gain Error=+/-7%, Chroma Gain/Phase Error= 4%/3degrees, Composite Output Diff Phase/Gain Error=1.5 degrrees/0.5%, Outputs AC Coupled, Vsys=+5V @ 36mA, w/ Outputs 2x Standard Levels


AD7302 Dual, 8 Bit, Vsys=+2.7V @ 2mA, Vref=Ext, Powerdown (1uA), Rail to Rail Output, Parallel I/O, w/Clear & Power on Reset, 20 pin

AD7303 Dual, 8 Bit, Vsys=+2.7V @ 2mA, Vref=Ext, Powerdown (1uA), Rail to Rail Output, I/O=SPI, w/Power on Reset

AD7304 Quad, 8 Bit, Vdd=+2.7V>+5V or +/5V, Vout= Rail to Rail @3mA SR=1V/usec, Settling Time=1usec, 3 Wire Serial I/O w/Sdown LDAC CLR, 4 Vref Inputs w/BW=2.6MHz/50KHz Small/Large Signal, Power on Reset

AD7305 Quad, 8 Bit, Vdd=+2.7V>+5V or +/5V, Vout= Rail to Rail @3mA SR=1V/usec, Settling Time=1usec, Parallel I/O w/Sdown LDAC, 1 Vref Input w/BW=2.6MHz/50KHz Small/Large Signal, Power on Reset

AD7306 RS-232/422, Mode 1: Drivers= 1, Receivers=1 RS232 1 RS422, Mode 2: Drivers,=1, Receivers=1 RS232 2 RS422, Speed=RS232=100KBPS, RS422=5000KBPS


PART DESCRIPTION


AD7314 10 Bit, Format=2SC. Conversion Time=25usec, Update Rate=400usec, TC Range=-30C to +85C, Accuracy=2C,Vsys= +2.65V >2.9V @ 300uA, I/O=SPI or DSP, w/Power Down Iq=1uA, See AD7814

AD73311 16 Bit, Monaural Codec, (specs @ +3V Rail, fcl=16.384MHz fsample=64KSPS) A/D Side: SINAD=70dB @ PGA=0dB & fin 0.3>3.4KHz, THD=-70dB @ PGA=0 or 38dB, D/A Side: SINAD=62.5dB @ PGA=0dB & fin 0.3>3.4KHz, THD=-62.5dB @ PGA=0 or 6dB, Vsys=+3V>+5V @ 17.5mA

AD73311L 16 Bit, Monaural Codec, (specs @ +3V Rail, fcl=16.384MHz fsample=64KSPS, A/D Side: SINAD=71dB @ PGA=0dB & fin 0.3>3.4KHz, THD=-75dB @ PGA=0 or 38dB, D/A Side: SINAD=62.5dB @ PGA=0dB & fin 0.3>3.4KHz, THD=-62.5dB @ PGA=0 or 6dB, Vsys=+3V @ 12.5mA

AD73322 16 Bit, Stereo Codec, (specs @ +3V Rail, fcl=16.384MHz fsample=64KSPS) A/D Side: SINAD=72dB @ PGA=0dB & fin 0.3>3.4KHz, THD=-70dB @ PGA=0 or 38dB, D/A Side: SINAD=62.5dB @ PGA=0dB & fin 0.3>3.4KHz, THD=62.5 @ PGA=0 or 6dB, +3V>+5V @ 45mA

AD73322L 16 Bit, Stereo Codec, (specs @ +3V Rail, fcl=16.384MHz fsample=64KSPS) A/D Side: SINAD=72dB @ PGA=0dB & fin 0.3>3.4KHz, THD=-73dB @ PGA=0 or 38dB, D/A Side: SINAD=62.5dB @ PGA=0dB & fin 0.3>3.4KHz, THD=62.5 @ PGA=0 or 6dB, +3V @ 42mA

AD73360 6 Channel, 16 Bit A/D/Channel, Master Clock=16.384MHz, Sample Clock=8.192, Sample Rates=8/16/32/64 KSPS, SNR= -71dB w/PGA=0, PGA Range=0to +38dB/Channel, Group Delay=25msec, I/O=Serial, Vsys=+3V @ 26.5mA w/all sections on

AD73360L 6 Channel, 16 Bit A/D/Channel, Master Clock=16.384MHz, Sample Clock=8.192, Sample Rates=8/16/32/64 KSPS, SNR= -73dB w/PGA=0, PGA Range=0to +38dB/Channel, Group Delay=25msec, I/O=Serial, Vsys=+2.7V @ 26.5mA w/all sections on

AD7339 8 Bit A/D, 2 MSPS, -3dB BW=641KHz @ IF 3>6MHZ, Dual 2 MSPS Parallel 8 Bit D/A, Dual Auxiliary Serial 8 Bit D/A, +5V @ 45mA

AD734 Vout=(Vx1-Vx2)*(Vy1-Vy2)/(U1-U2)-(Z1_Z2), Total Error=0.25%>0.4%, INL X Input=0.05%%, INL Y Input=0.025%, BW=8MHz, SR=450V/usec, Vsys= +/-15V @ 12mA, Laser Trimmed,

AD73411 16 Bit Monaural Codec, Generic A/D=AD73311L, w/PGA 0>38dB, Sample Rate 64KSPS, DSP Processor=ADSP2185L @ 52MSPS, Dash 40=(8Kx24 Prgm + 8Kx16 Data Memory) or Dash 80=(16Kx24 Prgm +16Kx16 Data Memory), Vsys=+3V

AD73422 16 Bit Stereo Codec, Generic A/D=AD73322L, w/PGA 0>38dB, Sample Rate 64KSPS, DSP Processor=ADSP2185L @ 52MSPS, Dash 40=(8Kx24 Prgm + 8Kx16 Data Memory) or Dash 80=(16Kx24 Prgm +16Kx16 Data Memory), Vsys=+3V

AD73460 6 A/D’s, Generic A/D=AD73360L, w/PGA 0>38dB, Sample Rate 64KSPS, DSP Processor=ADSP2185L @ 52MSPS, Dash 40=(8Kx24 Prgm + 8Kx16 Data Memory) or Dash 80=(16Kx24 Prgm +16Kx16 Data Memory), Vsys=+3V

AD736 Total Error=0.3>0.5 mV +/-3>5% of Reading, -3dB BW @ 10mV Input=55KHz, Full Scale Input=200 mV rms, Voltge Output, Vsys=+/-5V @ 200uA

AD737 Total Error=0.3>0.5 mV +/-3>5% of Reading, -3dB BW @ 10mV Input=55KHz, Full Scale Input=200 mV rms, Curent Output, Vsys=+/-5V @ 200uA, w/Power Down

AD7376 Single, 7 Bit, Rpot Options=10K, 50K, 100K, 1M, TC=300ppm, Vsy=+5V or +/-15V, I/O=3 Wire Serial, w/S’Down

AD7390 Single, 12 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.1mA, I/O=SPI w/Schmitt Triggers, Double Buffered, w/shutdown & /Clear Pin

AD7391 Single, 10 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.1mA, I/O=SPI w/Schmitt Triggers, Double Buffered, w/shutdown & /Clear Pin

AD7392 Single, 12 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.1mA, I/O=P12, Single Latch, w/shutdown & Clear Pin

AD7393 Single, 10 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.1mA, I/O=P12, Single Latch, w/shutdown & Clear Pin

AD7394 Dual, 12 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.2mA, I/O=SPI w/Schmitt Triggers, Double Buffered, w/shutdown & /Clear Pin

AD7395 Dual, 10 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.2mA, I/O=SPI w/Schmitt Triggers, Double Buffered, w/shutdown & /Clear Pin

AD7396 Dual, 12 Bit, INL=1.8 LSB, DNL=0.9 LSB, Full Scale Error=13 LSB, Unipolar Error=4 LSB, Vout= 0>Vref, Vref Ext=+2.5V>Vdd, S/Time=70usec, Glich=65nV-sec, Vsys=+3>5V @ 0.2mA, I/O=P12, Single Latch, w/shutdown & Clear Pin


PART DESCRIPTION


AD7397 Dual, 1

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