Analog Front End Design For ADSLR. K. Hester

Texas Instruments IncorporatedDallas, Texas, USA

Outline

• Canonical ADSL System Diagram

• Signal Characteristics

• Impairments

• Line Coupling Circuits

• Transmitter Design

• Receiver Design

ADSL System

Transmitter

Receiver

Transmitter

Receiver

DOWNSTREAM <= 8 Mbps

UPSTREAM <= 800 kbps

POTSSplitter

POTSSplitter

up to 19 kft

Ethernet,PCI, USB, ...

BackboneDigital

Network

Central Office Remote Terminal

POTS

Subscriber Loop

Unlike V.xx dial-up modems, the signal is not terminated by a voice-band line card

Signal Characteristics

• DMT modulation

• Frequency plan

• Capacity

• Peak-to-Average Ratio and BER

• Continuous-time/Discrete-time PSD

Discrete Multi-Tone Signaling(ODFM)

• Employs many narrow-band (4.3125 kHz) sub-carriers

• Low baud frequency (4 kHz)

• Data dynamically assigned to sub-carrier according to SNR

• IFFT/FFT used to modulate/demodulate in blocks

time

Frame k+1

cyclic prefix

Frame k

40 (D)5 (U)

samples

512 (D)64 (U)

samples

40 (D)5 (U)

samples

512 (D)64 (U)

samples

cyclic prefix

IFFTprepend

prefix FFTstrip

prefixTEQ

Frequency Plan

Upstream DownstreamPOTS

1.1 MHzf

Power Spectrum

Frequency Division Duplexed

26 KHz

Bi-directional DownstreamPOTS

1.1 MHzf

Power Spectrum

Echo-Cancelled

26 KHz

ITU G.hs training protocol guarantees FDD-EC modem interoperability

Annex A Frequency Plan Example

6 31 38 255

• Sub-carrier frequencies: n*4.3125 kHz

• Upstream n= 6, …, 31

• Echo-canceling downstream n= 6, …, 255

• Frequency division downstream n= 33, …, 255

• Modulation: 4QAM … 32768QAM

• Subcarrier data rate capacity: 2-15 bits per baud period

Subcarrier Capacity versus SNR

10 20 30 40 50 60 70

2

4

6

8

10

12

14

SNR (dB)

Cap

acity

(bits

/bau

d)

- 140 - 130 - 120 - 110

500000

1 ×106

1.5×106

2 ×106

2.5×106

3 ×106

Effective Noise Floor at Tip/Ring (dBm/Hz)

Cap

acity

(b/s

ec)

upstream

downstream

Maximum 15kft 26awg Data Rate Capacity

More on Frequency Plan

Annex Upstream Downstream

• A (POTS) 6 – 31 6 (33) – 255

• A+ 6 – 31 6 (33) – 511

• B (ISDN) 29 – 63 29 (60) – 255

• B+ 29 – 63 29 (60) – 511

• C (TCM-ISDN) 33 – 63 33 – 255

• H (TCM-ISDN) 6 – 255 6 – 255

• I 1 – 31 1 – 255

• J 1 – 31 (63) 1 – 255

Peak-to-RMS Ratio • Subcarriers are statistically independent, so sum of N has Gaussian probability

distribution in time-domain, where variance is 0.43152* N volt2.

• When N=250, the RMS signal is 3.28V, and a 16dB peak-to-RMS ratio corresponds to 41.4 VPP.

0.0001 0.0002 0.0003 0.0004 0.0005 0.0006 0.0007

- 15

- 10

- 5

5

10

15

11.3dB

Sign

al (V

olts

)

Time

Gaussian Signal Statistics• Sub-carriers are statistically independent, so sum of N sub-carriers has

Gaussian probability (central limits theorem)

• Signal clipping, either analog or digital, transmitter or receiver, wrecks SNR and creates transmission errors

• Must support signal swing that corresponds to desired bit error rate

•16dB peak-to-RMS ratio ( peaks to 6.3 VRMS) corresponds to a 10-7 BER.

- 7.5 - 5 - 2.5 2.5 5 7.5

0.1

0.2

0.3

0.4

Sub-Carrier Power Spectral Density (dBm/Hz)

Sub-carrier Power =

= -3.65dBm (432µW) downstream and -1.65dBm (544µW) upstream.

- 40000 - 20000 20000 40000

- 100

- 80

- 70

- 60

- 50

- 40

�∞∞- df sdp

�∞

∞−df psd

ITU/ANSI PSD Masks

Downstream PSD With Continuous Time Sub-Carrier GenerationPS

D (d

Bm

/Hz)

1 ×106 2×106 3×106 4 ×106 5×106

- 110

- 100

- 90

- 80

- 70

- 60

- 50

- 40

Frequency

20000 40000 60000 80000 100000 120000 140000

- 70

- 60

- 50

- 40

- 30

DSP Transmitter Signal (Minimum Sample Rate )

PSD

(dB

m/H

z)Frequency

• Minimum Annex A downstream 256-point IFFT with 4312.5Hz resolution (one bin per subcarrier) produces 2208kS/sec sample rate.

• Minimum Annex A upstream 32-point IFFT with 4312.5Hz resolution (one bin per subcarrier) produces 276kS/sec sample rate.

200000 400000 600000 800000 1´ 10 6

- 70

- 60

- 50

- 40

- 30

Downstream PSD With Minimum Sample Rate

PSD

dB

m/H

z

Frequency2×106 4 ×106 6×106 8×106

- 100

- 80

- 60

- 40

• Conversion of downstream signal to continuous-time at 2208kS/sec produces in-band droop and significant standard’s non-compliance.

Upstream PSD With Minimum Sample Rate (276kS/sec)

PSD

dB

m/H

z

Frequency1×106 2×106 3×106 4×106

- 100

- 80

- 60

- 40

• Conversion of upstream signal to continuous-time at 276kS/sec produces in-band droop and significant standard’s non-compliance.

Impairments

• Loop attenuation

• Loop variability

• Crosstalk

26awg Loop Attenuation

200000 400000 600000 800000 1×106

- 100

- 80

- 60

- 40

- 201kft

5kft

10kft

15kft

Frequency

Att

enua

tion

(dB

)

Downstream PSD on 26awg Loops

200000 400000 600000 800000 1×106 1.2×106

- 160

- 140

- 120

- 100

- 80

- 60

- 40

Frequency

PSD

(dB

m/H

z)

1kft

5kft

10kft

15kft

Loop Variability

500000 1 ´ 10 6 1.5 ´ 10 6 2´ 10 6

10

20

30

40

ETSI Loop Loss at 1 kilometer Versus Frequency

0.32mm

0.40mm

0.50mm

0.63mm

0.90mm

Inse

rtio

n L

oss

(dB

)

Frequency

Loop Impedance

500000 1´ 10 6 1.5 ´ 10 6 2´ 10 6

100

120

140

160

180

ETSI Loop Impedance Versus Frequency

Impe

danc

e M

agni

tude

(ohm

)

Frequency

0.32mm

0.40mm

0.50mm0.63mm

0.90mm

4.5 5 5.5 6 6.5 7

100

150

200

250

Bridged Taps

ClientC OA

bs[Z

in]

Log10[frequency]

CSA4 Zin from client26awg characteristic impedance

CSA4 Zin from central office

Far End Cross Talk (FEXT)

ClientC O

ClientC O

Near End Cross Talk (NEXT)

ClientC O

ClientC O

Far End Crosstalk Transfer Function (FEXT)

250000 500000 750000 1´ 10 6 1.25 ´ 10 6 1.5 ´ 10 6

- 120

- 110

- 100

- 80

- 70

- 60

1 km

2 km

3 km

24

10

24

10

24

10

( )( )2

26.049n20

f,dossinsertionL

fd10*8 ∗−

H (d

B)

Frequency (Hz)

250000 500000 750000 1´ 10 6 1.25 ´ 10 6 1.5 ´ 10 6

- 160

- 140

- 120

- 100

- 80

- 60

- 40

24-Self FEXT Example

1 km2 km3 km

1 km

2 km

3 km

~50dB

Downstream Signal

24 self-FEXT

~60dB

~70dB

H (d

Bm

/Hz)

Frequency (Hz)

250000 500000 750000 1´ 10 6 1.25 ´ 10 6 1.5 ´ 10 6

- 70

- 60

- 50

- 40

Near End Crosstalk Transfer Function (NEXT)

24

10

1

( ) 5.1fnX ∗

H (d

B)

Frequency (Hz)

5.963*10-14243.510*10-14102.020*10-1448.818*10-151

X(n)n

20000 40000 60000 80000 100000 120000 140000

- 180

- 160

- 140

- 120

- 100

1-, 10- and 24-Self NEXT ExampleH

(dB

m/H

z)

Frequency (Hz)

Line Coupling Circuit

• Splitter

• Active termination

• Hybrid

ADSLModem

POTS/ISDN

Splitter

Bi-directionalLow-Pass

Filter

Bi-directionalHigh-Pass

Filter

• In the POT/ISDN frequency band, the high-pass, generally built into modem transformer circuit, presents high impedance to loop and reduces ADSL modem-generated noise.

• In the ADSL frequency band, the low-pass presents high impedance to loop and reduces POTS/ISDN-generated noise.

Annex B Splitter Low-Pass Example

ToLoop

88.7u94.1u86.1u64.7u

2.7p4.7p8.2n

8.2n 18n 22n 22n

• Very high quality (low distortion) components are required

• DC current feed (POTS) may not saturate transformers

• Cost is high, both the bill of materials and the PCB area

Active Termination

ZL

VTX

VRX

R

I

gg*I*R

(((( ))))Rg1ZVZI

VZ LgRZR

VRX

L0V

RXin

L

RXTX

++++====−−−−−−−−

−−−−====−−−−−−−−====++++++++====

• Reduces driver power supply voltage requirement• Downside: Reduces receiver gain by 20Log10[(1+g)]

Transmitter Echo

TX

RX

2-wireto

4-wire(hybrid)

transmit

receive

echoOn long loops, the echo power is greater than the receive power

A B

C D

Z4

Z2

Vrxm

Vtxp

Vtxm

RT

RT

Z1

Z3

Z1

Z2

Z3

Vrxp

1 : N

Z4

Eg

ZL

2nd Order High-Pass with Passive Termination and Hybrid

( )

���

����

����

����

�−=−

++=

1

3grxmrxp

L31T2

L324

ZZ

N4

EVV yielding

ZZZRN2

ZZZ Z:Balance Hybrid

IL

( )( )txmtxpgL

LT

VVNEZI

N

ZR

−−��

���

�=

=

21

yielding

2 :Match Impedance

L

2

3rd Order High-Pass With Passive Termination and Hybrid

Vtxp

Vtxm

ZL

1 : N

Za

Za Zb

Zb

hybrid

RXamp

RT

RT

LT2

L

a

b

ZRNZ

ZZ

++++====

Hybrid Balance Condition

LT2 ZRN ====

Impedance Match Condition

3rd Order High-Pass With Active Termination and Hybrid

Subscriber line

Vtxp

Vtxm

Eg

ZL

1 : N

H(f)

Active Hybrid Transfer Function

200000 400000 600000 800000 1 ´ 10 6

- 24

- 22

- 20

Magnitude

Ideal transfer function from driver output to termination resistor voltage when received signal is not present

Best fit to a 3-zero, 4-pole active hybrid

Hybrid Rejection Definitions

(((( ))))

(((( )))) ����

��������

====

����������������

����������������

����

====

present is hybrid when tip/ringat signalr transmitteremoved is hybrid when tip/ringat signalr transmitteLog20thR

outputamplifier receiver to tip/ring from gain signal receivedoutputamplifer receiver at signalr transmitte

tip/ringat signalr transmitteLog20expR

10H

10H

Echo Response

����

��������

====amplifierreceiver at signalr transmitteoutputdriver at signalr transmitteLog20H 10Echo

Hybrid Rejection Example

4.5 5.5 6

30

40

50

60

Hybrid Rejection , Theorist and Experimentalist Definitions

Log10[frequency]

Hecho

RH(exp)

RH(th)

Transmitter Signal Path

• Over-sampling

• Managing PAR

• MTPR requirement

• Line Drivers

Downstream PSD With Minimum Sample Rate

PSD

dB

m/H

z

Frequency2×106 4 ×106 6×106 8×106

- 100

- 80

- 60

- 40

• Conversion of downstream signal to continuous-time at 2208kS/sec produces in-band droop and significant standard’s non-compliance.

Upstream PSD With Minimum Sample Rate (276kS/sec)

PSD

dB

m/H

z

Frequency1×106 2×106 3×106 4×106

- 100

- 80

- 60

- 40

• Conversion of upstream signal to continuous-time at 276kS/sec produces in-band droop and significant standard’s non-compliance.

Low-Pass Reconstruction Filter Architectures

IFFT 2.2MSpsDAC

ALPF

IFFT N*2.2MSpsDAC ALPFDLPF

• High order

• Trimmed to provide precision roll-off at 1.1MHz as well as image rejection at 2.2MHz.

•Low order

•Trimming not required for image rejection at N*2.2MHz.

Provides precision roll-off at 1.1MHz.

(A) Nyquist rate DAC (Analog filter)

(B) Over-sampled DAC (Digital/Analog filter combination)

Helping Out the Central Office Hybrid

IFFT N*2.2MSpsDAC AHPFDLPF

Provides precision rejection of downstream subcarrier side lobes in upstream band

DHPF ALPF

Provides rejection of DAC distortion components in upstream band

Digital High-Pass Output Spectrum(downstream bin 32-255 employed)

50000 100000 150000 200000 250000

- 180

- 160

- 140

- 120

- 100

- 80

- 60

- 40

Frequency

PS

D (d

Bm

/Hz)

Digital Low-Pass Filter Output Spectrum

2 ×106 4 ×106 6 ×106 8×106

- 100

- 80

- 60

- 40

Frequency

PS

D (d

Bm

/Hz)

Analog Low-Pass Filter Output SpectrumPS

D (d

Bm

/Hz)

2×106 4×106 6×106 8×106

- 100

- 80

- 60

- 40

Frequency

Transmitter Template

• DHPF • High order DHPF is critical to downstream transmitter signal suppression in FDD modems• Reduced-NEXT compliance in echo-canceling modems employing non-overlapping spectra

• DLPF• High order is critical to upstream transmitter signal suppression in FDD modems• Interpolating stages increase sample rate, reducing signal droop and relaxing analog low-pass

• DAC• Precision (<12 effective bits) depends upon analog filtering, hybrid rejection and receiver sensitivity

•AHPF• Suppresses DAC noise/distortion in upstream band in FDD central office modems.

•ALPF• Eliminates signal images centered at multiples of DAC sample rate.• Suppresses DAC noise/distortion in downstream band in FDD client modems.

• Line Driver• High voltage technology. • Very low distortion required.

Corner frequency precisionZero additive noise

Suppresses DAC noise/distortion and images

LineDriver

DACFromDSP

DigitalHigh-Pass

Filter

DigitalLow-Pass

Filter

AnalogLow-Pass

Filter

AnalogHigh-Pass

Filter

ToHybrid

Managing Peak Signal to Average Signal Ratio

• Bit Error Rate is proportional to the frequency of signal clipping

• Clipping rate of gaussian signal is determined by PAR

• PAR is determined by circuit NOT a property of signal

• Managing PAR in digital or analog domains – node by node• Usually desirable to limit the number of clipping nodes to one (driver)• For given signal swing (volts or bits), PAR is increased (decreased) by decreasing (increasing) signal power• For given signal power, PAR is increased (decreased) by increasing (decreasing) swing (volts or bits)

LineDriver

DACFromDSP

DigitalHigh-Pass

Filter

DigitalLow-Pass

Filter

AnalogLow-Pass

Filter

AnalogHigh-Pass

Filter

ToHybrid

PARDHPF PARDAC PARAHPF PARAHPFPARDLPF PARLD

Missing Tone Power Ratio Test

• Equivalent of spurious free dynamic range in narrow band systems

DownstreamUpstream

MTPRrx MTPRtx

FDD (EC) Central Office Example (frequency-independent echo response)MTPRtx=65 (75)MTPRrx=75 (75)

Virtue of High Voltage IC ProcessesClient Reconstruction Low-Pass Filter Example(138kHz corner frequency, -140dBm/Hz noise in downstream band)

g LPF 1

15V

LPF g

15V3.3V

020406080

100

0 0.2 0.4 0.6 0.8 1

Vo pk-pk / (Vcc-Vee)

Effi

cien

cy (%

)

Class AB Output Stage

VCC

VEE

-1

-0.5

0

0.5

1

0 10 20 30 40 50

Vol

tage

(V

)

<20% efficiency

Time

Class G Topology

• Multiple supply output stage

• For VOUT low, current comes from +5 V

• For VOUT high, current comes from +15 V

• Current is mostly drawn from low supply

• Challenge in DSL is low distortion at 1 MHz

Ip15

Vout

Iout

Ip5

Rs

Rl

Vout

+5V+15V

Ip5Ip15

Iout

-5V-15V

Continuous Class G Circuit

Vout

Q1

I2

D4

D3

Q5D6

Q3

Q2

Q0

D2

D1

Q4D5

I1

+15V

-15V

Vin

+15V

-5V

-15V

+5V

“Zero Overhead” Class G Concept –Block Diagram

VPSWLogic

Interface

LineDriver

TXsignal

+8V

+4V

-4V

-8V

TVEE

TVCC

“Zero Overhead” Class G Concept -Waveforms

TVCC

DMT

TVEE

VPSW

+4V

-4V

+8V

-8V

ZOCG Design Challenges

• Peak prediction– Analog signal blocks change peak positions and magnitudes

• Low voltage drop switches– Mus swing as close as possible to the rail

• Shoot through currents– Must minimize the time that switches to both supplies are on

• Switching edge coupling– Changing supply AC can couple into signal output

Receiver Signal Path

• Signals

• Minimizing ADC requirements

• ADC precision

• PAR management

Anti-Alias

FilterADCGain

Receiver Noise/Distortion Floor

• Inherent loop noise

•Loop impedance is ~100 ohms, corresponding to <-173 dBm/Hz

• Measured loop noise is usually in the neighborhood of –140 dBm/Hz

• Central off ice noise is much higher• ISDN, T1, SHDSL, ….

• Typical noise floor targets for ADSL front ends

• Central office: <-120 dBm/Hz at loop

• Client: <-145 dBm/Hz at loop

ADC Resolution Versus Conversion Rate

2.5 ´ 10 6 5´ 10 6 7.5 ´ 10 6 1´ 10 7 1.25 ´ 10 7 1.5 ´ 10 7 1.75 ´ 10 7

0.0005

0.001

0.0015

0.002

0.0025

0.003

LSB

effre

ferr

ed to

mod

em in

put (

volt)

ADC Conversion Rate (Sps)

-120 dBm/Hz (CO)

-140 dBm/Hz (Client)

1000 2000 3000 4000 5000 6000

- 80

- 60

- 40

- 20

Signal Power Reaching ReceiverPo

wer

(dB

m)

Loop Length (meters)

Upstream

Downstream

A

BA

B

Largest voltage on null loop: 11.2Vpp at client and 19.95Vpp at central office

Minimum ADC Neff versus Conversion Rate

2.5 ´ 10 6 5´ 10 6 7.5 ´ 10 6 1´ 10 7 1.25 ´ 10 7 1.5 ´ 10 7 1.75 ´ 10 7

13

14

15

16

17

Eff

ectiv

e nu

mbe

r of

bits

, Nef

f

ADC Conversion Rate (Sps)

Client Vin=11.22V

Central office Vin=19.95V

• Input voltages are too high to integrate – must reduce gain from loop to ADC• Reducing channel gain drives ADC lsb too small

Received Input Peak-to-Peak Voltage versus Loop Length

Loop Length (ft)

5000 10000 15000 20000

5

10

15

20

25

30

35

Peak

-to-

Peak

Vol

tage

(vol

ts)

Need signal attenuation on short loops and gain on long ones

downstream

upstream

Programmable Gain to the Rescue

Anti-Alias

FilterADCGain

• The noise floor targets were set using loop noise measurements,and represent reasonable goals for long loops where signals are small

• On short loops we only need noise floors sufficient to handle 15 bits per subcarrier, 12.5Neff

• Use programmable gain to increase the channel gain for small signals from long loop

• gives low channel gain when signals are large• gives high channel gain when signals are small

• Remaining problem: the echo

1000 2000 3000 4000 5000 6000

- 125

- 100

- 75

- 50

- 25

Total Signal Power at ReceiverPo

wer

(dB

m)

Loop Length (meters)

Upstream

Downstream

A

BA

B

Largest voltage on null loop: 11.2Vpp at client and 19.95Vpp at central office

Killing the Echo

• Better

• Best

Anti-Alias

FilterADCGain

Anti-Echo

Filter

Anti-Alias

FilterADCGain

Anti-Echo

FilterGain

Receiver Architectures

+ PreampAnalog

High-PassFilter

Analog Low-Pass

FilterFrom

Hybrid

FromSense

Resistor

Client

PGA ADC

+ PreampAnalog

Low-PassFilter

FromHybrid

FromSense

Resistor

Central Office

PGA ADC

Receiver Programmable Gain

• Receiver gain improves SNR only when the ADC quantization noise is dominant. • Typically 20 dB gain will amplify the receiver analog noise above the ADC noise.

Additional gain will not improve the SNR, so the typical programmable gain range is ~ -20dB to +20dB at the remote terminal and ~ -12dB to +20dB at the central office.

5000 10000 15000 20000

20

40

60

Gai

n (d

B)

Loop Length (ft)

downstream

upstream

Equalization

200000 400000 600000 800000 1×106

- 120

- 110

- 100

- 90

- 80

- 70

- 60

- 50

Frequency

PSD

(dB

m/H

z)

AmplifiedDownstream signal at 9kft

ADC noise floor

SNR sufficient for 15b/bit/frame

• Equalization is frequency dependent gain• Improves data rate when

• SNR is limited by noise source subsequent to equalizer• Low-Frequency subcarrier SNR exceeds that required to support 15b/frame

• Programmable gain should follow equalizer

Generic Template

• AHPF • In client FDD modems, it may reject virtually all of the upstream echo power and enable higher PGA gain.

• Frequently employed in Annex B central office modem to reject ISDN power in front of PGA.• Equalizer

• Provides frequency dependent gain to amplify weak high-frequency subcarriers above ADC noise.• Not useful in central office receiver

•ALPF• Provides anti-alias filtering for ADC.• In central office FDD modems, it also rejects upstream echo and enables higher PGA gain.

•PGAs• Placed both before and after filters when echo is rejected by integrated filter.

• ADC• Resolution depends upon duplexing, EC being more demanding than FDD because echo power

is dominant on long loops. •DLPF

• Decimates sample rate to that of FFT.

PGAADCDigital

Low-PassFilter

AnalogLow-Pass

Filter

AnalogHigh-Pass

FilterEqualizer PGA

Design Example:Echo-Canceling Central Office Modem

• Deviations from generic topologies• Analog transmitter high-pass deleted to support echo cancellation• Programmable attenuator added to support power cutback on short loops• Programmable gain amplifiers precede and follow receiver analog low-pass

to adjust signal to 3Vpp before non-overlapping portion of echo is removed• Equalizer is not necessary on central office receivers

• DSP sample rates• 2208kS/sec transmitter in full rate mode and 1104kS/sec in “lite” mode• 276kS/sec receiver

LineDriver

DAC

DSP

DigitalHigh-Pass

Filter

DigitalLow-Pass

Filter

ProgrammableAttenuator

AnalogLow-Pass

Filter

Hybrid

ADCDigital

Low-PassFilter

AnalogLow-Pass

Filter

AnalogHigh-Pass

Filter

PGA(coarse)

PGA(fine)

AD16

AD16

PGA0-6dBgain

in 1dBsteps

ALPF

138kH zto

172kH zcorner,

(tr imm ed)

PGA2.5-11.5dB

gainin 1dBsteps

PGA-20dB

to +16dBgain

in 6dBsteps

DAC

14 bits

8832kS/secsample rate

DLPF1(f33)

1104kHzor

552kHzcorner

DLPF2(f9)

1104kHzor

552kHzcorner

INTRP22X

zeroinsertion

ALPF

1104 -1725kHz

corner

(1380kHz+/-25%)

PA

0dB to-24dB in

1dB steps

TRANSMITTER PATH

RECEIVER PATH

E-C

lite

dmt

INTRP32X

zeroinsertion

8832kS/secsample rate

lite

INTRP12X

zeroinsertion

4416kS/ssample rate

lite

dmtdmt

4416kS/sec2208kS/sec

lite dmt

8832kS/sec

lite dmt

INTRP02X

zeroinsertion

2208kS/secsample rate

dmt

litelite

DHPF

138kHzcorner

2208kS/secsample rate

P-FDM P-FDM

DLPF3(f7)

552kHzcorner

8832kS/secsample rate

ADC

2208kH z14 bits

DLPF

138kHzcorner,

0dB gain

SampleRate

Select

D/A Converter

VDD

CALx

VA

VB

VMVDD

CALx

VA

VB VBM31

VM

1 1VB

1/2VB

1/4VB

1/4

DD C/HDD C/H

M1

DD

M32

DD C/H

M33 M34

HOLD CAL

CASCODE ARRAYS(5+2)b LSBs

CURRENT SOURCEARRAY 7b MSBs

C/H

Iout-Iout Ihold Ical

DD CAL

Signal DAC Current Source Bias and Calibration

Calibrating CellReplicaCell (4X)

ReplicaCell (8X)

ReplicaCell (4X)

Vcm 16-1MUX

4b

1.5Vbandgapderived

VA

VB

ReferenceCurrent

Transmitter Static Integral Non-Linearity(digital high-pass bypassed)

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

-8191 0 8191

Code

INL

(14b

LS

Bs)

Receiver PGA/Low-Pass Combination

t0

t1

t2

t0

t1

t2

t0

t1

t2

f6

f5

f4

x CMOS transmission gate conducting when logic bit x = 1

cx bits set gain -20dB to +16dB in 6dB steps,fx bits set gain 0dB to +6dB in 1dB steps, andtx bits trim corner frequency.

f3f1

f2

c1

c7

Ext.

PSD at Input to Analog Low-Pass Filter(15kft, 26awg, RH=18dB)

500000 1 ×106 1.5×106 2×106

- 140

- 120

- 100

- 80

- 60

- 40

PSD

(dB

m/H

z)

Frequency

Signal

Echo

PSD at Input to ADC(15kft, 26awg, RH=18dB)

200000 400000 600000 800000 1×106 1.2×106

- 140

- 120

- 100

- 80

- 60

- 40

PSD

(dB

m/H

z)

Frequency

Signal

Echo

Pipelined Analog-to-Digital Converter

Stage 11.5b

8b trim

TrimSignMUX

d2

1

1

1

1

2

2Vin+

Vref8

Vref8

Vin-

d0

d1

d0

d2

Vref+

Vref-

2pF

2pF

2pF

2pF

Stage 21.5b

8b trim

Stage 31.5b

7b trim

Stage 41.5b

7b trim

Stage 51.5b

7b trim

Stage 61.5b

no trim2b

flash

Stage 121.5b

no trim

X represents CMOS switchconducting during clock phase X

d0

d1

d2Vcm +

Vcm -

7-Bit Capacitor Trimming Array

t4t4 t6t6t5t5t1t1 t2t2t0t0 t3t3

AVSS

ts ts

Trim sign MUX

Cu

Cu

2Cu 4Cu Cu 2Cu 4Cu 8Cu

Cu

Cu = 104fF

Ceff = 98fF in 0.77fF steps +-

Receiver INL

-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

0 4096 8192 12288 16384

CODE

INL

PSD at Output of Digital Low-Pass Filter(15kft, 26awg, RH=18dB)

50000 100000 150000 200000 250000 300000

- 140

- 120

- 100

- 80

- 60

- 40

PSD

(dB

m/H

z)

Frequency

Signal

Echo

Summary

• The ADSL AFE requirements depend upon multiple system parameters such as • Duplexing method• Upstream and downstream frequency allocations• DSP transmit and receive sample rates• Receiver sensitivity • Hybrid rejection

• An AFE design example provides the optimum integrated solution for modems employing echo cancellation.