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Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

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Page 1: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Analysis and Design of Asynchronous Transfer Lines as

a series of G/G/m queues:Overview and Examples

Page 2: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Topics

• Modeling the Asynchronous Transfer Line as a series of G/G/m queues

• Modeling the impact of preemptive, non-destructive operational detractors

• Employing the derived models in line diagnosis • Employing the derived models in line design• The role of batching in the considered manufacturing

systems• An analysis of a workstation involving parallel batching

Page 3: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Asynchronous Transfer Lines (ATL)W2 W3

THTHB2 B3

W1

TH THB1 M1 M2 M3

Some important issues:• What is the maximum throughput that is sustainable through this line?• What is the expected cycle time through the line?• What is the expected WIP at the different stations of the line?• What is the expected utilization of the different machines?• How does the adopted batch size affect the performance of the line?• How do different detractors, like machine breakdowns, setups, and maintenance, affect the performance of the line?

Page 4: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

The G/G/1 model:A single-station

Modeling Assumptions: • Part release rate = Target throughput rate = TH • Infinite Buffering Capacity• one server• Server mean processing time = te

• St. deviation of processing time = e

• Coefficient of variation (CV) of processing time: ce = e / te

• Coefficient of variation of inter-arrival times = ca

THB1 M1

Page 5: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

An Important Stability Condition

•Average workload brought to station per unit time:

TH·te

• It must hold:

• Otherwise, an infinite amount of WIP will pile up in front of the station.

TH te 1.0

THB1 M1

Page 6: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Performance measures for a stable G/G/1 station

• Server utilization:

• Expected cycle time in the buffer: (Kingman’s approx.)

• Expected cycle time in the station:

• Average WIP in the buffer: (by Little’s law)

• Average WIP in the station:

• Squared CV of the inter-departure times:

u TH te

CTq ca

2 ce2

2

u

1 ute

CT CTq te

WIPq TH CTq

WIP TH CT WIPq u

cd2 (1 u2)ca

2 u2ce2

THB1 M1

Page 7: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Remarks• For a station with variable job inter-arrival and/or processing

times, utilization must be strictly less than one in order to attain stable operation.

• Furthermore, expected cycle times and WIP grow to very large values as u1.0.

• Expected cycle times and WIP can also grow large due to high values of ca and/or ce; i.e., extensive variability in the job inter-arrival and/or processing times has a negative impact on the performance of the line.

• In case that the job inter-arrival times are exponentially distributed, ca=1.0, and the resulting expression for CTq is exact (a result known as the Pollaczek-Kintchine formula).

• The expression for cd2 characterizes the propagation of the station

variability to the downstream part of the line, and it quantifies the dependence of this propagation upon the station utilization.

Page 8: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Performance measures for a stable G/G/m station

• Server utilization:

• Expected cycle time in the buffer:

• Expected cycle time in the station:

• Average WIP in the buffer:

• Average WIP in the station:

• Squared CV of the inter-departure times:

M1

BTH TH

M2

Mm

u (TH te ) m

CTq ca

2 ce2

2

u 2(m1) 1

m(1 u)te

CT CTq te

WIPq TH CTq

WIP TH CT WIPq mu

cd2 1 (1 u2)(ca

2 1) u2

m(ce

2 1)

Page 9: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Analyzing a multi-station ATL

TH

Key observations:• A target production rate TH is achievable only if each station satisfies the stability requirement u < 1.0.

• For a stable system, the average production rate of every station will be equal to TH.

• For every pair of stations, the inter-departure times of the first constitute the inter-arrival times of the second.

• Then, the entire line can be evaluated on a station by station basis, working from the first station to the last, and using the equations for the basic G/G/m model.

Page 10: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Operational detractors:A primal source for the line variability• Effective processing time = time that the part occupies

the server• Effective processing time = Actual processing time +

any additional non-processing time• Actual processing time typically presents fairly low

variability ( SCV < 1.0). • Non-processing time is due to detractors like machine

breakdowns, setups, operator unavailability, lack of consumables, etc.

• Detractors are distinguished to preemptive and non-preemptive. Each of these categories requires a different analytical treatment.

Page 11: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Preemptive non-destructive operational detractors

• Outages that take place while the part is being processed.

• Some typical examples:– machine breakdowns– lack of consumables– operator unavailability

Page 12: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Modeling the impact of preemptive detractors

• X = random variable modeling the natural processing time (i.e., without the delays due to the detractors), following a general distribution.

• to = E[X]; o2=Var[X]; co=o / to .

• T = random variable modeling the effective processing time = where

• Ui = random variable modeling the duration of the i-th outage, following a general distribution, and

• N = random variable modeling the number of outages during a the processing of a single part.

• mr=E[Ui]; r2=Var[Ui]; cr = r / mr

• Time between outages is exponentially distributed with mean mf.

• Availability A = mf / (mf+mr) = percentage of time the system is up.

• Then,

te = E[T] = to / A or equivalently re = 1/te = A (1/to) = A ro

X U ii1

N

e2 Var[T] ( o

2 A2) to((mr2 r

2) m f )

ce2 e

2 / te2 co

2 (1 cr2)A(1 A)(mr / to)

Page 13: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Breakdown Example

• Data: Injection molding machine has:

• 15 second stroke (to = 15 sec)

• 1 second standard deviation (so = 1 sec)

• 8 hour mean time to failure (mf = 28800 sec)

• 1 hour repair time (mr = 3600 sec)

• Natural variabilityco = 1/15 = 0.067 (which is very low)

Page 14: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Example Continued

• Effective variability:

41.4715

3600)888.01)(888.0(2)067.0()1(2

875.16888.0/15/

888.018

8

222

o

roe

oe

rf

f

t

mAAcc

Att

mm

mA

Which is very high!

Page 15: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Example Continued

• Suppose through a preventive maintenance program, we can reduce mf to 8 min and mr to 1 min

79.015

60)888.01)(888.0(2)067.0()1(2

875.16888.0/15/

888.018

8

222

o

roe

oe

rf

f

t

mAAcc

Att

mm

mA

Which is low!

(the same as before)

Page 16: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Example:employing the developed theory for diagnostic purposes

M1 B M2

to1 =19 min

co12=0.25

mf1=48 hrsmr1=8 hrs MTTR ~ expon.

to2 =22 min

co22=1.0

mf2=3.3 hrsmr2=10 min MTTR ~ expon.

Ca2=1.0

20parts

Desired throughput is TH = 2.4 jobs / hr but practical experience has shown that it is not attainable by this line. We need to understand why this is not possible.

Page 17: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Diagnostics example continued:Capacity analysis based on mean values

M1 B M2

to1 =19 min

co12=0.25

mf1=48 hrsmr1=8 hrs MTTR ~ expon.

to2 =22 min

co22=1.0

mf2=3.3 hrsmr2=10 min MTTR ~ expon.

Ca2=1.0

20parts

A1 m f 1 /(m f 1 mr1) 48/(48 8) 0.857

te1 to1 / A1 19/0.857 22.17min

A2 m f 2 /(m f 2 mr2) 3.3/(3.310/60) 0.952

te 2 to2 / A2 22/0.952 23.11min Bottleneck machine

Bottleneck utilization: u2 TH te2 2.4 (23.11/60) 0.9244 1.0 (!)

Page 18: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Diagnostics example continued:An analysis based on the G/G/m model

)(! 20>>72.3560/94.8924.2

min94.89211.239244.01

9244.0

2

04.128.5

12

9244.060/11.234.2

04.122/10)952.01(952.0)11(1/)1()1(

28.51)8868.01(442.68868.0)1(

85.2560/256.6464.2

min256.64617.228868.01

8868.0

2

442.61

12

8868.060/17.224.2

442.619/608)857.01(857.0)11(25.0/)1()1(

22

22

222

22

2

22

222222

22

22

2221

21

21

21

21

22

11

11

121

21

1

11

111121

21

21

qq

eea

q

e

orroe

aeda

qq

eea

q

e

orroe

CTTHWIP

tu

uccCT

tTHu

tmAAccc

cucucc

CTTHWIP

tu

uccCT

tTHu

tmAAccc

i.e., the long outages of M1, combined with the inadequate capacity of the interconnecting buffer, starve the bottleneck!

Page 19: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Example: ATL Design• Need to design a new 4-station assembly line for circuit board

assembly.• The technology options for the four stations are tabulated below

(each option defines the processing rate in pieces per hour, the CV of the effective processing time, and the cost per equipment unit in thousands of dollars).

Station Option 1 Option 2 Option 31 42, 2.0, 50 42, 1.0, 85 10, 2.0, 110.52 42, 2.0, 50 42, 1.0, 853 25, 1.0, 100 25, 0.7, 1204 50, 0.75, 20 6, 0.75, 24

Page 20: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Example: ATL Design (cont.)• Each station can employ only one technology option.

• The maximum production rate to be supported by the line is 1000 panels / day.

• The desired average cycle time through the line is one day.

• One day is equivalent to an 8-hour shift.

• Workpieces will go through the line in totes of 50 panels each, which will be released into the line at a constant rate determined by the target production rate.

Page 21: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

A baseline design:Meeting the desired prod. rate with a low cost

1000 42,2.0,50 42,2.0,50 25,1.0,100 50,0.75,2050 42,1.0,85 42,1.0,85 25, 0.7,120 6,0.75,248 10,2.0,110.5

(1000 / 50) / 8 2.5

Station 1 Station 2 Station 3 Station 41/te 42 42 25 50Ce 2 2 1 0.75P 50 50 100 20m 3 3 6 3

te 0.0238 0.0238 0.04 0.02tb=B*te 1.1905 1.1905 2 1

Cb^2=Ce^2/B 0.08 0.08 0.02 0.0113u=TH*tb/m 0.9921 0.9921 0.8333 0.8333

Ca^2 0 0.4615 0.4687 0.5598Cd^2 = 1+(1-u^2)(Ca^2-1)+(u^2/sqrt(m))*(Cb^2-1) 0.4615 0.4687 0.5598 0.4691

CT = [(Ca^2+Cb^2)/2]*[u^(sqrt(2*(m+1))-1)/(m*(1-u))]*tb+tb 3.17 14.6 2.3 1.41CT1+CT2+CT3+CT4 21.48

WIPq 4.9 33.5 0.8 1

m*P 150 150 600 60960

Page 22: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Reducing the line cycle time by adding capacity to Station 2

1000 42,2.0,50 42,2.0,50 25,1.0,100 50,0.75,2050 42,1.0,85 42,1.0,85 25, 0.7,120 6,0.75,248 10,2.0,110.5

(1000 / 50) / 8 2.5

Station 1 Station 2 Station 3 Station 41/te 42 42 25 50Ce 2 2 1 0.75P 50 50 100 20m 3 4 6 3

te 0.0238 0.0238 0.04 0.02tb=B*te 1.1905 1.1905 2 1

Cb^2=Ce^2/B 0.08 0.08 0.02 0.0113u=TH*tb/m 0.9921 0.7441 0.8333 0.8333

Ca^2 0 0.4615 0.505 0.5709Cd^2 = 1+(1-u^2)(Ca^2-1)+(u^2/sqrt(m))*(Cb^2-1) 0.4615 0.505 0.5709 0.4725

CT = [(Ca^2+Cb^2)/2]*[u^(sqrt(2*(m+1))-1)/(m*(1-u))]*tb+tb 3.17 1.36 2.32 1.42CT1+CT2+CT3+CT4 8.27

WIPq 4.9 0.4 0.8 1.1

m*P 150 200 600 601010

Page 23: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Adding capacity at Station 1, the new bottleneck

1000 42,2.0,50 42,2.0,50 25,1.0,100 50,0.75,2050 42,1.0,85 42,1.0,85 25, 0.7,120 6,0.75,248 10,2.0,110.5

(1000 / 50) / 8 2.5

Station 1 Station 2 Station 3 Station 41/te 42 42 25 50Ce 2 2 1 0.75P 50 50 100 20m 4 4 6 3

te 0.0238 0.0238 0.04 0.02tb=B*te 1.1905 1.1905 2 1

Cb^2=Ce^2/B 0.08 0.08 0.02 0.0113u=TH*tb/m 0.7441 0.7441 0.8333 0.8333

Ca^2 0 0.299 0.4324 0.5487Cd^2 = 1+(1-u^2)(Ca^2-1)+(u^2/sqrt(m))*(Cb^2-1) 0.299 0.4324 0.5487 0.4657

CT = [(Ca^2+Cb^2)/2]*[u^(sqrt(2*(m+1))-1)/(m*(1-u))]*tb+tb 1.22 1.31 2.27 1.4CT1+CT2+CT3+CT4 6.2

WIPq 0.1 0.3 0.7 1

m*P 200 200 600 601060

Page 24: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

An alternative option:Employ less variable machines at Station 1

1000 42,2.0,50 42,2.0,50 25,1.0,100 50,0.75,2050 42,1.0,85 42,1.0,85 25, 0.7,120 6,0.75,248 10,2.0,110.5

(1000 / 50) / 8 2.5

Station 1 Station 2 Station 3 Station 41/te 42 42 25 50Ce 1 2 1 0.75P 85 50 100 20m 3 4 6 3

te 0.0238 0.0238 0.04 0.02tb=B*te 1.1905 1.1905 2 1

Cb^2=Ce^2/B 0.02 0.08 0.02 0.0113u=TH*tb/m 0.9921 0.7441 0.8333 0.8333

Ca^2 0 0.4274 0.4897 0.5662Cd^2 = 1+(1-u^2)(Ca^2-1)+(u^2/sqrt(m))*(Cb^2-1) 0.4274 0.4897 0.5662 0.4711

CT = [(Ca^2+Cb^2)/2]*[u^(sqrt(2*(m+1))-1)/(m*(1-u))]*tb+tb 1.69 1.35 2.31 1.41CT1+CT2+CT3+CT4 6.76

WIPq 1.2 0.4 0.8 1

m*P 255 200 600 601115

This option is dominated by the previous one since it presents a higher CT andalso a higher deployment cost. However, final selection(s) must be assessed and validated through simulation.

Page 25: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Lot Sizing• If affordable, a lot-for-lot (L4L) policy will incur the lowest inventory holding

costs and it will maintain a smoother production flow.• Possible reasons for departure from a L4L policy:

– High set up times and costs => need for serial process batching to control the capacity losses

– Processes that require a large production volume in order to maintain a high utilization (e.g., fermentors, furnaces, etc.) => need for parallel process batching

• Selection of a pertinent process batch size– It must be large enough to maintain feasibility of the production

requirements– It must control the incurred

• inventory holding costs, and/or• part delays (this is a measure of disruption to the production flow

caused by batching)• Move or transfer batches: The quantities in which parts are moved between

the successive processing stations.– They should be as small as possible to maintain a smooth process flow

Page 26: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Optimal Parallel Batching: A factory physics approach

Model Parameters:k: (parallel) batch size B: maximum batch sizera: arrival rate (parts/hr) ca: CV of inter-arrival timest: batch processing time (hrs) ce: CV for effective batch processing timeThen CT = WTBT + CTq+t

aaaa r

kkk

krr

k

rkWTBT

2

1

2

)1(1]

1...

10[

1

trktk

ru

k

c

kt

kct

u

uccCT a

aa

a

aa

ea

q b

b

1 ;

)( ;

12

2

2

22

22

From the above,

tu

uckc

ku

ktt

u

uckc

r

kCT eaea

a

]112

/

2

1[

12

/

2

1 2222

Remark: Notice that CT as u1 but also as u0 !

Page 27: Analysis and Design of Asynchronous Transfer Lines as a series of G/G/m queues: Overview and Examples

Determining an optimized batch sizeLet um rat . Then u = um / k k = um / u . Substituting this expression for k in the expression for CT, we get:

tu

ucuuc

u

uut

u

uckc

ku

kCT ema

m

mea ]112

/

2

1/[]1

12

/

2

1[

2222

Recognizing that 022

ka

m

ak

cu

uc, we set 0

2

m

au

uc and we get

tu

uyt

u

uc

uuCT

m

e

m

]12

1

2

)([]1

122

1

2

1[

2

where

u

uc

uuy e

1

)(1

)( 2

To minimize CT, it suffices to minimize y(u). This can be achieved as follows:

22

2*22

22

222

1

1

1

1012)1(0

)1(

)()1()(

ee

ee

e

cc

cuuuc

uu

ucu

du

udy

and 1c

1u 0

e

*

which further implies that trctrk aea )1(*

Remark: If ce2 0, the term in the original expression for u* will significant. In that

case, we can set em

a

cu

c

1

12* and obtain u* and k* as before.