apple macbook pro a1278 (k90i, 820-2936)

7/16/2019 Apple Macbook Pro A1278 (K90i, 820-2936)

http://slidepdf.com/reader/full/apple-macbook-pro-a1278-k90i-820-2936 1/86

TABLE_TABLEOFCONTENTS_ITEM




















































































TABLE_TABLEOFCONTENTS_HEADTABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

DRAWING

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

IV ALL RIGHTS RESERVED

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

3

7

ECNREV

BRANC

DRAWI

REVIS

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

DRAWING TITLE

THE POSESSOR AGREES TO THE FOLLOWING:

Apple Inc.

SHEET

R

A

C

THE INFORMATION CONTAINED HEREIN IS THE

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

3456

D

B

8 7 6 5 4 2 1

12

DESCRIPTION OF REVISI

"EVT3"

SCHEM,FLYING_CLOUD,MLB,K90i

Schematic / PCB #’s

11/22/10

ALIASES RESOLVED

SMC49 07/07/2010

LINDA_K90I45

Front Flex Support48 05/15/2010

K91_MLB44

External USB Connectors46 06/01/2010

K91_MLB43

SATA/IR/SIL Connectors45 05/15/2010

K91_MLB42

FireWire Connector43 07/28/2009

T27_MLB41

FireWire Port & PHY Power42 12/15/2009

T27_MLB40

FireWire LLC/PHY (FW643E)41 07/20/2009

T27_MLB39

Ethernet Connector40 05/26/2010

K91_MLB38

ETHERNET PHY (CAESAR IV)39 05/26/2010

K91_MLB37

T29 Power Support38 10/12/2010

T2936

T29 Host (2 of 2)37 10/12/2010

T2935

T29 Host (1 of 2)36 10/12/2010

T2934

SD READER CONNECTOR35 05/26/2010

K91_MLB33

X19/ALS/CAMERA CONNECTOR34 05/15/2010

K91_MLB32

FSB/DDR3/FRAMEBUF Vref Margining33 06/01/2010

K91_MLB31

CPU Memory S3 Support32 06/22/2010

ANNE_K90I30

DDR3 SO-DIMM Connector B31 MASTER

MASTER29DDR3 Byte/Bit Swaps

30 06/22/2010

ANNE_K90I28

DDR3 SO-DIMM Connector A29 MASTER

MASTER27

Chipset Support28 07/08/2010

LINDA_K90I26

Clock (CK505)27 06/21/2010

K91_MLB25

USB HUBS26 06/08/2010

K91_MLB24

CPU & PCH XDP25 06/22/2010

ANNE_K90I23

PCH DECOUPLING24 06/25/2010

K91_MLB22

PCH GROUNDS23 05/27/2010

K91_MLB21

PCH POWER22 06/25/2010

K91_MLB20

PCH MISC21 06/18/2010

K91_MLB19

PCH PCI/FLASHCACHE/USB20 06/10/2010

K91_MLB18

PCH DMI/FDI/GRAPHICS19 06/18/2010

K91_MLB17

PCH SATA/PCIE/CLK/LPC/SPI18 06/18/2010

K91_MLB16

CPU DECOUPLING-II17 06/28/2010

JACK_K90I15

CPU DECOUPLING-I16 06/28/2010

JACK_K90I14

CPU GROUNDS14 06/18/2010

ANNE_K90I13

CPU POWER13 06/18/2010

ANNE_K90I12

CPU DDR3 INTERFACES12 06/18/2010

ANNE_K90I11

CPU CLOCK/MISC/JTAG11 06/28/2010

ANNE_K90I10

CPU DMI/PEG/FDI/RSVD10 06/22/2010

ANNE_K90I9

Signal Aliases9 05/15/2010

K91_MLB8Power Aliases

8 05/15/2010

K91_MLB7

FUNC TEST7 07/20/2009

K24_MLB6

BOM Configuration5 05/28/2009

K17_REF5

Revision History4 MASTER

MASTER4

Power Block Diagram3 06/30/2009

K17_REF3

System Block Diagram2 06/30/2009

K17_REF2

PCB Rule Definitions86 ANNE_K90I

06/08/2010109

Project Specific Constraints85 ANNE_K90I

06/08/2010108

SMC Constraints84 K91_MLB

05/15/2010106

T29 Constraints83 Master

06/21/2010105

Ethernet/FW Constraints82 K91_MLB

05/15/2010104

PCH Constraints 281 K91_MLB

05/15/2010103

PCH Constraints 180 K91_MLB

05/15/2010102

Memory Constraints79 ANNE_K90I

05/28/2010101

CPU Constraints78 ANNE_K90I

06/08/2010100

LCD Backlight Driver77 VEMURI_K90I

06/25/201097

DisplayPort/T29 A Connector76 T29

10/16/201094

DisplayPort/T29 A MUXing75 T29

10/16/201093

LVDS CONNECTOR74 K24_MLB

07/20/200990Power Control 1/ENABLE73 JACK_K90I

10/22/201079

Power FETs72 JACK_K90I

10/22/201078

Misc Power Supplies71 JACK_K90I

08/19/201077

CPUVCCIO (1.05V) Power Supply70 JACK_K90I

08/19/201076

CPU IMVP7 & AXG VCore Output69 JACK_K90I

09/03/201075

CPU IMVP7 & AXG VCore Regulator68 JACK_K90I

10/14/201074

1.5V DDR3 Supply67 JACK_K90I

10/11/201073

5V/3.3V SUPPLY66 JACK_K90I

10/04/201072

System Agent Supply65 JACK_K90I

08/19/201071

PBus Supply & Battery Charger64 JACK_K90I

10/11/201070

DC-In & Battery Connectors63 JACK_K90I

08/20/201069

AUDIO: JACK TRANSLATORS62 LENG_K90I

08/10/201068

AUDIO: JACK61 LENG_K90I

08/10/201067

AUDI0: SPEAKER AMP60 LENG_K90I

08/10/201066

AUDIO: HEADPHONE FILTER59 LENG_K90I

08/10/201065

AUDIO: LINE INPUT FILTER58 LENG_K90I

08/10/201063

AUDIO: CODEC/REGULATOR57 LENG_K90I

08/10/201062

SPI ROM56 K91_MLB

05/15/201061

Digital Accelerometer55 LINDA_K90I

07/08/201059

WELLSPRING 254 LINDA_K90I

07/12/201058

WELLSPRING 153 LINDA_K90I

07/12/201057 Fan52 K24_MLB

07/20/200956

Thermal Sensors51 LINDA_K90I

10/22/201055

High Side Current Sensing50 LINDA_K90I

10/22/201054

Voltage & Load Side Current Sensing49 LINDA_K90I

10/22/201053

SMBus Connections48 K91_MLB

05/26/201052

LPC+SPI Debug Connector47 K91_MLB

05/15/201051

PageDate

SyncContents(.csa)

051-8658 SCH1 CRITICALSCHEM,MLB,K90i

Contents(.csa) Date

Page Sync

PCBF,MLB,K90i820-2936 CRITICALPCB1

Table of Contents1 MASTER

MASTER1 SMC Support46 LINDA_K90I

07/08/201050

ABBREV=DRAWING

TITLE=MLB

LAST_MODIFIED=Mon Nov 22 19:21:11 2010

SCHEM,FLYING CLOUD,MLB,K








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

PCI

J9400

Display Port

AirPort

X19

PG 32

J3401

PG 41

CONN

FW

J4310

U4100

PG 39

FW643E

1 4 LANEsCIO

PG 34,35 DP

PG 75

U9390

MUX

0

DP/TMDS

U3600PCIe x4

J9000

CONN

LVDS

PG 74

SATA

J4500

ODD

CONN

PG 42

PG 26

J4501

CLOCK

SATACONN

HDD

PG 42

1.05V/3GHZ.

1.05V/3GHZ.

SYSTEM

U2800

GPIO

DP OUT

HDMI OUT

eDP OUT

JTAG

PG 19

LVDS OUT

PG 17

DVI OUT

PG 16

BUFFER

PG 18

PEG

PG 16

TMDS OUT

PCI-E

RGB OUT

PG 38

E-NET

CONN

J4000

U3900

BCM57765

E-NET

PG 37

J3500

PG 33

CONN

SD Card

PG 16

(UP TO 8 LINES)

PG 16

PCI-E

LINE INPUT

U6700

PG 58

FILTER

PG 61

AUDIO IO SWITCH

U6500

HP/LO

AMPPG 59

PG 16

SMBUS

PG 16

HDA

LINEIN HPOUT

U6201

DIMM’s

From PCH

PG 16

PG 18

PG 16-21

PG 16

SATA

CLK

COUGAR POINT-MPCH

U1800

INTEL

0

1

2

3

5

7

4

6

U S B

P G

1 8

( U P T O 1 4 D E V I C E S )

8

1 2

9

1 1

1 0

1 3

CTRL

PG 17

U2650

PG 24

HUB-2

P1

USB

P3

PG 32

P2

PG 43

PWR

PG 16

LPC

PG 16

SPI

PG 19

J3401

Bluetooth

X19

J4600

PG 56

SPI

J6700

EXT MIC

EXTERNAL A

USB

PG 61

CONNs

AUDIO

J6701

U6610, U6620, U6630

J6702, J6703

PG 60

AMPs

SPEAKER

SPDIFOUT

AUDIO

PG 57

Codec

CLK SDA LINEOUT

J2550

U5701

U4900

MISC

PG 17

FDI

SANDYBRIDGE SFF 2C+2

INTEL CPU

2.2 GHZ

PG 17

DMI

PG 9-13

U1000

RTC

PG 16

2 DIMMs

DDR3-1067/1333MHZ

J2900

J3100

PG 27

DIMM

PG 23

PG 28

XDP CONN

J2500

PCH XDP

PG 23

CONN

PSOC

TP/KB

PG 53

PG 54, 53

U2600

HUB-1

PG 24

USB

P3 P1

J4610

EXTERNAL B

PG 43

USB

KEYBOARD

J5800, J5713

TRACKPAD/

BSB B,0

SMC

PG 45

SMS ADC Fan Ser

J5601

U5400, U5410, U5420, U5360

P2

FAN CONN AND CONTROL

U4800

PG 32

J3402 J4501

Controller

PG 44

IR

PG 42

IR

PG 52

PG 49, 50

J5100

POWER SENSE

Port80,serialLPC+SPI Conn

PG 47

U5920

J6900, J6950

U5510, U5520

Sudden Motion Sensor

PG 51

PG 63

PG 55

DC/BATT

TEMP SENSOR

PG 64-74

POWER SUPPLY

Boot ROM

U6100

PG 76

CONN

T29 Router

/ T29

Prt

CAMERA

System Block Diagra

SSYNC_MASTER=K17_REF








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

PP24V_T29

T29_A_HV_EN

VOUT

U3890

LT3957

PP3V3_S0 && FWPORT_PWR_EN

DELAY

RC

DELAY

RC

CPUVCCIOS0_EN

P1V8S0_EN PG71

PG71

P5VS0_EN

(PAGE 16~21)

SLP_S3#(F4)

SLP_S4#(H4)

R7978

U1800

(PCH)

(PAGE 44)

P60

SLP_S5#(E4)

COUGAR-POINT

SMC_PM_G2_EN

DELAY

RC

DELAY

RC

RC

DELAY

U4900

SMC

( 9

T O

1 2 . 6 V )

3 S 2 P

J6950

PPVBATT_G3H_CONN

P3V3S0_EN

PM_SLP_S3_L

PG71

PM_SLP_S4_L

P5VS3_EN

PM_SLP_S5_L

DDRREG_EN

P3V3S3_EN

PM_SLP_S3_L_R

PBUSVSENS_EN

PG71

PG71

PG 17

PG 17

Q4260

&&

F9700

LCD_BKLT_EN

BKLT_PLT_RST_L

Q3880

Q9706

PPBUS_SW_LCDBKLT_PWR

VIN

(PAGE 36)

EN

(PAGE 77)

F4260

VOUT

VIN

LP8550

U9701

PPVP_FW

PPVOUT_SW_LCDBKLT

PG71

PG71

PG 17

P3V3S5_EN

Q7055

CHGR_BGATE

PPVBAT_G3H_CHGR_R

A

R5410

P3V3S5_EN_L

P5VS3_EN_L

PPBUS_S5_HS_OTHER_ISNS

EN2

(R/H)

3.3V

U7200

EN1

(L/H)

VIN

5V

(PAGE 64)

AC

IN

ADAPTER

J6900

DCIN(16.5V)

6A FUSE

F6905

SMC_DCIN_ISENSE

K9OI POWER SYSTEM ARCHITECTURE

SMC_RESET_L

A VIN

R7020

PPDCIN_G3H

BATTERY CHARGER

PBUS SUPPLY/

R6990

ISL6259HRTZ

U7000

VOUT

PPVBAT_G3H

R7050

ASMC_BATT_ISENSE

PPDCIN_S5_P3V42G3H

F7040

PPBUS_G3H

PGOOD

TPS51125

(PAGE 66)

P5V3V3_PGOOD

PM_SLP_S3_L_R

Q7830

Q7810

P3V3S3_EN

PP3V3_S0

PP3V3_S3

U7740

(PAGE 71)

TPS720105

P1V8_S0_EN

FW_PWR_EN

EN

PM_SLP_S3_L&&WOL_EN||SMC_ADAPTER_EN

EN

(PAGE 40)

U4201

TPS22924

EN

MAX15053EWL

U7760

(PAGE 71)

PP3V3_FW_FWPHY

PP1V8_S0

CAESAR IV

(PAGE 35)

U3900

PP1V05_S5

VOUT2

VOUT1PP5V_S3

PP3V3_S5 PP3V3_S5

Q7922

PP3V3_ENET

PP5V_S0

MEMVTT_EN

DDRREG_EN

PVCCSA_EN

BCM57765

Q7860

PM_SLP_S3_L_R

VCC

TPS51916

(PAGE 67)

U7300

EN

ISL95870A

(PAGE 65)

U7100

PP1V2_ENET_PHY

PP5V_S0

PGOOD

VOUT

PGOOD

TP_DDRREG_PGOOD

PVCCSA_PGOOD

S5

S3 0.75V

1.5VVIN

VR_ON

PGOODG

(PAGE 68)

IMON

IMONG

VOUT2

VOUT1

VLDOIN

PGOOD

VOUT

CPUIMVP_IMON

A

PPVCCSA_S0_CPU

PP0V75_S0_DDRVTT

PP1V5_S3

CPUIMVP7_PGOOD

CPUIMVP_IMONG

PP1V05_S0

PP3V3_S0

V

SMC_PBUS_VSENSE

SMC_CPU_HI_ISENSE

R5400

A

D6990

CPUVCCIOS0_EN

CPUIMVP7_VR_ON

PP5V_S0_CPUVCCIOS0

VIN

EN

U7400

U7600

(PAGE 70)

VCC1.05VISL95870

PM6640

U6990

(PAGE 63)

VOUT

ISL95231

3.425V G3HOT

CPU VCOREVOUT

PGOOD

SMC_CPU_ISENSE

A

PP3V42_G3H

R7640

A

ENABLE

CPUVCCIOS0_PGOOD

V

CPUIMVP7_AXG_PGOOD

U7980

CPUVCCIOS0_PGOOD

PM_SLP_S5_L

PM_SLP_S3_L

PM_SLP_S4_L

SMC_ONOFF_L

ALL_SYS_PWRGD

RSMRST_PWRGD

SLP_S5_L(P95)

SLP_S3_L(P93)

SLP_S4_L(P94)

(PAGE 43)

U4900

PWRGD(P12)

RSMRST_IN(P13)

PWR_BUTTON(P90)

PP3V3_S5_PWRCTL

PPVCORE_S0_AXG

SMC

U1000

(PAGE 9~13)

CPU

U2850

PM_PCH_PWRGD

U1800

(PCH)

SMC_CPU_FSB_ISENSE

PPCPUVCCIO_S0

SMC_CPU_VSENSE

PPVCORE_S0_CPU

SMC_GFX_VSENSE

EN

(PAGE 44)

SMC PWRGD

U5010

SN0903048

U4202

(PAGE 38)

TPS22924

FW_PWR_EN

PP1V0_FW_FWPHY

SMC_RESET_L

IMVP_VR_ON(P16)

99ms DLY

DRAMPWROK

PROCPWRGD

SYSRST(PA2)

RSMRST_OUT(P15)

RES*

P17(BTN_OUT)

SYS_RERST#

PWRBTN#

PLTRST#

RESET*

(PAGE 16~21)

UNCOREPWRGOOD

COUGAR-POINT

RSMRST#

SM_DRAMPWROK

SMC_RESET_L

CPUIMVP_VR_ON

PM_PWRBTN_L

PM_SYSRST_L

PM_RSMRST_L

PLT_RERST_L

PM_MEM_PWRGD

CPU_PWRGD

PM_SYSRST_L

PM_PWRBTN_L

PM_RSMRST_L

PP1V5_S3RS0

VMON_Q4

VMON_Q2

VMON_Q3

ASMCC0179

(PAGE 73)

Q7970

PP3V3_S5_VMON

6

P5V3V3_PGOOD

P1V8S0_PGOOD

PVCCSA_PGOOD

S0PGOOD_PWROK

4


Power Block Diagra








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

PROTO:

Revision History

SYNC_MASTER=MASTER



TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM


TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1



TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD


TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

PART NUMBERALTERNATE FORP AR T N UM BE R B OM O PT IO N REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

K90i BOM GROUPS

Module Parts

Programmable Parts

Development BOM

BOM Variants Bar Code Labels / EEEE #’s

Alternate Parts

PCBA,2.3G,K90i639-1699 K90i_COMMON,CPU_2_3GHZ,EEEE_DH8G

K90i MLB DEVELOPMENT BOM K90i_DEVEL:ENG085-1998

EEEE_DH8G[EEEE:DH8G]LBL,P/N LABEL,PCB,28MM X 6 MM826-4393 1 CRITICAL

157S0055157S0058 ALL Delta alt to TDK Magnetics

ALL Murata alt to Samsung138S0603 138S0602

128S0282128S0303 ALLPanasonic alt to Sanyo

516S0806 Molex alt to Foxconn516S0805 ALL

TPAD_PROGCRITICAL1 U5701341S3024 IC,TP PSOC,K90,K90i,K91,K91F,K92

BOOTROM_BLANK1 CRITICAL335S0770 U610064 MBIT SPI SERIAL DUAL I/O FLASH

LBL,P/N LABEL,PCB,28MM X 6 MM826-4393 1 CRITICAL EEEE_DDRQ[EEEE:DDRQ]

[EEEE:DH8F] EEEE_DH8FLBL,P/N LABEL,PCB,28MM X 6 MM1 CRITICAL826-4393

K90i_COMMON,CPU_2_5GHZ,EEEE_DDRQ639-1294 PCBA,2.5G,K90i

PCBA,2.6G,K90i639-1698 K90i_COMMON,CPU_2_6GHZ,EEEE_DH8F

639-1581 PCBA,2.7G,K90i K90i_COMMON,CPU_2_7GHZ,EEEE_DH78 CRITICAL1826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE:DH78] EEEE_DH78

CRITICAL1 U3990335S0663 ENET_BLANKIC,FLASH,SERIAL,SPI,!MBIT,2V7,8P,SOIC

T29ROM:BLANK1335S0777 U3690 CRITICALIC,EEPROM,SERIAL,SPI,1Kx8,1.8V,MLP8,LF

ENET_PROG1 U3990 CRITICAL341S3026 IC ENET,1!MBITFLAH,CIV REV01,K60/K62

BOOTROM_PROG341T0299 CRITICAL1 U6100IC,EFI ROM,K90i

T29ROM:PROG1 IC,T29 ASSY U3690341T0317 CRITICAL

085-1998 CRITICALK90i MLB DEVELOPMENT DEVEL_BOMDEVEL1

1341S2384 CRITICALU4800IR,ENCORE II, CY7C63803-LQXC

BOOTROM_BLANK64 MBIT SPI SERIAL DUAL I/O FLASH335S0769 1 CRITICALU6100

SMC_PROGIC,SMC,K90i CRITICAL341T0300 U49001

SMC_BLANK1 U4900 CRITICALIC,SMC,HS8/2117/9MMx9MM,TLP338S0895

U41001 CRITICAL338S0753 IC,FW643-E2,1394B PHY/OHCI LINK/PCI-E,12

343S0534 U39001 CRITICALIC,BCM57765B0,ENET&SD,8X8

T29MCU:BLANKU9330337S3997 1 CRITICALIC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25

1 CPU_2_7GHZCRITICALU1000337S4057 SNB,Q1R3,QS,J1,2.7,35W,2+2,1.30,4M,BGA

337S4064 CPU_2_6GHZCRITICALU10001 SNB,Q1R7,QS,J1,2.6,35W,2+2,1.30,3M,BGA


BOM Configuration

CRITICAL1 U3600 T29:YES338S0921 IC,T29-C0,220 FCBGA,15x15MM

CPU_2_3GHZCRITICALU10001337S4024 SNB,Q1R9,QS,J1,2.3,35W,2+2,1.30,3M,BGA

CPU_2_5GHZU1000 CRITICAL1337S4058 SNB,Q1RA,QS,J1,2.5,35W,2+2,1.30,3M,BGA

K90i_DEBUG:PROD BKLT:PROD,BMON:PROD,SMC_DEBUG_YES,XDP,VREFMRGN_NOT,LPCPLUS

337S4029 IC,PCH,COUGARPOINT,SLH9D,PRQ,BD82HM651 U1800 CRITICAL

CRITICAL1353S3055 IC,PI3VEDP212,X2 DISPLAYPORT 2:1 MUX,QFN U9390

Murata alt to SamsungALL138S0691138S0676

Cyntec alt to Vishay152S0693 ALL152S0778

Diodes alt to Toshiba376S0855 376S0613 ALL

ALL Diodes alt to Toshiba376S0859376S0977

376S0612 Rohm alt to Toshiba376S0972 ALL

ALL376S0966376S0927 Fairchild alt to Renesas

ALL376S0801376S0960 Renesas alt to Renesas

ALL376S0928376S0790 CICLON alt to Fairchild

ALL376S0761376S0777 AON alt to Siliconix

ALL376S0895376S0928 Fairchild alt to Renesas

ALL Fairchild alt to Renesas376S0845376S0937

Fairchild alt to FairchildALL376S0958376S0957

ALL353S1658353S3085 STmicro alt to LT

376S0953 ALL376S0958 Fairchild alt to Renesas

ALL376S0927 376S0790 Fairchild alt to CICLON

DEVEL_BOM,BKLT:PROD,BMON:PROD,SMC_DEBUG_YES,XDP,VREFMRGN_NOTK90i_DEBUG:PVT

K90i_DEBUG:ENG DEVEL_BOM,SMC_DEBUG_YES,XDP

K90i_DEVEL:PVT LPCPLUS,XDP_CONN,XDP_PCH

T29MCU:PROG1 CRITICALU9330IC,PROGRMD,LPC1112A,T29 PORT MCU,HVQFN25341S2939

CRITICALU1000 CPU_2_2GHZ1337S3934 SNB,2C,QXXX,ES1,2.2,35W,B2,3M,GT1,BGA

K90i_COMMON ALTERNATE,COMMON,K90i_COMMON1,K90i_COMMON2,K90i_DEBUG:ENG,K90i_PROGPARTS,USBHUB_2513B,T29BST:Y

BKLT:ENG,BMON:ENG,XDP_CONN,XDP_CPU:BPM,XDP_PCH,LPCPLUS,VREFMRGN,S0PGOOD_ISL,IMVPISNS_ENGK90i_DEVEL:ENG

BOOTROM_PROG,SMC_PROG,TPAD_PROG,ENET_PROG,T29ROM:PROG,T29MCU:PROGK90i_PROGPARTS

K90i_COMMON2 MIKEY,KB_BL

BATT_3S,CPUMEM_S0,SMC_DEBUG_YES,HUB1_2NONREM,HUB2_3NONREM,T29:YES,DP_SDRV:A2,SDRV_PD,SDRVI2C:MCUK90i_COMMON1








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

(NEED TO ADD 5 GND TP)

X19 CONN

(NEED 2 TP)





LPC+SPI DEBUG_CONN


IPD_FLEX_CONN

Functional Test Points

(NEED 3 TP)



MIC FUNC_TEST


SATA HDD/IR/SIL

SATA ODD CONN

(NEED 2 TP)

NO_TEST


Fan Connectors

NC NO_TESTs


SPEAKER FUNC_TEST


CAMERA/ALS CONN

(NEED 2 TP)

(NEED 5 TP)


(NEED 2 TP)



KBD BACKLIGHT CONN

KEYBOARD CONN

(NEED 3 TP)DC POWER CONN

LVDS FUNC_TEST

BATT POWER CONN

BIL CONN

DEBUG VOLTAGE

NC NO_TESTsNO_TEST

I12

I15

I16

I226

I227

I228

I229

I230

I231

I245

I246

I247

I248

I249

I250

I251

I252

I253

I254

I255

I256

I257

I258

I259

I260

I261

I262

I264

I265

I266

I267

I268

I269

I270

I271

I273

I274

I275

I278

I280

I281

I282

I283

I285

I287

I288

I289

I290

I291

I292

I293

I294

I295

I296

I297

I298

I299

I300

I301

I302

I303

I304

I305

I307

I308

I309

I311

I312I313

I314

I315

I317

I318

I319

I320

I321

I322

I323

I324

I325

I326

I327

I328

I329

I330

I331

I332

I333

I334

I335

I336

I337

I338

I339

I340

I341

I342

I343

I344

I345

I346

I347

I348

I349

I350

I351

I352

I353

I354

I355

I356

I357

I358

I359

I360

I361

I362

I363

I364

I365

I366

I368

I369

I370

I371

I372

I374

I375

I376

I377

I380

I382

I383

I386

I388

I390

I391

I392

I394

I407

I408

I409

I410

I414

I416

I417

I418

I419

I491

I492

I493

I494

I495

I496

I497

I498

I499

I500

I517

I518

I519

I520

I521

I522

I540

I541

I542

I543

I544

I545

I546

I547

I553

I554

I555

I564

I565

I580

I581

I582

I583

I584

I585

I586

I587

I588

I593

I594

I595

I596

I597

I598

I599

I600

I601

I602

I603

I604

I605

I606

I607

I608

I609

I610

I611

I612

I613

I614

I615

I616

I617

I618

I619

I620

I622

FUNC TEST

SYNC_MASTER=K24_MLB

PP5V_S0TRUE

NC_SDVO_TVCLKINP

NC_SDVO_INTNMAKE_BASE=TRUE

TRUE

NC_FW643_VBUF

NC_FW643_AVREG

NC_PCH_TP13

NC_SATA_E_RTRUEMAKE_BASE=TRUE

NC_FW643_TDI

TP_XDP_PCH_OBSFN_D<0..1> NC_TP_XDP_PCH_OBSFN_D<0..1>MAKE_BASE=TRUETRUE

NC_TP_XDPPCH_HOOK3 NC_TP_XDPPCH_HOOK3MAKE_BASE=TRUETRUE

TP_XDP_PCH_OBSFN_B<0..1> NC_TP_XDP_PCH_OBSFN_B<0..1>TRUEMAKE_BASE=TRUE

NC_TP_XDPPCH_HOOK2 NC_TP_XDPPCH_HOOK2TRUEMAKE_BASE=TRUE

TP_XDP_PCH_OBSFN_A<0..1>

NC_HDA_SDIN2MAKE_BASE=TRUETRUE

TRUE

MAKE_BASE=TRUE

NC_SATA_D_R

NC_PCH_TP4

NC_PCH_TP9

NC_PCH_TP8

TRUE PP1V8_S0

TRUEMAKE_BASE=TRUE

NC_FW643_SDA

TRUEMAKE_BASE=TRUE

NC_FW643_SM

TRUE NC_FW643_TCKMAKE_BASE=TRUE

MAKE_BASE=TRUETRUE NC_FW643_TMS

MAKE_BASE=TRUETRUE NC_FW643_FW620_L

MAKE_BASE=TRUE

NC_FW643_VBUFTRUE

MAKE_BASE=TRUE

NC_FW643_OCR10_CTLTRUE

NC_FW643_SDA

NC_FW643_SM

NC_FW643_TCK

NC_FW643_TMS

NC_FW643_FW620_L

NC_FW643_OCR10_CTL

NC_CRT_IG_RED

NC_CRT_IG_DDC_CLK

NC_CRT_IG_HSYNC

NC_PCI_CLK33M_OUT3MAKE_BASE=TRUETRUE

NC_CLINK_RESET_L

NC_PCIE_CLK100M_PEBP NC_PCIE_CLK100M_PEBPMAKE_BASE=TRUETRUE

NC_PCIE_CLK100M_PEBN NC_PCIE_CLK100M_PEBNMAKE_BASE=TRUETRUE

NC_CLINK_DATATRUEMAKE_BASE=TRUE

NC_PCI_PME_LMAKE_BASE=TRUETRUE

NC_PCI_CLK33M_OUT3

NC_HDA_SDIN3 NC_HDA_SDIN3TRUEMAKE_BASE=TRUE

NC_HDA_SDIN1 NC_HDA_SDIN1MAKE_BASE=TRUETRUE

NC_HDA_SDIN2

NC_PCH_LVDS_VBG TRUE

MAKE_BASE=TRUE

NC_PCH_LVDS_VBG

NC_LVDS_IG_CTRL_DATA TRUEMAKE_BASE=TRUE

NC_LVDS_IG_CTRL_DATA

NC_LVDS_IG_CTRL_CLK TRUEMAKE_BASE=TRUE

NC_LVDS_IG_CTRL_CLK

TRUE NC_CRT_IG_VSYNCMAKE_BASE=TRUE

MAKE_BASE=TRUETRUE NC_CRT_IG_DDC_CLK

NC_CRT_IG_DDC_DATA TRUEMAKE_BASE=TRUE

NC_CRT_IG_DDC_DATA

MAKE_BASE=TRUETRUE NC_CRT_IG_HSYNC

NC_CRT_IG_GREENMAKE_BASE=TRUETRUE NC_CRT_IG_GREEN

NC_CRT_IG_BLUEMAKE_BASE=TRUETRUE NC_CRT_IG_BLUE

NC_CRT_IG_REDMAKE_BASE=TRUETRUE

=PEG_D2R_P<0..

=PEG_R2D_C_N<1

NC_PCIE_CLKMAKE_BASE=TRUETRUE

NC_PCIE_CLK100M_PE4N

NC_PCIE_CLK100M_PE4P

PP3V3_S0TRUE

TRUE PP3V3_S3

BI_MIC_LOTRUE

BI_MIC_SHIELDTRUE

TRUE BI_MIC_HI

PP5V_SW_ODDTRUE


TRUEMAKE_BASE=TRUE

NC_SATA_B_R

TRUE

MAKE_BASE=TRUENC_EDP_AUXP

NC_EDP_AUXN

TRUE

MAKE_BASE=TRUENC_EDP_TXP<0..3>

TRUEMAKE_BASE=TRUENC_EDP_AUXN

MAKE_BASE=TRUE

TRUENC_PEG_R2D_CP<12..15>

NC_SATA_E_D2RN

NC_SATA_E_R2D_CN

NC_SATA_E_D2RP






=PEG_D2R_P<12.

=PEG_R2D_C_P<1

=PEG_D2R_N<12.

=PEG_D2R_N<0..

=PEG_R2D_C_P<0

=PEG_R2D_C_N<0

TP_CPU_RSVD<30

TP_CPU_RSVD<8.

NC_CPU_THERMDC

NC_CPU_THERMDA

TP_EDP_TX_N<0.

NC_EDP_AUXP

TP_EDP_TX_P<0.

NC_PCH_TP16

NC_PCH_TP12

NC_PCH_TP1

NC_PCH_TP7

NC_PCH_TP2

NC_PCH_TP6

NC_PCH_TP5

NC_PCH_TP14

NC_PCH_TP15

NC_LVDS_IG_BKL_PWM

TP_LVDS_IG_B_CLKN

TP_LVDS_IG_B_CLKP

NC_SMC_BS_ALRT_L

NC_SDVO_TVCLKINN

NC_SDVO_STALLN

NC_SDVO_INTP

NC_SDVO_INTN

NC_SDVO_STALLP

PP1V5_S3TRUE

PP1V2_S3_ENET_INTREGTRUE

USB_CAMERA_CONN_NTRUE

USB_CAMERA_CONN_PTRUE

TRUE WS_KBD16_NUM

SMBUS_SMC_A_S3_SDATRUE

WS_KBD19TRUE

TRUE WS_KBD17

SATA_HDD_D2R_C_NTRUE

SATA_HDD_D2R_C_PTRUE

SPKRAMP_R_P_OUTTRUE

SPKRAMP_R_N_OUTTRUE

TRUE SPKRAMP_L_P_OUTTRUE SPKRAMP_L_N_OUT

TRUE SPKRAMP_SUB_P_OUT

NC_SDVO_TVCLKINNMAKE_BASE=TRUETRUE

NC_SDVO_TVCLKINPTRUEMAKE_BASE=TRUE

NC_SDVO_INTPTRUEMAKE_BASE=TRUE

NC_PCH_TPMAKE_BASE=TRUETRUE

MAKE_BASE=TRUETRUE NC_PCH_TP

TRUE PCH_VSS_

PCH_VSS_TRUE

PCH_VSS_TRUE

PCH_VSS_TRUE

PCH_VSS_TRUE

PCH_VSS_TRUE

PCH_VSS_TRUE

PCH_VSS_TRUE

MAKE_BASE=TRUENC_PCH_TPTRUE


TRUEMAKE_BASE=TRUE

NC_PCH_TP

MAKE_BASE=TRUETRUE NC_PCH_TPMAKE_BASE=TRUE

NC_PCH_TPTRUE


MAKE_BASE=TRUE NC_PCH_TPTRUE


NC_PCH_TPTRUEMAKE_BASE=TRUE



NC_PCH_TPMAKE_BASE=TRUETRUE



PCH_VSS_NCTF<1>TRUE

PCH_VSS_NCTF<2>TRUE

PCH_VSS_NCTF<5>TRUE

TRUE PCH_VSS_NCTF<9>



MAKE_BASE=TRUE

TRUE NC_LVDS_

TRUEMAKE_BASE=TRUE

NC_LVDS_

MAKE_BASE=TRUETRUE NC_SMC

NC_SDVO_STALLNMAKE_BASE=TRUETRUE

NC_SDVO_STALLPTRUE

MAKE_BASE=TRUE

PP5V_SW_ODDTRUE

TRUE LED_RETURN_6

SMC_PM_G2_ENTRUE

PP3V3_S0_LCD_FTRUE

SMBUS_SMC_A_S3_SCLTRUE

PP5V_S3_ALSCAMERA_FTRUE

KBDLED_ANODETRUE

WS_LEFT_SHIFT_KBDTRUE

WS_KBD_ONOFF_LTRUE

WS_KBD22TRUE

WS_KBD21TRUE

SMC_KDBLED_PRESENT_LTRUE

TRUE LED_RETURN_5

TRUE LED_RETURN_4

TRUE SATA_HDD_R2D_P

TRUE SYS_DETECT_L

SATA_ODD_D2R_UF_NTRUE

FAN_RT_TACHTRUE

LVDS_IG_A_DATA_N<2>TRUE


TRUE

MAKE_BASE=TRUENC_EDP_TXN<0..3>

TRUE

MAKE_BASE=TRUENC_CPU_THERMDA

TRUEMAKE_BASE=TRUENC_CPU_THERMDC

TRUEMAKE_BASE=TRUENC_CPU_RSVD<8..27>

NC_CPU_RSVD<30..45>MAKE_BASE=TRUE

TRUE

TRUE

MAKE_BASE=TRUENC_PEG_D2RP<0..7>

NC_PEG_R2D_CN<0..7>TRUE

MAKE_BASE=TRUE

NC_PEG_R2D_CP<0..7>MAKE_BASE=TRUE

TRUE

TRUE

MAKE_BASE=TRUENC_PEG_D2RN<0..7>

NC_PEG_D2RN<12..15>MAKE_BASE=TRUE

TRUE

MAKE_BASE=TRUE

TRUENC_PEG_R2D_CN<12..15>

MAKE_BASE=TRUE

TRUENC_PEG_D2RP<12..15>

NC_PCIE_CLKMAKE_BASE=TRUE

TRUE


MAKE_BASE=TRUETRUE NC_PCIE_CLK

NC_PCIE_CLKTRUEMAKE_BASE=TRUE


TRUE NC_PCIE_CLKMAKE_BASE=TRUE

TRUEMAKE_BASE=TRUE

NC_PCIE_CLK

MAKE_BASE=TRUETRUE NC_SATA_B_D

MAKE_BASE=TRUETRUE NC_SATA_D_D

TRUEMAKE_BASE=TRUE

NC_SATA_B_R

MAKE_BASE=TRUETRUE NC_SATA_D_D

NC_SATA_D_RTRUEMAKE_BASE=TRUE

NC_SATA_E_DMAKE_BASE=TRUETRUE

NC_SATA_E_RTRUEMAKE_BASE=TRUE

NC_SATA_F_DMAKE_BASE=TRUETRUE

NC_SATA_F_DTRUEMAKE_BASE=TRUE

TRUEMAKE_BASE=TRUE

NC_SATA_F_R

TRUE FAN_RT_PWM

PP18V5_S5TRUE

PP5V_S0TRUE

PP1V5_S3RS0TRUE

TRUE WS_KBD23

PPVCCSA_S0_CPUTRUE

TRUE WS_KBD18

TRUE WS_KBD15_CAPTRUE WS_KBD14TRUE WS_KBD13TRUE WS_KBD12TRUE WS_KBD11

WS_KBD10TRUE

WS_KBD3TRUE

WS_KBD2TRUE

MAKE_BASE=TRUE

TRUE NC_LVDS_

NC_TP_XDP_PCH_OBSFN_A<0..1>TRUEMAKE_BASE=TRUE

TRUE NC_FW2_TPBP

TRUE NC_FW2_TPBN

NC_FW2_TPBIASTRUE

NC_FW2_TPANTRUE

NC_FW2_TPAPTRUE

TRUE NC_FW0_TPBP

TRUE NC_FW0_TPAP

TRUE NC_FW0_TPBN

TRUE XDP_PCH_USB_HUB_SOFT_RST_L

TRUE XDP_PCH_AP_PWR_EN

TRUE XDP_PCH_SDCONN_STATE_RST_L

TRUE XDP_PCH_ENET_PWR_EN

TRUE XDP_PCH_SDCONN_DET_L

TRUE XDP_PCH_S5_PWRGD

TRUE XDP_PCH_ISOLATE_CPU_MEM_L

TRUE XDP_PCH_PWRBTN_L

TRUE XDP_FW_CLKREQ_L

TRUE XDP_PCH_AUD_IPHS_SWITCH_EN

TRUE XDP_AP_CLKREQ_L

NC_PCH_TP17

NC_PCH_TP18

NC_SATA_F_R2D_CP

NC_SATA_F_R2D_CN

NC_SATA_F_D2RP

NC_SATA_F_D2RN

NC_SATA_E_R2D_CP

NC_FW643_TDIMAKE_BASE=TRUE

TRUE

NC_FW643_AVREGMAKE_BASE=TRUE

TRUE

NC_TP_XDP_PCH_HOOK4

NC_TP_XDP_PCH_HOOK5

TRUEMAKE_BASE=TRUE

NC_TP_XDP_PCH_HOOK4

TRUEMAKE_BASE=TRUE

NC_TP_XDP_PCH_HOOK5

NC_PCH_GPIO64_CLKOUTFLEX0 NC_PCH_GPIO64_CLKOUTFLEX0TRUEMAKE_BASE=TRUE

NC_PCH_GPIO65_CLKOUTFLEX1TRUE

MAKE_BASE=TRUENC_PCH_GPIO66_CLKOUTFLEX2MAKE_BASE=TRUETRUE

NC_PCH_TP3

TRUEMAKE_BASE=TRUE

NC_PCH_TP

NC_PCH_TP10

NC_PCH_GPIO67_CLKOUTFLEX3MAKE_BASE=TRUETRUENC_PCH_GPIO67_CLKOUTFLEX3

NC_PCH_GPIO66_CLKOUTFLEX2


PP1V05_S0TRUE

TRUE PP5V_S3

PP3V42_G3HTRUEPPBUS_G3HTRUE

NC_CLINK_DATA

NC_CLINK_CLKTRUEMAKE_BASE=TRUE

MAKE_BASE=TRUETRUE NC_CLINK_RESET_L

NC_SATA_F_RTRUEMAKE_BASE=TRUE

NC_SATA_E_DTRUEMAKE_BASE=TRUE

NC_PSOC_P1_3

NC_SATA_B_D2RN

TRUE SATA_ODD_R2D_N

SATA_ODD_D2R_UF_PTRUE

TRUE PPVOUT_SW_LCDBKLT

NC_CLINK_CLK

TRUE PP3V3_LCDVDD_SW_F

TRUE PP18V5_DCIN_FUSE

WS_KBD20TRUE

PP5V_S3_IR_RTRUE

TRUE SMC_LID_R

SMBUS_SMC_BSA_SDATRUE

SMBUS_SMC_BSA_SCLTRUE

ADAPTER_SENSETRUE

TRUE WS_KBD6

TRUE WS_KBD4

PP3V42_G3HTRUE

PP3V3_S5TRUE

TRUE WS_LEFT_OPTION_KBD

TRUE WS_CONTROL_KBD

MAKE_BASE=TRUE

NC_PSOC_P1_TRUE

MAKE_BASE=TRUETRUE NC_SATA_B_D

NC_SATA_B_D2RP

NC_SATA_B_R2D_CP

NC_SATA_D_D2RN

NC_SATA_B_R2D_CN

NC_SATA_D_D2RP

NC_SATA_D_R2D_CN

NC_SATA_D_R2D_CP

TRUE PM_SLP_S3_L

PP4V5_AUDIO_ANALOGTRUE

TRUE PCIE_AP_D2R_PI_N

TRUE PP3V3_WLAN

PP3V3_LCDVDD_SW_FTRUE

TRUE PM_SLP_S4_L

PP5V_S0_HDD_FLTTRUE

SMBUS_SMC_BSA_SCLTRUE

TRUE WS_KBD9

WS_KBD8TRUE

TRUE WS_KBD7

TRUE WS_KBD5

TRUE WS_KBD1

PPVCORE_S0_AXGTRUE

TRUE Z2_DEBUG3

TRUE Z2_BOOST_EN

Z2_CLKINTRUE

TRUE Z2_KEY_ACT_L

PSOC_SCLKTRUESMBUS_SMC_A_S3_SDATRUE

TRUE SMBUS_SMC_A_S3_SCL

TRUE PSOC_MOSI

TRUE PP3V3_S5

PSOC_F_CS_LTRUEPICKB_LTRUE

PSOC_MISOTRUE

TRUE PP18V5_S5

Z2_CS_LTRUE

Z2_MISOTRUE

TRUE LPC_CLK33M_LPCPLUS

TRUE LPC_SERIRQ

TRUE LPC_AD<3>

TRUE LPCPLUS_GPIO

TRUE LPC_FRAME_L

TRUE LPC_PWRDWN_L

TRUE LPC_AD<2>TRUE LPC_AD<1>TRUE LPC_AD<0>

LPCPLUS_RESET_LTRUE

TRUE PM_CLKRUN_L

TRUE SMC_RX_L

TRUE SMC_TCK

TRUE SMC_TDI

TRUE SMC_MD1

TRUE SMC_TDO

TRUE PP3V42_G3H

TRUE SMC_TMS

TRUE PP5V_S0

TRUE SPIROM_USE_MLBTRUE SPI_ALT_MOSI

TRUE SPI_ALT_MISOTRUE SPI_ALT_CS_LTRUE SPI_ALT_CLK

TRUE SMC_TX_LTRUE SMC_TRST_L

PPVCORE_S0_CPUTRUE

USB_BT_PTRUE

TRUE SPKRAMP_SUB_N_OUT

SMC_BIL_BUTTON_LTRUE

SMBUS_SMC_BSA_SDATRUE

IR_RX_OUTTRUE

SYS_LED_ANODE_RTRUE

TRUE PP5V_S0_HDD_FLT

SATA_ODD_R2D_PTRUE

TRUE Z2_RESET

Z2_HOST_INTNTRUE

TRUE Z2_SCLK

TRUE Z2_MOSI

AP_TEMP_SMB_SCL_RTRUE

PCIE_AP_D2R_PI_PTRUE

SMBUS_SMC_0_S0_SCLTRUE

PP3V42_G3HTRUE

SATA_HDD_R2D_NTRUE

TRUE SMC_ODD_DETECT

TRUE LED_RETURN_3

LED_RETURN_2TRUE

LVDS_CONN_A_CLK_F_PTRUE

TRUE LED_RETURN_1

LVDS_CONN_A_CLK_F_NTRUE

LVDS_IG_A_DATA_P<2>TRUE




LVDS_DDC_DATATRUE

TRUE LVDS_DDC_CLKTRUE BKL_VSYNC

PP3V3_S0_LCD_FTRUE

PP3V3_WLANTRUE

PPVBAT_G3H_CONNTRUE

AP_RESET_CONN_LTRUE

AP_CLKREQ_Q_LTRUE

TRUE USB_BT_N

SMBUS_SMC_0_S0_SDATRUE

PCIE_AP_R2D_PTRUE

NC_CRT_IG_VSYNC

WIFI_EVENT_L_RTRUE

AP_TEMP_SMB_SDA_RTRUE

PCIE_WAKE_LTRUE

PP3V3_S3_BT_FTRUE

PCIE_CLK100M_AP_CONN_NTRUE

PCIE_CLK100M_AP_CONN_PTRUE

PCIE_AP_R2D_NTRUE

NC_PCI_PME_L

PP3V3_ENETTRUE

TRUE PP3V3_S5

6 7 22 42 47 52 54 6568 70 72 73 77

617

6 17

639

639

6

639

23

623 6 23

23

623 6 23

6 16

6

6

6

7 14 17 20 22 26 71

6 39

6 39

6 39

6 39

6 39

6 39

6 39

639

639

639

639

639

639

617

617

617

6 18

616

616 6 16

616 6 16

6 16

6 18

618

616 6 16

616 616

616

618 6 18

618 6 18

618 618

617

6 17

617 6 17

6 17

617 6 17

617 6 17

6 17

6

6

7 8 12 16 1718 19 20 22 23 26 27

29 33 36 37 40

41 42 46 48 49

50

51 52 54 57 61 62 71 72 7374 75 77 85

7 8 18 24 2630 31 32 33 48 50 54 55 72 73

61 62

61 62

61 62

6 42

616

69

9

69

9

616

616

616

619

619

619

619

616

6

6

6

6

6

6

6

6

6

6

81880

81880

6

617

617

617

617

617

7 27 29 30 6772

37 71

32 80

32 80

53

6 32 45 48 54 55 84

53

53

42 80

42 80

60 61 85

60 61 85

60 61 85

60 61 85

60 61 85

6 17

6 17

6 17

81

81

81

81

81

81

6 17

6 17

6 42

74 77

45 73

6 74

6 32 45 48 54 55 84

32

54

53

53

53

53

54

74 77

74 77

42 80

63

42 85

52

18 74 80

18 74 80

9

6

6

9

9

9

52

6 54

7 10 12 15 30 72 7385

53

7 12 1565

53

53

53

53

53

53

53

53

53

23

39 41

39 41

39 41

39 41

39 41

39 41 82

39 41 82

39 41 82

23

23

23

23

23

23

23

23

23

23

6

6

616

616

616

616

616

623

623

6 23

6 23

616 6 16

6 16

6 16

6

6

6 16616

616

616

7 9 10 12 1416 17 20 22 23 36 40

45 68 70 73

7 30 32 42 43 44 46 57 59 60 6166 67 72

6 7 2643 45 46

47 48 53 63 64 73

7 8 36 40 49 50 63 64 77

616

616

616

653

616

42 80

42 85

74 77

616

6 74

63

53

42

63

6 45 48 63 64 84

6 45 48 63 64 84

63

53

53

6 7 26 43 45 46 47 48 53 63 64

73

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

53

53

616

616

616

616

616

616

616

17 30 45 73

57

32 81

6 32 46

6 74

17 30 45 73

6 42

6 45 48 63 64 84

53

53

53

53

53

7 9 12 15 4969

53 54

54

53 54

53 54

53 54

6 32 45 48 54 55 84

6 32 45 48 54 55 84

53 54

6 7 8 17 19 20 22 23 2426 30 46 56 66 72 73 74

76 85

53 54

53 54

53 54

6 54

53 54

53 54

26 47 81

16 45 47

16 45 47 81

19 47

16 45 47 81

17 45 47

16 45 47 81

16 45 47 81

16 45 47 81

26 47 81

17 45 47

43 45 46 47

45 46 47

45 46 47

45 47

45 46 47

6 7 26 43 45 46 47 48 53 63 6473

45 46 47

6 7 22 42 47 52 54 65 68 70 7273 77

19 47 56

47

47

47

47

43 45 46 47

45 47

7 9 12 14 4969

24 32 80

60 61 85

45 46 63

6 45 48 63 64 84

42 44

42

6 42

42 80

53 54

53 54

53 54

53 54

32

32 81

32 45 48 51 84

6 7 26 43 45 46 4748 53 63 64 73

42 80

42 45

74 77

74 77

74 85

74 77

74 85

18 74 80

18 74 80

18 74 80

18 74 80

8 18 74

8 18 74

74 77

6 74

6 32 46

63 64

32

32

24 32 80

32 45 48 51 84

32 81

32

32

17 26 32

32

32 85

32 85

32 81

618

7 26 37 71 73








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

3.3V Rails

ENET Rails

"G3Hot" (Always-Present) Rails

2A max supply

1.8V/1.5V/1.2V/1.05V Rails

1V05 S0 LDO

Chipset "VCore" Rails

? mA

"FW" (FireWire) Rails

5V Rails

T29 Rails (off when no cable)

SYNC_MASTER=K91_MLB

Power Aliases

S

PP3V3_S3

PP1V0_FW_FWPHY

PP3V3_S0

MAKE_BASE=TRUEVOLTAGE=3.3V

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.5 MM

PP3V3_S0

PP3V3_S0

PP0V75_S0_DDRVTT

VOLTAGE=0.75V

MIN_LINE_WIDTH=2 mm

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.17 mm

PP5V_S5

PP15V_T29

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=17.8V

MIN_NECK_WIDTH=0.2 MM

PP15V_T29

VOLTAGE=3.3VMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM

PP3V3_T29

PP3V3_T29

PP3V3_T29



PP1V05_T29MIN_LINE_WIDTH=0.4 MM

PP1V05_T29

PP3V3_S3

PP3V3_S3

PP3V3_S3

PPDCIN_G3H


VOLTAGE=12.8V

PPVIN_SW_T29BST

PP3V42_G3H

PP1V05_SUS

PP5V_S3

PP5V_S3

PP5V_S3

PP5V_S3

PP5V_S3

PP5V_S3

PP5V_S3

PP5V_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

VOLTAGE=5VMAKE_BASE=TRUE


PP5V_S5MIN_LINE_WIDTH=0.5 MM

MIN_NECK_WIDTH=0.20MM


MIN_LINE_WIDTH=0.50MM

PP5V_SUS

PP3V3_T29

PP5V_S3

PP5V_S3

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUEVOLTAGE=5V

PP5V_S3

PP5V_SUS

PPVRTC_G3H PPVRTC_G3H

MAKE_BASE=TRUEVOLTAGE=3VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.2 MM

PP1V5_S3

MAKE_BASE=TRUEVOLTAGE=1.5VMIN_NECK_WIDTH=0.1 MMMIN_LINE_WIDTH=0.8 MM

PP5V_S3

PP5V_S3

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S3

PP5V_S3

PP5V_SUS

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP1V05_S0


VOLTAGE=0.75V


PPVTTDDR_S3

MAKE_BASE=TRUE

PPDCIN_G3H

PPDCIN_G3H

PPBUS_S5_HS_COMPUTING_ISNS

MAKE_BASE=TRUEVOLTAGE=12.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm






MIN_LINE_WIDTH=0.6 mm



PP3V3_T29

PPVP_FW

PPVP_FW

PP3V3_ENET

PP3V42_G3H

MAKE_BASE=TRUE

VOLTAGE=3.3V

PP3V3_ENETMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM

PPVRTC_G3H

PP0V75_S0_DDRVTT

PP0V75_S0_DDRVTT

PP0V75_S0_DDRVTT

PPVP_FW

PP1V0_FW_FWPHY

PP3V3_FW_FWPHY

PP1V05_SUS

PP3V3_ENET

PP3V3_FW_FWPHY

PPVCCSA_S0_CPU

PP3V3_FW_FWPHY

PP3V3_ENET

PP3V3_ENET

PPBUS_G3H

MAKE_BASE=TRUE

PP3V3_FW_FWPHYMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

MAKE_BASE=TRUEVOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM

PP1V05_SUS

VOLTAGE=12.8V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM

PPVP_FW



PP1V0_FW_FWPHY

PP1V05_S0

PP5V_S5

PP5V_S5

PPVCORE_S0_CPU



PPVCORE_S0_CPU

PPVCORE_S0_CPU

PPVCORE_S0_AXG

MAKE_BASE=TRUEVOLTAGE=1.5VMIN_NECK_WIDTH=0.2 MM

PP1V5_S3_CPU_VCCDQMIN_LINE_WIDTH=0.6 MM

PP1V05_S0_CPU_VCCPQE

MAKE_BASE=TRUE


VOLTAGE=1.05V


PP1V8_S0_CPU_VCCPLL_R

PP1V05_T29

PP1V05_S0_PCH_VCCADPLL


PPVCORE_S0_AXG

MAKE_BASE=TRUE

PPVCORE_S0_AXG


VOLTAGE=1.05V

PPVCORE_S0_AXG

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0





PPVTTDDR_S3

PP1V8_S0

PP1V8_S0

PP1V8_S0

PP3V42_G3H

PP3V42_G3H

PP1V8_S0

PP1V8_S0

PP1V8_S0


PP1V5_S3RS0

VOLTAGE=1.5V


MAKE_BASE=TRUE


PP1V5_S0


MIN_LINE_WIDTH=2 mm

PP1V5_S3

PP1V5_S3

PP1V5_S3

PP1V5_S3

PP1V5_S3

PP1V5_S3

PP1V5_S3RS0

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP1V8_S0

PP1V8_S0MIN_LINE_WIDTH=0.5 MM

MAKE_BASE=TRUE

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 MM

PP3V42_G3H

PP3V42_G3H


MAKE_BASE=TRUEVOLTAGE=3.42VMIN_NECK_WIDTH=0.2 MM

PP3V42_G3H




PPBUS_G3H


PP3V3_S3PP1V05_S0_PCH_VCCADPLL

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05VMAKE_BASE=TRUE


PP3V42_G3H

VOLTAGE=18.5V


PPDCIN_G3H

MAKE_BASE=TRUE

PPBUS_G3H



PPBUS_G3H

PPBUS_G3H

PP1V5_S0

PP1V5_S3RS0

PPBUS_G3H

PP15V_T29

PPBUS_G3H

PPBUS_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP3V3_S5

PPVCORE_S0_CPU

PP1V5_S0

PP1V5_S3RS0

PP0V75_S0_DDRVTT

PP1V5_S3_CPU_VCCDQ

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0


PP1V05_S0MIN_LINE_WIDTH=0.6 MM


PP5V_S5

PP3V3_S4



PPVCCSA_S0_CPUPPVCCSA_S0_CPUPP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

MIN_NECK_WIDTH=0.20MM MAKE_BASE=TRUEVOLTAGE=3.3V

PP3V3_S3MIN_LINE_WIDTH=0.50MM

PP3V3_S4

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP5V_S0

PP5V_S0


MAKE_BASE=TRUE

PP5V_S0

VOLTAGE=5V


PP5V_S3

VOLTAGE=3.3V

PP3V3_S4

MIN_NECK_WIDTH=0.20MM MAKE_BASE=TRUEMIN_LINE_WIDTH=0.50MM

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S4

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_LINE_WIDTH=0.6 MM

PP3V3_S5


PP3V3_SUS

PP3V3_SUS

PP3V3_SUS

PP3V3_SUS

PP3V3_SUS

PP3V3_SUS

PP3V3_SUS

PP3V3_SUS

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM

PP3V3_SUS


PP3V3_SUS

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

73940

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

7 27 29 30 67

7 54 66 72

783676

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6 7 8 18 24 26 30 31 3233 48 50 54 55 72 73

7496364

75066

36

6 7 26 43 45 46 47 48 53 63 6473

72371

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

67818242630313233485054557273

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

7 54 66 72

7 22 72

7161926343536

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

7 22 72

716172026

7 16 17 20 26

6 7 27 29 3067 72

673032424344465759

6061666772

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 22 42 47 52 54 65 68 70 7273 77

672242475254656870

727377

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

72272

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

7 31 67

7 49 63 64

7 49 63 64

7 50 65 67 68 69 70

7 50 65 67 68 69 70

7 50 65 67 68 69 70

7 50 66

7 50 66

7 50 66

6 7 26 37 71 73

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 37 71 73

7 16 17 20 26

7 27 29 30 67

7 27 29 30 67

7 27 29 30 67

74041

7 23 71

6 7 26 37 71 73

6 7 12 15 65

7394041

6726377173

6 7 26 37 71 73

6 7 8 36 40 49 50 63 64 77

7 23 71

6791012141617202223364045687073

7546672

7 54 66 72

7101214

71214

73536

72071

67912154969

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 1012 14 16 17 20 22 23 36 40 4568 70 7367 9 10 12 14 16 17 20 22 23

36 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 1214 16 17 20 22 23 36 40 45 6870 7367 9 10 12 14 16 17 20 22 23

36 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 23

36 40 45 68 70 73

6 7 9 10 12 14 16 1720 22 23 36 40 45 68

70 73

73167

6 7 14 17 20 22 26 71

6 7 14 17 20 22 26 71

6 7 14 17 20 22 26 71

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 43 45 46 47 48 53 63 6473

6 7 14 17 20 22 26 71

6 7 14 17 20 22 26 71

67141720222671

6 7 10 12 15 30 72 73 85

7 16 20 22 26 42 57 71

672729306772

6 7 27 29 30 67 72

6 7 27 29 30 67 72

6 7 27 29 30 67 72

6 7 27 29 30 67 72

6 7 27 29 30 67 72

6 7 10 12 15 30 72 73 85

7 16 20 22 26 42 57 71

7 16 20 22 26 42 57 71

7 16 20 22 26 42 57 71

6 7 14 17 20 22 26 71

6 7 14 17 20 22 26 71

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 43 45 4647 48 53 63 64

73

7 50 65 67 68 69 70

7 50 65 67 68 69 70

7 50 65 67 68 69 70

67836404950

636477

75065676869

70

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6726434546474853

636473

7 49 63 64

6 7 8 36 40 49 50 63 64 77

6 7 8 36 40 4950 63 64 77

6 7 8 36 40 49 50 63 64 77

716202226425771

6 7 10 12 15 30 72 73 85

6 7 8 36 40 49 50 63 64 77

6 7 8 36 40 49 50 63 64 77

6 7 8 36 40 49 50 63 64 77

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 43 45 46 47 48 53 63 6473

6 7 26 43 45 46 47 48 53 63 6473

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

67912144969

7 16 20 22 26 42 57 71

6710121530727385

727293067

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

7 54 66 72

7 46 53 54 72

6 7 12 15 65671215656 7 8 1824 26 30 31 32 33 48 50 54 55

72 73

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

6 7 8 18 24 26 30 31 3233 48 50

54 55 72 73

6 7 8 18 24 26 3031 32 33 48 50 54 55 72 73

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

7 46 53 54 72

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52

54 57 61 62 71 72 73 74 75 77

85

67 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 4246 48 49 50 51 52 54 57 6162 71 72 73 74 75 77 85

67

8

12

16

17 18 19 20 22 23 26 27 2933 36 37 40 41 42 46 48 4950 51 52 54 57 61 62 7172 73 74 75 77 85

6 7 812 16 17 18 19 20 2223 26 27 29 33 36 3740 41 42 46 48 49 50 51 5254 57 61 62 71 72 73 74 7577 8567 8 12 16 17 18 19 20 22 23

26 27 29 33 36 37 40 41

42 46 48 49 50 51 52 54 57

61

62 71 72 73 74 75 77 8567

8

12 16 17 18 19 20 22 23 26 27

29

33 36 37 40 41 42 46 48 49

50

51 52 54 57 61 62 71 72 7374 75 77 8567 8 12 16 17 18 19 20 22 23

26 27 29 33 36 37

40 41 42 46 48 49 50 51 52

54

57 61 62 71 72 73 74 75 77

85

67

8

12 16 17 18 19 20 22 23 26 27

29

33 36 37 40 41 42 46 48 4950 51 52 54 57 61 62 71 7273 74 75 77 8567 8 12 16 17 18 19 20 22 23

26 27 29 33 36

37 40 41 42 46 48 49 50 51

52

54 57 61 62 71 72 73 74 75

77

8567

8

12

16

17 18 19 20 22 23 26 27 2933 36 37 40 41 42 46 48

49 50 51 52 54 57 61 62 7172 73 74 75 77 8567 8 12 16 17 18 19 20 22 23

26 27 29 33

36 37 40 41 42 46 48 49 50

51

52 54 57 61 62 71 72 73 74

75

77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 4648 49 50 51 52 54 57 61 62 7172 73 74 75 77 85

67 8 12 16 17 18 19 20 22 23

26 27 29 33

36 37 40 41 42 46 48 49 5051 52 54 57 61 62 71 72 7374 75 77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 8567 8 12 16 17 18 19 20 22 23

26 27 29 33

36 37 40 41 42 46 48 49 5051 52 54 57 61 62 71 72 7374 75 77 85

67 8 12 16 17 18 19 20 22 23

26 27 29 33

36 37 40 41 42 46 48 49 5051 52 54 57 61 62 71 72 7374 75 77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48

49 50 51 52 54 57 61 62 71 72

73

74 75 77 8567

8

12 16 17 18 19 20 22 23 2627 29 33 36 37 40

41 42 46 48 49 50 51 52 5457 61 62 71 72 73 74 7577 85

67

8

121617 18 19 20 22 23 26 27 29

33 36 37 40 41 42

46 48 49 50 51 52 54 5761 62 71 72 73 74 75 7785

67

8

12 16 17 18 19 20 22 23 2627 29

33 36 37 40 41 42 46 48 49

50 51 52

54 57 61 62 71 72 73 74

75

77 85

6781216 17 18 19 20 22 23 26 2729 33 36 37 40 41 42 46

48 49 50 51 52 54

57 61 62 71 72 73 74 7577 85

6 7 812 16 17 18 19 20 22 23 26 2729 33 36 37 40 41 42 46 48 4950 51 52 54 57 61 62 71 7273 74 75 77 85

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 8567 8 12 16 17 18 19 20 22 23

26 27 29 33

36 37 40 41 42 46 48 49 5051 52 54 57 61 62 71 72 7374 75 77 85

678121617181920222326272933363740414246

4849

505152545761627172

7374

757785

67

8

12

16

17 18 19 20 22 23 26 27 2933 36 37 40 41

42 46 48 49 50 51 52 54 5761 62 71 72 73 74 75 77 85

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 22 42 47 52 54 65 68 70 7273 77

6 7 30 32 42 43 44 46 57 59 6061 66 67 72

7 46 53 54 72

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 2426

30 46 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046

56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 2426 30 46 56 66 72 73 74 76 85

6 7 8 17 19 20 22 23 24 26 3046 56 66 72 73 74 76 85

716171819202246717273

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 4671 72 73

7 16 17 18 19 20 22 46 71 72 73

7 16 17 18 19 20 22 46 71 72 73



OUT

OUT

IN

IN

IN OUT

IN

IN

OUT

OUT

IN

IN

IN

OUT

OUTIN

IN

EN

ILIM

FAULT*

GND

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

T29 JTAG

BELOW CPU

FAN STANDOFF

CPU signals

LEFT OF CPU

Digital Groun

Heat Spreader Holes for T29, PCH

HEATSINK STANDOFFS

T29 DP Ports

EMI TALL POGO PINS

EMI IO (SHORT) POGO PINS

MLB MOUNTING (TO C. BRACKET) SCREW HOLES

Unused T29 Ports

Unused PGOOD signal

DPA PWR SW : Nostuff, Backup

MLB MOUNTING (TO TOPCASE) SCREW HOLES

SM

2.0DIA-TALL-EMI-MLB-M97-M98

ZS0904

1


SM

ZS0905

1

1.4DIA-SHORT-EMI-MLB-K19-K24

SM

ZS0903

1


SM

ZS0900

1

3R2P5

OMIT

Z0911

1

3R2P5

OMIT

Z0908

1

3R2P5

OMIT

Z0906

1


SM

ZS0906

1


SM

ZS0908

1

SM


ZS0901

1

SM


ZS0909

1


SM

ZS0902

1

SM


ZS0907

1

3R2P5

OMIT

Z0912

1

OMIT

3R2P5

Z0909

1

OMIT

3R2P5

Z0910

1

3R2P5

OMIT

Z0907

1

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0905

1

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0902

1

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0920

1

STDOFF-4.5OD.98H-1.1-3.48-TH

Z0904

1

NO STUFF

MF-LF402

1/16W5%

10K

R09061

2

1/16W

NO STUFF

10K5%

MF-LF402

R09051

2

402

0

5%1/16WMF-LF

R09101 2

83

83

83

83

34 34

8 72

8 67

MF-LF1/16W

5%

402

100KR0908

1

2

5%1/16WMF-LF

402

2.2KR0920

1

2

MF-LF

2.2K

402

1/16W5%

R09211

2

MF-LF1/16W

402

5%2.2KR0922

1

2

2.2K

402

5%1/16WMF-LF

R09231

2

8 19 23 34

8 19 34

8 19 34

8192334

81934

81934

2.2K5%

1/16W

MF-LF402

R09251

2

5%1/16W

MF-LF402

2.2KR0924

1

2

3434

STDOFF-4.0OD1.85H-SM

Z0950

1


Z0951

1


Z0952

1

5%1/16W

10K

402MF-LF

R09161

2

5%

402

10K

1/16WMF-LF

R09151

2

2011/20W MF

5%0

NO STUFF

R0917 1 2

5%

NO STUFF

0

MF1/20W201R0918 1 2

TPS2553

NOSTUFF

SOT-23

U0950

3 4

2

5

1 6

1/16WMF-LF402

5%20K

NOSTUFF

R09501

2

5%1/8W

805MF-LF

0

T29BST:NR09601 2

0.01UF10%10VX5R201

C0960 1

2

0.01UF10%10VX5R201

C0962 1

2

0.01UF10%10VX5R201

C0970 1

2

10%0.01UF

10VX5R201

C0964 1

2

2011/20W MF

5%51R0970 1 2

10%0.01UF

10VX5R201

C0971 1

2

2011/20W MF

5%51R0971 1 2

51

MF

201 5%1/20W

R0973 1 2

0.01UF10%10VX5R201

C0973 1

20.01UF10%10VX5R201

C09721

2

51

1/20W5%201

MF

R0972 1 2

NO STUFF

10K5%

402MF-LF1/16W

R09031

2

NO STUFF

10K

1/16WMF-LF402

5%

R09041

2

S

Signal Aliases

SYNC_MASTER=K91_MLB

NC_PCH_CLKOUT_DPP

DP_A_BIAS0

TP_ISSP_SCLK_P1_1MAKE_BASE=TRUE

T29_A_BIAS_R2DN0

T29_A_BIAS

JTAG_ISP_TCK

MAKE_BASE=TRUE

TP_ISSP_SDATA_P1_0 TP_ISSP_SDATA_P1_0

VOLTAGE=3.3VT29_A_BIAS_R2DP0

T29_A_BIAS_R2DP1

T29_A_BIAS

VOLTAGE=3.3VT29_A_BIAS_D2RP1

VOLTAGE=3.3VT29_A_BIAS_D2RN1

T29_A_BIAS_R2DN1VOLTAGE=3.3V

DP_A_BIAS2

NC_FSB_CLK133M_PCH_N

PP15V_T29PPBUS_G3H

MAKE_BASE=TRUE NO_TEST=TRUE

NC_FSB_CLK133M_PCH_P

DP_IG_ML_P<3..0>

DP_EXTA_AUXCH_C_N

NC_FSB_CLK133M_PCH_P

TP_ISSP_SCLK_P1_1

PP3V3_SW_DPAPWR

T29_A_HV_ENSMC_S4_WAKESRC_EN

PP3V3_S5

DPAPWR_ILIM

TRUE

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2RP

NC_PEG_CLK100MNMAKE_BASE=TRUE

NC_USB_HUB2_OCS4MAKE_BASE=TRUE

MAKE_BASE=TRUE

PU_USB_HUB2_PRT4_P

MAKE_BASE=TRUE

PU_USB_HUB2_PRT4_N

JTAG_ISP_TDI

MEMVTT_EN

TP_DP_IG_B_MLP<3..0>

NC_PCIE_CLK100M_EXCARDN

NC_PCIE_CLK100M_EXCARDP

T29_A_RSVD_N


NC_FSB_CLK133M_PCH_N

JTAG_ISP_TDOMAKE_BASE=TRUE

JTAG_ISP_TDO

NC_PCIE_EXCARD_D2RP

NC_PCIE_EXCARD_R2D_CN

=PEG_R2D_C_N<11..8>

=PEG_D2R_P<11..8>

DP_IG_D_CTRL_DATA

MAKE_BASE=TRUE

TP_DDRREG_PGOOD

T29_LSEO<2>

T29_R2D_C_P<2..3>

T29_D2R_N<2..3>

USB_T29A_P

PCIE_PCH_R2D_C_N<5..8>

NC_PCH_CLKOUT_DPN

NC_PCH_CLKOUT_DPPTRUEMAKE_BASE=TRUE

NC_USB_HUB1_OCS4MAKE_BASE=TRUE

DP_EXTA_DDC_DATA

=PEG_D2R_N<11..8>

TRUEMAKE_BASE=TRUE


DP_IG_C_CTRL_CLK

DP_T29SNK0_AUXCH_C_N

T29_LSOE<3>MAKE_BASE=TRUE

T29_LSEO<3>

T29_LSOE<2>MAKE_BASE=TRUE

NO_TEST=TRUE

NC_BCM57765_CE_L_MS_INS_LMAKE_BASE=TRUE

TP_LVDS_IG_B_CLKPMAKE_BASE=TRUE

MAKE_BASE=TRUE

TP_LVDS_IG_B_CLKN

NC_LVDS_IG_B_DATAN<0..3>NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_IG_A_DATAP<3>MAKE_BASE=TRUE NO_TEST=TRUE

NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_IG_A_DATAN<3>

DP_T29SNK0_AUXCH_C_PMAKE_BASE=TRUE

DP_T29SNK1_HPDMAKE_BASE=TRUE

DP_T29SNK1_ML_C_P<3.MAKE_BASE=TRUE

DP_T29SNK1_ML_C_N<3.MAKE_BASE=TRUE

DP_T29SNK1_AUXCH_C_PMAKE_BASE=TRUE

DP_T29SNK1_AUXCH_C_NMAKE_BASE=TRUE

TP_BCM57765_TRAFFICLED_LMAKE_BASE=TRUE

LCD_IG_PWR_ENMAKE_BASE=TRUE

MAKE_BASE=TRUE

LCD_BKLT_PWM

MAKE_BASE=TRUE

LVDS_DDC_DATA

LVDS_DDC_CLKMAKE_BASE=TRUE

NO_TEST=TRUE

NC_LVDS_IG_B_DATAP<0..3>MAKE_BASE=TRUE

DP_IG_D_CTRL_CLKMAKE_BASE=TRUE

DP_T29SNK0_AUXCH_C_NMAKE_BASE=TRUE

DP_T29SNK0_ML_C_N<3.MAKE_BASE=TRUE

PEG_R2D_C_N<11..8>

PEG_D2R_P<11..8>

PEG_D2R_N<11..8>

=PEG_R2D_C_P<11..8>

DP_T29SNK1_HPD

DP_IG_C_CTRL_DATA

LCD_BKLT_EN

TP_BCM57765_TRAFFICLED_L


DP_T29SNK1_AUXCH_C_P

TP_DP_IG_D_MLN<3..0>

TP_DP_IG_D_MLP<3..0>


TP_DP_IG_C_MLN<3..0>

TP_DP_IG_C_MLP<3..0>

DP_T29SNK0_HPD

LCD_BKLT_PWM

LCD_IG_PWR_EN

LVDS_DDC_DATA

LVDS_DDC_CLK


NC_LVDS_IG_A_DATAP<3>

LVDS_IG_B_DATA_N<0..3>

LVDS_IG_B_DATA_P<0..3>

TP_LVDS_IG_B_CLKN

TP_LVDS_IG_B_CLKP

PU_USB_H

NC_BCM57765_CE_L_MS_INS_L

TP_DDRREG_PGOOD

TP_P1V5S3RS0_RAMP_DONETP_P1V5S3RS0_RAMP_DONEMAKE_BASE=TRUE

DP_T29SNK0_ML_C_P<3.MAKE_BASE=TRUE

DP_T29SNK0_HPDMAKE_BASE=TRUE

PCIE_T29_R2D_C_P<3..0>MAKE_BASE=TRUE

PCIE_T29_D2R_P<3..0>MAKE_BASE=TRUE

MAKE_BASE=TRUE

PCIE_T29_D2R_N<3..0>

PCIE_T29_R2D_C_N<3..0>MAKE_BASE=TRUE

NC_T29_D2RN<2..3>NO_TEST=TRUEMAKE_BASE=TRUE


NC_T29_R2D_CN<2..3>

NO_TEST=TRUENC_T29_R2D_CP<2..3>MAKE_BASE=TRUE

T29_R2D_C_N<2..3>

DP_IG_D_CTRL_DATAMAKE_BASE=TRUE

MAKE_BASE=TRUE

DP_EXTA_HPD

MAKE_BASE=TRUE

DP_EXTA_DDC_CLK

DP_EXTA_HPD

DP_IG_C_CTRL_DATAMAKE_BASE=TRUE

DP_IG_C_CTRL_CLKMAKE_BASE=TRUE

DP_IG_D_CTRL_CLK

MAKE_BASE=TRUE

DP_EXTA_DDC_DATA

PP3V3_S0

PU_USB_H

MAKE_BASE=TRUE

NC_T29_D2RP<2..3>NO_TEST=TRUE

USB_EXTC_P

TP_CPU_VTT_SELECT

T29_D2R_P<2..3>

USB_EXTC_N

T29_A_RSVD_P

MAKE_BASE=TRUE

MEMVTT_EN

DP_EXTA_ML_C_P<3..0>MAKE_BASE=TRUE

DP_EXTA_AUXCH_C_PMAKE_BASE=TRUE

DP_EXTA_AUXCH_C_P

DP_EXTA_AUXCH_C_NMAKE_BASE=TRUE

DP_IG_ML_N<3..0>MAKE_BASE=TRUE

DP_EXTA_ML_C_N<3..0>

DP_EXTA_DDC_CLK

PP3V3_S0

PEG_R2D_C_P<11..8>

MAKE_BASE=TRUE

FW643_WAKE_L

MAKE_BASE=TRUE

TP_SMC_EXCARD_PWR_EN

NC_PCIE_EXCARD_D2RN

TRUE

MAKE_BASE=TRUE


TRUEMAKE_BASE=TRUE

NC_PCIE_EXCARD_R2D_CPNC_PCIE_EXCARD_R2D_CP

TRUEMAKE_BASE=TRUE

NC_PCH_CLKOUT_DPN

TRUEMAKE_BASE=TRUE

NC_PCIE_PCH_D2RN<5..8>PCIE_PCH_D2R_N<5..8>

MAKE_BASE=TRUETRUE NC_PCIE_PCH_R2D_CN<5..8>MAKE_BASE=TRUETRUE NC_PCIE_PCH_D2RP<5..8>PCIE_PCH_D2R_P<5..8>

MAKE_BASE=TRUE

NC_PEG_CLK100MPNC_PEG_CLK100MPMAKE_BASE=TRUETRUE NC_PCIE_PCH_R2D_CP<5..8>PCIE_PCH_R2D_C_P<5..8>

NC_PEG_CLK100MN



MAKE_BASE=TRUE

PPBUS_SW_BKL

PPBUS_SW_BKL

PPBUS_SW_LCDBKLT_PWRMAKE_BASE=TRUE

NC_USB_HUB1_OCS4

PU_USB_HUB2_PRT4_P

NC_USB_HUB2_OCS4

LCD_BKLT_ENMAKE_BASE=TRUE

PP3V3_S3

PU_USB_HUB2_PRT4_N

MAKE_BASE=TRUE

TP_CPU_VTT_SELECT

USB_T29A_N

MAKE_BASE=TRUE

FW_PLUG_DET_L FW_PLUG_DET_L

FW643_WAKE_L

TP_SMC_EXCARD_PWR_EN

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2RNTRUE

MAKE_BASE=TRUETRUE NC_PCIE_CLK100M_EXCARDP

DP_EXTA_AUXCH_C_P

TP_DP_IG_B_MLN<3..0>

DP_EXTA_AUXCH_C_N

JTAG_ISP_TDIMAKE_BASE=TRUE

JTAG_ISP_TCKMAKE_BASE=TRUE


GND

VOLTAGE=0V

816

75

853

75

87576

853 8 53

75

75

87576

76

76

75

8 80

7 36 766736404950636477

880

80

817758081

8 80

8 53

45467376

6717192022232426304656667273747685

8 16

8 16 81

824

824

824

8 30 67

17

81681

81681

7580

880

816

816

9

9

817

867

24 80

816

8 16

824

8 17 75

9

8 16

817

8173483

837

681880

681880

18

81880

81880

837

81874

81877

681874

681874

18

8 17

78

78

78

9

81734

817

8 1

8 3

8173483

8173483

17

17

8173483

17

17

81734

8 1

8 1

6 8

6 8

8 1

8 1

8

8

6 8

6 8

8 3

872

3481

34 81

34 81

34 81

34

34

34

8 17

81775

81775

8 17 75

8 17

8 17

817

81775

678121617181920222326272933363740414246

48495051525457616271

727374757785

34

24 80

8

24 80

7580

83067

7581

817758081

817758081

817758081

807581

8 17 75

678121617181920222326272933363740414246

48495051525457616271

727374757785

78

83940

8

816

8 16 81

8 16816

8 16

8 16 8181681

81681

8 77

8 77

77

8 24

8 24

8 24

81877

6718242630313233485054557273

8 24

8

24 80

81940 8 19 40

8 39 40

8

8 16

8 16 81

8 17 75 80 81

17

8 17 75 80 81



IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUTOUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NCNC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

EDP_TX_3

EDP_TX_0

EDP_TX_1

EDP_TX_2

EDP_TX_2*

EDP_TX_3*

EDP_TX_0*

EDP_TX_1*

EDP_AUX

EDP_AUX*

EDP_COMPIO

EDP_HPD

EDP_ICOMPO

FDI1_LSYNC

DMI_TX_3*

FDI0_LSYNC

FDI0_TX_3

FDI1_TX_1

FDI1_TX_0

FDI1_TX_2

FDI1_TX_3

FDI0_FSYNC

FDI1_FSYNC

FDI_INT

FDI1_TX_3*

FDI1_TX_2*

FDI0_TX_1

FDI0_TX_0

FDI0_TX_2

FDI1_TX_1*

FDI0_TX_3*

FDI1_TX_0*

FDI0_TX_2*

FDI0_TX_1*

DMI_TX_1*

DMI_TX_2*

DMI_TX_0

DMI_TX_2

DMI_TX_1

DMI_TX_3

FDI0_TX_0*

DMI_RX_2*

DMI_RX_0

DMI_RX_1

DMI_RX_2

DMI_RX_3

DMI_TX_0*

DMI_RX_3*

DMI_RX_1*

DMI_RX_0* PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX_2*

PEG_RX_0*

PEG_RX_1*

PEG_RX_3*

PEG_RX_4*

PEG_RX_5*

PEG_RX_7*

PEG_RX_6*

PEG_RX_8*

PEG_RX_9*

PEG_RX_10*

PEG_RX_12*

PEG_RX_11*

PEG_RX_14*

PEG_RX_13*

PEG_RX_15*

PEG_RX_0

PEG_RX_1

PEG_RX_3

PEG_RX_2

PEG_RX_4

PEG_RX_6

PEG_RX_5

PEG_RX_7

PEG_RX_8

PEG_RX_10

PEG_RX_9

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX_1*

PEG_TX_2*

PEG_TX_0*

PEG_TX_3*

PEG_TX_4*

PEG_TX_5*

PEG_TX_7*

PEG_TX_6*

PEG_TX_10*

PEG_TX_8*

PEG_TX_9*

PEG_TX_11*

PEG_TX_12*

PEG_TX_13*

PEG_TX_14*

PEG_TX_15*

PEG_TX_1

PEG_TX_0

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_6

PEG_TX_5

PEG_TX_7

PEG_TX_8

PEG_TX_9

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_14

PEG_TX_13

PEG_TX_15

(1 OF 9)

P C I

E X P R E S S

B A S E D

I N T E R F A C E

S I G N A L S

D M I

I N T E L

F L E X I B L E

D I S P L A Y

I N T E R F A C E

S I G N A L S

E M B E D D E D

D I S P L A Y

P O R T

VSS_VAL_SENSE

VAXG_VAL_SENSE

VSSAXG_VAL_SENSE

VCC_VAL_SENSE

CFG_17

CFG_16

CFG_15

CFG_10

CFG_11

CFG_12

CFG_13

CFG_14

CFG_5

CFG_6

CFG_7

CFG_8

CFG_9

CFG_0

CFG_1

CFG_2

CFG_3

CFG_4

RSVD_28

RSVD_29

RSVD_30

RSVD_32

RSVD_31

RSVD_34

RSVD_33

RSVD_35

RSVD_36

RSVD_37

RSVD_38

RSVD_40

RSVD_39

RSVD_42

RSVD_43

RSVD_41

RSVD_44

RSVD_45

DC_TEST_A4

DC_TEST_C4

DC_TEST_D1

DC_TEST_D3

DC_TEST_A58

DC_TEST_C59

DC_TEST_A59

DC_TEST_C61

DC_TEST_A61

DC_TEST_D61

DC_TEST_BE61

DC_TEST_BD61

DC_TEST_BG61

DC_TEST_BE59

DC_TEST_BG59

DC_TEST_BG58

DC_TEST_BG4

DC_TEST_BE3

DC_TEST_BG3

DC_TEST_BE1

DC_TEST_BD1

DC_TEST_BG1

VCC_DIE_SENSE

RSVD_7

RSVD_6

RSVD_8

RSVD_9

RSVD_10

RSVD_12

RSVD_11

RSVD_13

RSVD_14

RSVD_15

RSVD_17

RSVD_16

RSVD_18

RSVD_19

RSVD_20

RSVD_21

RSVD_22

RSVD_24

RSVD_23

RSVD_25

RSVD_27

RSVD_26

RESERVED

(5 OF 9)

OUT

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

Note. VOLTAGE=0V

Note. VOLTAGE=1.05V

Note. VOLTAGE=0V

Note. VOLTAGE=1.25V

doc 439028 rev1.0 HR_PPDG sections 6.2.1 and 6.3.1.

This would require routing processor signal balls BE7 and BG7 for Sandy Bridge 2-core

to SO-DIMM connectors directly. FETs are needed in order to avoid potential leakage while system is in S3

CFG [2] :PCIE x16 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

CFG [6:5] :PCIE BIFURCATION 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4

CFG [3] :PCIE x4 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

NOTE: Intel is investigating future processor VREF_DQ generation to replace M1 and M2.

FOR SANDYBRIDGE PROCESSOR

CFG [7] :PEG DEFER TRAINING 1 = (DEFAULT) IMMEDIATELY AFTER xxRESETB 0 = WAIT FOR BIOS

This signal can be left as no-connect if entire eDP interface is disabled.connect it to CPU VCCIo via a 10-kOhm pull-up resistor on the motherboard.If HPD is disabled while eDP interface is still enabled,

(refer to latest Processor EDS for DC specifications).

to convert the active high signal from Embedded DisplayPort sink deviceTherefore, an inverting level shifter is required on the motherboardNOTE: The EDP_HPD processor input is a low voltage active low signal.

shared with other interfaces.

NOTE: eDP_COMPIO and eDP_ICOMPO can not be left floating

Intel Doc 438297 Huron River SFF DG rev1.0 section 2.2.1 recommendation.

NOTE: Intel validation sense lines per

to low voltage signals for the processor

CFG [4] :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED

These can be Placed close to J2500 and Only for debug access

NOTE: Intel provides an internal pull-up OF 5-15k to VCCIO on all CFG signals.

even if internal Graphics is disabled since they are

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

6

6

6

6

6

8

8

8

8

6

6

6

6

6

6

6

6

6

6

6

6

8

8

8

6

6

6

8

6

6

6

6

6

6

6

6

6

8

8

8

6

6

6

6

6

6

6

8

6

6

6

6

6

6

6

8

6

6

6

6

8

8

8

6

1/16W

PLACE_NEAR=U1000.G3:12.7MM

MF-LF

402

24.9

1%

R1010

1 2

92378

92378

92378

92378

92378

92378

92378

92378

2378

2378

2378

2378

2378

2378

2378

2378

923

23

1K

MF-LF

402

1/16W

5%

NOSTUFF

R10421

2

5%

1K

NOSTUFF

1/16W

402

MF-LF

R10491

2

5%

1K

NOSTUFF

MF-LF

1/16W

402

R10431

2

5%

1K

NOSTUFF

402

1/16W

MF-LF

R10411

2

5%

1K

NOSTUFF

1/16W

MF-LF

402

R10401

2

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

1778

402

PLACE_NEAR=U1000.AF3:12.7MM

24.9

MF-LF1/16W1%

R1030

1 2

MF-LF

10K

EDP

PLACE_NEAR=U1000.AG11:12.7MM1%

1/16W

402

R1031

1 2

1/16WMF-LF

5%

0

402

NOSTUFFR10231 2

1%

1/16WMF-LF402

1K

NOSTUFFR10221

2

MF-LF

5%

0

1/16W

402

NOSTUFF

R10211 2

402MF-LF

1/16W

1%

1K

NOSTUFFR10201

2

5%

1/16W

MF-LF

1K

EDP

402

R10441

2

NOSTUFF

1K

1/16W

402

5%

MF-LF

R10461

2

1K

MF-LF

402

1/16W

5%

R10451

2

1/16W

MF-LF

1K

402

5%

NOSTUFF

R10471

2

1%

49.9

MF-LF

402

1/16W

PLACE_SIDE=BOTTOM

PLACE_NEAR=U1000.H43:50.8MM

NOSTUFF

R10641

2

PLACE_SIDE=BOTTOMPLACE_NEAR=U1000.H45:50.8MM

MF-LF

NOSTUFF

1%

402

1/16W

49.9

R10701

2

PLACE_NEAR=U1000.K43:50.8MMPLACE_SIDE=BOTTOM

NOSTUFF

49.91%

402MF-LF

1/16W

R10651

2

PLACE_SIDE=BOTTOMPLACE_NEAR=U1000.K45:50.8MM

49.9

402MF-LF

1/16W1%

NOSTUFF

R10711

2

SANDY-BRIDGE

OMIT_TABLE

CRITICAL

BGA

MOBILE-2C-35W

U1000

N3

M2

P7

P6

P3

P1

P11

P10

K3

K1

M7

M8

P4

N4

T3

R2

AF4

AG4

AF3

AG11

AD2

AC1

AC3

AA4

AC4

AE10

AE11

AE6

AE7

AA11

AA10

U6

U7

W10

W11

W3

W1

AA7

AA6

AC12

AG8

W7

W6

T4

V4

AA3

Y2

AC8

AC9

U11

G3

G1

G4

K22

H22

K19

J21

F8

G8

C8

A8

C5

B6

H6

H8

F6

E5

K6

K7

C21

B22

D19

D21

C19

A19

D16

D17

C13

B14

D12

D13

C11

A11

C9

B10

F22

G22

A23

C23

K13

J14

G13

H13

K10

M10

G10

F10

D8

D9

K4

J4

D24

D23

E21

F21

G19

H19

B18

C17

K17

K15

G17

F17

E14

F14

C15

A15

OMIT_TABLE

CRITICAL

BGA

M O B I L E - 2 C - 3 5 W

S A N D Y - B R I D G E

U1000B50

C51

K49

K53

F53

G53

L51

F51

D52

L53

B54

D53

A51

C53

C55

H49

A55

H51

A4

A58

A59

A61

BD1

BD61

BE1

BE3

BE59

BE61

BG1

BG3

BG4

BG58

BG59

BG61

C4

C59

C61

D1

D3

D61

AG13

AH2

AM14

AM15

AT21

AT49

AU19

AU21

AV19

AY21

AY22

BA19

BA22

BB19

BB21

BD21

BD22

BD25

BD26

BE22

BE24

BE26

BE7

BF23

BG22

BG26

BG7

H48

K24

K48

L42

L45

L47

M13

M14

N42

N50

P13

U14

W14

H45

F48

H43

K43

K45

5185

5185

CPU DMI/PEG/FDI/RSV

PP0V75_S3_MEM_VREFDQ_B

NC_PEG_R2D_CN<13>

NC_PEG_R2D_CN<12>

=PEG_R2D_C_N<10>

=PEG_R2D_C_N<11>

NC_PEG_R2D_CN<14>

=PEG_R2D_C_P<2>

=PEG_R2D_C_P<10>

=PEG_R2D_C_P<11>

TP_CPU_VCC_DIE_SENSE

PP0V75_S3_MEM_VREFDQ_A

PPVCORE_S0_CPU

CPU_CFG<16>

CPU_CFG<3>

CPU_CFG<0>

CPU_CFG<1>

CPU_CFG<2>

NC_PEG_R2D_CP<15>

NC_PEG_R2D_CP<14>

NC_PEG_R2D_CP<12>

=PEG_R2D_C_P<8>

=PEG_R2D_C_P<7>

=PEG_R2D_C_P<5>

=PEG_R2D_C_P<6>

=PEG_R2D_C_P<0>

=PEG_R2D_C_P<1>

NC_PEG_R2D_CN<15>

=PEG_R2D_C_N<9>

=PEG_R2D_C_N<8>

=PEG_R2D_C_N<6>

=PEG_R2D_C_N<7>

=PEG_R2D_C_N<5>

=PEG_R2D_C_N<4>

=PEG_R2D_C_N<3>

=PEG_R2D_C_N<0>

=PEG_R2D_C_N<2>

=PEG_R2D_C_N<1>

NC_PEG_D2RP<15>

NC_PEG_D2RP<14>

NC_PEG_D2RP<13>

NC_PEG_D2RP<12>

=PEG_D2R_P<11>

=PEG_D2R_P<9>

=PEG_D2R_P<8>

=PEG_D2R_P<7>

=PEG_D2R_P<5>

=PEG_D2R_P<6>

=PEG_D2R_P<4>

=PEG_D2R_P<2>

=PEG_D2R_P<3>

=PEG_D2R_P<1>

=PEG_D2R_P<0>

NC_PEG_D2RN<15>

NC_PEG_D2RN<13>

NC_PEG_D2RN<14>

=PEG_D2R_N<11>

NC_PEG_D2RN<12>

=PEG_D2R_N<10>

=PEG_D2R_N<8>

CPU_PEG_COMP

DMI_S2N_N<0>

DMI_S2N_N<1>

DMI_S2N_N<3>

DMI_N2S_N<0>

DMI_S2N_P<2>

DMI_S2N_P<1>

DMI_S2N_P<0>

DMI_S2N_N<2>

FDI_DATA_N<0>

DMI_N2S_P<3>

DMI_N2S_P<1>

DMI_N2S_P<2>

DMI_N2S_P<0>

DMI_N2S_N<2>

DMI_N2S_N<1>

FDI_DATA_N<1>

FDI_DATA_N<2>

FDI_DATA_N<4>

FDI_DATA_N<3>

FDI_DATA_N<5>

FDI_DATA_P<2>

FDI_DATA_P<0>

FDI_DATA_P<1>

FDI_DATA_N<6>

FDI_DATA_N<7>

FDI_INT

FDI_FSYNC<1>

FDI_FSYNC<0>

FDI_DATA_P<7>

FDI_DATA_P<6>

FDI_DATA_P<3>

FDI_LSYNC<0>

DMI_N2S_N<3>

FDI_LSYNC<1>

EDP_COMP

NC_EDP_AUXN

NC_EDP_AUXP

NC_EDP_TXN<1>

NC_EDP_TXN<0>

NC_EDP_TXN<3>

NC_EDP_TXN<2>

NC_EDP_TXP<2>

NC_EDP_TXP<1>

NC_EDP_TXP<0>

NC_EDP_TXP<3>

TP_CPU_DC_TEST_BD1

CPU_DC_TEST_C4_BE1_BG1

CPU_DC_TEST_C4_BE3_BG3

TP_CPU_DC_TEST_BG4

TP_CPU_DC_TEST_BG58

CPU_DC_TEST_BG59_BG61

TP_CPU_DC_TEST_BD61

CPU_DC_TEST_BE59_BE61

TP_CPU_DC_TEST_D61

CPU_DC_TEST_C61_A61

CPU_DC_TEST_C59_A59

TP_CPU_DC_TEST_A58

TP_CPU_DC_TEST_D1

CPU_DC_TEST_C4_D3

TP_CPU_DC_TEST_A4

CPU_MEM_VREFDQ_B

CPU_MEM_VREFDQ_A

CPU_CFG<2>

CPU_CFG<9>

CPU_CFG<8>

CPU_CFG<7>

CPU_CFG<6>

CPU_CFG<5>

CPU_CFG<14>

CPU_CFG<12>

CPU_CFG<11>

CPU_CFG<10>

CPU_CFG<15>

CPU_CFG<16>

CPU_CFG<17>

=PEG_R2D_C_P<4>

=PEG_R2D_C_P<3>

CPU_CFG<7>

CPU_CFG<0>

=PEG_D2R_N<5>

=PEG_D2R_N<7>

=PEG_D2R_N<9>

=PEG_D2R_N<6>

PP1V05_S0

FDI_DATA_P<4>

FDI_DATA_P<5>

CPU_THERMD_N

CPU_THERMD_P

CPU_CFG<13>

CPU_CFG<4>

=PEG_D2R_P<10>

PPVCORE_S0_AXG

CPU_CFG<3>

CPU_CFG<1>

=PEG_D2R_N<1>

=PEG_D2R_N<0>

CPU_MEM_VREFDQ_A

PP1V05_S0

EDP_HPD

CPU_CFG<6>

CPU_CFG<5>

CPU_CFG<4>

CPU_MEM_VREFDQ_B

NC_PEG_R2D_CP<13>

=PEG_R2D_C_P<9>

DMI_S2N_P<3>

CPU_AXG_VALSENSE_N

CPU_AXG_VALSENSE_P

CPU_VCC_VALSENSE_N

CPU_VCC_VALSENSE_P

=PEG_D2R_N<4>

=PEG_D2R_N<3>

=PEG_D2R_N<2>

1

2931

2731

6 7 12 14 49 69

923

92378

92378

92378

92378

78

78

6

6

6

6

6

6

6

6

6

6

9

9

92378

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 12 15 4969

9

67910121416

172022

233640

456870

73

92378

92378

92378

9



BI

BI

BI

BI

BI

IN

IN

OUT

IN

IN

OUT

OUT

BI

BI

NC

OUT

SM_RCOMP_2

SM_RCOMP_1

SM_RCOMP_0

SM_DRAMRST*

BCLK_ITP

BCLK_ITP*

DPLL_REF_CLK*

DPLL_REF_CLK

BCLK*

BCLK

RESET*

SM_DRAMPWROK

UNCOREPWRGOOD

PM_SYNC

PROC_SELECT*

PROC_DETECT*

PREQ*

TMS

TRST*

TDI

TDO

DBR*

BPM_0*

BPM_1*

BPM_2*

BPM_3*

BPM_4*

BPM_5*

BPM_6*

BPM_7*

TCK

PRDY*

THERMTRIP*

CATERR*

PROCHOT*

PECI

(2 OF 9)

C L O C K S

T H E R M A L

P W R

M G M T

J T A G

&

B P M

D D R 3

M I S C

IN

OUT

IN

IN

IN

OUT

IN

IN

IN

IN

IN

OUT

BI

BI

BI






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)(IPU)

(IPU)

(IPU)

(IPU)

Unused eDP CLK

(IPU)

23 78

23

23

23

23

10K

1/16W

402

5%

MF-LF

R11111

2

173078

192378

30

16 78

16 78

17

1978

466878

194578

MF-LF

402

1/16W1%

75

R11261

2

1/16W

402

2001%

MF-LF

R11141

2

MF-LF

1/16W

402

25.51%

R11131

2402

1/16W

MF-LF

1401%

R11121

2

78

OMIT_TABLE

CRITICAL

BGA

SANDY-BRIDGE

MOBILE-2C-35W

U1000

J3

H2

N59

N58

G58

E55

E59

G55

G59H60

J59

J61

C49

K58

AG3

AG1

A48

C48

N53

N55

C57

F49

C45

D44

BE45

AT30

BF44

BE43

BG43

L56

M60

L59

D45

L55

J58

B46

MF-LF402

1/16W

5%

56R1103

12

1/16W5%1K

MF-LF402

R11401

2

402MF-LF

5%1/16W

1KR11411

2

402

MF-LF

1/16W

625%

R11011

2

NOSTUFF

402

1/16W

1K

MF-LF

5%

R11001

2

23 78

23 78

23 78

23 78

23 78

23 78

23 78

200

1/16W

402

MF-LF

1%

R11201

2130

402

1%

MF-LF1/16W

R1121

12

16 78

16 78

1778

NOSTUFF

MF-LF

1/16W

5%

51

402

R11041

2

1/16WMF-LF

1%

402

43.2R1125

122326

1K

NOSTUFF

MF-LF

1/16W

402

5%

R11021

2

23 26 78

23 78

23 78

23 78

CPU CLOCK/MISC/JTA

DMI_CLK100M_CPU_N

DMI_CLK100M_CPU_P

DPLL_REF_CLKP

DPLL_REF_CLKN

ITPCPU_CLK100M_P

ITPCPU_CLK100M_N

XDP_CPU_PRDY_L

XDP_CPU_PREQ_L

XDP_CPU_TMS

XDP_CPU_TRST_L

PP1V05_S0

PLT_RST_BUF_L

PP1V05_S0

CPU_SM_RCOMP<0>

CPU_SM_RCOMP<1>


XDP_CPU_TDI

XDP_CPU_TCK

XDP_BPM_L<7>

XDP_BPM_L<6>

XDP_BPM_L<5>XDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<2>

XDP_BPM_L<1>

XDP_BPM_L<0>

XDP_DBRESET_L

XDP_CPU_TDO

CPU_PECI

CPU_CATERR_L

CPU_SM_RCOMP<2>

PM_THRMTRIP_L

CPU_PWRGD

CPU_PROCHOT_R_L

CPU_MEM_RESET_L

PM_MEM_PWRGD_R

PM_SYNC

CPU_PROC_SEL_L

PM_MEM_PWRGD

PP1V5_S3RS0

CPU_PROCHOT_L

PLT_RESET_LS1V1_L

1

6791012141617202223364045687073

6791012141617202223364045687073

78

78

71214

78

67121530727385



BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

SA_MA_14

SA_MA_15

SA_MA_12

SA_MA_13

SA_MA_11

SA_MA_9

SA_MA_10

SA_MA_8

SA_MA_7

SA_MA_6

SA_MA_5

SA_MA_4

SA_MA_3

SA_MA_2

SA_MA_1

SA_MA_0

SA_DQS_7

SA_DQS_5

SA_DQS_6

SA_DQS_3

SA_DQS_4

SA_DQS_2

SA_DQS_0

SA_DQS_1

SA_DQS_7*

SA_DQS_6*

SA_DQS_5*

SA_DQS_4*

SA_DQS_3*

SA_DQS_2*

SA_DQS_0*

SA_DQS_1*

SA_ODT_1

SA_ODT_0

SA_CS_1*

SA_CS_0*

SA_CKE_1

SA_CK_1*

SA_CK_1

SA_CKE_0

SA_CK_0*

SA_CK_0

SA_WE*

SA_RAS*

SA_CAS*

SA_BS_0

SA_BS_1

SA_BS_2

SA_DQ_62

SA_DQ_63

SA_DQ_61

SA_DQ_60

SA_DQ_59

SA_DQ_58

SA_DQ_57

SA_DQ_56

SA_DQ_55

SA_DQ_54

SA_DQ_53

SA_DQ_52

SA_DQ_50

SA_DQ_51

SA_DQ_49

SA_DQ_48

SA_DQ_47

SA_DQ_46

SA_DQ_45

SA_DQ_44

SA_DQ_42

SA_DQ_43

SA_DQ_41

SA_DQ_39

SA_DQ_40

SA_DQ_38

SA_DQ_37

SA_DQ_36

SA_DQ_34

SA_DQ_35

SA_DQ_31

SA_DQ_33

SA_DQ_32

SA_DQ_29

SA_DQ_30

SA_DQ_26

SA_DQ_28

SA_DQ_27

SA_DQ_24

SA_DQ_25

SA_DQ_23

SA_DQ_22

SA_DQ_21

SA_DQ_19

SA_DQ_20

SA_DQ_18

SA_DQ_17

SA_DQ_16

SA_DQ_13

SA_DQ_14

SA_DQ_15

SA_DQ_11

SA_DQ_12

SA_DQ_9

SA_DQ_10

SA_DQ_8

SA_DQ_7

SA_DQ_6

SA_DQ_5

SA_DQ_4

SA_DQ_3

SA_DQ_2

SA_DQ_1

SA_DQ_0

(3 OF 9)

M E M O R Y

C H A N N E L

A

SB_MA_15

SB_MA_14

SB_MA_12

SB_MA_13

SB_MA_11

SB_MA_10

SB_MA_9

SB_MA_7

SB_MA_8

SB_MA_6

SB_MA_5

SB_MA_4

SB_MA_3

SB_MA_2

SB_MA_1

SB_MA_0

SB_DQS_7

SB_DQS_6

SB_DQS_5

SB_DQS_4

SB_DQS_3

SB_DQS_2

SB_DQS_1

SB_DQS_0

SB_DQS_7*

SB_DQS_6*

SB_DQS_5*

SB_DQS_4*

SB_DQS_3*

SB_DQS_2*

SB_DQS_1*

SB_DQS_0*

SB_ODT_0

SB_ODT_1

SB_CS_1*

SB_CS_0*

SB_CKE_1

SB_CK_1

SB_CK_1*

SB_CK_0*

SB_CKE_0

SB_CK_0

SB_DQ_37

SB_DQ_36

SB_DQ_34

SB_DQ_35

SB_DQ_33

SB_DQ_31

SB_DQ_32

SB_DQ_30

SB_DQ_29

SB_DQ_26

SB_DQ_27

SB_DQ_28

SB_DQ_24

SB_DQ_25

SB_DQ_21

SB_DQ_22

SB_DQ_23

SB_DQ_20

SB_DQ_19

SB_DQ_18

SB_DQ_17

SB_DQ_16

SB_DQ_15

SB_DQ_14

SB_DQ_13

SB_DQ_12

SB_DQ_11

SB_DQ_10

SB_DQ_8

SB_DQ_9

SB_DQ_7

SB_DQ_6

SB_DQ_4

SB_DQ_5

SB_DQ_3

SB_DQ_2

SB_DQ_1

SB_DQ_0

SB_DQ_39

SB_DQ_38

SB_DQ_40

SB_DQ_41

SB_DQ_42

SB_DQ_44

SB_DQ_43

SB_DQ_46

SB_DQ_45

SB_DQ_47

SB_DQ_49

SB_DQ_48

SB_DQ_51

SB_DQ_50

SB_DQ_52

SB_DQ_54

SB_DQ_53

SB_DQ_56

SB_DQ_55

SB_DQ_57

SB_DQ_59

SB_DQ_58

SB_DQ_61

SB_DQ_60

SB_DQ_62

SB_BS_0

SB_DQ_63

SB_BS_2

SB_BS_1

SB_RAS*

SB_CAS*

SB_WE*

(4 OF 9)

M E M O R Y

C H A N N E L

B






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

272879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2779

2779

2779

2779

2779

2779

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

282979

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2879

2979

2979

2979

2979

2979

2979

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 28 79

28 79

28 79

28 79

28 79

28 79

28 79

28 79

27 28 79

28 79

28 79

28 79

28 79

28 79

28 79

28 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

27 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

28 29 79

28 79

28 79

28 79

28 79

28 79

28 79

28 79

28 29 79

28 79

28 79

28 79

28 79

28 79

28 79

28 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

29 79

OMIT_TABLE

CRITICAL

BGA

M O B I L E - 2 C - 3 5 W


U1000

BD37

BF36

BA28

BE39

AU36

AV36

AT40

AU40

AY26

BB26

BB40

BC41

AG6

AJ6

AU6

AV9

AR6

AP8

AT13

AU13

BC7

BB7

BA13BB11

AP11

BA7

BA9

BB9

AY13

AV14

AR14

AY17

AR19

BA14

AU14

AL6

BB14

BB17

BA45

AR43

AW48

BC48

BC45

AR45

AT48

AY48

AJ10

BA49

AV49

BB51

AY53

BB49

AU49

BA53

BB55

BA55

AV56

AJ8

AP50

AP53

AV54

AT54

AP56

AP52

AN57

AN53

AG56

AG53

AL8

AN55

AN52

AG55

AK56

AL7

AR11

AP6

AJ11

AL11

AR10

AR8

AY11

AV11

AU17

AT17

AW45

AV45

AV51

AY51

AT56

AT55

AK54

AK55

BG35

BB34

BE37

BA30

BC30

AW41

AY28

AU26

BE35

BD35

AT34

AU34

BB32

AT32

AY32

AV32

AY40

BA41

BD39

AT41

OMIT_TABLE

CRITICAL


M O B I L E - 2 C - 3 5 W

BGAU1000

BG39

BD42

AT22

AV43

BA34

AY34

BA36

BB36

AR22

BF27

BE41

BE47

AL4

AL1

AV4

BA4

AU3

AR3

AY2

BA3

BE9

BD9

BD13BF12

AN3

BF8

BD10

BD14

BE13

BF16

BE17

BE18

BE21

BE14

BG14

AR4

BG18

BF19

BD50

BF48

BD53

BF52

BD49

BE49

BD54

BE53

AK4

BF56

BE57

BC59

AY60

BE54

BG54

BA58

AW59

AW58

AU58

AK3

AN61

AN59

AU59

AU61

AN58

AR58

AK58

AL58

AG58

AG59

AN4

AM60

AL59

AF61

AH60

AR1

AU4

AT2

AM2

AL3

AV1

AV3

BE11

BG11

BD18

BD17

BE51

BG51

BA61

BA59

AR59

AT60

AK61

AK59

BF32

BE33

BD43

AT28

AV28

BD46

AT26

AU22

BD33

AU30

BD30

AV30

BG30

BD29

BE30

BE28

AT43

BG47

BF40

BD45

S

CPU DDR3 INTERFACE

MEM_A_A<14>

MEM_A_A<15>

MEM_A_A<12>

MEM_A_A<13>

MEM_A_A<11>

MEM_A_A<9>

MEM_A_A<10>

MEM_A_A<8>

MEM_A_A<7>

MEM_A_A<6>

MEM_A_A<5>

MEM_A_A<4>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<1>

MEM_A_A<0>

MEM_A_DQS_P<7>

MEM_A_DQS_P<5>

MEM_A_DQS_P<6>

MEM_A_DQS_P<3>

MEM_A_DQS_P<4>

MEM_A_DQS_P<2>

MEM_A_DQS_P<0>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<4>MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQS_N<0>

MEM_A_DQS_N<1>

MEM_A_ODT<1>

MEM_A_ODT<0>

MEM_A_CS_L<1>

MEM_A_CS_L<0>

MEM_A_CKE<1>

MEM_A_CLK_N<1>

MEM_A_CLK_P<1>

MEM_A_CKE<0>

MEM_A_CLK_N<0>

MEM_A_CLK_P<0>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_CAS_L

MEM_A_BA<0>

MEM_A_BA<1>

MEM_A_BA<2>

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<55>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<52>

MEM_A_DQ<50>

MEM_A_DQ<51>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_DQ<45>

MEM_A_DQ<44>

MEM_A_DQ<42>

MEM_A_DQ<43>

MEM_A_DQ<41>

MEM_A_DQ<39>

MEM_A_DQ<40>

MEM_A_DQ<38>

MEM_A_DQ<37>

MEM_A_DQ<36>

MEM_A_DQ<34>

MEM_A_DQ<35>

MEM_A_DQ<31>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<29>

MEM_A_DQ<30>

MEM_A_DQ<26>

MEM_A_DQ<28>

MEM_A_DQ<27>

MEM_A_DQ<24>

MEM_A_DQ<25>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<19>

MEM_A_DQ<20>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<13>

MEM_A_DQ<14>

MEM_A_DQ<15>

MEM_A_DQ<11>

MEM_A_DQ<12>

MEM_A_DQ<9>

MEM_A_DQ<10>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQ<5>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_A_DQS_P<1>

MEM_B_A<15>

MEM_B_A<14>

MEM_B_A<12>

MEM_B_A<13>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<9>

MEM_B_A<7>

MEM_B_A<8>

MEM_B_A<6>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<3>

MEM_B_A<2>

MEM_B_A<1>

MEM_B_A<0>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<3>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<0>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<4>MEM_B_DQS_N<3>

MEM_B_DQS_N<2>

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_B_ODT<0>

MEM_B_ODT<1>

MEM_B_CS_L<1>

MEM_B_CS_L<0>

MEM_B_CKE<1>

MEM_B_CLK_P<1>

MEM_B_CLK_N<1>

MEM_B_CLK_N<0>

MEM_B_CKE<0>

MEM_B_CLK_P<0>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<34>

MEM_B_DQ<35>

MEM_B_DQ<33>

MEM_B_DQ<31>

MEM_B_DQ<32>

MEM_B_DQ<30>

MEM_B_DQ<29>

MEM_B_DQ<26>

MEM_B_DQ<27>

MEM_B_DQ<28>

MEM_B_DQ<24>

MEM_B_DQ<25>

MEM_B_DQ<21>

MEM_B_DQ<22>

MEM_B_DQ<23>

MEM_B_DQ<20>

MEM_B_DQ<19>MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<10>

MEM_B_DQ<8>

MEM_B_DQ<9>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQ<4>

MEM_B_DQ<5>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<40>

MEM_B_DQ<41>

MEM_B_DQ<42>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<47>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<52>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<57>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_DQ<62>

MEM_B_BA<0>

MEM_B_DQ<63>

MEM_B_BA<1>

MEM_B_BA<2>

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_RAS_L

MEM_A_DQ<46>

1



OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

VCCIO_29

VCCIO_28

VCCIO_27

VCCIO_26

VCCIO_25

VCCIO_24

VCCIO_23

VCCIO_22

VCCIO_21

VCCIO_20

VCCIO_19

VCCIO_18

VCCIO_17

VCCIO_16

VCCIO_15

VCCIO_14

VCCIO_13

VCCIO_12

VCCIO_11

VCCIO_10

VCCIO_9

VCCIO_8

VCCIO_7

VCCIO_6

VCCIO_49

VCCIO_48

VCCIO_5

VCCIO_4

VCCIO_3

VCCIO_47

VCCIO_46

VCCIO_45

VCCIO_44

VCCIO_43

VCCIO_1

VCCIO_42

VCCIO_41

VCCIO_40

VCCIO_39

VCCIO_38

VCCIO_37

VCCIO_36

VCCIO_35

VCCIO_34

VCCIO_33

VCCIO_32

VCCIO_31

VCCIO_30

VCCIO_51

VCCIO_50

VCC_76

VCC_75

VCC_74

VCC_73

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_64

VCC_63

VCC_62

VCC_61

VCC_60

VCC_59

VCC_58

VCC_57

VCC_56

VCC_55

VCC_54

VCC_53

VCC_52

VCC_51

VCC_50

VCC_49

VCC_48

VCC_47

VCC_46

VCC_45

VCC_44

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_35

VCC_34

VCC_33

VCC_32

VCC_31

VCC_30

VCC_29

VCC_28

VCC_27

VCC_26

VCC_25

VCC_24

VCC_23

VCC_22

VCC_21

VCC_20

VCC_19

VCC_18

VCC_17

VCC_16

VCC_15

VCC_14

VCC_13

VCC_12

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_6

VCC_5

VCC_4

VCC_3

VCC_2

VCC_1

VCCIO_SEL

VCCPQE_1

VCCPQE_2

VIDALERT*

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

L I N E S

S E N S E

S V I D

Q U I E T

R A I L

P E G

A N D

D D R

C O R E

S U P L L Y

(6 OF 9)

(7 OF 9)

S E N S E

L I N E

1 . 8 V

R A I L

S A

R A I L

Q U I E T

R A I L

S E N S E

L I N E

D D R 3 - 1 . 5

V

R A I L S

G R P H

I C S

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDDQ_6

VDDQ_7

VDDQ_8

VDDQ_10

VDDQ_9

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_14

VDDQ_15

VDDQ_16

VDDQ_17

VDDQ_18

VDDQ_20

VDDQ_19

VDDQ_21

VDDQ_22

VDDQ_23

VDDQ_24

VDDQ_25

VDDQ_26

VCCDQ_1

VCCDQ_2

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

VCCSA_VID_0

VCCSA_VID_1

SM_VREF

VAXG_1

VAXG_2

VAXG_4

VAXG_3

VAXG_5

VAXG_6

VAXG_7

VAXG_8

VAXG_9

VAXG_10

VAXG_11

VAXG_12

VAXG_13

VAXG_14

VAXG_15

VAXG_16

VAXG_17

VAXG_18

VAXG_19

VAXG_20

VAXG_21

VAXG_22

VAXG_23

VAXG_24

VAXG_25

VAXG_28

VAXG_26

VAXG_27

VAXG_30

VAXG_29

VAXG_33

VAXG_31

VAXG_32

VAXG_35

VAXG_34

VAXG_36

VAXG_37

VAXG_38

VAXG_39

VAXG_40

VAXG_41

VAXG_42

VAXG_43

VAXG_45

VAXG_44

VAXG_46

VAXG_47

VAXG_48

VAXG_49

VAXG_50

VAXG_51

VAXG_52

VAXG_53

VAXG_54

VAXG_55

VAXG_56

VAXG_SENSE

VSSAXG_SENSE

VCCPLL_1

VCCPLL_2

VCCPLL_3

VCCSA_2

VCCSA_1

VCCSA_3

VCCSA_4

VCCSA_5

VCCSA_6

VCCSA_7

VCCSA_8

VCCSA_9

VCCSA_10

VCCSA_11

VCCSA_12

VCCSA_13

VCCSA_15

VCCSA_14

VCCSA_16






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

PLACEMENT NOTE: Please place all sense line resistors on BOTTOM side.

Note. VOLTAGE=0V

Note. VOLTAGE=0V

Note. VOLTAGE=1.05V

Note. VOLTAGE=1.05V

PLACEMENT NOTE: Please place all sense line resistors

(IPU)

For Future Compatibility

(NOT controlled by VCCIO_SEL)

(IPU)

Fixed at 1.05V

PLACEMENT NOTE: Please place all sense line resistors on BOTTOM side.

Note. VOLTAGE=1.25V

Note. VOLTAGE=0V

Note. VOLTAGE=1.05V

Note. VOLTAGE=0V

68 78

68 78

6878

6878

70 78

70 78

65

1/16W

10K

402

MF-LF

5%

R13201

2

1%

MF-LF

PLACE_NEAR=U1000.C44:2.54mm

402

130

1/16W

R13021

2

PLACE_NEAR=R1310.2:2.54mm

1/16W1%

75

MF-LF

402

R13001

2

402 1/16W

43

5% MF-LF

PLACE_NEAR=U1000.A44:38mm

R13101 2

5%0 MF-LF1/16W402

R13111 2

5% MF-LF0402 1/16W

R13121 2

68 78

68 78

68 78

NOSTUFF

PLACE_SIDE=BOTTOMPLACE_NEAR=U1000.F43:50.8mm

1%1/16W

402MF-LF

100

R13601

2

PLACE_NEAR=U1000.AN16:50.8mm1%

MF-LF

402

1/16W

NOSTUFF

100PLACE_SIDE=BOTTOM

R13621

2

NOSTUFF

PLACE_NEAR=U1000.G43:50.8mmPLACE_SIDE=BOTTOM

MF-LF1/16W

1%

100

402

R13611

2

100PLACE_SIDE=BOTTOM

NOSTUFF

PLACE_NEAR=U1000.AN17:50.8mm

402

MF-LF1/16W

1%

R13631

2

MF-LF

10K

402

5%1/16W

R13141

2

5%1/16WMF-LF

10K

402

R13131

2

PLACE_SIDE=BOTTOM

MF-LF

402

1/16W

1001%

PLACE_NEAR=U1000.F45:50.8mm

NOSTUFF

R13701

2

PLACE_SIDE=BOTTOM 1%

100

1/16W

402MF-LF

PLACE_NEAR=U1000.BC43:50.8mm

R13801

2

NOSTUFF

PLACE_SIDE=BOTTOM

MF-LF1/16W

1%

100

402

PLACE_NEAR=U1000.G45:50.8mm

R13711

2

PLACE_NEAR=U1000.BA43:50.8mmPLACE_SIDE=BOTTOM

MF-LF1/16W

1%

100

402

R13811

2

5%1/16W

402MF-LF

100

SM_VREF_EXT

PLACE_NEAR=U1000.BJ44:2.54mm

R13311

2

5%1/16W

100

SM_VREF_EXT

402

MF-LF


R13301

2

402

10%

X5R16V

PLACE_NEAR=U1000.BJ44:2.5

0.1UF

SM_VREF_EX

C13301

2

1

MF1/

PLACE_NEAR=U1000.U10:50.8mm

R13

M O B I L E - 2 C - 3 5 W


OMIT_TABLE

CRITICAL

BGA

U1000A26

A29

A31

A34

A35

A38

A39

A42

C26

C27

C32

C34

C37

C39

C42

D27

D32

D34

D37

D39

D42

E26

E28

E32

E34

E37

E38

F25

F26

F28

F32

F34

F37

F38

F42

G42

H25

H26

H28

H29

H32

H34

H35

H37

H38

H40

J25

J26

J28

J29

J32

J34

J35

J37

J38

J40

J42

K26

K27

K29

K32

K34

K35

K37

K39

K42

L25

L28

L33

L36

L40

N26

N30

N34

N38

F43

AA14

AA15

AB17

AB20

AC13

AD16

AD18

AD21

AE14

AE15

AF16

AF18

AF20

AF46

AG15

AG16

AG17

AG20

AG21

AG48

AG50

AG51

AJ14

AJ15

AJ17

AJ21

AJ25

AJ43

AJ47

AK50

AK51

AL14

AL15

AL16

AL20

AL22

AL26

AL45

AL48

AM16

AM17

AM21

AM43

AM47

AN20

AN42

AN45

AN48

BC22

AN16

W16

W17

AM25

AN22

A44

B43

C44

G43

AN17

OMIT_TABLE

CRITICAL

BGA

M O B I L E - 2 C - 3 5 W


U1000

AY43

AA46

AB47

AB50

AB51

AB52

AB53

AB55

AB56

AB58

AB59

AC61

AD47

AD48

AD50

AD51

AD52

AD53

AD55

AD56

AD58

AD59

AE46

N45

P47

P48

P50

P51

P52

P53

P55

P56

P61

F45

T48

T58

T59

T61

U46

V47

V48

V50

V51

V52

V53

V55

V56

V58

V59

W50

W51

W52

W53

W55

W56

W61

Y48

Y61

AM28

AN26

BB3

BC1

BC4

L17

L21

N16

N20

N22

P17

P20

R16

R18

R21

U10

U15

V16

V17

V18

V21

D48

D49

W20

AJ28

AJ33

AJ36

AJ40

AL30

AL34

AL38

AL42

AM33

AM36

AM40

AN30

AN34

AN38

AR26

AR28

AR30

AR32

AR34

AR36

AR40

AV41

AW26

BA40

BB28

BG33

BC43

BA43

G45

SYNC_MASTER=ANNE_K90I

CPU POWER

S

PP3V3_S0

CPU_VIDALERT_L_R

PP1V05_S0

PP1V5_S3_CPU_VCCDQ

PP1V05_S0

CPU_VCCSENSE_P

CPU_AXG_SENSE_N


PPVCORE_S0_AXG

PPVCCSA_S0_CPU

CPU_VCCSASENSE

CPU_VCCSA_VID<1>

CPU_VDDQ_SENSE_P

CPU_DDR_VREFVOLTAGE=0.75V

CPU_VIDSCLK

CPU_VIDSCLK_R

PPVCORE_S0_CPU

CPU_VIDALERT_LPP1V05_S0_CPU_VCCPQE

CPU_VIDSOUTCPU_VIDSOUT_R

PPVCORE_S0_CPU

PP1V5_S3RS0

PP1V5_S3RS0

CPU_VCCIO_SEL

PP1V5_S3RS0

CPU_VCCIOSENSE_N

PP1V05_S0

CPU_VCCIOSENSE_P

CPU_VCCSENSE_N

CPU_VCCSA_VID<0>

CPU_D

CPU_AXG_SENSE_P

CPU_VDDQ_SENSE_N

PPVCCSA_S0_

PPVCORE_S0_AXG

1

6 7 8 16 17 18 19 20 22 23 2627 29 33 36 37 40 41 42 46 48

49 50 51 52 54 57 61 62 71 72

73 74 75 77 85

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

7 15

6 7 9 10 12 14 16 17 20 22 2336 40 45 68

70 73

714

67912154969

67121565

12

6 7 9 12 14 49 69

7 1014

67912144969

6710121530727385

6710121530727385

6 7 10 12 15 30 72 73 85

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

67121565

67912154969



VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSVSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSVSS

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

(9 OF 9)VSS

(8 OF 9)VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

OMIT_TABLE

CRITICAL


M O B I L E - 2 C - 3 5 W

BGAU1000BG13

BG17

BG21

BG24

BG28

BG37

BG41

BG45

BG49

BG53

C29

C35

C40

D10

D14

D18

D22D26

D29

D35

D4

D40

D43

D46

D50

D54

D58

D6

E25

E29

E3

E35

E40

F13

F15

F19

F29

F35

F40

F55

G48

G51

G6

G61

H10

H14

H17

H21

H4

H53

H58

J1

J49

J55

K11

K21

K51

K8

L16

L20

L22

L26

L30

L34

L38

L43

L48

L61

M11

M15

M4

M58

M6

N1

N17

N21

N25

N28

N33

N36

N40

N43

N47

N48

N51

N52

N56

N61

A5

A57

BC61

BD3

BD59

BE4

BE58

BG5

BG57

C3

C58

D59

E1

E61

P14

P16

P18

P21

P58

P59

P9

R17

R20

R4

R46

T1

T47

T50

T51

T52

T53

T55

T56

U13

U8

V20

V61

W13

W15

W18

W21

W46

W8

Y4

Y47

Y58

Y59

OMIT_TABLE

CRITICAL

M O B I L E - 2 C - 3 5 W


BGA

U1000A13

A17

A21

A25

A28

A33

A37

A40

A45

A49

A53

A9

AA1

AA13

AA50

AA51

AA52

AA53

AA55

AA56

AA8

AB16

AB18

AB21

AB48

AB61

AC10

AC14

AC46

AC6

AD17

AD20

AD4

AD61

AE13

AE8

AF1

AF17

AF21

AF47

AF48

AF50

AF51

AF52

AF53

AF55

AF56

AF58

AF59

AG10

AG14

AG18

AG47

AG52

AG61

AG7

AH4

AH58

AJ13

AJ16

AJ20

AJ22

AJ26

AJ30

AJ34

AJ38

AJ42

AJ45

AJ48

AJ7

AK1

AK52

AL10

AL13

AL17

AL21

AL25

AL28

AL33

AL36

AL40

AL43

AL47AL61

AM13

AM20

AM22

AM26

AM30

AM34

AM38

AM4

AM42

AM45

AM48

AM58

AN1

AN21

AN25

AN28

AN33

AN36

AN40

AN43

AN47

AN50

AN54

AP10

AP51

AP55

AP7

AR13

AR17

AR21

AR41

AR48

AR61

AR7

AT14

AT19

AT36

AT4

AT45

AT52

AT58

AU1

AU11

AU28

AU32

AU51

AU7

AV17

AV21

AV22

AV34

AV40

AV48

AV55

AW13

AW43

AW61

AW7

AY14

AY19

AY30

AY36

AY4

AY41

AY45

AY49

AY55

AY58

AY9

BA1

BA11

BA17

BA21

BA26

BA32

BA48

BA51

BB53

BC13

BC5

BC57

BD12

BD16

BD19

BD23

BD27

BD32

BD36BD40

BD44

BD48

BD52

BD56

BD8

BE5

BG9

CPU GROUNDS

1








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

DESCRIPTION REFERENCE DES BOM OQTYPART NUMBER CRITICAL

Note:The smallest 10mOhm available in the library are 0805s

PLACEMENT_NOTE (C1672-C1681):

PLACEMENT_NOTE (C1684-C167F):

CPU VCCPLL Low pass filter

Intel recommendation (Section 6.2): 35x 2.2uF, 25x 22uF, 4x 470uF

CPU VCORE DECOUPLING

Intel recommendation (Section 6.5): 26x 1uF, 10x 10uF, 2x 330uF

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402


Intel recommendation (section 6.4): 2x 1uF, 1x 330uF


All INTEL recommendations from Intel doc #4439028 Huron River Platform Power Design Guide

CPU VCCIO/VCCPQ DECOUPLING



CPU VCCPLL DECOUPLING

0603

1%

1/4W

MF

0.010

R1601

1 2

10%

X5R

10V

1UF

402

PLACE_NEAR=U1000.AK65:2.54 mm:NO_VIA

C160Y1

2

CRITICAL

20%4VX5R402

2.2UFC16321

2

NOSTUFF

CRITICAL

20%4VX5R402

2.2UFC16331

2

CRITICAL

20%4V

2.2UF

X5R402

C16071

2

CRITICAL

20%4VX5R402

2.2UFC16081

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16341

2

CRITICAL

20%4V

2.2UF

402X5R

C16351

2

CRITICAL

20%

X5R402

4V

2.2UFC16091

2

CRITICAL

20%4VX5R402

2.2UFC16101

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16361

2

10V10%

402X5R

1UF

C16981

2

CRITICAL

20%2.2UF4VX5R402

NOSTUFF

C16111

2

CRITICAL

20%

402

2.2UF4VX5R

C16371

2

CRITICAL

20%4VX5R402

2.2UFC16121

2

CRITICAL

20%4VX5R402

2.2UFC16381

2

2.2UF

CRITICAL

20%4VX5R402

C16131

2

CRITICAL

20%4VX5R402

2.2UFC16391

2

20%4VX5R402

2.2UF

CRITICAL

C16401

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16141

2

CRITICAL

20%4V

402

2.2UF

X5R

C16151

2

10%10V

402

1UF

X5R

C16991

2

2.2UF20%

402

CRITICAL

4VX5R

C16411

2

CRITICAL

20%4VX5R402

2.2UFC16421

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16161

2

CRITICAL

20%4VX5R402

2.2UFC16171

2

CRITICAL

20%4VX5R402

2.2UFC16431

2

CRITICAL

20%4VX5R402

2.2UFC16441

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16181

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16191

2

CRITICAL

20%4VX5R402

2.2UFC16451

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16201

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16461

2

CRITICAL

20%4VX5R402

2.2UFC16471

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16211

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16221

2

CRITI

20%4VX5R

2.2U

402

C161

2

CRIT

20%4VX5R402

2.2UC161

2

330UF-0.006OHM20%2VPOLYCASE-D2-SM

C167D

1

2

CASE-D2-SM

330UF-0.006OHM

POLY

20%2V

C167E

1

2

PLACE_NEAR=U1000.AK61:5mm

20%

CASE-D2-SM

2VPOLY

330UF-0.006OHMC160Z1

2

Place near U1000 on bottom side

603X5R

10UF

6.3V20%

C161E1

2

10UF

CERM-X5R

6.3V


20%

0402-1

C162A1

2


10UF

CERM-X5R

6.3V20%

0402-1

C162B1

2


10UF

CERM-X5R

6.3V20%

0402-1

C162C1

2


10UF

CERM-X5R

6.3V20%

0402-1

C162D1

2

402

1UF

10V10%

X5R

C169A1

2

6.3V


10UF

CERM-X5R

20%

0402-1

C162E1

2


10UF

CERM-X5R

6.3V20%

0402-1

C167A1

2


0402-1

10UF

CERM-X5R

6.3V20%

C167B1

2


10UF

0402-1

20%6.3V

CERM-X5R

C167C1

2

10%10VX5R402

1UF

C169B1

2

10%

X5R10V

1UF

402

C169C1

2

Place on bottom side of U1000

10%10V

1UF

402

X5R

C16841

2

Place near inductors on bottom side.

470UF-4MOHM20%

D2T-SMPOLY-TANT2.0V

C16801

23

10%1UF

10VX5R

Place on bottom side of U100.

402

C16851

2

10%10VX5R


1UF

402

C16861

2

20%


D2T-SM

2.0V

470UF-4MOHM

POLY-TANT

C16811

23

Place close to U1000 on bottom side.

CRITICALOMIT

X5R-CERM-1

20%6.3V

22UF

603

C16671

2

Place close to U1000 on top side.

CRITICALOMIT

X5R-CERM-1

22UF20%6.3V

603

C16551

2

NOSTUFF

CRITICAL

X5R-CERM-1

20%6.3V

22UF

603

C16681

2

NOSTUFF

CRITICAL

20%6.3V

22UF

X5R-CERM-1603

C16691

2

NOSTUFF

CRITICAL

22UF20%6.3VX5R-CERM-1603

C16561

2

NOSTUFF

CRITICAL

X5R-CERM-1603

20%6.3V

22UFC16571

2

10%

X5R

1UF

10V


402

C16871

2

1UF

10VX5R

10%

402

C16881

2

470UF-4MOHM20%


2.0V

D2T-SMPOLY-TANT

C16821

23

10%

X5R10V

1UF

402

C16891

2

20%


D2T-SM

2.0V

470UF-4MOHM

POLY-TANT

C16831

23

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16701

2

NOSTUFF

CRITICAL

20%6.3V

603X5R-CERM-1

22UFC16581

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16711

2

10%

1UF

10V

X5R

402

C167F1

2

NOSTUFF

CRITICAL

20%6.3V

22UF

603X5R-CERM-1

C16721

2

NOSTUFF

CRITICAL

20%6.3V

22UF

603X5R-CERM-1

C16591

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16601

2

4VX5R402

CRITICAL

2.2UF20%

C16501

2

CRITICAL

20%4VX5R402

2.2UFC16251

2

CRITICAL

20%

X5R4V

402

2.2UFC16001

2

CRITICAL

20%4VX5R402

2.2UFC16511

2

CRITICALNOSTUFF

2.2UF20%

X5R4V

402

C16261

2

CRITICAL

20%4VX5R402

2.2UFC16521

2

CRITICAL

20%4VX5R402

2.2UFC16271

2

X5R402

CRITICAL

20%4V

2.2UF

NOSTUFF

C16011

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16021

2

CRITICAL

20%4VX5R402

2.2UFC16531

2

CRITICAL

20%4VX5R402

2.2UFC16281

2

CRITICAL

20%4VX5R402

2.2UFC16541

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16291

2

20%

CRITICAL

4VX5R402

2.2UF

NOSTUFF

C16031

2

CRITICAL

20%4VX5R402

2.2UFC16041

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16301

2

CRITICAL

20%4VX5R402

2.2UFC16311

2

CRITICAL

20%4VX5R402

2.2UF

NOSTUFF

C16051

2

CRITICAL

20%

X5R402

2.2UF4V

C16061

2

402

10%

X5R10V

1UF

C169D1

2

10%10VX5R

1UF

402

C169E1

2

10%

X5R10V

1UF

402

C169F1

2

10%

X5R10V

402

1UF

C161A1

2

10%

X5R10V

1UF

402

C161B1

2

10%10VX5R

1UF

402

C161C1

2

10%

X5R10V

1UF

402

C161D1

2

402

10%

X5R

1UF

10V

C16901

2

10%1UF

X5R10V

402

C16911

2

10%10VX5R

1UF

402

C16921

2

10%

X5R10V

1UF

402

C16931

2

X5R10V

402

1UF10%

C16971

2

NOSTUFF

CRITICAL

20%6.3V

22UF

603X5R-CERM-1

C16731

2

CRITICALOMIT

20%6.3V

603

22UF

X5R-CERM-1

C16741

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16611

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16621

2

NOSTUFF

CRITICAL

6.3V20%22UF

603X5R-CERM-1

C16751

2

22UF

CRITICALOMIT

20%6.3V

603X5R-CERM-1

C16631

2

402

X5R10V

1UF10%

C16941

2

10%1UF

10VX5R

402

C16951

2

10%10VX5R

1UF

402

C16961

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16761

2


0402-1

20%6.3V

CERM-X5R

10UF

C161F1

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16771

2

X5R-CERM-1

CRITICALOMIT

20%6.3V

22UF

603

C16641

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16651

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16781

2

CRITICALOMIT

20%6.3V

22UF

X5R-CERM-1603

C16661

2

CRITICALOMIT

20%6.3V

22UF

603X5R-CERM-1

C16791

2

1/16W

0

MF-LF

5%

402

R1600

1 2

10%10V

PLACE_NEAR=U1000.AK63:2.54 mm:NO_VIAX5R

Place near U1000 on top side

1UF

402

C160X1

2

C1655,C1660,C1661,C1662,C1663,C1664,C1665,C1666,C1667,C1670,C1671,C1674,C1676,C1677,C1678,C1679

16 CRITICALCAP,CER,X5R,22uF,20%,6.3V,0603,SAMSUNG138S0691

SSYNC_MASTER=JACK_K90I

CPU DECOUPLING-I

PPVCORE_S0_CPU

PP1V05_S0


PP1V8_S0


1

679124969

679101216172022

23364045

687073

7 10 12

671720222671

7 1

2 1345678








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1


Intel recommendation (Section 6.5): 10x 1uF, 8x 10uF, 1x 330uF




VAXG DECOUPLING


CPU VDDQ/VCCDQ DECOUPLING

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402


CPU VCCSA DECOUPLING


Intel recommendation (Section 6.6): 6x 1uf, 5x 10uf, 1x 330uf

Intel recommendation (section 6.3): 21x 1uF, 6x 10uF, 6x 22uF, 2x 470uF

0603

MF1/4W

1%

0.010

R1702

1 2

1UF10%10VX5R


402

C17401

2

CASE-D2-SM

2VPOLY

20%330UF-0.006OHMC17561

2

CASE-D2-SM

2VPOLY

330UF-0.006OHM20%

C17681

2

CERM-X5R

10UF

0402-1

20%6.3V

CRITICAL

C17111

2 CERM-X5R

0402-1

6.3V20%10UF

CRITICAL

C17121

2

0402-1

20%

CERM-X5R

10UF

6.3V

CRITICAL

C17131

2

0402-1

20%6.3VCERM-X5R

10UF

CRITICAL

C17141

2

0402-1

20%6.3VCERM-X5R

10UF

CRITICAL

C17151

2


D2T-SMPOLY-TANT2.0V20%

470UF-4MOHMC1723

1

23

10UF

CERM-X5R6.3V20%

0402-1

CRITICAL

C17161

2

0402-1

6.3V

CERM-X5R

20%

10UF

Place close to U1000 on bottom side

C17481

2

20%6.3V

603

22UF

X5R-CERM-1

CRITICALOMITC17171

2

0402-1

20%

CERM-X5R

10UF


6.3V

C17491

2

603X5R


10UF

6.3V20%

C17501

2

0402-1

20%6.3V

CERM-X5R

10UF


C17511

2

0402-1

20%6.3V

CERM-X5R

10UF


C17521

2

0402-1

20%6.3V

CERM-X5R

10UF


C17531

2

603X5R


10UF

6.3V20%

C17541

2

0402-1

20%6.3V

CERM-X5R

10UF


C17551

2

0402-1

20%6.3V

CERM-X5R

10UF

C17631

2

0402-1

20%6.3V

CERM-X5R

10UF

C17641

2

0402-1

20%6.3V

CERM-X5R

10UF

C17651

2

20%6.3V

603

22UF

X5R-CERM-1

CRITICALOMITC17181

2

0402-1

20%6.3V

CERM-X5R

10UF

C17661

2

10UF

CERM-X5R

6.3V20%

0402-1

C17671

2

POLY-TANT

20%2.0V

D2T-SM

470UF-4MOHM


C17241

23

22UF20%6.3VX5R-CERM-1603

CRITICALOMITC17191

2


X5R402

1UF10%10V

C17411

210V10%

402X5R

1UF

C17421

2 X5R

10%1UF

402

10V

C17431

2

402

10V10%1UF

X5R

C17441

2

22UF20%6.3V

603X5R-CERM-1

CRITICALOMITC17201

2

22UF20%6.3VX5R-CERM-1603

CRITICALOMITC17211

2

22UF20%6.3VX5R-CERM-1603

CRITICALOMITC17221

2

10%

X5R10V

402

1UF

C17451

2

402

1UF

X5R10V10%

C17461

210V

402X5R

10%1UF

C17471

2

1UF10%

X5R10V

402

Place on bottom side of U1000CRITICAL

C17001

2

10%

X5R


10V

1UF

402

CRITICAL

C17011

2


1UF10%10V

402X5R

CRITICAL

C17021

210VX5R

10%

402

1UF

CRITICAL

C17041

2 X5R402

10V10%1UF

CRITICAL

C17051

2

402X5R

1UF10%10V

CRITICAL

C17061

2

1UF

402

10V10%

X5R

C17571

2

X5R10V10%1UF

CRITICAL

402

C17071

2

10%10VX5R402

1UF

CRITICAL

C17081

2

402X5R10V10%1UF

CRITICAL

C17091

2


1UF10%10VX5R

402

C17581

2

10%

X5R

402

10V


1UF

C17591

2 X5R

1UF10%10V

402


C17601

2 X5R

10%

402

10V


1UF

C17611

210VX5R

10%1UF

402

C17621

2

10V10%

X5R402

1UF

CRITICAL

C17101

2


X5R

1UF

402

10%10V

CRITICAL

C17031

2

402X5R

10%


10V

1UF

C17381

2

10%10V


X5R402

1UF

C17391

2

CRITICAL138S0691 CAP,CER,X5R,22uF,20%,6.3V,0603,SAMSUNG6 C1717,C1718,C1719,C1720,C1721,C1722

S

CPU DECOUPLING-II

SYNC_MASTER=JACK_K90I

PP1V5_S3RS0

PPVCORE_S0_AXG

PP1V5_S3_CPU_VCCDQ

PPVCCSA_S0_CPU

1

67101230727385

679124969

7 12

671265

2 1345678



IN

IN

OUT

OUT

OUT

IN

BI

BI

BI

BI

OUT

BI

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

BI

OUT

BI

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

IN

OUT

SATA1RXN

SATA0TXP

SATA0TXN

SATA2RXN

SATA2RXP

SATA5RXP

SATA0RXP

LDRQ0*

RTCRST*

SRTCRST*

INTRUDER*

INTVRMEN

HDA_BCLK

HDA_SYNC

HDA_RST*

SPKR

HDA_SDIN0

HDA_SDIN1

HDA_SDIN3

HDA_SDIN2

HDA_SDO

HDA_DOCK_EN*/GPIO33

HDA_DOCK_RST*/GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CS0*

SPI_CLK

SPI_CS1*

SPI_MOSI

SPI_MISO

FWH0/LAD0RTCX1

RTCX2

SATA1TXP

SATA0RXN

SERIRQ

LDRQ1*/GPIO23

FWH1/LAD1

FWH2/LAD2

FWH3/LAD3

FWH4/LFRAME*

SATA1RXP

SATA1TXN

SATA2TXN

SATA2TXP

SATA3RXN

SATA3RXP

SATA3TXN

SATA3TXP

SATA4RXN

SATA4RXP

SATA4TXN

SATA4TXP

SATA5RXN

SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED*

SATA0GP/GPIO21

SATA1GP/GPIO19

SATA3COMPI

SATA3RCOMP0

SATA3RBIAS

J T A G

S P I

S A T A

L P C

I H D A

R T C

(1 OF 10)

(2 OF 10)

P C I - E *

P E G

F R O M C L K B U F F E R

C L O C K

F L E X

S M B U S

PEG_B_CLKRQ*/GPIO56

PEG_A_CLKRQ*/GPIO47

PCIECLKRQ4*/GPIO26

PCIECLKRQ3*/GPIO25

PCIECLKRQ1*/GPIO18

PCIECLKRQ0*/GPIO73

PERN3

PETP2

PETN2

PERP1

CL_RST1*

CL_DATA1

CL_CLK1

CLKIN_GND1_P

CLKIN_GND1_N

CLKOUT_ITPXDP_P

CLKOUT_ITPXDP_N

CLKOUTFLEX3/GPIO67

CLKOUTFLEX2/GPIO66

CLKOUTFLEX1/GPIO65

CLKOUTFLEX0/GPIO64

XCLK_RCOMP

XTAL25_OUT

XTAL25_IN

CLKIN_PCILOOPBACK

REFCLK14IN

CLKIN_SATA_N

CLKIN_SATA_P

CLKIN_DOT_96P

CLKIN_DOT_96N

CLKIN_DMI_P

CLKIN_DMI_N

CLKOUT_DP_N

CLKOUT_DP_P

CLKOUT_DMI_P

CLKOUT_DMI_N

CLKOUT_PEG_A_P

CLKOUT_PEG_A_N

CLKOUT_PEG_B_N

CLKOUT_PEG_B_P

CLKOUT_PCIE5P

PCIECLKRQ5*/GPIO44

CLKOUT_PCIE4P

CLKOUT_PCIE5N

CLKOUT_PCIE3P

CLKOUT_PCIE4N

CLKOUT_PCIE3N

PCIECLKRQ2*/GPIO20

CLKOUT_PCIE2P

CLKOUT_PCIE2N

CLKOUT_PCIE1N

CLKOUT_PCIE1P

CLKOUT_PCIE0N

CLKOUT_PCIE0P

PETN1

PERN1

SMBCLK

SMBALERT*/GPIO11

PETP8

PERP8

PETN8

PETP7

PERN8

PETN7

PERP7

PERN7

PETN6

PETP6

PERP6

PERN6

PETP5

PETN5

PERP5

PETP4

PERN5

PETN4

PERP4

PETP3

PERN4

PETN3

PERP3

PERN2

PERP2

PETP1

SML1DATA/GPIO75

SML1CLK/GPIO58

SML1ALERT*/PCHHOT*/GPIO74

SML0DATA

SML0ALERT*/GPIO60

SML0CLK

SMBDATA

IN

IN

IN

IN

OUT

OUT

IN

IN

IN

IN

OUT

OUT

OUT

NC

NC

OUT

IN

IN

OUT

OUT

OUT

INII NOT TO REPRODUCE OR COPY IT





36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

Pullup needed for SPI_DESCRIPTOR_OVERRIDE_L? PD needed for BCM_MEDIA_SENSE?

(IPU)

1.5V -> 1.1V

DOES THIS NEED LENGTH MATCH???

PLACETHISRESISTORNEAR THEPCH PIN

TIETHEM TOGETHERVERYCLOSETO PINS.PLACETHE RESISTORLESSTHAN200MILS FROMTHE PINS

2681

5781

4781

4781

4781

4781

6 45 47 81

6 45 47 81

6 45 47 81

6 45 47 81

6 45 47 81

6 45 47

42 80

42 80

42 80

42 80

3781

3781

3281

3281

3981

3981

3781

3781

3281

3281

3981

3981

3781

3281

3981

3981

162340

8

8

8

8

5%

330K

MF

1/20W

201

R18001

2402

MF-LF

1/16W

1M5%

R18011

2

1/16W

402

MF-LF

5%

20K

R18021

2

20K5%

1/16W

MF-LF

402

R18031

2

10%

402

X5R

10V

1UF

C18031

2

1UF

402

X5R

10V

10%

C18021

2

PLACE_NEAR=U1800.Y11:2.54mm

MF-LF

402

37.41%

1/16W

R18301

2

MF-LF

402

5%

1/16W

10K

R18201

2

PLACE_NEAR=U1800.Y47:2.54mm

PLACE_NEAR=U1800.N34:1.27mm

5%

33

MF

1/20W

201

R1810

1 2

33

5%

PLACE_NEAR=U1800.L34:1.27mm

MF

1/20W

201

R1811

1 2

PLACE_NEAR=U1800.K34:1.27mm

33

5%

MF

1/20W

201

R1812

1 2

5%

PLACE_NEAR=U1800.A36:1.27mm

33

MF

1/20W

201

R1813

1 2

57 81

57 81

57 81

57 81

5%

10K

MF

1/20W

201

R18531

2

10K5%

MF

1/20W

201

R18541

2

10K5%

MF

1/20W

201

R18551

2

1634

1/16W5%

33402MF-LF

R1860 1 2

MF-LF

334025% 1/16W

R1861 1 2

1/16W

33402MF-LF5%

R1862 1 2

5% 1/16W

33402MF-LF

R1863 1 2

1/16W5%

33402MF-LF

R1864 1 2

1/16W

750

402

1%

MF-LF

PLACE_NEAR=U1800.AH1:2.54mm

R1832

1

2

49.9

402

1%

1/16W

MF-LF

PLACE_NEAR=U1800.AB12:2.54mm

R18311

2

10K

MF-LF

1/16W

5%

402

R18701

2

10K

402

MF-LF

5%

1/16W

R18711

2

201

1/20W

MF

5%

0

NOSTUFFR1841

1 2

201

1/20W

MF

NOSTUFF

5%

0

R1840

1 2

45

201

1/20W

MF

PLACE_NEAR=R1813.1:2.54mm

NOSTUFF

0

5%

R1880

1 2

OMIT

MOBILECOUGAR-POINT

FCBGA

U1800 C38

A38

B37

C37

D36

N34

C36

N32

K34

E34

G34

C34

A34

A36

L34

K22

C17

J3

K5

H1

H7

E36

K36

D20

A20

C20

V14

AM3

AM1

AP7

AP5

P1

AM10

AM8

AP11

AP10

AD7

AD5

AH5

AH4

AB13

AH1

AB12

AB8

AB10

AF3

AF1

Y7

Y5

AD3

AD1

Y3

Y1

AB3

AB1

Y10

Y11

P3

V5

T3

Y14

T1

U3

V4

T10

G22

MOBILE

COUGAR-POINT

OMIT

FCBGA

U1800

M7

T11

P10

BF18

BE18

G24

E24

BJ30

BG30

H45

AK7

AK5

AV22

AU22

AM12

AM13

AK14

AK13

Y40

Y39

AB49

AB47

AA48

AA47

Y37

Y36

Y43

Y45

V45

V46

AB37

AB38

AB42

AB40

K43

F47

H47

K49J2

M1

V10

A8

L12

L14

M10

E6

BG34

BE34

BG36

BF36

BG37

BJ38

BG40

BE38

BJ34

BF34

BJ36

BE36

BH37

BG38

BJ40

BC38

AV32

BB32

AV34

AY34

AY36

AU36

AY40

AW38

AU32

AY32

AU34

BB34

BB36

AV36

BB40

AY38

K45

E12

H14

C9

A12

C8

G12

C13

E14

M16

Y47

V47

V49

1637

162332

16

16

881

881

1/16W

402

5%

4.7K

MF-LF

R18771

2

5%

10K

MF

1/20W

201

R18761

2

201

1/20W

MF

NOSTUFF

10K5%

R18661

2

5%

10K

MF

1/20W

201

R18691

2

1636

23

23

23

23

MF

5%

10K

201

1/20W

R18441

2

5%

10K

MF

201

1/20W

R18451

2

5%

10K

MF

1/20W

201

R18461

2

3481

3481

3781

MF

5%

10K

201

1/20W

R18471

2

1/20W

MF

10K5%

201

R18481

2

5%

402

MF-LF

1/16W

4.7K

R18781

2

5%

10K

MF

201

1/20W

R18431

2

5%

MF

1/20W

201

10K

R18421

2

1/20W

MF

10K

5%

201

NOSTUFF

R18331

2

1/20W

5%

10K

201

MF

R18341

2

201

1/20W

MF

NOSTUFF

5%

10K

R18491

2

604PLACE_NEAR=U1800.V47:5.1mm

1/16WMF-L1%402

R1885

1 2

PLACE_NEAR

42 80

42 80

42 80

42 80

36

201

1/20W

MF

5%

0

NOSTUFF

R1888

1 21945

PCH SATA/PCIE/CLK/LPC

S YN C_ MA ST ER =K 91 _M LB S

XDP_PCH_TMS

PCH_SPKR

HDA_BIT_CLK_R

HDA_SYNC_R

ENET_MEDIA_SENSE_RDIV

XDP_PCH_TCKNC_SATA_E_D2RP

PCH_SATALED_L

AP_CLKREQ_L

SPI_CS0_R_L

TP_SPI_CS1_L

ENET_CLKREQ_L

TP_LPC_DREQ0_L

HDA_SDIN0

PCH_INTVRMEN_L

PCH_INTRUDER_L

PP3V3_S0

DP_AUXCH_ISOL

SATARDRVR_EN

PCH_INTRUDER_L

PEG_B_CLKRQ_L_GPIO56

PCIECLKRQ5_L_GPIO44

NC_SATA_E_R2D_CP

NC_SATA_F_D2RP

NC_SATA_F_R2D_CN

T29_CLKREQ_L

EXCARD_CLKREQ_L

PEG_CLKREQ_L

HDA_SDOUT_R

FW_CLKREQ_L

PCH_SATA3RBIAS

LPC_R_AD<2>

PP3V3_SUS

RTC_RESET_L

SMC_SCI_L

PP3V3_SUS

SML_PCH_1_ALERT_L

ITPCPU_CLK100M_N

SML_PCH_0_ALERT_L

PCH_GPIO11

NC_PEG_CLK100MP

NC_PEG_CLK100MN

T29_PWR_EN

SATA_HDD_D2R_P

LPC_R_AD<1>

LPC_FRAME_R_L

NC_SATA_B_D2RP

NC_SATA_B_R2D_CN

NC_SATA_B_R2D_CP

NC_SATA_E_R2D_CN

SATA_ODD_R2D_C_P

SATA_ODD_D2R_P

SATA_ODD_R2D_C_N

SATA_ODD_D2R_N

NC_SATA_D_R2D_CN

SATA_HDD_R2D_C_N

NC_SATA_D_R2D_CP

EXCARD_CLKREQ_L

SPI_MOSI_R

XDP_PCH_TDO

SPI_MISO

NC_SATA_D_D2RP

NC_PCIE_5_R2D_CP

ITPCPU_CLK100M_P

PCIE_CLK100M_T29_P

HDA_SYNC_R

PP1V5_S0

PP1V05_S0

RTC_RESET_L

SYSCLK_CLK32K_RTC

NC_SATA_F_D2RN

NC_SATA_E_D2RN

NC_PCIE_CLK100M_PEBP

NC_SATA_F_R2D_CP

ITPXDP_CLK100M_N

NC_PCIE_8_D2RN

NC_PCIE_7_R2D_CP

NC_PCIE_7_D2RP

NC_PCIE_7_D2RN

NC_PCIE_6_D2RP

NC_PCIE_6_D2RN


NC_PCIE_EXCARD_D2RP


PCIE_FW_R2D_C_P

NC_PCIE_8_R2D_CP

PP1V05_S0

PCIE_ENET_D2R_P

PCIE_ENET_R2D_C_P

ITPXDP_CLK100M_N

LPC_R_AD<3>

PCH_CLK96M_DOT_N

HDA_BIT_CLKHDA_BIT_CLK_R

LPC_AD<2>

HDA_RST_R_L

LPC_AD<0>

LPC_AD<3>

NC_CLINK_DATA

PCIE_AP_D2R_P

PCIE_AP_D2R_N

PCIE_ENET_R2D_C_N

PCH_GPIO11

SMBUS_PCH_CLK

SML_PCH_1_ALERT_L

SML_PCH_1_CLK

SML_PCH_1_DATA

DMI_CLK100M_CPU_N

DMI_CLK100M_CPU_P

NC_PCH_CLKOUT_DPN

PCIE_CLK100M_PCH_P

PCH_CLK14P3M_REFCLK

PCIE_CLK100M_PCH_N

HDA_SDOUT

HDA_RST_L

LPC_AD<1>

SML_PCH_0_ALERT_L

SML_PCH_0_CLK

SML_PCH_0_DATA

HDA_SYNC

SMBUS_PCH_DATA

HDA_SDOUT_R

PCH_CLKIN_GNDN1

PP1V05_S0

LPC_FRAME_L

PP3V3_S0

NC_PCIE_EXCARD_D2RN

PCIE_FW_R2D_C_N

PCIE_FW_D2R_P

PCIE_FW_D2R_N

PCIE_AP_R2D_C_P

PCIE_AP_R2D_C_N

PCIE_ENET_D2R_N

NC_HDA_SDIN3

HDA_SDOUT_R

NC_PCIE_7_R2D_CN

NC_HDA_SDIN1

HDA_SDOUT_R



ITPXDP_CLK100M_P

PCIE_CLK100M_AP_N

PCIE_CLK100M_ENET_P

NC_PCIE_5_D2RN

PEG_B_CLKRQ_L_GPIO56

NC_PCIE_CLK100M_PEBN

NC_PCIE_8_R2D_CN

HDA_SYNC_R

NC_SATA_D_D2RN

T29_CLKREQ_L

NC_PCIE_5_R2D_CN

NC_PCIE_5_D2RP

NC_CLINK_CLK

NC_CLINK_RESET_L

ITPXDP_CLK100M_P


PCH_CLKIN_GNDP1

PCH_CLK33M_PCIIN

PCH_CLK96M_DOT_P

NC_PCH_CLKOUT_DPP

SYSCLK_CLK25M_SB_R


NC_PCIE_8_D2RP

PCIE_CLK100M_ENET_N

PCIE_CLK100M_AP_P

PCIE_CLK100M_FW_N

PCIE_CLK100M_FW_P


NC_PCIE_CLK100M_EXCARDP

PEG_CLKREQ_L

PCH_CLK100M_SATA_N

PCH_CLK100M_SATA_P


PCH_XCLK_RCOMP

SYSC

SPI_DESCRIPTOR_OVERRIDE_L

SATARDRVR_EN

PCH_SATALED_L

PCH_SATAICOMP

LPC_R_AD<0>

NC_PCIE_6_R2D_CP

NC_PCIE_6_R2D_CNJTAG_T29_TMS

XDP_PCH_TDI

SPI_CLK_R

PPVRTC_G3H

PCH_INTVRMEN_L

PCH_SRTCRST_L

NC_PCIE_EXCARD_R2D_CP

PP3V3_T29

SATA_HDD_D2R_N

SATA_HDD_R2D_C_P

NC_SATA_B_D2RN

LPC_SERIRQ

FW_CLKREQ_L

PCIE_CLK100M_T29_N

PCIECLKRQ5_L_GPIO44

ENET_CLKREQ_L

AP_CLKREQ_L

PCH_SATA3COMP

DP_AUXCH_ISOL

HDA_RST_R_L

PP3V3_S0

PCH_SPKR

JTAG_T29_TMS

PCH_SRTCRST_L

NC_HDA_SDIN2

1

16

1681

1681

26

6

16

16 23 32

16 37

16

16

678121617181920222326272933363740414246

48495051525457616271

727374757785

16 23 75

16 23 42

16

16

16

6

6

6

16 36

16

16

16 81

16 23 40

716171819202246717273

16

716171819202246717273

16

10 78

16

6

6

6

6

6

6

6

10 78

16 81

7202226425771

6791012141617202223364045687073

16

6

6

6

6

162378

6

6791012141617202223364045687073

16 23

1681

1681

6

16

16

16

1681

6 7 9 10 12 14 16 17 2022 23 36 40 45 68 70 73

678121617181920222326272933363740414246

484950

515254576162717273

74

757785

6

1681

6

1681

6

6

162378

16

6

1681

6

6

6

16 23

6

81

6

6

16 23 42

16

80

7172026

16

71926343536

6

16

16 23 75

1681

678121617181920222326272933363740414246

48495051525457616271

727374757785

16

16 34

16

6

2 1345678



IN

OUT

OUT

OUT

OUT

OUT

IN

BI

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

(3 OF 10)

M A N A G E M E N T

S Y S T E M P O W E R

D M I

F D I

DMI1RXN

DMI2RBIAS

FDI_RXP6

DMI3RXN

DMI0RXN

FDI_RXN5

FDI_RXN4

FDI_RXN2

FDI_RXN3

FDI_RXN1

FDI_RXN0

RI*

BATLOW*/GPIO72

PWROK

SYS_PWROK

SYS_RESET*

DMI_ZCOMP

DMI3TXPDMI2TXP

DMI1TXP

DMI3TXN

DMI0TXP

DMI1TXN

DMI2TXN

SUSACK*

SLP_SUS*

DSWVRMEN

DF_TVS

PMSYNCH

TP23

SLP_LAN*/GPIO29

SLP_A*

SLP_S4*

SLP_S5*/GPIO63

SUS_STAT*/GPIO61

SUSCLK/GPIO62

CLKRUN*/GPIO32

WAKE*

FDI_LSYNC1

FDI_FSYNC1

FDI_LSYNC0

FDI_FSYNC0

FDI_INT

FDI_RXP7

FDI_RXP4

FDI_RXP5

FDI_RXP2

FDI_RXP1

FDI_RXP3

FDI_RXP0

FDI_RXN7

FDI_RXN6

DRAMPWROK

DMI2RXN

DMI0TXN

DMI_IRCOMP

SLP_S3*

PWRBTN*

APWROK

RSMRST*

DMI0RXP

DMI1RXP

DMI2RXP

DMI3RXP

DPWROK

SUSWARN*/SUSPWRDNACK/GPIO30

ACPRESENT/GPIO31

(4 OF 10)

D I G I T A L D I S P L A Y I N T E R F

A C E

C R T

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVDRSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

DDPD_3P

DDPD_2P

DDPD_3N

DDPD_2N

DDPD_1P

DDPD_1N

DDPD_0P

DDPD_0N

DDPD_HPD

DDPD_AUXN

DDPD_AUXP

DDPD_CTRLDATA

DDPD_CTRLCLK

DDPC_3N

DDPC_3P

DDPC_2N

DDPC_2P

DDPC_1N

DDPC_0P

DDPC_1P

DDPC_0N

DDPC_HPD

DDPC_AUXP

DDPC_AUXN

DDPC_CTRLDATA

DDPC_CTRLCLK

DDPB_3P

DDPB_3N

DDPB_2N

DDPB_2P

DDPB_1PDDPB_1N

DDPB_0P

DDPB_HPD

DDPB_0N

DDPB_AUXP

DDPB_AUXN

SDVO_CTRLCLK

SDVO_CTRLDATA

SDVO_INTN

SDVO_INTP

SDVO_STALLN

SDVO_STALLP

SDVO_TVCLKINN

SDVO_TVCLKINP

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_DDC_DATA

CRT_HSYNC

CRT_VSYNC

CRT_IRTN

DAC_IREF

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NCNC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

IN

OUT

IN

IN

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

Set to Vcc when High

DF_TVS:DMI & FDI Term Voltage

Set to Vss when Low

978

9 78

9 78

9 78

9 78

9 78

49.9

402

1/16W

MF-LF

1% PLACE_NEAR=U1800.BJ24:12.7mm

R19001

2

6 17 26 32

6 17 45 47

46

45 73

6 30 45 73

6 30 45 73

103078

73

172345

1746

1726

45

2326

2645

978

978

978

978

978

978

978

978

978

978

978

978

978

978

978

10K5%

1/20W

MF

201

R19051

2

10 78

6 45 47

PLACE_NEAR=U1800.T43:2.54mm

402

1K5%

MF-LF

1/16W

R19511

2

201

1/20W

MF

5%

100K

R19091

2

1/16W

402

1%

MF-LF

750

PLACE_NEAR=U1800.BH21:2.54mm

R19201

2

5%

0

1/20W

MF201

R1986

12

402

5%

1/16W

2.2K

MF-LF

R19811

2

1/16W

1K

402

MF-LF5%R1980 12

MOBILE

COUGAR-POINT

OMIT

FCBGA

U1800

H20

L10

E10

N3

AY1

BC24

BE24

AW24

AY24

BE20

BC20

AW20

AY20

BH21

BG18

BJ18

BB18

AY18

BG20

BJ20

AV18

AU18

BG25

BJ24

E22

B13

A18

AV12

BC10

AW16

AV14

BB10

BJ14

AY14

BE14

BH13

BC12

BJ12

BG10

BG9

BG14

BB14

BF14

BG13

BE12

BG12

BJ10

BH9

AP14

E20

L22

A10

C21

G10

K14

F4

H4

D10

G16

G8

C12

N14

K16

P12

K3

AY16

B9

FCBGA

MOBILE

OMIT

COUGAR-POINT

U1800

N48

T39

M40

P49

M47

T42

T49

M49

T43

AV42

AV40

AV45

AV46

AU48

AU47

AV47

AV49

AT49

AT47

AT40

AY47

AY49

AY43

AY45

BA47

BA48

BB47

BB49

AP47

AP49

P46

P42

AT38

BB43

BB45

BF44

BE44

BF42

BE42

BJ42

BG42

AT45

AT43

M43

M36

BH41

AT1

AT10

AT12

AT3

AT4

AT5

AT8

AU2

AU3

AV1

AV10

AV3

AV5

AV7

AY3

AY5

AY7

BA2

BA3

BB1

BB3

BB5

BB7

BC8

BD4

BE8

BF3

BF6

BG4

P38

M39

AP39

AP40

AM42

AM40

AP43

AP45

5%

1/20W

MF

201

390K

R19151

2

MF-LF

5%

1/16W

402

8.2K

R19911

2

5%

NOSTUFF

MF

201

1/20W

10K

R19841

2

MF-LF

402

5%

10K

1/16W

R19821

2

1%

1K

MF

1/20W

201

R19251

2

454673

17

MF-LF

402

5%

10K

1/16W

R19831

2

1726

MF

201

1%

1K

1/20W

R19851

2

17

75

PCH DMI/FDI/GRAPHIC

DMI_S2N_P<1>

DMI_S2N_N<0>

PP3V3_SUS

PP1V05_S0

DMI_N2S_N<0>

PM_PCH_SYS_PWROK

PM_PWRBTN_L

PM_BATLOW_L

PM_RSMRST_L

PM_MEM_PWRGD

PM_DSW_PWRGD

PCH_DAC_IREF

NC_CRT_IG_HSYNC

PCH_SUSACK_L

PCH_SUSWARN_L

SMC_ADAPTER_EN

PM_SYSRST_L

DMI_S2N_P<3>

PM_PCH_PWROK

PM_PCH_PWROK

PCH_SUSACK_L

DMI_S2N_P<2>

TP_PM_SLP_A_L

GPIO29_SLP_LAN_L

PCH_DF_TVS

PM_SLP_S3_L

FDI_LSYNC<1>

FDI_LSYNC<0>

FDI_FSYNC<1>

FDI_FSYNC<0>

FDI_INT

FDI_DATA_P<7>

FDI_DATA_P<6>

FDI_DATA_P<5>

FDI_DATA_P<4>

FDI_DATA_P<3>

PP3V3_S0

NC_CRT_IG_VSYNC

PM_CLKRUN_L

TP_DP_IG_C_MLP<2>

NC_CRT_IG_BLUE

NC_CRT_IG_GREEN

NC_CRT_IG_RED

NC_CRT_IG_DDC_CLKCPU_PROC_SEL_L

TP_DP_IG_C_MLN<3>

TP_DP_IG_C_MLP<3>

TP_DP_IG_B_MLN<3>

TP_DP_IG_B_MLP<2>

TP_DP_IG_B_MLN<2>

TP_DP_IG_B_MLP<1>

DMI_N2S_N<3>

PM_SLP_SUS_L

DMI_N2S_P<3>

DP_IG_C_CTRL_CLK

DP_IG_C_CTRL_DATA


DP_T29SNK0_HPD

TP_DP_IG_C_MLN<0>

TP_DP_IG_C_MLP<0>

DP_EXTA_DDC_DATA

TP_DP_IG_B_MLN<0>

TP_DP_IG_B_MLN<1>

TP_DP_IG_B_MLP<0>

DP_EXTA_AUXCH_C_N

DP_EXTA_DDC_CLK

NC_SDVO_INTP

NC_SDVO_INTN

NC_SDVO_STALLP

NC_SDVO_STALLN

FDI_DATA_N<5>

FDI_DATA_N<2>

FDI_DATA_N<3>

FDI_DATA_N<1>

FDI_DATA_N<0>

FDI_DATA_P<2>

FDI_DATA_N<7>

FDI_DATA_N<6>

TP_DP_IG_D_MLP<0>

TP_DP_IG_D_MLN<1>



TP_DP_IG_D_MLP<2>

TP_DP_IG_C_MLN<2>

NC_SDVO_TVCLKINN

NC_SDVO_TVCLKINP

TP_DP_IG_D_MLP<3>

TP_DP_IG_D_MLP<1>

TP_DP_IG_D_MLN<0>

DP_T29SNK1_HPD


TP_DP_IG_C_MLP<1>

DP_IG_D_CTRL_DATA

DP_IG_D_CTRL_CLK

TP_DP_IG_C_MLN<1>

TP_DP_IG_D_MLN<3>

TP_DP_IG_D_MLN<2>

FDI_DATA_P<1>

DMI_N2S_P<0>

DMI_N2S_N<2>

DMI_S2N_N<3>

DP_EXTA_AUXCH_C_P

DP_EXTA_HPD

TP_DP_IG_B_MLP<3>

FDI_DATA_P<0>

FDI_DATA_N<4>

PCH_SUSWARN_L

PCH_DMI_COMP

PCH_RI_L

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_N<1>

PP1V8_S0

NC_CRT_IG_DDC_DATA

PCH_DSWVRMEN

TP_PCH_TP23

PPVRTC_G3H

DMI_S2N_N<1>

DMI_S2N_N<2>

DMI_S2N_P<0>

PCH_DMI2RBIAS

PCH_SUSWARN_L

PP3V3_SUS

PM_BATLOW_L

GPIO29_SLP_LAN_L

PCIE_WAKE_L

PM_PWRBTN_L

PM_CLK32K_SUSCLK_R

PM_CLKRUN_L

PP3V3_S5

PP3V3_SUS

PM_SYNC

PM_SLP_S5_L

PM_SLP_S4_L

PCIE_WAKE_L

=T29_WAKE_L

LPC_PWRDWN_L

1

7 16 17 18 19 20 22 46 71 72 73

6 7 9 10 12 14 16 20 22 23 3640 45 68 70 73

6

17

17

9 78

9 78

9 78

9 78

9 78

678121618192022232627293336374041424648

495051525457616271

727374757785

6

6 17 45 47

8

6

6

6

6

10

8

8

8

8

8

8

73

8

8

8 34 83

8 34

8

8

8 75

8

8

8

8 75 80 81

8 75

6

6

6

6

9 78

9 78

9 78

9 78

9 78

9 78

9 78

9 78

8

8

8 34 83

8 34 83

8

8

6

6

8

8

8

8 34

8 34 83

8

8

8

8

8

8

9 78

8 75 80 81

8 75

8

9 78

9 78

17

6 714 20 22 26 71

6

7162026

17

716171819202246717273

17 46

17

6 17 26 32

17 23 45

678192022232426304656667273747685

716171819202246717273

2 1345678



OUT

USBP2N

USBP1N

USBP1P

USBP0N

USBP0P

OC7*/GPIO14

OC6*/GPIO10

OC5*/GPIO9

OC4*/GPIO43

OC3*/GPIO42

OC2*/GPIO41

OC1*/GPIO40

OC0*/GPIO59

USBRBIAS*

USBRBIAS

USBP13P

USBP13N

USBP12P

USBP12N

USBP11P

USBP11N

USBP10P

USBP10N

USBP9P

USBP9N

USBP8P

USBP8N

USBP7N

USBP7P

USBP6N

USBP6P

USBP5N

USBP5P

USBP4P

USBP4N

USBP3P

USBP3N

USBP2P

PIRQA*

PIRQB*

PIRQC*

PIRQD*

REQ1*/GPIO50

REQ3*/GPIO54

REQ2*/GPIO52

GNT2*/GPIO53

GNT1*/GPIO51

GNT3*/GPIO55

PIRQE*/GPIO2

PIRQF*/GPIO3

PIRQG*/GPIO4

PIRQH*/GPIO5

PME*

CLKOUT_PCI0

PLTRST*

CLKOUT_PCI2

CLKOUT_PCI1

CLKOUT_PCI3

CLKOUT_PCI4

LVDSA_DATA2*

LVDSA_DATA1*

LVDSA_DATA0*

LVDSA_DATA3*

LVDSA_DATA0

LVDSA_DATA2

LVDSA_DATA1

LVDSA_CLK*

LVDSA_DATA3

LVDSA_CLK

LVDSB_DATA0*

LVDSB_DATA1*

LVDSB_DATA2*

LVDSB_DATA3*

LVDSB_DATA1

LVDSB_DATA0

LVDSB_DATA2

LVDSB_DATA3

LVDSB_CLK*

LVDSB_CLK

L_BKLTEN

L_BKLTCTL

LVD_VREFLLVD_VREFH

LVD_VBG

LVD_IBG

L_VDD_EN

L_CTRL_DATA

L_DDC_CLK

L_DDC_DATA

L_CTRL_CLK

(5 OF 10)

U S B

P C I

L V D S

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

BI

IN

IN

BI

BI

BI

BI

OUT

OUTOUT

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A

2 1


Apple Inc.

PAGE


345678

D

B

8 7 5 4 2 1

USB HUB 2

Unused

Camera

Unused

PUs TO S0 INSTEAD?

Unused

Unused

Unused

USB HUB 1

Unused

Unused

Unused

Unused

Unused

Unused

67480

MOBILE

COUGAR-POINT

OMIT

FCBGA

U1800

H49

H43

J48

K42

H40

D47

E42

F46

P45

J47

T45

P39

T40

K47

M45

AF37

AF36

AE48

AE47

AK40

AK39

AN47

AN48

AM49

AM47

AK49

AK47

AJ47

AJ48

AF39

AF40

AH43

AH45

AH49

AH47

AF47

AF49

AF43

AF45

A14

K20

B17

C16

L16

A16

D14

C14

K40

K38

H38

G38

G42

G40

C42

D44

C6

K10

C46

C44

E40

C24

A24

C30

A30

L32

K32

G32

E32

C32

A32

C25

B25

C26

A26

K28

H28

E28

D28

C28

A28

C29

B29

N28

M28

L30

K30

G30

E30

B33

C33

67480

67480

880

67480

67480

67480

880

7480

7480

8

8

8

8

8

8

6880

6880

8

8

1%

MF-LF

1/16W

402

2.37K

PLACE_NEAR=U1800.AF37:2.54mmR2050

1

2

201

1/20W

MF

NOSTUFF

10K5%

R20541

2201

1/20W

MF

10K

NOSTUFF

5%

R20531

2201

1/20W

MF

10K5%

NOSTUFF

R20521

2

877

877

874

6874

6874

10K

5% 1/16W402 MF-LF

R2015 1 2

5%

10K

MF

1/20W

201

R20651

25%

201

MF

1/20W

10K

R20671

2

10K5%

MF

201

1/20W

R20691

2

100K

402

1/16W

5%

MF-LF

R20551

2

62

32 80

32 80

75

10K

5% 1/16W402 MF-LF

R2031 1 2

62

24 80

24 80

24 80

24 80

5%

10K

MF

1/20W

201

R20641

2

10K5%

MF

1/20W

201

R20621

2

10K5%

MF

1/20W

201

R20611

2

PLACE_NEAR=U1800.B33:2.54mm

1%

22.6

MF

1/20W

201

R20701

2

10K

MF-LF1/16W5% 402

R2010 1 2

MF-LF5%

10K

4021/16W

R2011 1 2

MF-LF1/16W

10K

4025%

R2012 1 2

MF-LF 4025%

10K

1/16W

R2013 1 2

10K

1/16W5% MF-LF 402

R2016 1 2

402MF-LF1/16W

10K

5%

R2017 1 2

5%

10K

MF-LF1/16W 402

R2018 1 2

2630333640

26

2681

26

10K

5% 1/16W402 MF-LF

R2030 1 2

5%

10K

MF

1/20W

201

R20681

2

10K5%

MF

1/20W

201

R20601

2

SYNC_MASTER=K91_MLB

PCH PCI/FLASHCACHE/U

S

PCH_PCI_GNT1_L

PCH_PCI_GNT2_L

PCH_PCI_GNT3_L

PP3V3_S3

PP3V3_SUS

USB_HUB_SOFT_RESET_L

SDCONN_STATE_RST_L

ENET_PWR_EN

AP_PWR_EN

PCI_REQ3_L

LPC_CLK33M_LPCPLUS_R

LVDS_DDC_DATA

LCD_BKLT_EN

TP_LVDS_IG_B_CLKP

TP_LVDS_IG_B_CLKN

NC_LVDS_IG_B_DATAP<3>




NC_LVDS_IG_B_DATAN<3>



NC_LVDS_IG_A_DATAP<3>

LVDS_IG_A_DATA_P<2>


LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_N<2>

PCH_CLK33M_PCIOUT

NC_PCI_CLK33M_OUT3

PLT_RESET_L

LPC_CLK33M_SMC_R

AUD_IP_PERIPHERAL_DET

PCH_PCI_GNT3_L

PCI_INTD_L

NC_USB_4P

NC_USB_12N

NC_USB_12P

PCH_GPIO43_OC4_L

SDCONN_STATE_CHANGE

USB_HUB1_UP_P

USB_HUB1_UP_N

NC_USB_1P

NC_USB_1N

NC_USB_2N

PCH_PCI_GNT1_L

PCH_PCI_GNT2_L

USB_HUB2_UP_P

TP_PCI_CLK33M_OUT2


NC_USB_13N

NC_USB_11P

NC_USB_7N

NC_USB_6P

NC_USB_6N

NC_USB_5P

NC_USB_5N

NC_USB_4N

NC_USB_3P

NC_USB_3N

NC_USB_2P

NC_USB_10N

USB_HUB2_UP_N

NC_USB_7P

NC_USB_10P

LVDS_IG_A_DATA_N<0>

USB_CAMERA_P

USB_CAMERA_N

LCD_IG_PWR_EN

PCH_LVDS_IBG

PCH_USB_RBIASLVDS_IG_A_CLK_N

LVDS_IG_A_CLK_P

NC_USB_11N

JTAG_GMUX_TMS

NC_LVDS_IG_CTRL_DATA

NC_LVDS_IG_CTRL_CLK

LCD_BKLT_PWM

NC_PCH_LVDS_VBG

T29_A_HV_EN_L

PCI_INTA_L

PCI_INTB_L

PCI_INTC_L

NC_PCI_PME_L

PCI_INTE_L

LVDS_IG_A_DATA_P<0>

LVDS_IG_A_DATA_P<1>

T29_MCU_INT_L

AUD_I2C_INT_L

LVDS_DDC_CLK

PP3V3_S0

PCH_GPIO10_OC6_L

PCH_GPIO14_OC7_L

NC_USB_13P

2

18

18

18

6 7 8 24 26 30 31 32 33 48 5054 55 72 73

7 16 17 19 20 22 46 71 72 73

23 24

23

23

32 73

6

18

23

23 33

18

18

80

6

6

6

6

678121617192022232627293336374041424648

49505152545761627172

7374757785

23

23

2 1345678



OUT

OUT

BI

IN

C P U

N C T F

MISC

(6 OF 10)

G P I O

R S V D

TP38

SATA3GP/GPIO37

TACH5/GPIO69

TP18

STP_PCI*/GPIO34

GPIO15

SATA4GP/GPIO16

CLKOUT_PCIE7P

A20GATE

TACH3/GPIO7

LAN_PHY_PWR_CTRL/GPIO12

GPIO8

TACH0/GPIO17

GPIO24/MEM_LED

SCLOCK/GPIO22

GPIO27

GPIO28

GPIO35

SATA2GP/GPIO36

SLOAD/GPIO38

SDATAOUT0/GPIO39

PCIECLKRQ6*/GPIO45

PCIECLKRQ7*/GPIO46

SATA5GP/GPIO49

SDATAOUT1/GPIO48

TACH4/GPIO68

GPIO57

TACH6/GPIO70

TACH7/GPIO71

CLKOUT_PCIE6N

CLKOUT_PCIE7N

CLKOUT_PCIE6P

BMBUSY*/GPIO0

TACH2/GPIO6

TACH1/GPIO1

PECI

RCIN*

THRMTRIP*

PROCPWRGD

TP1

TP2

TP3

TP4

TP6

TP5

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP19

TP20

TP21

TP22

TP24

TP25

TP26

TP27

TP29

TP28

TP30

TP31

TP32

TP33

TP34

TP35

TP36

NC_1

INIT3_3V*

TP40

TP39

TP37

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTFVSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

VSS_NCTF

TS_VSS1

TS_VSS2

TS_VSS3

VSSADAC

TS_VSS4

IN

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

IN

OUT

OUT

OUT

IN

BI

IN

IN

IN

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

ALL RSVD TPs NC-ed per INTEL approval

(NC-ed per Intel chklist)

(IPU)

(IPU)

This has internal pull up and should not pulled low.

THIS SIGNAL IS INTENDED FOR FIRMWARE HUB AND WE ARE NOT USING IT.

(PU necessary?)

(PUs necessary?)

(PU necessary?)

10 23 78

402

5%

MF-LF

10K

1/16W

R21551

2

10K5%

1/16W

MF-LF

402

R21501

2

2330

MF-LF

1/16W

5%

100K

402

R21901

2

647

5%

1/16W MF-LF

402

43

NOSTUFF

R2170

1 2

5%

402

MF-LF

0

1/16W

R2140

1 2

1923

MOBILEFCBGA

OMIT

COUGAR-POINT

U1800

P4

T7 V40

V42

V38

V37

G2

E8

E16

P8

K4

D6

C10

T14

C4

P37

T13

K12

AU16

AY11

P5

V8

M5

U2

V3

T5

M3

V13

N2

K1

D40

A42

H36

E38

C40

B41

C41

A40

AY10

BG26

C18

N30

H3

AH12

AM4

AM5

Y13

K24

L24

AB46

BJ26

AB45

B21

M20

BG46

BE28

BC30

BE32

BJ32

BC28

BH25

BE30

BF32

BG32

AV26

BB26

AU28

AY30

AU26

AY26

AV28

BJ16

AW30

BG16

AH38

AH37

AK43

AK45

AH8

AK11

AH10

AK10

A4

A44

BE1

BE49

BF1

BF49

BG2

BG48

BH3

BH47

BJ4

BJ44

A45

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

A46

F1

F49

A5

A6

B3

B47

BD1

BD49

U47

19

5%

1K

NOSTUFF

MF

1/20W

201

R21301

2

10K5%

NOSTUFF

MF

1/20W

201

R21971

2

5%

10K

MF

1/20W

201

R21961

2

10K5%

1/16W

MF-LF

402

R21991

2

10K5%

MF

1/20W

201

R21981

2

201

1/20W

MF

10K5%

R21861

2201

1/20W

MF

10K5%

R21851

2201

1/20W

MF

5%

10K

R21841

2

10K5%

201

1/20W

MF

R21601

2

81940

20K5%

402

MF-LF

1/16W

R21111

2

2362

1942

8192334

81934

6194756

NOSTUFF

10K5%

MF

1/20W

201

R21101

2

10 78

402

MF-LF

390

1/16W

5%

R2156

1 2

161945

MF

1/20W

201

10K5%

R21911

2

194546

5%

10K

201

1/20W

MF

R21921

2

100K5%

1/20W

MF

201

R21931

2

10K

MF

1/20W

5%

201

R21941

2

10K5%

201

1/20W

MF

R21141

2

MF

1/20W

201

5%

10K

R21151

2

201

1/20W

MF

5%

10K

R21751

2

10K5%

201

1/20W

MF

R21741

2

10K5%

201

1/20W

MF

R21731

2

MF

1/20W

201

5%

10K

R21721

2

1/20W

10K

201

MF

5%

R21121

2 201

10K5%

MF

1/20W

R21131

2

46

PCH MISC


PM_THRMTRIP_L_R

PM_THRMTRIP_L



PCH_A20GATE

PCH_RCIN_L

CPU_PECI

JTAG_ISP_TCK



JTAG_ISP_TDI

PCH_GPIO36_SATA2GP

ENET_LOW_PWR

PP3V3_SUS

T29_SW_RESET_L

SMC_RUNTIME_SCI_L

PCH_GPIO12

PP3V3_S0

NC_GPIO8

NC_GPIO35

SMC_SCI_L

NC_GPIO15

AUD_IPHS_SWITCH_EN

LPCPLUS_GPIO

ODD_PWR_EN_L

ISOLATE_CPU_MEM_L

PCH_GPIO24

JTAG_ISP_TCK

JTAG_ISP_TDI

FW_PLUG_DET_L

PP3V3_S0

FW_PLUG_DET_L

SMC_IG_THROTTLE_L

GMUX_INT

PCH_PECI

FW_PWR_EN

GMUX_INT

PP3V3_S0

SPIROM_USE_MLB

PCH_GPIO68_TACH4

PP3V3_S0

PCH_GPIO71_TACH7

PCH_INIT3V3_L

PCH_GPIO36_SATA2GP

PCH_GPIO70_TACH6

PCH_PROCPWRGD

PCH_GPIO69_TACH5

CPU_PWRGD

SMC_RUNTIME_SCI_L

PCH_GPIO46

JTAG_ISP_TDO

PP3V3_T29

T29_SW_RESET_L

SMC_SCI_L

PCH_GPIO24

SPIROM_USE_MLB

PCH_GPIO12

SMC_IG_THROTTLE_L

WOL_EN

PCH_GPIO46

PP3V3_SUS

PCH_GPIO71_TACH7

PCH_GPIO70_TACH6

PCH_GPIO69_TACH5

PCH_GPIO68_TACH4

PP3V3_S0

PCH_INIT3V3_L

JTAG_ISP_TDO

ENET_LOW_PWR

PP3V3_S5

PP3V3_T29

ODD_PWR_EN_L

FW_PWR_EN

WOL_EN

2

6

6

10 45 78

8192334

6

6

7161718192022467172

73

19

6781216171819202223

262729

33363740

414246

48495051

525457

61627172

737475

7785

19

81934

8 19 40

678121617181920222326272933363740

41424648495051

525457616271727374

757785

19 40

19

678121617181920222326272933363740414246

48495051525457

616271727374757785

19

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

19

19

1923

19

19

1923

7161926343536

1936

16 19 45

19

6 19 47 56

19

19 23

1973

19 23

716171819202246717273

19

19

19

19

67812161718

1920222326

272933

3637404142

464849

5051525457

616271

7273747577

85

19

8 19 34

19233337

67817202223242630465666

72737476

85

1942

1940

1973

2 1345678



VSSALVDS

VCCTX_LVDS

VCCTX_LVDS

VCCTX_LVDS

VCCTX_LVDS

VCCDFTERM

VCCDFTERM

VCCALVDS

VCCVRM_3_DMI

VCC3_3_7_HVCMOS

VCC3_3_5_PCI

VCCDFTERM

VCCSPI

VCCDFTERM

VCC3_3_6_HVCMOS

VCCIO_18_FDI

VCCIO_21_PCIE

VCCIO_20_PCIE

VCCIO_11_PLLPCIE

VCCIO_25_PCIE

VCCIO_24_PCIE

VCCCLKDMIVCCCORE

VCCIO_27_DP

VCCIO_26_PCIE

VCCIO_19_PCIE

VCCIO_22_PCIE

VCCIO_10_PLLFDI

VCCIO_23_PCIE

VCCIO_17_FDI

VCCIO_28_DP

VCCDMI_0_FDI

VCCAPLLEXP

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCCORE

VCCDMI_1_DMI

VCCCORE

VCCCOREVCCCORE

VCCAFDIPLL

VCCCORE

VCCVRM_2_FDI

VCCADAC

VCCCORE

F D I

C R T

D F T / S P I

D M I

H V C M O S

V C C I O

V C C

C O R E

L V D S

(7 OF 10)

VCCSUSHDA

VCCSUS3_3_3_USB

VCCSUS3_3_4_USB

VCCSUS3_3_2_USB

VCCSUS3_3_1_USB

VCCIO_4_USB

VCCIO_2_USB

VCCIO_3_USB

VCCIO_1_USB

VCCIO_0_USB

VCCASW_0_MISC

VCCASW_2_MISC

VCCASW_1_MISC

VCCIO_8_SATA

VCCIO_6_SATA

VCCIO_7_SATA

VCCAPLLSATA

VCCVRM_1_SATA

VCCIO_9_PLLSATA3

VCCIO_15_SATA3

VCCIO_16_SATA3

VCC3_3_0_SATA

VCCIO_5_PLLSATA

VCC3_3_2_GPIO

VCC3_3_3_GPIO

VCC3_3_1_GPIO

VCCSUS3_3_7_GPIO

VCCSUS3_3_8_GPIO

VCCSUS3_3_5_GPIO

VCCSUS3_3_6_GPIO

V5REF

VCCRTC

V_PROC_IO

DCPSUSBYP

VCCACLK

DCPRTC

VCCADPLLA

VCCADPLLB

DCPSST

DCPSUS_2_CLK

DCPSUS_1_CLK

VCCDIFFCLKN_2

VCCDIFFCLKN_1

VCCDIFFCLKN_0

VCCDSW3_3

VCCIO_13_CLK

VCC3_3_4_CLK

VCCASW_4_CLK

VCCASW_5_CLK

VCCASW_6_CLK

VCCASW_7_CLK

VCCASW_8_CLK

VCCAPLLDMI2

VCCASW_20_CLK

VCCASW_10_CLK

VCCASW_11_CLK

VCCASW_12_CLK

VCCASW_13_CLK

VCCASW_14_CLK

VCCASW_15_CLK

VCCASW_16_CLK

VCCASW_17_CLK

VCCASW_18_CLK

VCCASW_19_CLK

VCCASW_9_CLK

VCCVRM_0_CLK

VCCASW_22_CLK

VCCASW_21_CLK

VCCSSC

VCCSUS3_3_9_USB

VCCIO_14_PLLUSB

V5REF_SUS

VCCSUS3_3_0_SUS

DCPSUS_3_SUS

VCCASW_3_CLK

DCPSUS_0_CLK

VCCIO_12_PLLCLK

C P U

R T C H

D A

U S B

M I S C

S A T

A

P C I / G P I O /

L P C

C L K / M I

S C

(8 OF 10)

NC

NC

NC

NC

NC

NC

NC

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

NC-ed per DG

VCCAFDIPLL pin left as NC per DG

1.44 A Max, 474mA Idle

VCCAPLLSATA pin left as NC per DG

10 mA Max, 1mA Idle

VCCACLK pin left as NC per DG

AL24 left as NC per DG

55mA Max, 5mA Idle

NC-ed per DG

PCH output, for decoupling only

VCCAPLLDMI2 pin left as NC per DG

68 mA

(PCH DPLLA PWR)

PCH VCCADPLLA Filter

PCH VCCADPLLB Filter

(PCH DPLLB PWR)

69 mA

MOBILE

OMIT

FCBGA

COUGAR-POINT

U1800

BH29

V33

V34

U48

BG6

AK36

BJ22

AB36

AA23

AC23

AG27

AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AD21

AD23

AF21

AF23

AG21

AG23

AG24

AG26

AG16

AG17

AJ16

AJ17

AU20

AT20

AP17

AN19

AN16

AN17

AN21

AN26

AN27

AP21

AP23

AP24

AP26

AT24

AN33

AN34

V1

AM37

AM38

AP36

AP37

AP16

AT16

AK37

MOBILE

FCBGA

OMIT

COUGAR-POINT

U1800

N16

V16

AL24

T17

V19

AN23

V12

P34

M26

BJ8

AJ2

T34

AA16

W16

T38

AD49

BD47

BF47

BH23

AK1

T19

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26V21

W29

W31

W33

T21

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AF33

AF34

AG34

T16

N26

AL29

AF17

T26

AH13

AH14

P26

P28

T27

T29

AF13

AC16

AC17

AD17

AF14

A22

AG33

AN24

T23

T24

V23

V24

N20

N22

P20

P22

P24

P32

Y49

AF11

10%

0201

X5R-CERM

16V


0.1UF

C22321

2

PLACE_NEAR=U1800.A22:2.54mm 402

CERM

6.3V

10%

1UF

C22311

2

0.1UF

PLACE_NEAR=U1800.V16:2.54mm

20%10V

402

CERM

C22221

2

PLACE_NEAR=U1800.N16:2.54mm

10V

402

20%

CERM

0.1UF

C22101

2

5%

0

MF-LF

1/16W

402

R2260

1 2

1/16W

MF-LF

402

0

5%

R2265

1 2

10%

0201

X5R-CERM

16V


0.1UF

C22331

2

CERM

PLACE_NEAR=U1800.BD47:2.54MM

10%

402

6.3V

1UFC22611

2

402

PLACE_NEAR=U1800.BF47:2.54MM

10%6.3V

1UF

CERM

C22661

2

10V

0.1UF

CERM

402

20%

C22601

2

20%

402

CERM

10V

0.1UF

C22651

2

PCH POWER

PPVOUT_S0_PCH_DCPSST

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm VOLTAGE=3.3V

PP1V05_S0

PP1V05_S0_PCH_VCCADPLLA

PP1V05_S0

PP1V05_S0

PP5V_SUS_PCH_V5REFSUS

PP1V05_S0

PP1V8_S0

PP3V3_S0_PCH_VCC3_3_CLK_F

PP1V05_S0

PP3V3_S5

PP1V05_S0_PCH_VCCADPLLB


PPVOUT_G3_PCH_DCPRTC


VOLTAGE=3.3V

TP_PPVOUT_PCH_DCPSUSBYP

PP5V_S0_PCH_V5REF

PP3V3_S0

PP1V8_S0

PP3V3_S0_PCH_VCCA_DAC_F

PP1V8_S0

PP1V05_S0

TP_1V05_S0_PCH_VCCAPLLEXP

PP1V05_S0

PP1V05_S0

PP1V05_S0_PCH_VCCCLKDMI_F

PP1V05_S0

PP3V3_S5

PP3V3_S0

PP1V8_S0

PP3V3_S0

PPVRTC_G3H

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP3V3_S0

PP3V3_SUS

PP1V05_S0

PP1V05_S0

PP1V8_S0

PP3V3_S0

PP1V8_S0_PCH_VCCTX_LVDS_F

PP1V5_S0

PP3V3_SUS

PP1V05_S0

PP3V3_SUS


MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V


PP1V05_S0_PCH_VCCADPLLA

PP1V05_S0_PCH_VCCADPLLBMIN_LINE_WIDTH=0.4 MM


PP1V05_S0

PP1V05_S0

2

6791012141617202223364045687073

20

6791012141617202223364045687073

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

22

6791012141617202223364045687073

67141720222671

22

6791012141617202223364045687073

67817192022232426304656667273747685

20

22

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

6 7 14 17 20 22 26 71

2

6

62

62

62

2

6791012141617202223364045687073

63

678121617181920222326272933363740414246

48495051525457616271

727374757785

6

62

4

6

7161726

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

7 16 17 18 19 20 22 46 71 72 73

6791012141617202223364045687073

6791012141617202223364045687073

6

62

4

6

2

7 16 22 26 42 57 71

7 16 17 18 19 20 22 46 71 72 73

6 7 9 10 12 14 16 17 20 22 2336 40 45 68 70 73

7 16 17 18 19 20 22 46 71 72 73

771 20

20

6791012141617202223364045687073

6791012141617202223364045687073

2 1345678



VSS

(9 OF 10)

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSVSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS(10 OF 10)

VSS

VSS

VSS

VSSVSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSVSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

COUGAR-POINT

MOBILE

FCBGA

OMIT

U1800AJ3

N24

AB14

AL48

AM11

AM14

AM36

AM39

AM43

AM45

AM46

AM7

AN2

AB39

AN29

AN3

AN31

AP12

AP13

AP19

AP28

AP30

AP32

AP38

AB4

AP4

AP42

AP46

AP8

AR2

AR48

AT11

AT13

AT18

AT22

AB43

AT26

AT28

AT30

AT32

AT34

AT39

AT42

AT46

AT7

AU24

AB5

AU30

AV11

AV16

AV20

AV24

AV30

AV38

AV4

AV43

AV8

AB7

AW14

AW18

AW2

AW22

AW26

AW28

AW32

AW34

AW36

AW40

AC19

AW48

AY12

AY22

AY28

AY4

AY42

AY46

AY8

B11

B15

AC2

B19

B23

B27

B31

AC21

AC24

BG29

AC33

AC34

AC48

AD10

AD11

AD12

AD13

AD14

AD16

AD19

H5

AD24

AD26

AD27

AD33

AD34

AD36

AD37

AD38

AD39

AD4

AA17

AD40

AD42

AD43

AD45

AD46

AD47

AD8

AE2

AE3

AF10

AA2

AF12

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF4

AA3

AF42

AF46

AF5

AF7

AF8

AG19

AG2

AG31

AG48

AH11

AA33

AH3

AH36

AH39

AH40

AH42

AH46

AH7

AJ19

AJ21

AJ24

AA34

AJ33

AJ34

AK12

AK3

AK38

AK4

AK42

AK46

AK8

AL16

AB11

AL17

AL19

AL2

AL21

AL23

AL26

AL27

AL31

AL33

AL34

MOBILE

COUGAR-POINT

FCBGA

OMIT

U1800B35

B39

B43

B7

BB12

BB16

BB20

BB22

BB24

BB28

BB30

BB38

BB4

BB46

BC14

BC18

BC2

BC22

BC26

BC32

BC34

BC36

BC40

BC42

BC48

BD3

BD46

BD5

BE10

BE22

BE26

BE40

BF10

BF12

BF16

BF20

BF22

BF24

BF26

BF28

BF30

BF38

BF40

BF8

BG17

BG21

BG22

BG24

BG33

BG41

BG44

BG8

BH11

BH15

BH17

BH19

BH27

BH31

BH33

BH35

BH39

BH43

BH7

C22

D12

D16

D18

D22

D24

D26

D3

D30

D32

D34

D38

D42

D8

E18

E26

F3

F45

G14

G18

G20

G26

G28

G36

G48

H10

H12

H16

H18

H22

H24

H26

H30

H32

H34

H46

K18

K26

K39

K46

K7

L18

L2

L20

L26

L28

L36

L48

M12

M14

M18

M22

M24

M30

M32

M34

M38

M4

M42

M46

M8

N18

N47

P11

P16

P18

P30

P40

P43

P47

P7

R2

R48

T12

T31

T33

T36

T37

T4

T46

T47

T8

V11

V26

V27

V29

V31

V36

V39

V43

V7

W17

W19

W2

W27

W34

W48

Y12

Y38

Y4

Y42

Y46

Y8

V17

AP3

AP1

BE16

BC16

BG28

BJ28

PCH GROUNDS

SSYNC_MASTER=K91_MLB

2

2 1345678



N C

N C

NC

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

1 mA S0-S5

PCH VCCIO BYPASS

NEED PWR CONSTRAINT

PCH V5REF_SUS Filter & Follower

<1 MA S0-S5

PCH VCCSUS3_3 BYPASS

1 mA

<1 MA

(PCH 1.05V CORE PWR)

PCH VCCSUSHDA BYPASS

NEED PWR CONSTRAINT

(PCH SUSPEND USB 3.3V PWR)

PCH VCCCORE BYPASS

PCH VCCIO BYPASS

(PCH USB 1.05V PWR)

(PCH HD Audio 3.3V/1.5V PWR)

PCH V5REF Filter & Follower

(PCH Reference for 5V Tolerance on PCI)

(PCH Reference for 5V Tolerance on USB)

(PCH PCI 3.3V PWR)

PCH VCC3_3 BYPASS

1UF

402

10VX5R

10%PLACE_NEAR=U1800.P34:2.54mm

C2439 1

2

1005%

402

1/16W

MF-LF

R24052

1

20%

402

CERM

10VPLACE_NEAR=U1800.M26:2.54mm

0.1UF

C2438 1

2

BAT54DW-X-GSOT-363

D2400

1

6

5

1/16W

5%

10

402

MF-LF

R24042

1

SOT-363

BAT54DW-X-G

D2400

4

3

2

402

X5R

0.1UF

16V10%

PLACE_NEAR=U1800.AJ2:2.54mm

C24231

2

PLACE_NEAR=U1800.AJ16:2.54mm0.1UF20%

CERM

402

10V

C24401

2

PLACE_NEAR=U1800.P32:2.54mm0.1UF20%

CERM

10V

402

C24411

2

402

CERM

10%

1UF

6.3V

PLACE_NEAR=U1800.AT20:2.54mm

C24191

2

402

0.1UF

16V

X5R

10%

PLACE_NEAR=U1800.BH29:2.54mm

C24211

2


0.1UF10%

402

16V

X5R

C24131

2

10%

X5R

16V

0.1UF

402PLACE_NEAR=U1800.BJ8:2.54mm

C24171

2X5R

402

6.3V

4.7UF20%


C2416 1

2

X5R

16V

402

0.1UF10%

PLACE_NEAR=U1800.P24:2.54mm

C24841

2

0.1UF

PLACE_NEAR=U1800.AA16:2.54mm

402

X5R

10%25V

C24851

2

CERM

10%1UF

402

6.3V


C24631

2

PLACE_NEAR=U1800.AG33:2.54mm

1UF

402

CERM

6.3V

10%

C24751

2

PLACE_NEAR=U1800.AF34:2.54mm

1UF10%

CERM

402

6.3V

C24341

2

PLACE_NEAR=U1800.AF17:2.54mm

CERM

6.3V

402

1UF10%

C24691

2

1UF10%

402

6.3V

CERM


C24141

2


10UF

6.3V

20%

X5R

603

C2401 1

2

6.3V

CERM

402

PLACE_NEAR=U1800.AC17:2.54mm

1UF10%

C24521

2

0.1UFPLACE_NEAR=U1800.T16:2.54mm

402

20%

CERM

10V

C24991

2

CERM

1UF

402

6.3V

10%PLACE_NEAR=U1800.V1:2.54mm

C24421

2


25V

0.1UF10%

X5R

402

C24861

2

PLACE_NEAR=U1800.AH13:2.54mm

10%6.3V

402

CERM

1UF

C24441

2

10%6.3V

1UF

CERM

402


C24461

2

402


16V

X5R

10%

0.1UF

C24241

2


20%

10UF

6.3V

X5R

603

C24601

2

402

1UF10%

CERM

6.3V


C24821

2

10%

CERM

1UF

PLACE_NEAR=U1800.AD21:2.54mm

6.3V

402

C24811

2

10%

1UF

CERM

6.3V

PLACE_NEAR=U1800.AJ27:2.54mm

402

C24831

2

10%

402

1UF

CERM

6.3V


C24071

2

1UF

CERM

10%

402

6.3V


C24291

2

6.3V

20%

CERM

805

22UF


C2420 1

2


6.3V

10%

1UF

CERM

402

C24961

2


CERM

1UF

402

6.3V

10%

C24561

2


1UF

CERM

6.3V

10%

402

C24261

2

402

1/16W

5%

1

MF-LF

R2415

1 2

10UF20%

CERM-X5RPLACE_NEAR=U1800.AB36:2.54mm

0402-1

6.3V

C24111

2


402

16V10%

X5R

0.1UF

C24301

2


22UF20%

6.3V

805

CERM

C2428 1

2

16V

402

CERM

10%

0.01UF

PLACE_NEAR=U1800.AM37:2.54mm

C2406 1

2


CERM

805

6.3V20%

22UF

C2400 1

216V

0.01UF

CERM

402

10%


C2408 1

2

0805

0.1UH

L2407

1 2

1/16W

MF-LF

5%

0

402

R2450

1 2


0.01UF10%16V

402

CERM

C2455 1

2


402

0.1UF

X5R

10%16V

C2451 1

2

402

MF-LF

1/16W

1

5%

R2451

1 2


1UF

402

10V10%

X5R

C2454 1

2

0603

10UH-0.12A-0.36OHML2451

1 2


0603

10UH-0.12A-0.36OHML2406

1 2

20%6.3V

10UF


X5R603

C2450 1

2

10UF20%


0402-1

6.3V

CERM-X5R

C2453 1

2


PCH DECOUPLING

PP3V3_S0_PCH_VCC3_3_CLK_F



VOLTAGE=3.3V

PP1V8_S0

PP3V3_S0


VOLTAGE=1.05V


PP1V05_S0_PCH_VCCCLKDMI_R

PP1V8_S0_PCH_VCCTX_LVDS_F


VOLTAGE=1.8V


PP3V3_S0

PP1V05_S0

PP3V3_S5

PP3V3_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP3V3_SUS

PP1V8_S0

PP3V3_S0


PP1V05_S0

PP5V_S0_PCH_V5REF

PP3V3_S5

PP1V5_S0

PP1V05_S0

PP3V3_SUS

PP1V05_S0

VOLTAGE=3.3V


PP3V3_S0_PCH_VCC3_3_CLK_R


PP3V3_S0

MAKE_BASE=TRUE



VOLTAGE=1.05V

PP1V05_S0_PCH_VCCCLKDMI_F

PP3V3_S0

PP1V05_S0

PP1V05_S0


VOLTAGE=5V


PP5V_S0_PCH_V5REF

MAKE_BASE=TRUE

PP5V_S0

MAKE_BASE=TRUE



VOLTAGE=3.3V

PP3V3_S0_PCH_VCCA_DAC_F

PP1V05_S0

PP3V3_S0

VOLTAGE=5V

MAKE_BASE=TRUE




PP5V_SUS

PP3V3_SUS

2

20

67141720222671

6781216

1718

1920

2223

2627

2933

3637

4041

4246

4849

5051

5254

5761

6271

7273

7475

7785

20

6781216171819202223262729333637404142

464849505152545761

6271727374757785

67910121416172022233640

45687073

67817192022232426304656667273747685

678121617181920222326272933363740414246

48495051525457616271

727374757785

6791012141617202223364045687073

6791012141617202223364045687073

6791012141617202223364045687073

6791012141617202223364045687073

716171819202246717273

67141720222671

678121617181920222326272933363740414246

48495051525457616271

727374757785

20 22

6791012141617202223364045687073

20 22

67817192022232426304656667273747685

7162026425771

6791012141617202223364045687073

716171819202246717273

6791012141617202223364045687073

678121617181920222326272933363740414246

48495051525457616271

727374757785

20

678121617181920222326272933363740414246

48495051525457616271

727374757785

6791012141617202223364045687073

6791012141617202223364045687073

20 22

674247525465687072

7377

20

6791012141617202223364045687073

678121617181920222326272933363740414246

48495051525457616271

727374757785

20 22

772

716171819202246717273

2 1345678



IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

NC

IN

IN

IN

OUT

IN

IN

BI

IN

OUT

IN

OUT

OUT

OUT

IN

IN

IN

IN

OUT

ININ

IN

IN

IN

OUT

IN

IN

IN

OUT

OUT

IN

IN

NC

BI

IN

IN

IN

IN

IN

BI

IN

OUT

IN

IN

IN

IN

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

OBSFN_C0

OBSFN_C1

OBSDATA_C0

OBSDATA_C3

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

1K series R on PCH Support P. 28

OBSDATA_C1

OBSDATA_C2

OBSFN_D0

OBSFN_D1

OBSDATA_D0

PCH MINI XDP

OBSDATA_B2

HOOK2

OBSDATA_C0

OBSDATA_A1

OBSDATA_D1

VCC_OBS_AB

517S0774

OBSDATA_B2

OBSDATA_B3

TMS

517S0774

OBSDATA_C1

OBSDATA_C2

DESIGN NOTE:

SNB XDP CONN

TRSTn

TDI

SDA

TCK0

TDI

OBSDATA_C3

TRSTn

OBSFN_D0

OBSDATA_D1

OBSDATA_D0

TCK0

PLACEMENT NOTE:

PLACE TCK/TDI/TMS/TRST*

TERM NEAR CPU

PLACEMENT NOTE:

TERM NEAR PCHPLACE TCK/TDI/TMS/TRST*

PLACE TDO TERM NEAR

OBSFN_B0

OBSDATA_A1

TDO

TCK1

PLACEMENT NOTE:

PCH XDP CONN

OBSFN_C1

HOOK3

TDO

ITPCLK#/HOOK5

TMS

ODT AVAILABLE ON JTAG

HOOK1

OBSFN_B0

OBSFN_D1

OBSDATA_D2

OBSDATA_A2

OBSDATA_A3

OBSFN_B1

OBSDATA_B0

PWRGD/HOOK0

SCL

OBSDATA_D3

OBSDATA_A0

OBSFN_A0

OBSFN_A1

XDP_PRESENT#

HOOK2

XDP_PRESENT#

PWRGD/HOOK0

RESET#/HOOK6

VCC_OBS_CD

DBR#/HOOK7

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P. 28

VCC_OBS_AB

SDA

HOOK3

ITPCLK#/HOOK5

OBSDATA_A3

OBSDATA_A0

OBSFN_A1

OBSFN_A0

ITPCLK/HOOK4

OBSDATA_D3OBSDATA_B3

OBSDATA_B0

OBSDATA_B1

OBSDATA_A2

OBSDATA_D2

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P. 28

SCL

OBSFN_B1

ITPCLK/HOOK4

OBSDATA_B1

OBSFN_C0

PROCESSOR MINI XDP

TCK1

PLACE TDO TERM NEAR

PLACEMENT NOTE:

HOOK1

9

10 26

1078

1078

978

10

10

10

10

978

978

978

402

MF-LF

XDP

1K5% 1/16W

PLACE_NEAR=U100.B50:2.54MM R2501

1 292378

16 40

16 32

9 78

19 62

1/16W5%0

402MF-LF

XDPPLACE_NEAR=U1800.V10:2.54MMR2576

1 2

XDP

5%

M F- LF 40 2

1/16W0

PLACE_NEAR=U1800.M1:2.54MMR2577

1 2

19

16 42

MF-LF5% 1/16W

0

402

XDPPLACE_NEAR=U1800.U2:2.54MMR2579

1 2

8 19 34

19 33 37

9 78

26

16 23

16 23

16 23

9 78

XDP

1/16W0

5%MF -L F 4 02

PLACE_NEAR=U1800.K20:2.54MM R2580

1 2

18

18

1623

9 78

1824

F-ST-SM-HF

XDP_CONN

CRITICAL

DF40C-60DS-0.4V

J2550

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

35 36

37 38

39

4

40

41 42

43 44

45 46

47 48

49

5

50

51 52

53 54

55 56

57 58

59

6

60

7 8

9

PLACE_NEAR=U1800.J3:2.54MM

402

5%

51

XDP

MF-LF

1/16W

R25561

2

16232729314248627781

16232729314248627781

10 23 26 78

XDP

10%

X5R

402

16V

0.1uF

C25801

2

XDP

0.1uF

X5R

10%

402

16V

C25811

2

19

PLACE_NEAR=U4900.D10:2.54MM

402

5% 1/16W

0

XDP

MF-LF

R2502

1 2172345

5% 1/16W0

XDP

402

PLACE_NEAR=U4900.D10:2.54MM

MF-LF

R2585

1 2172345

MF-LF

402

5%

XDP

1/16W

910

R2504

1 21726

18

1K

402

XDP

5%MF-LF

1/16W

PLACE_NEAR=J2550.39:2.54MM R2584

1 2264573

1/16W

MF-LF

XDP

05%

402

PLACE_NEAR=U1800.A16:2.54MM R2581

1 21833

10 23 78

10 23 26 78

MF-LF

XDP

1/16W402

5%0

PLACE_NEAR=U1800.K12:2.54MM R2582

1 219

5%

402

0

XDP

MF-LF

1/16W

PLACE_NEAR=U1800.P8:2.54MMR2578

1 2 19 30

5%

MF-LF

1/16W

402

XDPPLACE_NEAR=U1800.B17:2.54MM

0

R2586

1 2

XDP

MF-LF

01/16W5%

PLACE_NEAR=U1800.C16:2.54MM

402

R2587

1 218

18

9

10 23 78

16 78

16 78

402

MF-LF

5%

XDP

1/16W

PLACE_NEAR=R1841.1:2.54MM

0

R2515

1 2

XDP

0

402

MF-LF

5% 1/16W

PLACE_NEAR=R1840.1:2.54MMR2516

1 2

XDP

5%

MF-LF

1K

402

PLACE_NEAR=R1125.1:2.54MM

1/16W

R2505

1 2

16 75

PLACE_NEAR=J2550.52:2.54MM.

402

5%

MF-LF

1/16W

XDP

51

R25501

2

10 23 78

PLACE_NEAR=U1800.K5:2.54MM

5%

XDP

1/16W

402

MF-LF

51

R25511

2

PLACE_NEAR=U1800.H7:2.

51

XDP

1/16W

5%

402

MF-LF

R25521

2

5%

0

402MF-LF

1/16W

XDP_CPU:BPMR2560 1 2

402

01/16W

MF-LF

5%XDP_CPU:BPMR2561 1 2

1/16W

0

MF-LF

XDP_CPU:BPM5%

402

R2562 1 2

MF-LF

1/16W5%

0

402

XDP_CPU:BPMR2563 1 2

5%

MF-LF

1/16WXDP_CPU:CFG0

402

R2564 1 2

10 23 78

402

5%

0

MF-LF

XDP_CPU:CFG1/16WR2566 1 2

1/16W

402MF-LF

05%

XDP_CPU:CFGR2567 1 2

XDP_CPU:CFG1/16W

402

0

MF-LF

5%R2565 1 2

1K

NOSTUFF

5%

MF-LF

1/16W

402

R25401

2

9 23 78

0.1uF

402

X5R

10%

XDP

16V

C25011

2

9 78

16V

XDP

X5R

0.1uF10%

402

C25001

2

1078

1078

978

978

9 78

9 78

162327293142

48627781

1623272931424862

7781

102378

5%

PLACE_NEAR=U1000.B46:1MM

MF-LF

402

1/16W

1K

XDP

R2500

1 2

9 78

101978

9 78

F-ST-SM-HF

CRITICAL

XDP_CONN

DF40C-60DS-0.4V

J2500

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

35 36

37 38

39

4

40

41 42

43 44

45 46

47 48

49

5

50

51 52

53 54

55 56

57 58

59

6

60

7 8

9

PLACE_NEAR=U1000.L59:2.54MM

5%

MF-LF

1/16W

XDP

51

402

R25101

2402

MF-LF

1/16W

5%

51

XDP

PLACE_NEAR=U1000.M60

R25111

2

515%

1/16W

XDP

MF-LF

402


R25121

2

5%

MF-LF

402

XDP

1/16W

51

PLACE_NEAR=U1000.J58:2.54MM

R25131

2402

5%

MF-LF

51

XDP

1/16W


R25141

2

1078

1078

CPU & PCH XDP

S YN C_ MA ST ER =A NN E_ K9 0I S

XDP_PCH_SDCONN_STATE_RST_L

XDP_PCH_SDCONN_DET_L

XDP_CPU_PWRGD

CPU_CFG<14>

PP1V05_S0

CPU_CFG<9>

CPU_CFG<7>

AP_CLKREQ_L

FW_CLKREQ_L

ISOLATE_CPU_MEM_LPCH_GPIO46


ALL_SYS_PWRGD

XDP_BPM_L<3>

CPU_CFG<11>

XDP_OBSDATA_B<2>

XDP_OBSDATA_B<3>

XDP_CPU_TCK

XDP_CPU_TRST_L

PP1V05_S0

XDP_CPU_TDO

XDP_CPU_TDI

XDP_CPU_TMS

CPU_CFG<13> XDP_OBSDATA_B<1>

CPU_CFG<0>

XDP_CPU_CFG<0>

XDP_CPU_PWRBTN_L

XDP_CPU_TRST_L

XDP_CPU_TDO

SMBUS_PCH_CLK

SDCONN_STATE_RST_L

PM_PWRBTN_L

AUD_IPHS_SWITCH_EN

ITPXDP_CLK100M_N

CPU_CFG<12>

XDP_BPM_L<5> CPU_CFG<2>

CPU_CFG<17>

XDP_CPU_CLK100M_P

PCH_GPIO43_OC4_L

XDP_PCH_PWRBTN_L

NC_TP_XDP_PCH_OBSFN_B<0>

SMBUS_PCH_DATA

XDP_PCH_TCK

XDP_PCH_TMS

XDP_PCH_TDI

XDP_CPU_PRDY_L

XDP_CPU_TCK XDP_CPU_TMS

XDP_DBRESET_L

CPU_CFG<6>

CPU_CFG<5>

CPU_CFG<4>

CPU_CFG<8>

XDP_PCH_TDO

XDP_PCH_TDI

XDP_BPM_L<2>

CPU_CFG<10>

XDP_OBSDATA_B<0>

NC_TP_XDP_PCH_OBSFN_A<1>

XDP_PCH_TMS

TP_XDP_PCH_TRST_L

XDPPCH_PLTRST_L

XDP_PCH_TCK

ITPXDP_CLK100M_P

XDP_BPM_L<0> CPU_CFG<0>

CPU_CFG<3>

CPU_CFG<1>

PLT_RST_BUF_L

SDCONN_STATE_CHANGE

ENET_PWR_EN

NC_TP_XDP_PCH_OBSFN_A<0>

SMBUS_PCH_CLK

NC_TP_XDPPCH_HOOK2

NC_TP_XDPPCH_HOOK3 XDP_DBRESET_L

XDP_PCH_TDO

XDP_PCH_S5_PWRGD

PCH_GPIO36_SATA2GP

PCH_GPIO14_OC7_L

PCH_GPIO10_OC6_L

XDP_PCH_ENET_PWR_EN

NC_TP_XDP_PCH_OBSFN_B<1>

XDP_PCH_USB_HUB_SOFT_RST_L

XDP_PCH_GPIO46

CPU_PWRGD

XDP_BPM_L<7>

SMBUS_PCH_DATA

XDP_CPU_CLK100M_N

XDP_CPU_TDI

NC_TP_XDP_PCH_HOOK5

NC_TP_XDP_PCH_HOOK4

CPU_CFG<16>

XDP_CPURST_L

XDP_VR_READY

PP3V3_S0

PM_PCH_SYS_PWROK

PM_PWRBTN_L

CPU_CFG<15>

XDP_BPM_L<6>

XDP_BPM_L<4>

XDP_FW_CLKREQ_L

NC_TP_XDP_PCH_OBSFN_D<0>

XDP_AP_CLKREQ_L

SMC_IG_THROTTLE_L

ENET_LOW_PWR

XDP_PCH_AUD_IPHS_SWITCH_EN

JTAG_ISP_TCK

NC_TP_XDP_PCH_OBSFN_D<1>

SATARDRVR_EN

DP_AUXCH_ISOL

PP3V3_S5

XDP_PCH_ISOLATE_CPU_MEM_L

PP1V05_SUS

XDP_BPM_L<1>

XDP_CPU_PREQ_L

2

6

6

67910121416172022233640456870

73

102378

102378

102378

102378

102378

78

6

6

1623

1623

1623

1623

6

6

6

6

6

6

6

6

78

6

6

78

678121617181920222627293336374041424648

49505152545761627172

7374757785

6

6

6

6

6

6781719202224263046

56667273747685

6

2 1345678



G

D

SG

D

S

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

VDD33

P L L F I L T

C R F I L T

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

XTALIN/CLKIN

XTALOUT

TEST

RESET*

THRM_PAD

USBDP_UP

NC

OSC3*

OCS1*

OCS2*

USBDM_UP

RBIAS

VBUS_DET

NC

NC

NC

USBDP_DN3/PRT_DIS_P3

USBDM_DN3/PRT_DIS_M3





PRTPWR3/BC_EN3*

PRTPWR1/BC_EN1*

PRTPWR2/BC_EN2*

SYM VER 1

VDD33

P L L F I L T

C R F I L T

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

XTALIN/CLKIN

XTALOUT

TEST

RESET*

THRM_PAD

USBDP_UP

NC

OSC3*

OCS1*OCS2*

USBDM_UP

RBIAS

VBUS_DET

NC

NC

NC







PRTPWR3/BC_EN3*

PRTPWR1/BC_EN1*

PRTPWR2/BC_EN2*

SYM VER 1

BI

BI

CRITICAL BOMPART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

BOM OPTIONSBOM GROUP






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

1 0 Port 1 and 2 are non removable

BOM TABLE

0 0 All ports are removable

NON_REM1 NON_REM0 DESCRIPTION

0 1 Port 1 is non removable

SD Card/Express Card

IPU

IPU

IPU

IPU

IPU

IPU

Trackpad/Keyboard

External A

IPU

IPU

Bluetooth

1 1 Port 1, 2, and 3 are non removable

External B

T29

External C

IR Receiver

10K

1/16WMF-LF

402

5%

R26411

2

2N7002DW-X-GSOT-363

Q2640

3

5

4

MF-LF

1/16W

20K

5%

402

R2640

1 2

2N7002DW-X-GSOT-363

Q2640

6

2

1

NOSTUFF

100PF

402

CERM

50V5%

C26411

2

0.47UF

CERM-X5R402

6.3V10%

C26401

2

18PF

402

CERM

50V5%

CRITICAL

C2619 1

2

1M

1/16WMF-LF

5%

CRITICAL

402

R2630

1 2

5X3.2X1.4-SM

CRITICAL

24.000M-60PPM-16PF

Y2600

1 2

402

5%50V

CERM

18PF

CRITICAL

C26201

2

4.7UF

603X5R

6.3V20%

BYPASS=U2600.23::5mm

C2607 1

2

1M

1/16W

MF-LF

5%

CRITICAL

402

R2680

1 2

CRITICAL

12K1%

MF

1/16W

402

R26001

2

8 80

8 80

43 80

18 80

18 80

43 80

44 80

44 80

0.1UF

16V10%

402X7R-CERM

C26151

2X5R402

10%16V

1UFC26161

2

10K

402

5%1/16W

MF-LF

R26201

2

X7R-CERM

402

10%16V

0.1UF

C26171

2

402

X5R

10%1UF

16V

C26181

2

X7R-CERM

16V10%

402

0.1UF


C2608 1

2

4.7UF

6.3VX5R

20%

603

BYPASS=U2600.5::5mm

C2602 1

2

402

10%16V

X7R-CERM

0.1UF

BYPASS=U2600.5::2mm

C2609 1

2


402

0.1UF

X7R-CERM

16V10%

C2610 1

2

X7R-CERM

402

0.1UF

16V10%


C2603 1

2

1823

100K5%

1/16W

402

MF-LF

R26421

2

8

43

402

100

1/16W5%

MF-LF

R2605

1 2

BAT54XV2T1

SOD-523

D2600

12

402

10K5%

1/16W

MF-LF

R26061

2

10K5%

402

1/16W

MF-LF

R26071

2

MF-LF1/16W

10K

402

5%

HUB1_NONREM0_0

R26041

2

402

HUB1_NONREM0_1

10K5%

MF-LF

1/16W

R26031

2

5%

10K

402

MF-LF

1/16W

HUB1_NONREM1_1

R26011

2

1/16W

HUB1_NONREM1_0

402

5%

MF-LF

10K

R26021

2

X5R

16V10%1UF

402

C26681

2

402

10%16V

X7R-CERM

0.1UF

C26671

2

1UF

16V10%

402

X5R

C26661

2

402

0.1UF

16V10%

X7R-CERM

C26651

2

X7R-CERM16V

402

10%

0.1UF

BYPASS=U2650.5::2mm

C2660 1

2

5%

402

MF-LF

10K

1/16W

R26701

2

1/16W

CRITICAL

MF

1%

402

12K

R26501

2

18 80

18 80

16V

X7R-CERM

402

10%0.1UF


C2661 1

2

4.7UF20%6.3VX5R

603

BYPASS=U2650.5::5mm

C2652 1

2

0.1UF

X7R-CERM

402

10%16V


C2659 1

2

0.1UF

16VX7R-CERM

402

10%


C2658 1

2

4.7UF20%

603

X5R6.3V


C2657 1

2

5%

1/16W

402MF-LF

100R2655

1 2

5%50V

CERM

18PF

402

CRITICAL

C26701

2

CRITICAL

402

18PF

CERM

50V5%

C2669 1

2

5%

402

1/16WMF-LF

10KR2657

1

2

5%

1/16WMF-LF

10K

402

R26561

2

1/16W

402

5%

HUB2_NONREM0_1

MF-LF

10K

R26531

2

HUB2_NONREM1_1

5%

402MF-LF1/16W

10K

R26511

2

HUB2_NONREM0_0

MF-LF1/16W

10K

402

5%

R26541

2

HUB2_NONREM1_0

5%

402

10K

1/16WMF-LF

R26521

2

5X3.2X1.4-SM

24.000M-60PPM-16PF

CRITICAL

Y2650

1 2

53 80

53 80

6 32 80

6 32 80

8

8

43 80

43 80

8

43

QFN

USB2513B

OMIT

U2600

1 4

25

8

9

20

21

13

17

19

3 4

12

16

18

35

26

24

22

28

11

3 7

1

3

6

30

2

4

7

31

27

5 1 0

1 5

2 3

2 9

3 6

33

32

QFN

USB2513B

OMIT

U2650

1 4

25

8

9

20

21

13

17

19

3 4

12

16

18

35

26

24

22

28

11

3 7

1

3

6

30

2

4

7

31

27

5 1 0

1 5

2 3

2 9

3 6

33

32

0.1UF

X7R-CERM

402

16V10%


C2611 1

2

402

X7R-CERM16V10%

0.1UF

BYPASS=U2600.15::2mmC2612 1

2

0.1UF10%16V

X7R-CERM

402

BYPASS=U2650.15::2mmC2662 1

2

0.1UF

402

X7R-CERM

16V10%


C2653 1

2

8 80

8 80

USB HUBS

SYNC_DSYNC_MASTER=K91_MLB

U2600,U2650CRITICAL2 SMSC USX2513B338S0923 USB

HUB1_1NONREM HUB1_NONREM1_0,HUB1_NONREM0_1


338S0720 2 SMSC USB2514CRITICAL USBU2600,U2650

SMSC USB2514B338S0824 2 CRITICAL USBU2600,U2650

HUB2_ALLREM HUB2_NONREM1_0,HUB2_NONREM0_0



HUB1_ALLREM HUB1_NONREM1_0,HUB1_NONREM0_0

HUB2_NONREM1_1,HUB2_NONREM0_0HUB2_2NONREM


USB_EXTC_P

USB_T29A_N

USB_T29A_P

NC_USB_HUB1_PRTPWR2

NC_USB_HUB1_PRTPWR4

USB_HUB2_XTAL1

TP_USB_HUB1_OCS1

USB_EXTC_N

USB_EXTB_OC_L

PPUSB_HUB1_PLLFILTMIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.8V

USB_EXTB_P

USB_HUB2_TEST

USB_HUB2_CFG_SEL0

USB_HUB1_NONREM1

USB_HUB1_XTAL1

NC_USB_HUB2_PRTPWR2

NC_USB_HUB2_PRTPWR3

NC_USB_HUB2_PRTPWR4

TP_USB_HUB2_OCS1

TP_USB_HUB2_PRTPWR1

USB_BT_N

USB_BT_P

USB_TPAD_N

USB_TPAD_P

USB_EXTA_N

USB_EXTA_P

PU_USB_HUB2_PRT4_P

PU_USB_HUB2_PRT4_N

NC_USB_HUB2_OCS4

USB_HUB2_VBUS_DET

USB_HUB2_RBIAS

USB_HUB2_UP_N

NC_USB_HUB2_OCS2

USB_EXTA_OC_L

USB_HUB2_UP_P

USB_HUB_RESET_L

USB_HUB2_XTAL2

USB_HUB2_CFG_SEL1

USB_HUB2_NONREM0

TP_USB_HUB1_PRTPWR1

NC_USB_HUB1_PRTPWR3

USB_IR_N

USB_IR_P

USB_EXTB_N

NC_USB_HUB1_OCS4

USB_HUB1_VBUS_DET

USB_HUB1_RBIAS

USB_HUB1_UP_N

NC_USB_HUB1_OCS2

USB_HUB1_UP_P

USB_HUB_RESET_L

USB_HUB1_TEST

USB_HUB1_XTAL2

USB_HUB1_CFG_SEL1

USB_HUB1_CFG_SEL0

USB_HUB1_NONREM0

PP3V3_S3


PP3V3_S5

USB_HUB_RESETUSB_HUB_RE

P3V3S3_EN_RC

PPUSB_HUB2_CRFILT

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.4MM

PP3V3_S3

MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.8V

PPUSB_HUB1_CRFILT

PP3V3_S3

PPUSB_HUB2_PLLFILT


VOLTAGE=1.8V

USB_HUB2_NONREM1

PP3V3_S3

PP3V3_S3

2

24

24

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

678171920222326304656667273747685

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

67818242630313233485054557273

67818242630313233485054557273

67818242630313233485054557273

2 1345678








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

UNUSED clock terminations for FCIM MODE

10K5%

MF-LF

1/16W

402

R27571

2

10K5%

MF-LF

1/16W

402

R27511

2

10K5%

MF-LF

1/16W

402

R27521

2

10K5%

MF-LF

1/16W

402

R27531

2

10K5%

MF-LF

1/16W

402

R27541

2

10K5%

MF-LF

1/16W

402

R27551

2

10K5%

MF-LF

1/16W

402

R27561

2

SYNC_MASTER=K91_MLB

Clock (CK505)

PCH_CLK96M_DOT_P

PCH_CLK96M_DOT_N

PCH_CLK100M_SATA_P

PCH_CLK100M_SATA_N

PCIE_CLK100M_PCH_P

PCIE_CLK100M_PCH_N

PCH_CLK14P3M_REFCLK

2

1680

1680

1680

1680

1680

1680

1680

2 1345678



IN

OUT

OUT

OUT

IN

IN

OUT

IN

IN

OUT

OUT

IN

OUT

OUT

OUTIN

OUT

OUT

BI

OUT

D

G

SOUT IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

NC

NC

NC

NC

OUT

V B A T

V D D_ 2 5 M

+ V 3 . 3 A

VDDIO_25M_C

VDDIO_25M_B

VDDIO_25M_A

25MHZ_C

25MHZ_B

25MHZ_A

X1

X2

VDD_RTC_OUT

THRMGND

32KHZ_A

PAD

OUT

D

SG

IN

D

SG






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

PCH S0 PWRGD

Coin-Cell & No G3Hot: 3.3V S5

SB XTAL Power

VBAT and +V3.3A are

GreenClk 25MHz Power

Ethernet XTAL Power

Coin-Cell & G3Hot: 3.42V G3Hot

No Coin-Cell: 3.42V G3Hot (no RC)

Coin-Cell: VBAT (300-ohm & 10uF RC)

internally ORed to

available ~3.3V power

For SB RTC Power

Platform Reset Connections

Series R is R3803

Series R is R4283

VTT voltage divider on CPU page

Buffered

Unbuffered

PCH Reset Button

T29 XTAL Power

to reduce VBAT draw.

No bypass necessary

No Coin-Cell: 3.3V S5

+V3.3A should be first

create VDD_RTC_OUT.

NOTE: 30 PPM crystal required

Ethernet WAKE# Isolation

ENET_MEDIA_SENSE ISOLATION CIRCUIT

System RTC Power Source & 32kHz / 25MHz Clock Generator

102378

XDP

MF-LF

5%

0

402

1/16W

R28961 2

5%1/16W

402MF-LF

33R2883

1 2

5%

402MF-LF

33

1/16W

R2881

1 2 6

4

3

182630333640

PLACE_NEAR=U1800.H43:5.1mm 22

5%1/16WMF-LF402

R2826

1 2

5%1/16W

402

22

MF-LF

PLACE_NEAR=U1800.H49:5.1mm

R2827

1 21881

3

1/16W5%

0

MF-LF402

R2871

1 2

10V

0.1UF

CERM

20%

402

C28501

2

234573

68

6

4

MC74VHC1G08SC70-HF

U2850

3

2

1

4

5

18

2

MF-LF1/16W

402

5%

1K

XDP

R2889

1 2

402

MF-LF1/16W5%

0R2888

1 2

0.1UF

402

10V20%

CERM

C2880 1

2

1/16WMF-LF

5%100K

402

R28801

2

1K

402MF-LF

1/16W

5%

R28501

2

1

1

5%

402

22

1/16WMF-LF

PLACE_NEAR=U1800.H40:2.54MM:5.1mm

R2829

1 218

SILK_PART=SYS RESET

MF-LF1/16W

402

5%

0

OMIT

R28971

2

6

7

402

1/16W

MF-LF

5%

0R2893

1 2

10K

MF-LF

1/16W

402

5%

R28951

2

17 45

1

SOD-VESM-HF

SSM3K15FV

Q2830

3

1

2

61732 26 37

MF-LF1/16W

402

5%

10KR2830

1

2

1

1

17 23

402

5%

MF-LF1/16W

0

NO STUFF

R2863

1 2

402

CERM10V

0.1UF20%

C28601

2

3.0K

402

MF-LF1/16W5%

R2862

1 2

17 26

05%

1/16WMF-LF

PLACE_NEAR=U1800.L22:5.54mm

402

NO STUFFR2861

1

2

5%

MF-LF1/16W

402

0R2860

1 2

SC70-HFMC74VHC1G08

U2860

3

2

1

4

5

16 81

16 81

37 81

34 81

6.3V

CERM

1UF10%

402

C28101

2

10%

X5R

1UF

10V

402-1

C28021

2

1M5%

NO STUFF

MF1/20W

201

R28061

2

0.1UF10%

0201X5R-CERM

16V

C2824 1

2

0

5%

MF

1/20W

201

R2805

1 2

SM-3.2X2.5MM

25.000MHZ-12PF-30PPM

CRITICAL

Y28052

4

1

3

12PF

402

CERM

50V5%

C2805

12

402

50V

5%

12PF

CERM

C2806

1 2

SC7074LVC1G07U2880

2

31

5

4

17 26

CRITICALTQFN

SLG3NB148V

U2800

9

8

15

12

7 1 0

1 6

2

1 7

1 3

5

1

11

6

14

4

3

0.1UF10%

0201X5R-CERM

16V

C2822 1

216V

X5R-CERM0201

10%

0.1UF

C2820 1

2

16

PLACE_NEAR=U1800.N32:5mm

201

10K5%

MF

1/20W

R28191

2

SOT563

SSM6N37FEAPECRITICAL

Q28103

54

402

12K

MF-LF 1/16W

5%

R2810

1 237

201

1/20W

MF

5%

100K

R28111

2

SOT563

SSM6N37FEAPE

Q28106

21

402

0

1/16WMF-LF

5%

R28121

2

Chipset Support

SYNC_MASTER=LINDA_K90I S

PP1V8_S0

ENET_MEDIA_SENSE

ENET_MEDIA_SENSE_EN

PP1V5_S0

PP3V3_S3

ENET_MEDIA_SENSE_EN_L

ENET_MEDIA_SENSE_RDIV

ENET_WAKE_L

PP3V3_ENET

PP3V3_ENET

SMC_DELAYED_PWRGD

SYSCLK_CLK25M_X1

PPVRTC_G3H

SYSCLK_CLK32K_RTC

PP3V42_G3H

PP3V3_S5

PP3V3_T29

SYSCLK_CLK25M_T29

SYSCLK_CLK25M_ENET

SYSCLK_CLK25M_SB

SYSCLK_CLK25M_X2_R

PM_PCH_SYS_PWROK

LPC_CLK33M_SMC

PCH_CLK33M_PCIIN

LPCPLUS_RESET_LMAKE_BASE=TRUE

MAKE_BASE=TRUE

ENET_WAKE_L

PLT_RESET_L

SMC_LRESET_L

XDPPCH_PLTRST_L

BKLT_PLT_RST_L

PLT_RESET_L

PLT_RST_BUF_L

LPCPLUS_RESET_L

AP_RESET_L

LPC_CLK33M_LPCPLUS

PLT_RESET_L

PP3V3_ENET

PP3V3_S0

PM_SYSRST_LXDP_DBRESET_L

PP3V3_S0

PCH_CLK33M_PCIOUT

PCA9557D_RESET_L

SYSCLK_CLK25M_X2

PLT_RST_BUF_LMAKE_BASE=TRUE

LPC_CLK33M_LPCPLUS_R

PP3V3_S0

PLT_RESET_LMAKE_BASE=TRUE

LPC_CLK33M_SMC_R

PCIE_WAKE_L

PP3V3_S5

PP3V3_S5

PM_PCH_PWROK

PM_S0_PGOOD

SYS_PWROK_R

MAKE_BASE=TRUE

PM_PCH_PWROK

ALL_SYS_PWRGD

CPUIMVP_PGOOD

2

671417202271

7162022425771

678182430313233485054

557273

6726377173

6726377173

3645

7 16 17 20

67434546474853636473

67817192022232426304656667273747685

71619343536

2637

6 7 26 37 71 73

678121617181920222326272933363740414246

48495051525457616271

727374757785

678121617181920222326272933363740414246

48495051525457616271

727374757785

102326

678121617181920222326272933363740414246

48495051525457616271

727374757785

67817192022232426304656667273747685

6 7 8 17 19 20 22 23 24 2630 46 56 66 72 73 74 76 85

2 1345678

P N t DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)



A6

A7

A11

A5

DQ33

VDD

A10/AP

VDD

VSS

SA1

VTT

VSS

DQS4*

DQS4

VSS

DQ35

VSS

CK0*

SA0

VSS

DQ58

DQ59

DM7

VSS

DQ57

DQ56

DQ50

DQ51

VSS

DQS6*

DQS6

VSS

DQ49

DQ48

DQ43

VSS

DM5

VSS

DQ42

SDA

SCL

VTT

VSS

EVENT*

DQ62

VSS

DQ63

DQS7*

DQS7

DQ60

DQ61

VSS

VSS

DQ55

DQ54

DM6

VSS

DQ53

VSS

DQ52

DQ47

VSS

DQS5

VSS

DQ46

DQ41

VSS

DQ40

DQ34

VSS

DQ32

TEST

VDD

VDD

S1*

A13

CAS*

WE*

BA0

VDD

VDD

CK0

A1

A3

VDD

VDD

A8

A9

A12/BC*VDD

BA2

NC

VDD

CKE0

VSS

DQS5*

VSSDQ44

DQ45

DQ39

DQ38

VSS

VSS

DM4

VSS

DQ37

DQ36

VREFCA

VDD

ODT1

NC

S0*

ODT0

BA1

RAS*

VDD

CK1*

VDD

VDD

A0

CK1

A2

VDD

A4

VDD

VDD

A14

A15

CKE1

VDD

VSS

VDDSPD

KEY

( S Y M B O L

2

O F

2 )

BI

BIBI

BI

IN

BI

BI

BI

BI

BI

BI

IN

BI

IN

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

DQ16

DM3

DQ26

DQ27

DQ4

DQ31

DQ30

DQS3

DQS3*

DQ29

DQ28

DQ23

DQ22

DM2

DQ21

DQ20

DQ15

DQ14

RESET*

DM1

DQ13

DQ12

DQ7

DQ6

DQS0

DQS0*

DQ5

DQ24

DQ25

DQ19

DQ18

DQS2

DQS2*

DQ17

DQ11

DQ10

DQS1

DQS1*

DQ8

DQ9

DM0

DQ0

DQ1

VREFDQ

DQ3

DQ2VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

KEY

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

( S Y M B O L

1

O F

2 )

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

BI

BI

IN

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

NC

NC

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

Page Notes

Power aliases required by this page:

- =PP1V5_S0_MEM_A

- =PP1V5_S3_MEM_A

- =PP0V75_S0_MEM_VTT_A

- =PPSPD_S0_MEM_A (2.5 - 3.3V)

Signal aliases required by this page:

- =I2C_SODIMMA_SCL

- =I2C_SODIMMA_SDA

BOM options provided by this page:

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)

SPD ADDR=0xA0(WR)/0xA1(RD)

(NONE)

"Factory" (top) slot

516-0229

516-0229

F-RT-THB

D D R 3 - S O D I M M - D U A L - K 6

J2900

9897

107

8483

119

80

78

9695

9291

90

86

89

85

109

108

79

115

101

103

102

104

73 74

136

153

170

187

129

131

141

143

130

132

140

142

147

149

157

159

146

148

158

160

163

165

175

177

164

166

174

176

181

183

191

193

180

182

192

194

137

135

154

152

171

169

188

186

198

77

122

116

120

110

114

121

197

201 202

200

125

75 76

105 106

111 112

117 118

123 124

81 82

87 88

93 94

99 100

199

126

127 128

133 134

138

139

144

145

150

151

155 156

161 162

167 168

172

173

178

179

184

185

189 190

195 196

203 204

113

28

28

10V

20%

402

CERM

0.1UF

C29311

2

2.2UF20%

402-LF

CERM

6.3V

C29301

2

28

28

11 79

11 28 79

11 28 79

28

28

28

28

28

29 30

28

28

28

28

28

28

28

28

28

28

28

F-RT-THB

D D R 3 - S O D I M M - D U A L - K 6

CRITICAL

J290011

28

46

63

5

7

33

35

22

24

34

36

39

41

51

53

15

40

42

50

52

57

59

67

69

56

58

17

68

70

4

6

16

18

21

23

12

10

29

27

47

45

64

62

30

1 2

3

31 32

37 38

43 44

48

49

54

55

8

60

61

65 66

71 72

9

13 14

19 20

25 26

28

28

28

28

28

28

28

28

28

28

28

28

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

28

28

28

28

28

28

11 79

11 28 79

28

28

28

28

28

28

28

28

0.1UF

CERM

402

20%

10V

C29361

2CERM

2.2UF

6.3V

20%

402-LF

C29351

2

28

28

28

28

28

28

28

28

28

28

28

29 45

16 23 29 31 42 48 62 77 81

16 23 29 31 42 48 62 77 81

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

MF-LF

1/16W

402

5%

10K

R29411

2402

5%

1/16W

MF-LF

10K

R29401

2

6.3V

402-LF

CERM

20%

2.2UF

C29401

2

603

6.3VX5R

20%10UF

C29001

2

20%

603

X5R

10UF

6.3V

C29011

2

0.1UF20%10V

402CERM

C29101

210V20%

CERM402

0.1UF

C29111

2

402

10V20%

0.1UF

CERM

C29121

2

0.1UF20%10VCERM402

C29131

2

0.1UF20%

CERM402

10V

C29141

210VCERM402

20%

0.1UF

C29151

2CERM402

20%

0.1UF

10V

C29161

2CERM402

20%

0.1UF

10V

C29171

2CERM402

20%

0.1UF

10V

C29181

2CERM402

20%

0.1UF

10V

C29191

2

0.1UF

CERM402

20%10V

C29201

2CERM402

20%

0.1UF

10V

C29211

2CERM402

20%

0.1UF

10V

C29221

2CERM402

20%

0.1UF

10V

C29231

2

402X5R

1UF

10V10%

C29531

2

402X5R

1UF

10V10%

C29521

2

402X5R

1UF

10V10%

C29511

2

402X5R

1UF

10V10%

C29501

2

SYNC_MASTER=MASTER

DDR3 SO-DIMM Connecto

MEM_A_A<4>

=MEM_A_DQ<27>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<11>

MEM_A_A<5>

=MEM_A_DQ<33>

MEM_A_A<10>

MEM_A_SA<1>

=MEM_A_DQS_N<4>

=MEM_A_DQS_P<4>

=MEM_A_DQ<35>

MEM_A_CLK_N<0>

MEM_A_SA<0>

=MEM_A_DQ<58>

=MEM_A_DQ<59>

GND

=MEM_A_DQ<57>

=MEM_A_DQ<56>

=MEM_A_DQ<50>

=MEM_A_DQ<51>

=MEM_A_DQS_N<6>

=MEM_A_DQS_P<6>

=MEM_A_DQ<48>

=MEM_A_DQ<43>

=MEM_A_DQ<42>

SMBUS_PCH_CLK

=MEM_A_DQ<62>

=MEM_A_DQ<63>

=MEM_A_DQ<60>

=MEM_A_DQ<61>

=MEM_A_DQ<55>

=MEM_A_DQ<54>

GND

=MEM_A_DQ<53>

=MEM_A_DQ<52>

=MEM_A_DQ<47>

=MEM_A_DQS_P<5>

=MEM_A_DQ<46>

=MEM_A_DQ<41>

=MEM_A_DQ<40>

=MEM_A_DQ<34>

=MEM_A_DQ<32>

MEM_A_CS_L<1>

MEM_A_A<13>

MEM_A_CAS_L

MEM_A_WE_L

MEM_A_BA<0>

MEM_A_CLK_P<0>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<12>

MEM_A_BA<2>

MEM_A_CKE<0>

=MEM_A_DQS_N<5>

=MEM_A_DQ<44>

=MEM_A_DQ<45>

=MEM_A_DQ<39>

=MEM_A_DQ<38>

GND

MEM_A_DQ<37>

=MEM_A_DQ<36>

MEM_A_ODT<1>

MEM_A_CS_L<0>

MEM_A_ODT<0>

MEM_A_BA<1>

MEM_A_RAS_L

MEM_A_CLK_N<1>

MEM_A_A<0>

MEM_A_CLK_P<1>

MEM_A_A<2>

MEM_A_A<14>

MEM_A_A<15>

MEM_A_CKE<1>

PP3V3_S0

=MEM_A_DQ<16>

GND

=MEM_A_DQ<26>

=MEM_A_DQ<4>

=MEM_A_DQ<31>

=MEM_A_DQ<30>

=MEM_A_DQS_P<3>

=MEM_A_DQS_N<3>

=MEM_A_DQ<29>

=MEM_A_DQ<28>

=MEM_A_DQ<23>

=MEM_A_DQ<22>

GND

=MEM_A_DQ<21>

=MEM_A_DQ<20>

=MEM_A_DQ<15>

=MEM_A_DQ<14>

MEM_RESET_L

GND

=MEM_A_DQ<13>

=MEM_A_DQ<12>

=MEM_A_DQ<7>

=MEM_A_DQ<6>

MEM_A_DQS_P<0>

MEM_A_DQS_N<0>

=MEM_A_DQ<5>

=MEM_A_DQ<24>

=MEM_A_DQ<25>

=MEM_A_DQ<19>

=MEM_A_DQ<18>

=MEM_A_DQS_P<2>

=MEM_A_DQS_N<2>

=MEM_A_DQ<17>

=MEM_A_DQ<11>

=MEM_A_DQ<10>

=MEM_A_DQS_P<1>

=MEM_A_DQS_N<1>

=MEM_A_DQ<8>

=MEM_A_DQ<9>

GND

=MEM_A_DQ<0>

=MEM_A_DQ<1>


=MEM_A_DQ<3>

=MEM_A_DQ<2>

PP0V75_S3_MEM_VREFCA_A

PP1V5_S3

=MEM_A_DQ<49>

GND

PP0V75_S0_DDRVTT

SMBUS_PCH_DATA

MEM_EVENT_L

=MEM_A_DQS_P<7>

=MEM_A_DQS_N<7>

2

6781216171819202223262933

3637404142

4648495051525457

6162717273

74757785

931

31

6729306772

7 29 30 67

2 1345678

CPU CHANNEL B DQS 0 -> DIMM B DQS 0CPU CHANNEL A DQS 0 -> DIMM A DQS 0








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

CPU CHANNEL B DQS 7 -> DIMM B DQS 7



CPU CHANNEL A DQS 6 -> DIMM A DQS 6









NOTE: Sandybridge does not use DM signals per doc 438297 Huron River SFF DG rev1.0 Section 2.6.13



SSYNC_MASTER=ANNE_K90I

DDR3 Byte/Bit Swap

MEM_A_DQ<52>MAKE_BASE=TRUE

MAKE_BASE=TRUE

MEM_A_DQ<51>


=MEM_A_DQ<55>

=MEM_A_DQ<48>

=MEM_A_DQ<52>

MAKE_BASE=TRUE

MEM_A_DQS_P<0>MAKE_BASE=TRUE

MEM_A_DQS_N<0>

MAKE_BASE=TRUE

MEM_B_DQ<48>

MEM_B_DQS_P<3>MAKE_BASE=TRUE

MAKE_BASE=TRUE

MEM_B_DQ<31>

MAKE_BASE=TRUE

MEM_B_DQ<30>

MAKE_BASE=TRUE

MEM_B_DQ<29>

MAKE_BASE=TRUE

MEM_B_DQ<28>

MAKE_BASE=TRUE

MEM_B_DQ<27>

MEM_B_DQS_N<3>MAKE_BASE=TRUE

MAKE_BASE=TRUE

MEM_B_DQ<16>

MAKE_BASE=TRUE

MEM_B_DQ<19>MAKE_BASE=TRUE

MEM_B_DQ<20>

MAKE_BASE=TRUE

MEM_B_DQ<17>








MAKE_BASE=TRUE

MEM_B_DQS_P<1>


MAKE_BASE=TRUE

MEM_B_DQ<0>


MAKE_BASE=TRUE

MEM_B_DQS_N<0>







MAKE_BASE=TRUE

MEM_B_DQ<22>





MAKE_BASE=TRUE

MEM_B_DQ<26>

MAKE_BASE=TRUE

MEM_B_DQS_P<2>



MAKE_BASE=TRUE

MEM_B_DQ<47>MEM_A_DQ<47>MAKE_BASE=TRUE



MAKE_BASE=TRUE

MEM_B_DQ<13>

MAKE_BASE=TRUE

MEM_B_DQ<45>




MEM_A_DQS_N<6>MAKE_BASE=TRUE

MEM_A_DQS_N<7> MAKE_BASE=TRUE










MAKE_BASE=TRUE

MEM_A_DQ<40>


MAKE_BASE=TRUE

MEM_A_DQ<54>









MAKE_BASE=TRUE

MEM_A_DQS_N<5>



MAKE_BASE=TRUE

MEM_A_DQS_N<3>


MAKE_BASE=TRUE

MEM_A_DQ<17>

MAKE_BASE=TRUE

MEM_B_DQ<11>

MAKE_BASE=TRUE

MEM_B_DQ<18>

MAKE_BASE=TRUE

MEM_B_DQ<25>

MAKE_BASE=TRUE

MEM_B_DQS_N<4>

MAKE_BASE=TRUE

MEM_B_DQ<39>



MAKE_BASE=TRUE

MEM_B_DQ<37>

MAKE_BASE=TRUE



MEM_B_DQ<36>

MAKE_BASE=TRUE

MEM_B_DQ<33>

MAKE_BASE=TRUE

MEM_B_DQ<32>

MAKE_BASE=TRUE

MEM_B_DQS_P<5>

MAKE_BASE=TRUE

MEM_B_DQ<46>


MAKE_BASE=TRUE

MEM_B_DQ<43>

MAKE_BASE=TRUE

MEM_B_DQ<40>



MAKE_BASE=TRUE

MEM_B_DQS_P<6>

MAKE_BASE=TRUE

MEM_B_DQ<55>

MAKE_BASE=TRUE

MEM_B_DQ<54>

MAKE_BASE=TRUE

MEM_B_DQ<53>

MAKE_BASE=TRUE

MEM_B_DQ<52>

MAKE_BASE=TRUE

MEM_B_DQ<51>

MAKE_BASE=TRUE

MEM_B_DQ<50>

MAKE_BASE=TRUE

MEM_B_DQ<49>

MAKE_BASE=TRUE

MEM_B_DQS_P<7>MAKE_BASE=TRUEMEM_B_DQS_N<7>

MAKE_BASE=TRUE


MEM_B_DQ<63>

MAKE_BASE=TRUE


MEM_B_DQ<61>

MAKE_BASE=TRUE

MEM_B_DQ<59>

MAKE_BASE=TRUE


MEM_B_DQ<58>

MAKE_BASE=TRUE

MEM_B_DQ<56>

MAKE_BASE=TRUE

MEM_B_DQ<14>

MAKE_BASE=TRUE

MEM_B_DQ<21>

MAKE_BASE=TRUE

MEM_B_DQ<15>

MEM_B_DQS_N<2> MAKE_BASE=TRUE

MAKE_BASE=TRUE

MEM_B_DQ<12>

MAKE_BASE=TRUE

MEM_B_DQ<24>

MAKE_BASE=TRUE

MEM_B_DQS_N<5>








MAKE_BASE=TRUE


MEM_A_DQ<49>


MAKE_BASE=TRUE

MEM_A_DQ<7>

MAKE_BASE=TRUE

MEM_A_DQ<6>

MAKE_BASE=TRUE

MEM_A_DQ<5>


MAKE_BASE=TRUE

MEM_A_DQ<3>





MAKE_BASE=TRUE

MEM_A_DQS_P<1>

MAKE_BASE=TRUEMEM_A_DQS_N<2>

MAKE_BASE=TRUE

MEM_A_DQ<14>



MAKE_BASE=TRUE

MEM_A_DQ<11>



MAKE_BASE=TRUE

MEM_A_DQ<22>


MAKE_BASE=TRUE

MEM_A_DQS_P<2>

MAKE_BASE=TRUE



MEM_A_DQ<10>

MAKE_BASE=TRUE

MEM_A_DQ<15>

=MEM_A_DQ<18>

=MEM_A_DQ<16>

=MEM_A_DQ<19>

=MEM_A_DQ<20>

=MEM_A_DQ<21>

=MEM_A_DQS_P<6>

=MEM_A_DQ<51>

=MEM_A_DQ<3>

=MEM_A_DQS_N<2>

=MEM_A_DQ<23>

=MEM_A_DQ<22>

=MEM_A_DQ<11>

=MEM_A_DQ<10>

=MEM_A_DQ<12>

=MEM_A_DQ<15>

=MEM_A_DQ<14>

=MEM_A_DQ<13>

=MEM_B_DQ<25>

=MEM_B_DQ<32>

=MEM_B_DQ<35>

=MEM_B_DQ<34>

=MEM_B_DQ<26>

=MEM_B_DQS_P<3>

=MEM_B_DQ<20>

MEM_B_DQS_N<0>

=MEM_B_DQ<27>

=MEM_B_DQ<62>

=MEM_B_DQ<57>

=MEM_B_DQ<63>

=MEM_B_DQ<61>

=MEM_B_DQ<60>

=MEM_B_DQ<56>

=MEM_B_DQ<59>

=MEM_B_DQS_N<7>=MEM_B_DQS_P<7>

=MEM_B_DQ<48>

=MEM_B_DQ<50>

=MEM_B_DQ<51>

=MEM_B_DQ<49>

=MEM_B_DQ<55>

=MEM_B_DQ<54>

=MEM_B_DQS_P<6>

=MEM_B_DQS_N<6>

=MEM_B_DQ<41>

=MEM_B_DQ<43>

=MEM_B_DQS_P<5>

=MEM_B_DQS_N<5>

=MEM_B_DQ<36>

=MEM_B_DQ<37>

MEM_B_DQ<37>

=MEM_B_DQ<39>

=MEM_B_DQS_P<4>

=MEM_B_DQ<38>

=MEM_B_DQS_N<4>

=MEM_B_DQ<24>

=MEM_B_DQ<30>

=MEM_B_DQS_N<3>

=MEM_B_DQ<21>

=MEM_B_DQS_P<1>

=MEM_A_DQ<4>

=MEM_A_DQS_P<1>

=MEM_A_DQ<0>

=MEM_A_DQ<2>

=MEM_A_DQ<5>

=MEM_A_DQ<8>

=MEM_A_DQ<9>

=MEM_A_DQS_N<1>

=MEM_A_DQ<7>

=MEM_A_DQ<1>

=MEM_A_DQS_N<6>

=MEM_A_DQ<44>

=MEM_A_DQ<40>

=MEM_A_DQ<42>

=MEM_A_DQ<45>

=MEM_A_DQ<46>

=MEM_A_DQ<36>

=MEM_A_DQ<35>

=MEM_A_DQS_P<2>

=MEM_A_DQ<56>

=MEM_A_DQ<63>

=MEM_A_DQ<62>

=MEM_A_DQ<61>

=MEM_A_DQ<57>

=MEM_A_DQ<60>

=MEM_A_DQ<58>

=MEM_A_DQ<59>

=MEM_A_DQS_N<7>=MEM_A_DQS_P<7>

=MEM_A_DQ<50>

=MEM_A_DQ<49>

=MEM_A_DQ<53>

=MEM_A_DQ<47>

=MEM_A_DQ<41>

=MEM_A_DQ<43>

=MEM_A_DQS_P<5>

=MEM_A_DQS_N<5>

=MEM_A_DQ<34>

=MEM_A_DQ<33>

=MEM_A_DQ<39>

MEM_A_DQ<37>

=MEM_A_DQS_P<4>

=MEM_A_DQ<38>

=MEM_A_DQS_N<4>

=MEM_A_DQ<29>

=MEM_A_DQ<30>

=MEM_A_DQ<25>

=MEM_A_DQ<31>

=MEM_A_DQ<27>

=MEM_A_DQ<24>

=MEM_A_DQ<28>

=MEM_A_DQS_P<3>

=MEM_A_DQS_N<3>

MEM_A_DQS_N<0>

=MEM_A_DQ<17>

=MEM_A_DQ<26>

=MEM_B_DQ<31>

=MEM_B_DQ<52>

=MEM_B_DQ<53>

=MEM_B_DQ<58>

=MEM_B_DQ<42>

=MEM_B_DQ<47>

=MEM_B_DQ<45>

=MEM_B_DQ<40>

=MEM_B_DQ<44>

=MEM_B_DQ<46>

=MEM_A_DQ<32>

MEM_B_DQS_P<0>

=MEM_B_DQ<3>

MEM_A_DQS_P<0>

=MEM_B_DQ<16>

=MEM_B_DQ<19>

=MEM_B_DQ<22>

=MEM_B_DQ<17>

=MEM_B_DQ<18>

=MEM_B_DQ<23>

=MEM_B_DQS_P<2>=MEM_B_DQS_N<2>

=MEM_B_DQ<9>

=MEM_B_DQ<12>

=MEM_B_DQ<10>

=MEM_B_DQ<11>

=MEM_B_DQ<8>

=MEM_B_DQ<13>

=MEM_B_DQ<14>

=MEM_B_DQ<15>

=MEM_B_DQ<1>

=MEM_B_DQ<2>

=MEM_B_DQ<5>

=MEM_B_DQS_N<1>

=MEM_A_DQ<54>

=MEM_B_DQ<6>

=MEM_B_DQ<7>

=MEM_B_DQ<4>

=MEM_B_DQ<0>

=MEM_B_DQ<28>

=MEM_B_DQ<29>

=MEM_A_DQ<6>

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

3

1179

1179

1179 27

27

27

11272879

11272879

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

11282979

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

11282979

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

11791179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

11272879

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

11282979

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

29

29

29

29

29

29

29

11 28 29 79

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

11 28 29 79

29

29

29

29

29

29

29

29

29

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

11 27 28 79

27

27

27

27

27

27

27

27

27

27

27

27

11 27 28 79

27

27

29

29

29

29

29

29

29

29

29

29

27

11 28 29 79

29

11 27 28 79

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

27

29

29

29

29

29

29

27

2 1345678

Page Notes DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)



IN

BI

BI

BI

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

NC

NC

NC

IN

VDD

A1

A3

VDD

A5

A8

VDD

A9

VDDA12/BC*

VSS

DQ42

DQ43

DQ48

DQ49

VSS

VSS

DQ41

DQS4*

DM5

VDD

CKE1

A15

A14

VDDA11

A7

A6

VDD

A4

A2

CK1

A0

VDD

VDD

CK1*

VDD

RAS*

BA1

ODT0

S0*

NC

ODT1

VDD

VREFCA

VDD

DQ36

DQ37

VSS

DM4

VSS

VSS

DQ38

DQ39

DQ45

DQ44

VSS

DQS5*

VSS

CKE0

VDD

NC

BA2

CK0

VDD

BA0

WE*

A13

S1*

VDD

VDD

TEST

DQ33

DQ32

VSS

DQ34

DQ40

VSS

DQ46

VSS

DQS5

VSS

DQ47

DQ52

VSS

DQ53

VSS

DM6

DQ54

DQ55

VSS

VSS

DQ61

DQ60

DQS7

DQS7*

DQ63

VSS

DQ62

EVENT*

VSS

VTT

SCL

SDA

VSS

DQS6

DQS6*

VSS

DQ51

DQ50

A10/AP

VDD

CK0*

DQ35

VSS

DQS4

VSS

CAS*

VDD

DM7

VSS

DQ56

MTG PINMTG PIN

MTG PIN MTG PIN

MTG PIN MTG PIN

MTG PIN

VSS

DQ57

VTT

SA1

SA0

DQ58

VSS

DQ59

VSS

VDDSPD

MTG PIN

MTG PINS

KEY

( 2

O F

2 )

BI

BI

BI

BI

BI

BI

IN

BI

IN

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

DQ2

DQ3

VREFDQ

DQ1

DQ0

DM0

DQ9

DQ8

DQS1*

DQS1

DQ10

DQ11

DQ17

DQS2*

DQS2

DQ18

DQ19

DQ25

DQ24

DQ5

DQS0*

DQS0

DQ6

DQ7

DQ12

DQ13

DM1

RESET*

DQ14

DQ15

DQ20

DQ21

DM2

DQ22

DQ23

DQ28

DQ29

DQS3*

DQS3

DQ30

DQ31

DQ4

DQ27

DQ26

DM3

DQ16

( 1

O F

2 )

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

KEY

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

BI

BI

IN

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

Page Notes

- =PP1V5_S0_MEM_B

SPD ADDR=0xA4(WR)/0xA5(RD)

516S0806

516S0806

- =PP0V75_S0_MEM_VTT_B

- =PPSPD_S0_MEM_B (2.5 - 3.3V)

- =PP1V5_S3_MEM_B

"Expansion" (bottom) slot


- =I2C_SODIMMB_SDA


(NONE)

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)

- =I2C_SODIMMB_SCL


1179

28

28

28

27 45

16 23 27 31 42 48 62 77 81

16 23 27 31 42 48 62 77 81

0.1UF

CERM

402

20%

10V

C31311

2

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

1179

28

112879

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

2.2UF20%

6.3V

402-LF

CERM

C31301

2

1/16W

10K

402

MF-LF

5%

R3141

1

2

10K5%

402

1/16W

MF-LF

R3140

1

2

20%

CERM

402-LF

6.3V

2.2UF

C31401

2

10UF20%

X5R6.3V

603

C31001

26.3V

10UF

X5R

603

20%

C31011

2

CERM402

10V20%

0.1UF

C31101

2

0.1UF

402CERM10V20%

C31111

2CERM

0.1UF20%10V

402

C31121

2CERM402

0.1UF

10V20%

C31131

2

28

0.1UF

10V

402CERM

20%

C31141

210VCERM

0.1UF20%

402

C31151

210V

0.1UF20%

402CERM

C31161

210V

0.1UF20%

402CERM

C31171

210V

0.1UF20%

402CERM

C31181

210V

0.1UF20%

402CERM

C31191

210V20%

402CERM

0.1UF

C31201

210V

0.1UF20%

402CERM

C31211

210V

0.1UF20%

402CERM

C31221

210V

0.1UF20%

402CERM

C31231

2

28

1UF

402X5R10V10%

C31531

2

1UF

402X5R10V10%

C31521

2

402X5R

1UF

10V10%

C31511

2

402X5R

1UF

10V10%

C31501

2

11 79

D D R 3 - S O D I M M

F-RT-BGA6

J3100

9897

107

8483

119

80

78

9695

9291

90

86

89

85

109

108

79

115

101

103

102

104

73 74

136

153

170

187

129

131

141

143

130

132

140

142

147

149

157

159

146

148

158

160

163

165

175

177

164

166

174

176

181

183

191

193

180

182

192

194

137

135

154

152

171

169

188

186

198

77

122

116

120

110

114

121

197

201 202

200

125

75 76

105 106

111 112

117 118

123 124

81 82

87 88

93 94

99 100

199

126

127 128

133 134

138

139

144

145

150

151

155 156

161 162

167 168

172

173

178

179

184

185

189 190

195 196

205 206

207 208

209 210

211 212

203 204

113

11 28 79

11 28 79

28

28

28

28

28

27 30

28

28

28

28

28

28

28

28

28

28

28

28

28

CRITICAL

D D R 3 - S O D I M M

F-RT-BGA6

J310011

28

46

63

5

7

33

35

22

24

34

36

39

41

51

53

15

40

42

50

52

57

59

67

69

56

58

17

68

70

4

6

16

18

21

23

12

10

29

27

47

45

64

62

30

1 2

3

31 32

37 38

43 44

48

49

54

55

8

60

61

65 66

71 72

9

13 14

19 20

25 26

28

28

28

28

28

28

28

28

28

28

28

28

28

11 79

11 79

11 79

28

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

11 79

28

28

28

28

28

28

11 79

28

28

28

28

28

28

28

28

20%

0.1UF

10V

402

CERM

C31361

2

402-LF

20%

CERM

6.3V

2.2UF

C31351

2

28

28

28

28

28

28

28

28

SYNC_MASTER=MASTER

DDR3 SO-DIMM Connecto

PP0V75_S0_DDRVTT

=MEM_B_DQS_P<7>

=MEM_B_DQS_N<7>

PP3V3_S0

MEM_B_SA<0>

GND

=MEM_B_DQS_P<4>

=MEM_B_DQ<34>

=MEM_B_DQ<62>

=MEM_B_DQ<50>

=MEM_B_DQ<16>

GND

=MEM_B_DQ<26>

=MEM_B_DQ<27>

=MEM_B_DQ<4>

=MEM_B_DQ<31>

=MEM_B_DQ<30>

=MEM_B_DQS_P<3>

=MEM_B_DQS_N<3>

=MEM_B_DQ<29>

=MEM_B_DQ<28>

=MEM_B_DQ<23>

=MEM_B_DQ<22>

GND

=MEM_B_DQ<21>

=MEM_B_DQ<20>

=MEM_B_DQ<15>

=MEM_B_DQ<14>

MEM_RESET_L

GND

=MEM_B_DQ<12>

=MEM_B_DQ<7>

=MEM_B_DQ<6>

MEM_B_DQS_P<0>

MEM_B_DQS_N<0>

=MEM_B_DQ<5>

=MEM_B_DQ<24>

=MEM_B_DQ<25>

=MEM_B_DQ<19>

=MEM_B_DQ<18>

=MEM_B_DQS_P<2>

=MEM_B_DQS_N<2>

=MEM_B_DQ<17>

=MEM_B_DQ<11>

=MEM_B_DQ<10>

=MEM_B_DQS_P<1>

=MEM_B_DQS_N<1>

=MEM_B_DQ<8>

=MEM_B_DQ<9>

GND

=MEM_B_DQ<0>

=MEM_B_DQ<1>


=MEM_B_DQ<3>

=MEM_B_DQ<2>

=MEM_B_DQ<58>

MEM_B_SA<1>

=MEM_B_DQ<57>

=MEM_B_DQ<56>

GND

MEM_B_CAS_L

=MEM_B_DQ<35>

MEM_B_CLK_N<0>

MEM_B_A<10>

=MEM_B_DQ<51>

=MEM_B_DQS_N<6>

=MEM_B_DQS_P<6>

SMBUS_PCH_DATA

SMBUS_PCH_CLK

MEM_EVENT_L

=MEM_B_DQ<63>

=MEM_B_DQ<60>

=MEM_B_DQ<61>

=MEM_B_DQ<55>

=MEM_B_DQ<54>

GND

=MEM_B_DQ<53>

=MEM_B_DQ<52>

=MEM_B_DQ<47>

=MEM_B_DQS_P<5>

=MEM_B_DQ<46>

=MEM_B_DQ<40>

=MEM_B_DQ<32>

MEM_B_DQ<37>

MEM_B_CS_L<1>

MEM_B_A<13>

MEM_B_WE_L

MEM_B_BA<0>

MEM_B_CLK_P<0>

MEM_B_BA<2>

MEM_B_CKE<0>

=MEM_B_DQS_N<5>

=MEM_B_DQ<44>

=MEM_B_DQ<45>

=MEM_B_DQ<39>

=MEM_B_DQ<38>

GND

=MEM_B_DQ<37>

=MEM_B_DQ<36>

PP0V75_S3_MEM_VREFCA_B

MEM_B_CS_L<0>

MEM_B_BA<1>

MEM_B_CLK_N<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<11>

MEM_B_A<14>

MEM_B_A<15>

MEM_B_CKE<1>

=MEM_B_DQS_N<4>

=MEM_B_DQ<41>

=MEM_B_DQ<49>

=MEM_B_DQ<48>

=MEM_B_DQ<43>

=MEM_B_DQ<42>

MEM_B_A<12>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<5>

MEM_B_A<1>

PP1V5_S3

=MEM_B_DQ<13>

=MEM_B_DQ<59>

MEM_B_ODT<0>

MEM_B_RAS_L

MEM_B_CLK_P<1>

MEM_B_ODT<1>

MEM_B_A<3>

3

7 27 30 67

67812161718192022232627333637

404142464849

505152545761627172

7374757785

931

31

6727306772

2 1345678



IN IN

IN

OUT

OUT

D

SG

D

S G

D

SG

D

S G

D

SG

D S

G

D S

G

D

SG

OUT

IN

IN

D

SG

D

SG

IN

G

D

S

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

1 0 1 1 1 1 1 1 1

4 0 0 1 1 X 1 0 1

3 0 0 0 1 X 1 0 0

Step ISOLATE_CPU_MEM_L PLT_RESET_L PM_SLP_S3_L PM_SLP_S4_L CPU_MEM_RESET_L MEM_RESET_L MEMVTT_EN P1V5CPU_EN

0 1 1 1 1 1 CPU_MEM_RESET_L 1 1

2 0 0 1 1 1 1 0 1

The circuit below handles CPU and VTT power during S0->S3->S0 transitions, as well

ISOLATE_CPU_MEM_L GPIO state during S3<->S0 transitions determines behavior of signals.

WHEN HIGH: CPU 1.5V remains powered in S3, VTT follows S0 rails, MEM_RESET_L not isolated.

WHEN LOW: CPU 1.5V follows S0 rails, VTT ensures clean CKE transition, MEM_RESET_L isolated.

P1V5CPU_EN = (ISOLATE_CPU_MEM_L + PM_SLP_S3_L) * PM_SLP_S4_L

MEMVTT_EN = (ISOLATE_CPU_MEM_L + PLT_RST_L) * PM_SLP_S3_L

MEM_RESET_L = !ISOLATE_CPU_MEM_L + CPU_MEM_RESET_L

6 0 1 1 1 1 1 1 1

(*) CPU_MEM_RESET_L asserts due to loss of PM_MEM_PWRGD, must wait for software to clear before deasserting ISOLATE_CPU_MEM_L GPIO.

NOTE: In the event of a S3->S5 transition ISOLATE_CPU_MEM_L will still be asserted on next S5->S0

1V5 S0 "PGOOD" for CPU

MEMVTT Clamp

as isolating the CPU’s SM_DRAMRST# output from the SO-DIMMs when necessary.

PM_MEM_PWRGD pull-up to CPU VTT rail is on CPU page

75mA max load @ 0.75V

5 0 1 1 1 0 (*) 1 1 1

S0

to

S3to

S0

60mW max power

Ensures CKE signals are held low in S3

must deassert ISOLATE_CPU_MEM_L and then generate a valid reset cycle on CPU_MEM_RESET_L.

transition. Rails will power-up as if from S3, but MEM_RESET_L will not properly assert. Software

7 1 1 1 1 1 CPU_MEM_RESET_L 1 1

1923 6 17 45 73

18 26 33 36 40

1/16W5%

MF-LF

100K

402

CPUMEM_S0

R32021

2

8 30 67

CPUMEM_S0

10K

1/16W

5%

402MF-LF

R32101

2

CPUMEM_S0

100K

MF-LF402

5%1/16W

R32151

2

27 29

402

CPUMEM_S0

20K

MF-LF

5%1/16W

R32161

2

SSM6N37FEAPE

CPUMEM_S0

SOT563

Q3200 3

54

SSM6N37FEAPESOT563

CPUMEM_S0

Q32053

54

CPUMEM_S0

SOT563

SSM6N37FEAPE

Q3210 6

21

SSM6N37FEAPESOT563

CPUMEM_S0

Q32103

54

CPUMEM_S0

SSM6N37FEAPESOT563

Q3200 6

21

SOT563

SSM6N37FEAPE

CPUMEM_S0

Q3215

6

2

1

CPUMEM_S0

SSM6N37FEAPE

SOT563

Q3215

3

5

4

SSM6N37FEAPE

CPUMEM_S0

SOT563

Q3205 6

21

72

10K

1/16W5%

402MF-LF

CPUMEM_S0

R32051

2

6174573

100K5%

402MF-LF

CPUMEM_S0

1/16W

R32011

2

83067

SSM6N37FEAPE

CPUMEM_S0

SOT563

Q3250 3

54

1/16WMF-LF

5%

100K

402

CPUMEM_S0

R32511

2

402

NO STUFF

50V

0.001UF20%

CERM

C3251 1

2

SSM6N37FEAPE

CPUMEM_S0

SOT563

Q3250 6

21

MF-LF

105%

603

1/10W

CPUMEM_S0

R3250

1

2

MF-LF

1/16W

5%

402

0

CPUMEM_S3

R3217

1 2

1030

MF-LF

1%

33.2K

402

1/16W

R32211

2

402

27.4K1%

1/16WMF-LF

R32201

2

SOT-563

DMB53D0UV

CRITICAL

Q32205

3

4

MF-LF

1/16W5%

10K

402

R32221

2

SOT-563

CRITICAL

DMB53D0UVQ3220

6

2

1

10 17 78

0.001UF20%50V

402

NO STUFF

CERM

C3220 1

2

402

16V

X5R

10%0.1UF

CPUMEM_S0

C32161

2


CPU Memory S3 Suppo

MAKE_BASE=TRUE

CPU_MEM_RESET_LCPU_MEM_RESET_L

MEMVTT_EN

P1V5CPU_EN

P1V5CPU_EN_L

PP0V75_S0_DDRVTT

VTTCLAMP_L

VTTCLAMP_EN

PP5V_S3

MEMVTT_EN

MEMVTT_EN_L

MEMRESET_ISOL_LS5V_L

PM_SLP_S4_L

PP1V5_S3RS0

PP3V3_S5

PM_MEM_PWRGD_L

PM_MEM_PWRGD

PM_SLP_S3_L

P1V5_S0_DIV

PLT_RESET_L

PP3V3_S3

MEM_RESET_L

PP1V5_S3

ISOLATE_CPU_MEM_L

PP5V_S3

3

1030

7272967

6730324243444657596061666772

67101215727385

678171920222324264656667273747685

678182426313233485054557273

6 7 27 29 67 72

6730324243444657596061666772

2 1345678

NOTE: Must not enable more than two SO-DIMM margining



OUT

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

IN

RESET*

A0

A1

A2

SCL

SDA

P0

P1

P2

P5

P6

P7

P3

P4

THRM

VCC

GNDPAD

NC

NC

IN

BI

VDD

VOUTD

VOUTC

VOUTB

VOUTASCL

SDA

A0

A1

GND

IN

BI







36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

1.51mV / step @ output

+6.0mA - -5.0mA (- = sourced)

0.000V - 3.300V (0x00 - 0xFF)

GPU Frame Buffer (1.8V, 70% VRef)

D

1.267V (DAC: 0x8B)

1.056V - 1.442V (+/- 180mV)


+33uA - -33uA (- = sourced)

0.000V - 1.501V (0x00 - 0x74)

1.998V - 1.002V (+/- 498mV)

1.5V (DAC: 0x3A)

5


NOTE: Margining will be disabled across all

Required zero ohm resistors when no VREF margining circuit stuffed

Addr=0x98(WR)/0x99(RD)

MEM B VREF CA

C

both at the same time!

NOTE: MEMVREG and FRAMEBUF share

a DAC output, cannot enable

0.000V - 1.501V (0x00 - 0x74)

+3.4mA - -3.4mA (- = sourced)

(OD)

watchdog will disable margining.

10mA max load


VREFMRGN_NOT - Bypasses VREF Margining

VREFMRGN - Stuffs VREF Margining


Page Notes

- =PPVTT_S3_DDR_BUF

Circuitry.

Circuitry.

- =I2C_PCA9557D_SDA

- =I2C_PCA9557D_SCL

- =I2C_VREFDACS_SDA

- =I2C_VREFDACS_SCL

- =PP3V3_S3_VREFMRGN

4

MEM A VREF CA

3

C


0.300V - 1.200V (+/- 450mV)

MEM B VREF DQ

A

1 2

B

Margined target:

VRef current:

DAC step size:

DAC range:

PCA9557D Pin:

DAC Channel: D

MEM VREG

buffers at once or VRef source may be overloaded.

0.75V (DAC: 0x3A)

6

soft-resets and sleep/wake cycles.

RST* on ’platform reset’ so that system

Addr=0x30(WR)/0x31(RD)

Nominal value

MEM A VREF DQ

67

VREFMRGN

0.1UF

CERM402

20%10V

C3302 1

2

PLACE_NEAR=R7315.2:1mm

MF-LF402

1%1/16W

VREFMRGN

33.2KR3314

1 2

402

5%

MF-LF1/16W

100K

VREFMRGN

R33131

2

VREFMRGN

5%

1/16WMF-LF

402

100K

R33151

2

VREFMRGN

MAX4253UCSP

U3302

C3

C2

C1

C4

B1

B4

VREFMRGN

UCSPMAX4253U3303

A3

A2

A1

A4

B1

B4

MAX4253UCSP

VREFMRGN

U3302

A3

A2

A1

A4

B1

B4

UCSPMAX4253

VREFMRGN

U3303

C3

C2

C1

C4

B1

B4

VREFMRGN

UCSPMAX4253U3304

A3

A2

A1

A4

B1

B4

UCSPMAX4253

VREFMRGN

U3304

C3

C2

C1

C4

B1

B4

PLACE_NEAR=J2900.126:2.54mm

1/16W1%

402

MF-LF

200

VREFMRGN

R3309

1 2

PLACE_NEAR=J3100.126:2.54mm200

MF-LF402

1%1/16W

VREFMRGN

R3311

1 2

SHORT

NONE402

NONENONE

OMIT

R3318

1 2

NONE

402NONE

SHORT

OMIT

NONE

R3319

1 2

26

200

MF-LF402

1%

1/16W

VREFMRGN


R3303

1 2

133

PLACE_NEAR=R3303.2:1mm1/16W1%

402MF-LF

VREFMRGN

R3304

1 2

VREFMRGN

200

MF-LF402

1%

1/16W


R3305

1 2

133


VREFMRGN

1/16W1%

MF-LF402

R3306

1 2

5%1/16WMF-LF

402

VREFMRGN

100K

R33021

2

MF-LF1/16W

5%

100K

402

VREFMRGN

R33011

2

133


VREFMRGN

MF-LF

402

1%1/16W

R3310

1 2

402

MF-LF1/16W5%

100K

VREFMRGN

R33071

2

PCA9557QFN

VREFMRGN

CRITICAL

U3301

3

4

5

8

6

7

9

10

11

12

13

14

15

1

2

1 7

1 6

10V

VREFMRGN

0.1UF

CERM402

20%

C3304 1

2

133

MF-LF

402

1%1/16W


VREFMRGN

R3312

1 2

MF-LF

402

100K5%1/16W

VREFMRGN

R33081

2

16232729314248627781

16232729314248627781

CRITICAL

MSOP

VREFMRGN

D A C 5 5 7 4

U3300

9

10

3

6

7

8

1

2

4

5

16232729314248627781

16232729314248627781

10V20%

402CERM

0.1UF

VREFMRGN

C33011

26.3V20%

402-LFCERM

2.2UF

VREFMRGN

C3300 1

2

CERM

20%0.1UF

402

10V

VREFMRGN

C3305 1

2

VREFMRGN

402CERM

20%10V

0.1UFC3303 1

2


FSB/DDR3/FRAMEBUF Vref Marg

VREFMRGN_NOTRES,MTL FILM,0,5%,0402,SM,LF116S0004 2 R3309,R3311

116S0004 RES,MTL FILM,0,5%,0402,SM,LF2 VREFMRGN_NOTR3303,R3305

VREFMRGN_CA_SODIMMB_BUF

VREFMRGN_DQ_SODIMMA_BUF

DDRREG_FB

SMBUS_PCH_DATA

SMBUS_PCH_CLK

SMBUS_PCH_DATA

PCA9557D_RESET_L

SMBUS_PCH_CLK

VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_DQ_SODIMMA_EN

VREFMRGN_SODIMMB_DQ

VREFMRGN_SODIMMA_DQ

VREFMRGN_MEMVREG_BUF

VREFMRGN_FRAMEBUF_EN

VREFMRGN_FRAMEBUF_BUF

VREFMRGN_MEMVREG_FBVREF

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.3 mm

PP3V3_S3_VREFMRGN_DAC


PP3V3_S3_VREFMRGN_CTRL

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.3 mm

VOLTAGE=0.75V



VOLTAGE=0.75V



PP0V75_S3_MEM_VREFCA_AMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.75V

PP0V75_S3_MEM_VREFCA_BMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.75V

PPVTTDDR_S3

VREFMRGN_DQ_SODIMMB_BUF

VREFMRGN_CA_SODIMMA_EN

VREFMRGN_MEMVREG_EN

VREFMRGN_CA_SODIMMB_EN

VREFMRGN_SODIMMS_CA

PP3V3_S3

VREFMRGN_CA_SODIMMA_BUF

3

9 27

9 29

27

29

767

678182426303233485054557273

IN

2 1345678

16 81


0 1UF

C34311 2

0.6NH+/-0.1NH-0.85AOMIT L3470

1 2

PCIE AP R2D C PPCIE AP R2D PI P81



BI

BI

IN

BI

SYM_VER-1

IN

IN

OUT

RESET*

OUT

EN

MR*

GNDTHRM

IN

VDD

SENSE +-

PAD

(OD)

0.7V

DLY

IN

IN

S

G

D

IN

IN

BI

BI

SYM_VER-1

BI

IN

OUT

OUT

OUT

OUT







36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

AIRPORT

206 mA nominal max

LOADING

MOSFET

275 mA peak

ALS

CAMERA

518S0815

20-30 MOHM @2.5V

0.727 A (EDP)

TPCP8102

P-TYPE

3V S3 WLAN FET

CHANNEL

RDS(ON)

Supervisor & CLKFREG # ISolation

Delay = 60 ms +/- 20%

155S0367

606 MA NOMINAL MAX

BLUETOOTH

516S0582

727 MA PEAK

FERR-120-OHM-1.5A

0402-LF

PLACE_NEAR=J3402.6:2.54MM

L3408

12

CERM

20%10V

402

0.1uF

C34521

218 80

18 80

6 45 48 54 55 84

6 45 48 54 55 84

CRITICAL

90-OHM

DLP0NS

PLACE_NEAR=J3402.2:2.54MM

L3407

1 2

34

F-RT-SM1819Q-3506-K281

CRITICAL

J3402

7

8

1

23

4

5

6

MF-LF

5%

10K

1/16W

402

R34511

2

402MF-LF

1/16W

33K

5%

R3450

1 2

26

18 73

16 23

20%10V

0.1uF

CERM

402

C34401

2

CRITICAL

TDFN

SLG4AP016V

U3440

6

5

7

3

8

4

2

9

1

402MF-LF

1/16W

1%

232K

R34541

2

100K1%

402

MF-LF

1/16W

R34531

2

402

MF-LF

1/16W

1%

100K

R34551

2

16 81

16 810201X5R-CERM

0.1UF

1 0% 1 6V

0201

0.1UF

1 0% 1 6V


X5R-CERM

C3430

1 20201

OMIT

0201

0.6NH+/-0.1NH-0.85AL3471

1 2

0.033UF

16V

X5R

402

10%

C3451 1

2

CRITICAL

TPCP8102

23V1K-SM

Q3450

5

6

7

8

4

1

2

3

16V

X5R

402-1

0.1UF

10%

C3450

1 2

PLACE_NEAR=Q3450.6:2.54mm

10V

20%

805

10UF

X5R

C34201

2CERM

10V

20%

402

0.1uF

C3421 1

2

FERR-120-OHM-3A

0603

L3404

1 2

10V

20%

CERM

402

0.1uF


C3422 1

2

16 81

16 81

6 24 80

6 24 80

90-OHM-100MA

DLP11S


CRITICAL

L3401

1 2

34

0402-LF


FERR-120-OHM-1.5A

L3406

12

CERM

0.01UF

16V

402

10%

C34321

2

6 45 48 51 84

6 45 48 51 84

45 46

6 17 26

0

5% MF-LF 4021/16W

R34001 2

0

5% 1/16W MF-LF 402

R3401

1 2

0

5% 1/16W MF-LF 402

R3402

1 2

500913-0302F-ST-SM

CRITICAL

J3401

1

10

1112

1314

1516

1718

19

2

20

2122

2324

2526

2728

29

3

30

3132

3334

4

56

78

9

OMIT

0201

0.6NH+/-0.1NH-0.85AL3472

1 2

0201

10%

0.1UF

X5R-CERM

16V

NOSTUFFC3475 1

2

OMIT 0.6NH+/-0.1NH-0.85A

0201

L3473

1 2

X5R-CERM

0.1UF10%

0201

16V

NOSTUFFC3477 1

2

16V

X5R-CERM

0201

10%

0.1UF

NOSTUFFC3474 1

2

0201

16V

X5R-CERM

0.1UF10%

NOSTUFF

C3476 1

2

16 81

16 81

201

1.0PF+/-0.1PF25VC0G

NOSTUFF C34701

2

201

1.0PF25VC0G

+/-0.1PF

NOSTUFF C34711

2

201

+/-0.1PF25VC0G

1.0PFNOSTUFF C34721

2 C0G25V+/-0.1PF1.0PF

201

NOSTUFF C34731

2

RES, 0ohm, 0201117S0002 4 L3470,L3471,L3472,L3473


X19/ALS/CAMERA CONNEC

PCIE_AP_R2D_PI_N

PCIE_AP_R2D_N

PCIE_AP_R2D_P

PCIE_AP_D2R_PI_P

PCIE_AP_D2R_PI_N

PCIE_AP_D2R_P

SMBUS_SMC_0_S0_SDA

PP3V3_WLAN_F

AP_CLKREQ_Q_L

PCIE_CLK100M_AP_P

PCIE_WAKE_L

WIFI_EVENT_L_R

AP_TEMP_SMB_SCL_R

AP_TEMP_SMB_SDA_R

SMBUS_SMC_0_S0_SCL

WIFI_EVENT_L

PP3V3_S3

PCIE_CLK100M_AP_N

PP3V3_WLAN_F


MIN_LINE_WIDTH=1 mm

P3V3WLAN_SS

PP3V3_S3

PCIE_AP_R2D_C_P

P3V3WLAN_VMON

AP_RESET_L

AP_PWR_EN

AP_CLKREQ_L

PP3V3_S3

PM_WLAN_EN_L

USB_CAMERA_CONN_P

SMBUS_SMC_A_S3_SCL

PP5V_S3

USB_CAMERA_P

USB_CAMERA_N

PP5V_S3_ALSCAMERA_FMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mm

PCIE_AP_R2D_C_N

PCIE_CLK100M_AP_CONN_N


PP3V3_S3_BT_FMIN_LINE_WIDTH=0.5 mm

SMBUS_SMC_A_S3_SDA

USB_CAMERA_CONN_N

PCIE_CLK100M_AP_CONN_P

AP_RESET_CONN_L

USB_BT_P

USB_BT_N

MIN_LINE_WIDTH=1 mm


PP3V3_WLAN

PCIE_AP_D2R_N

PCIE_AP_R2D_PI_P

3

81

681

681

681

681

32

6

6

6

6

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

32

6 7 8 18 24 26 30 31 32 33 4850 54 55 72 73

680

6 7 30 42 43 44 46 57 59 60 6166 67 72

6

685

6

680

685

6

646

81

2 1345678



OUT

BI

BI

OUT

BI

BI

BI

IN

BI

BI

BI

OC*

OUT2

OUT1

OUT0

THRMGND

EN

IN1

IN0

PAD

VDD

WRITE_PROTECT_SW

CARD_DETECT_SW

CARD_DETECT_GND

DAT6

DAT7

DAT1

CD/DAT3

DAT2

DAT4

DAT5

VSS

VSS

CLK

CMD

DAT0

SHLD_PIN

SHLD_PIN

SHLD_PIN

SHLD_PIN

OUT

OUT

OUT

IN

IN

DET_OUT

DET_IN

RST_IN*

DET_CHNGD*

LOW_PWRRST_OUT*

VDD

THRMGND PAD

(IPU)(OD)

(OD)

DLY

X O R

LOGIC

RST






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

516-0225

(CARD INSERTED = OPEN)

MAKES THE ACTIVE-HIGH CASE UNUSABLE.

CAESAR-IV CARD DETECT IS PROGRAMMABLE, BUT A SILICON BUG

FROM SD CONN ->

SD CARD 3.3V OVERCURRENT PROTECTION CHIP WITH ACTIVE LOAD DISCHARGE

-> TO PCH GPIO

353S0004

TPS2065-1 (1.0A limit) has active load discharge so R4810 is NOSTUFF.

-> TO ENET CHIP

-> FROM PCH GPIO

regradless of RST_IN# state. Otherwise RST_OUT# follows RST_IN#

When ENET_LOW_PWR deasserts, RST_OUT# deasserts for >80ms, then asserts for 10ms

SDCONN DETECT DEBOUNCE. ENET_RESET AND DETECT-CHANGED PCH GPIO PULSE GENERATION.

SD CARD CONNECTOR

DLY block is 20ms nominal

(SDCONN_STATE_RST_L will be required with LATCH)

*** Need to confirm with SW whether LATCH is required.

3782

3782

3782

37

3782

3782

3782

3782

3782

3782

3782

DGN

CRITICAL

TPS2065-1U3500

4

1

2

3

5

6

7

8

9

603X5R6.3V20%10UFC35021

216V10%

402X7R-CERM

0.1UFC35031

2

5%

MF-LF

NOSTUFF

1/16W

402

47KR35001

2

603

6.3VX5R

20%10UFC35001

2

10%16V

402X7R-CERM

0.1UFC35011

2

0

5%1/16W

402MF-LF

R35021 2

MF-LF1/16W

402

5%10K

R35011

2

SD-CARD-K19-K24F-RT-TH

J3500

15

14

1

5

2

7

8

9

10

11

12

13

17

18

19

20

4

3

6

16

33 402MF-LF

PLACE_NEAR=U3900.26:5.1MM

1/16W5%R3561 1 2

33 1/16W5% 402MF-LF


R3571 1 2


33 MF-LF5 % 1/ 16W 4 02R3572 1 2

33 1/ 16W 4 025% MF-LF


R3573 1 2

33


402MF-LF1/16W5%R3574 1 2

33


5% 4021/16W MF-LFR3575 1 2


33 5 % 1/ 16W 4 02MF-LFR3576 1 2

1/16W33 MF-LF 4025%


R3577 1 2

33 402MF-LF1/16W5%


R3578 1 2

37 82

402

1/16WMF-LF

0

5%

R35141 2

18 23

37

X5R10V

1UF10%

402-1

C3510 1

2

192337

NOSTUFF

5%1/16WMF-LF402

10KR35101

2

402MF-LF1/16W

0

5%

R35111 21826303640

CRITICAL

SLG4AP014VTDFN

U3511

86

7

5

2

3

4

9

1

NOSTUFF

0

1/16W

402

5%

MF-LF

R35121

2

402CERM50V+/-0.25PF8.2PFC3570

1

250VCERM402

8.2PF+/-0.25PF

C35711

2

NOSTUFF

10PF5%50VCOG-CERM0201

C35721

2

47NH-1.3OHM

0402

L3500

1 2

NOSTUFF

5%50V

10PF

COG-CERM0201

C35741

2

5%

0201

NOSTUFF

10PF50VCOG-CERM

C35761

2

NOSTUFF

COG-CERM

10PF5%50V

0201

C35781

2

NOSTUFF

10PF5%50VCOG-CERM0201

C35801

2

50V5%10PF

NOSTUFF

COG-CERM0201

C35811

2

NOSTUFF

50V5%10PF

COG-CERM0201

C35791

2

NOSTUFF

10PF

COG-CERM0201

50V5%

C35771

2

NOSTUFF

50V5%10PF

COG-CERM0201

C35751

2

0201

50V5%10PF

NOSTUFF

COG-CERM

C35731

2

FERR-10-OHM-300MA

CRITICAL

0402

L3579

1 2

SD READER CONNEC

SYNC_MASTER=K91_MLB SYNC_D

PLT_RESET_L

ENET_CR_CMD SDCONN_CMD

SDCONN_CLK_L

SDCONN_DATA<2>

SDCONN_DATA<6>

ENET_CR_DETECT_L

ENET_CR_CLK

ENET_CR_DATA<1>

ENET_CR_DATA<4>

ENET_CR_DATA<7>

SDCONN_OC_L_R

PP3V3_S3

SDCONN_STATE_CHANGE

ENET_RESET_L

ENET_CR_PWREN

PP3V3_S0_SW_SD_PWR

PP3V3_S0

SDCONN_OC_L

SLG_ENET_RESET_R_LENET_LOW_PWR

SLG_ENET_RESET_L

SDCONN_DETECT


MAKE_BASE=TRUE


PP3V3_S0_SW_SD_PWR

VOLTAGE=3.3V

PP3V3_S0

SDCONN_CLK

SDCONN_DATA<0>

SDCONN_DATA<1>

SDCONN_DATA<3>

SDCONN_DATA<4>

SDCONN_DATA<5>

SDCONN_DATA<7>

SDCONN_DETECT

PP3V3_S0_SW_SD_PWR

ENET_CR_DATA<0>

ENET_CR_DATA<2>

ENET_CR_DATA<3>

ENET_CR_DATA<6>

ENET_CR_DATA<5>

SDCONN_WP

3

82

82

82

82

678182426303132485054557273

37

33

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

72 73 74 75 77 85

33

33

678121617181920222326272933363740414246

48495051525457616271

727374757785

82

82

82

82

82

82

82

33

33

PER_0_P PET_0_P

IN OUT

2 1345678

OMIT_TABLE

CRITICAL

U3600T19

V19

T21

V210.1UF

020116V10% X5R-CERMC3600 1 2

020116V10% X5R-CERM0.1UF

C3640 1 2881 8 81

PCIE T29 R2D N 0 PCIE T29 D2R C N 0

PCIE_T29_R2D_P<0>PCIE_T29_D2R_P<0>PCIE_T29_R2D_C_P<0>

PCIE_T29_D2R_C_P<0>81 81



OUT

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

IN

OUT

OUT

OUT

IN

IN

IN

OUT

IN

IN

OUT

OUT

BI

DPSNK0_ML_LANE_3P

DPSNK0_ML_LANE_3N

DPSNK0_ML_LANE_2P

DPSRC0_HOT_PLUG_DET

TEST_POINT_2

TEST_POINT_3

DPSNK0_HOT_PLUG_DET

DPSNK0_AUX_CHN

DPSNK0_AUX_CHP

DPSNK0_ML_LANE_0N

DPSNK0_ML_LANE_0P

DPSNK0_ML_LANE_1N

DPSNK0_ML_LANE_1P

DPSNK0_ML_LANE_2N

TEST_POINT_0

TEST_EN

THERM_DP

EE_CLK

EE_CS*

EE_DO

EE_DI

PCIE_CLKREQ_3*

PCIE_CLKREQ_2*

PCIE_CLKREQ_1*

PCIE_CLKREQ_0*

DPSNK1_ML_LANE_1P

DPSNK1_ML_LANE_2N

DPSNK1_ML_LANE_2P

DPSNK1_ML_LANE_3N

DPSNK1_ML_LANE_3P

DP_RES_1

DP_RES_0

DP_ATEST

DPSRC0_AUX_CHN

DPSRC0_AUX_CHP

DPSRC0_ML_LANE_0N

DPSRC0_ML_LANE_0P

DPSRC0_ML_LANE_1N

DPSRC0_ML_LANE_1P

DPSRC0_ML_LANE_2N

DPSRC0_ML_LANE_2P

DPSRC0_ML_LANE_3N

DPSRC0_ML_LANE_3P

TMU_CLK_OUT

TMU_CLK_IN

XTAL_25_IN

XTAL_25_OUT

REFCLK_100_IN_P

REFCLK_100_IN_N

TDO

TCK

TMS

TDI

PCIE_RST_3*

PCIE_RST_1*

PCIE_RST_2*

PCIE_RST_0*

RBIAS

RSENSE

PERST*

WAKE*

PER_1_P

PER_2_P

PER_3_P

MONDC0

MONOBSN

MONOBSP

MONDC1

PER_3_N

PER_2_N

PER_0_N

PET_3_P

PET_3_N

PET_2_N

PET_2_P

PET_1_P

PET_1_N

PET_0_N

TEST_POINT_1

DPSNK1_ML_LANE_0N

PER_1_N

DPSNK1_ML_LANE_0P

DPSNK1_ML_LANE_1N

DPSNK1_AUX_CHP

DPSNK1_HOT_PLUG_DET

DPSNK1_AUX_CHN

PRT0_T29T_N

PRT0_T29R_P

PRT0_T29R_N

T29_0_LSEO

T29_0_LSOE

PRT1_T29T_P

PRT1_T29T_N

PRT1_T29R_P

PRT1_T29R_N

T29_1_LSEO

T29_1_LSOE

T29_SDA

T29_SCL

PRT2_T29T_P

PRT2_T29T_N

PRT2_T29R_P

PRT2_T29R_N

T29_2_LSEO

T29_2_LSOE

PRT3_T29T_P

PRT3_T29T_N

PRT3_T29R_P

PRT3_T29R_N

T29_3_LSEO

T29_3_LSOE

PRT0_T29T_P

P O R T 2

P C I E

G E N 2

R E C E I V E

T R A N S M I T

P O R T

S

(SYM 1 OF 2)

J T A G

P O W E R

O N

R E S E T

M I S C

C L O C K S

S O U R C E

P O R T

0

D I S P L A Y

P O R T 3

P O R T 0

P O R T 1

C L K

R E Q U E S T

E E P R O M

T E S T

P O R T

S I N K

P O R T

0

S I N K

P O R T

1

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

IN

IN

IN

OUT

IN

D

VCC

THMVSS PAD

Q

C

S_L

W_L

HOLD_L

OUT

IN

OUT

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

DEBUG: For monitoring current/voltage

DEBUG: For monitoring clock

together. Other signals okay to float (TP/NC).

(T29_SPI_CS_L)

(T29_SPI_CLK)

NOTE: All unused LSOE/EO pairs should be aliased

Use B1 GND ball for THERM_DN

Not used in host mode.

(T29_SPI_MISO)(T29_SPI_MOSI)

SNK1 AC Coupling

SNK0 AC Coupling

100pF SRF > 40MHz

1/16W5%

402MF-LF

3.3KR36901

2

402

1/16W1%

MF-LF

14.0KR36851

2

402

100PF

BYPASS=U3600.Y19::2mm

5%50V

CERM

C3685 1

2

BYPASS=U3600.Y19::5.08mm

0.01UF

402CERM16V10%

C36861

2

817

817

402MF-LF1/16W5%0R36251

2

MF-LF402

100K

1/16W5%

R36321

2

75

7583

7583

75

7583

7583

7583

7583

7583

7583

8

8

8

8

8

8

8

8

8

8

402MF-LF

100K

1/16W5%

R36301

2

1/16W

402

100K

MF-LF

5%

R36311

2

5%10K

402

NO STUFF

MF-LF1/16W

R36991

2

487583

487583

T29FCBGA

Y19

Y21

AA20

W2

V1

V5

Y9

AA10

Y7AA8

Y5

AA6

Y3

AA4

U6

V7

U4

U14

V15

U12

V13

U10

V11

U8

V9

U16

W16

V3

Y11

AA12

Y13

AA14

Y15

AA16

Y17

AA18

L2

N2

P1

M1

B21

A20

M17

K17

P3

N4

M3

L4

K1

J2

K3

J4

T19

M19

P19

H19

K19

D19

F19

E6

T21

M21

P21

H21

K21

D21

F21

C2

C4

A4

A6

C6

C8

A8

A10

C10

C12

A12

A14

C14

C16

A16

A18

E16

G16

H17

E14

J6

K5

G6

H5

G4

H3

G2

H1

F5

F3

R2

T3

T1

E4

P5

N6

M5

L6

A2

R4

E2

U2

F1

P17

R16

MF-LF

5%0

402

1/16W

R36291

2

1/16WMF-LF402

5%3.3KR36931

2

1/16W5%10K

402MF-LF

R36981

2

402

5%1/16WMF-LF

10KR36231

2

MF-LF

10K

1/16W

402

5%

R36221

2

1/16W5%10K

MF-LF402

R36211

2

81783

81783

883

883

883

883

883

883

883

883

1.0K0.5%1/16WMF-LF603

R36551

2

0.1UF X5R-CERM020116V10%

C3620 1 2

883

883

883

883

883

883

883

883

CERM

10%1UF

6.3V

402

C3690 1

2

81783

81783

2011/20W MF5%10KR36512 1

8 19

16

8 19 23

8 19

1K

402

5%1/16WMF-LF

R36961

2

1%

806

402

1/16WMF-LF

R36951 2 26 81

2KX8-1.8VM95160

OMIT_TABLE

MLP

CRITICAL

U3690

6

5

7

2

1

9

8

4

3

75

75

8

8

X5R-CERM02010.1UF16V10%C3621 1 2

X5R-CERM02010.1UF16V10%

C3622 1 2

X5R-CERM02010.1UF16V10%

C3623 1 2

X5R-CERM02010.1UF16V10%

C3624 1 2

X5R-CERM02010.1UF16V10%

C3625 1 2

X5R-CERM02010.1UF16V10%

C3626 1 2

X5R-CERM02010.1UF16V10%

C3627 1 2

X5R-CERM02010.1UF16V10%

C3628 1 2

X5R-CERM02010.1UF16V10%

C3629 1 2

X5R-CERM02010.1UF16V10%

C3630 1 2

X5R-CERM02010.1UF16V10%

C3631 1 2

X5R-CERM02010.1UF16V10%

C3632 1 2

X5R-CERM02010.1UF16V10%

C3633 1 2

X5R-CERM02010.1UF16V10%

C3634 1 2

X5R-CERM02010.1UF16V10%

C3635 1 2

X5R-CERM02010.1UF16V10%

C3636 1 2

X5R-CERM02010.1UF16V10%

C3637 1 2

X5R-CERM02010.1UF16V10%

C3638 1 2

10% 16V0.1UF 0201X5R-CERM

C3639 1 2

0.1UF020116V10% X5R-CERM

C3641 1 2

10% 020116V X5R-CERM0.1UF

C3642 1 2

020116V10% X5R-CERM0.1UF

C3643 1 2

020116V10% X5R-CERM0.1UF

C3644 1 2

020116V10% X5R-CERM0.1UF

C3645 1 2

0.1UF10% 020116V X5R-CERM

C3646 1 2

10%0.1UF

X5R-CERM1 6V 0 20 1C3647 1 2

0.1UF020116V10% X5R-CERM

C3601 1 2

0.1UF020116V10% X5R-CERM

C3602 1 2

0.1UF020116V10% X5R-CERM

C3603 1 2

020116V10% X5R-CERM0.1UF

C3604 1 2

0.1UF020116V10% X5R-CERM

C3605 1 2

0.1UF020116V10% X5R-CERM

C3606 1 2

16V X5R-CERM0.1UF

10% 0201C3607 1 2

36

16 81

16 81

0.1UF

0.1UF

NO STUFF

10% 020116V X5R-CERMC3615 1 2

10% 020116V0.1UF X5R-CERM

NO STUFF

C3616 1 2

1/16W5%

3.3K

402MF-LF

R36921

2

2015% 1/20W MF0

NO STUFF

R3611 1 2

0

NO STUFF

2011/20W MF5%R3610 1 2

0.1UF

3.3K

402MF-LF

5%1/16W

R36911

2

36

881

881

881

881

881

881

881

8 81

8 81

8 81

8 81

8 81

8 81

8 81

SYNC_MASTER=T29 SYNC_D

T29 Host (1 of

T29_MONOBSN

PCIE_T29_R2D_N<3>

T29_MONOBSP

T29_MONDC1

PCIE_T29_D2R_C_P<3>

T29_RSENSE

PCIE_T29_R2D_C_N<3>

PCIE_T29_R2D_C_P<2>

PCIE_T29_R2D_C_P<3>PCIE_T29_R2D_P<3>

PCIE_T29_R2D_C_N<2>PCIE_T29_R2D_N<2>

PCIE_T29_R2D_P<2>


PCIE_T29_R2D_C_P<1>PCIE_T29_R2D_P<1>


PCIE_T29_D2R_C_N<3>PCIE_T29_D2R_N<3>

PCIE_T29_D2R_P<3>


PCIE_T29_D2R_C_P<2>PCIE_T29_D2R_P<2>


PCIE_T29_D2R_C_P<1>PCIE_T29_D2R_P<1>


DP_T29SNK1_AUXCH_P

TP_DP_T29SRC_ML_CN<1>

DP_T29SNK0_ML_P<1>

DP_T29SNK0_ML_N<1>

DP_T29SNK0_ML_P<2>

DP_T29SNK0_AUXCH_P

DP_T29SNK0_ML_N<0>

DP_T29SNK0_AUXCH_N

DP_T29SNK1_AUXCH_C_N DP_T29SNK1_AUXCH_N


DP_T29SNK1_ML_C_N<3> DP_T29SNK1_ML_N<3>

DP_T29SNK1_ML_C_P<3> DP_T29SNK1_ML_P<3>












DP_T29SNK0_ML_C_P<2>

DP_T29SNK0_ML_C_N<1>


DP_T29SNK0_ML_C_N<0>


T29_SPI_MOSI

T29_SPI_CLK

DP_T29SNK1_HPD

T29_LSOE<1>

T29_LSEO<1>

T29_PCIE_WAKE_L

DP_T29SNK0_ML_P<2>

DP_T29SRC_HPD

TP_T29_TEST_POINT_2

T29_TEST_POINT_3

DP_T29SNK0_HPD

DP_T29SNK0_AUXCH_N

DP_T29SNK0_AUXCH_P

DP_T29SNK0_ML_N<0>

DP_T29SNK0_ML_P<0>

DP_T29SNK0_ML_N<1>DP_T29SNK0_ML_P<1>

DP_T29SNK0_ML_N<2>

TP_T29_TEST_POINT_0

T29_TEST_EN

T29_THERMD_P

T29_RSVD

T29_GPIO<2>

T29_GPIO<1>

T29_CLKREQ_ISOL_L

DP_T29SNK1_ML_P<1>

DP_T29SNK1_ML_N<2>

DP_T29SNK1_ML_P<2>

DP_T29SNK1_ML_N<3>

DP_T29SNK1_ML_P<3>

T29_DP_RES

T29_DP_ATEST

TP_DP_T29SRC_AUXCH_CN

TP_DP_T29SRC_AUXCH_CP


TP_DP_T29SRC_ML_CP<0>






T29_TMU_CLK_OUT

T29_TMU_CLK_IN

SYSCLK_CLK25M_T29_R

TP_T29_XTAL25OUT

PCIE_CLK100M_T29_P

PCIE_CLK100M_T29_N

JTAG_ISP_TDO

JTAG_ISP_TCK

JTAG_T29_TMS

JTAG_ISP_TDI

TP_T29_PCIE_RESET3_L




T29_RBIAS

T29_RESET_L

T29_MONDC0

TP_T29_TEST_POINT_1

DP_T29SNK1_ML_N<0>

DP_T29SNK1_ML_P<0>

DP_T29SNK1_ML_N<1>

DP_T29SNK1_AUXCH_P

DP_T29SNK1_AUXCH_N

T29_R2D_C_N<0>

T29_D2R_P<0>

T29_D2R_N<0>

T29_LSEO<0>T29_LSOE<0>

T29_R2D_C_P<1>

T29_R2D_C_N<1>

T29_D2R_P<1>

T29_D2R_N<1>

NC_T29_R2D_CP<2>

NC_T29_R2D_CN<2>

NC_T29_D2RP<2>

NC_T29_D2RN<2>

NC_T29_R2D_CP<3>

NC_T29_R2D_CN<3>

NC_T29_D2RP<3>

NC_T29_D2RN<3>

T29_R2D_C_P<0>

DP_T29SNK0_ML_P<0>

TP_T29_MONOBSN

TP_T29_MONOBSP

SYSCLK_CLK25M_T29

TP_T29_MONDC1

PP3V3_T29TP_T29_MONDC0

PP3V3_T29

T29ROM_WP_L

T29ROM_HOLD_L

I2C_T29_SDA

I2C_T29_SCL

T29_SPI_MISO

T29_LSEO<2>T29_LSOE<2>

T29_LSOE<3>

T29_LSEO<3>

PP3V3_T29

T29_SPI_CS_L

DP_T29SNK0_ML_N<3>

DP_T29SNK0_ML_P<3>

3

81

8181

81

81

81

81

81

81

81

81

81

81

81

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

34 83

83

83

3483

3483

3483

3483

3483

3483

3483

3483

5185

3483

3483

3483

3483

3483

81

3483

3483

3483

3483

3483

34 83

7 16 19 26 34 35 36

7 16 19 26 34 35 36

83

7161926343536

83

3483

3483

2 1345678



VCC3P3_DP_RX1

VCC3P3_DP_RX1

VCC3P3_DP_TXRX

VCC3P3_DP_TXRX

VDD3P3DP_PLL

VCC3P3_DP_TXRXBIAS

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP

VSSDP_PLL

VSSDP

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0

VCC1P0_PE

VCC1P0_PE

VCC1P0_PE

VCC1P0_PE

VCC1P0_PE

VDD1P0_DP_TXRX

VDD1P0_DP_RX1

VDD1P0_DP_TXRX

VDD1P0_DP_PLL

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VSSPE

VCC1P0_PE

VCC1P0_PE

VCC3P3

VCC3P3

VCC3P3

VCC3P3_T29

VCC3P3_T29

G N D

V C C

(SYM 2 OF 2)






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

Current numbers from Vendor slide (<REDACTED> power measure 1.ppt), emailed 6/21/2010, TDP @ 90C.

0-ohms are placeholders for no

2100 mA (Single Port)

2250 mA (Dual Port)

EDP: 3000 mA

135 mA (Single-Port)

with proper values after char

152 mA (Dual-Port)

EDP: 200 mA

FERR-120-OHM-1.5A

0402

L3730

1 2

10%

402CERM

1UF

6.3V

C37121

2 CERM402

10%6.3V

1UFC37131

2

402

5%

MF-LF1/16W

0R37201 2

1UF

CERM402

10%6.3V

C37141

2

402-LF

2.2UF20%6.3VCERM

C37301

2

1UF

CERM402

10%6.3V

C37201

2

1UF

CERM402

10%6.3V

C37211

2

1UF

CERM402

10%6.3V

C37221

2

6.3V10%

402CERM

1UFC37081

26.3V20%

603X5R

10UFC3700 1

2

10UF

X5R603

20%6.3V

C3701 1

2

1UF

CERM402

10%6.3V

C3753 1

2

1UF

CERM402

10%6.3V

C3752 1

2

1UF

CERM402

10%6.3V

C3744 1

2

1UF

CERM402

10%6.3V

C3743 1

2

6.3V10%

402CERM

1UFC37091

2

402-LF

2.2UF20%

CERM6.3V

C3770 1

2

402-LF

2.2UF20%6.3VCERM

C3760 1

2

0402

FERR-120-OHM-1.5AL3770

1 2

1UF

402

10%6.3VCERM

C3751 1

2 6.3V10%

402

1UF

CERM

C3750 1

2

1/16W5%

402

0

MF-LF

R37601 2

1/16W5%

402

0

MF-LF

R37501 2

6.3V10%

402CERM

1UFC3745 1

2 X5R

10UF20%6.3V

603

C37461

2

10UF

X5R603

20%6.3V

C37471

2

CERM

1UF

402

10%6.3V

C37101

2 6.3V10%

402CERM

1UFC37111

2

T29

CRITICAL

OMIT_TABLE

FCBGA

U3600H9

H11

H13

K9

K11

K13

M9

M11

M13

H15

K15

M15

E8

E10

E12

G14

H7

M7

K7

P7

R6

P9

P11

P15

G10

G12

R14

R8

R10

R12

P13

G8

J8

N10

N12

N14

J10

J12

J14

L8

L10

L12

L14

N8

T5

T7

W10

W12

W14

Y1

AA2

T9

T11

T15

T17

V17

W4

W6

W8

T13B1

B3

C18

C20

D1

D3

D5

D7

D9

D11

D13

D15

B5

D17

E18

E20

F7

F9

F11

F13

F15

F17

G18

B7

G20

J16

J18

J20

L16

L18

L20

N16

N18

N20

B9

R18

R20

U18

U20

W18

W20

B11

B13

B15

B17

B19

CERM402

10%6.3V

1UFC37051

2

1UF

6.3V10%

402CERM

C37061

2

1UF

6.3V10%

402CERM

C37071

2

T29 Host (2 of

SYNC_DSYNC_MASTER=T29

PP3V3_T29

VOLTAGE=1.05V


PP1V05_T29_VDD_DPPLL

MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.05V

PP1V05_T29_VDD_DP

PP1V05_T29


PP3V3_T29_DPBIAS

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP3V3_T29_PLL

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mmPP3V3_T29_DP

3

7 16 19 26 34 36

736

2 1345678

( h) 1 4

Vgs(max): +/-12V

SI8409DB:

Vds(max): -30VPower aliases required by this page:

Page Notes- =PPVIN SW T29BST (8-13V Boost Input)

T29 15V Boost Regulator

T29BST:Y

CRITICAL

CRITICAL



GND

VOUT

ON

VIN

GND

VOUT

ON

VIN

OUT

OUT

IN

IN

RESET*

OUT

EN

MR*

GNDTHRM

IN

VDD

SENSE+-

PAD

(OD)

0.7V

DLY

IN

GND

VOUT

ON

VIN

IN

IN

D

G S

D

S G

D

S G

IN

S

G

D

NC

VIN

FBX

EN/UVLO

INTVCC

VC

RT

SS

SYNC

SW

SGND GND

NC

SNS1

SNS2






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

UVLO(falling) = 1.22 * (R1 + R2) / R2

UVLO(rising) = UVLO(falling) + (2uA * R1)

UVLO = 4.55V (falling), 4.95 (rising)

Load Switch

U3816.A2:

T29BST:Y - Stuffs 18V boost circuitry.

- =PP18V_T29_REG (18V Boost Output)


- =PP3V3_S0_T29PWRCTL

- =T29_CLKREQ_L

- =T29_RESET_L

- =PP1V05_T29_P1V05T29FET (1.05V FET Input)

- =PP1V05_T29_FET (1.05V FET Output)


- =PP3V3_T29_P3V3T29FET (3.3V FET Input)

- =PP3V3_T29_FET (3.3V FET Output)

<R2>

Vgs(th): -1.4V

Id(max): 3.7A @ 70C

Rds(on): 46mOhm @ 4.5V Vgs

Voltage not specified here,add property on another page.

<R1>

Max Vgs: 10V

GND inside package,

<Rb>

<Ra>

Max Curren

Supervisor & CLKREQ# Isolation

1.05V T29 Switch

Open-Drain GPIO

Platform (PCIe) Reset

Pull-up provided by SB page.

Type

Part

R(on)

Max Current = 1.7A (85C)

Max Current = 3.4A (85C)

DLY = 60 ms +/- 20%

Max Output: 2A per IC

U3810 & U3815/U3816TPS22924C

50 mOhm Max

18 mOhm Typ

3.3V T29 Switch

_S _ S ( 3 oost put)

8-13V Input

Changes required

for 2S.

Pull-up provided by SB page.

Vout = 1.6V * (1 + Ra / Rb)

no XW necessary.

SGND shorted to

Freq = 300

Vout = 18.

CRITICAL

CSPTPS22924U3810

C 1

C2

A2

B2

A1

B1

TPS22924

CRITICAL

CSP

U3815

C 1

C2

A2

B2

A1

B1

34

10K5%

MF-LF402

1/16W

R38032

1

16

402

25VX5R

10%0.1UFC3800 1

2

1826303340

34 36

6.3V10%1UF

CERM402

C3810 1

2

402CERM6.3V10%1UF

C3815 1

2

TDFN

CRITICAL

SLG4AP016VU3800

6

5

7

3

8

4

2

9

1

100K5%1/16WMF-LF402

R38071

2

19

PLACE_NEAR=U3815.B2:3 mm

CSP

CRITICAL

TPS22924U3816

C 1

C2

A2

B2

A1

B1

16

87576

T29BST:Y

402

5%

MF-LF1/16W

330KR38811

2

T29BST:Y

MF-LF402

5%1/16W

470KR38801

2

T29BST:Y

402

0.1UF

25V10%

X5R

C38801

2

T29BST:Y

SSM3K15FVSOD-VESM-HF

Q38053

12

T29BST:Y

MF-LF1/16W1%

402

73.2KR38921

2

330K5%

T29BST:Y

MF201

1/20W

R38871

2

SOT563SSM6N37FEAPE

T29BST:Y

Q38883

54

T29BST:Y

SSM6N37FEAPESOT563

Q38886

21

T29BST:Y

1/16W

402MF-LF

41.2K1%

R38941

2

T29BST:Y

0.33UF6.3VCERM-X5R402

10%

C38941

2

330K5%

T29BST:Y

MF1/20W

201

R38881

2

26 45

NO STUFF

402

5%100PF

CERM50V

C38891

2

T29BST:Y

15.8K

1/16W

402

1%

MF-LF

R38961

2

X7R-CERM

10%4.7UF50V

1206

T29BST:Y

C38951

2

T29BST:Y

10%4.7UF

1206X7R-CERM

50V

C3896 1

2

T29BST:Y

50V10%4.7UF

X7R-CERM1206

C38971

2

50V5%100PF

NO STUFF

402CERM

C38871

2

T29BST:Y

10%10VX5R

4.7UF

805

C3892 1

2

S

SI8409DBBGA

Q3880

2

3

1

4

T29BST:Y

10K1%

1/16W

402MF-LF

R38931

2

T29BST:Y

MF-LF1/16W

200K1%

402

R38911

2

T29BST:Y

10UF25V

805X5R

10%

C3890 1

2

T29BST:Y

25V10%

10UF

X5R805

C3891 1

2

T29BST:Y

PCMB063T-100MS

C C

10UH-4A-68-MOHML3895

1 2

50V

100PF5%

402

NO STUFF

CERM

C38881

2

T29BST:Y

CRITICAL

QFN

LT3957U3890

25

31

1 2

1 3

1 4

1 5

1 6

1 7

28

1

2

10

35

36

33

6

3

4 2 3

2 4

3 7

32

8 9 2 0

2 1

3 8

34

30

2 7

1/16W

402MF-LF

1%

T29BST:Y

137KR38951

2

SM

PLACE_NEAR=C3895.1:2 mm

XW3895

12

T29BST:Y

05%

MF-LF402

1/16W

R38891

2

CRITICAL

POWERDI-123

DFLS230L

T29BST:Y

D38951

2

T29BST:Y

50VX7R-CERM

4.7UF10%

1206

C3898 1

2

T29BST:Y

50VX7R402

0.001UF10%

C38991

2

T29BST:Y

50VX7R402

0.01UF10%

C38931

2


T29 Power Suppo

PP15V_T29

T29BST_VSNS

T29BST_SNS2

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPVIN_SW_T29BST

T29BST_EN_UVLO

T29BST_RT

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0V

GND_T29BST_SGND

T29BST_INTVCC

PP1V05_S0

PPBUS_G3H

PP3V3_T29

PP1V05_T29

PP3V3_S0

T29_CLKREQ_ISOL_LMAKE_BASE=TRUE

PP3V3_S0

PP1V05_T29

T29_CLKREQ_ISOL_L

T29_RESET_LT29_SW_RESET_L

PLT_RESET_L

T29_CLKREQ_L

T29_PWR_EN

PP3V3_T29

T29BST_SNS1

T29BST_VC_RC

T29BST_PWREN_L

T29BST_FBX

T29BST_BOOST

SWITCH_NODE=TRUEDIDT=TRUE


T29BST_VC

T29BST_PWREN_DIV_L

T29BST_SHDN_DIV

T29BST_SS

SMC_DELAYED_PWRGD

T29_A_HV_EN

3

7

67910121416172022234045

687073

678404950636477

7 16 19 26 34 35 36

7 35 36

678121617181920222326272933363740414246

48495051525457616271

727374757785

34 36

67812161718192022232627

2933363740

4142464849

5051525457

6162717273

74757785

7 35 36

7 16 19 26 34 35 36

2 1345678

If enabled: VDD/VDDP connect to =PP3V3_S3_ENET_PHY (add bypassing), LX connects to inductor.

Special Star routing needed on these pins. Decoupling on Pg 37.

BCM57765 ENET SR pins are internal 1.2V switching regulator. See note for SR_DISABLE below.

If disabled: Okay to float VDD, VDDP & LX pin. VFB must always connect to =PP1V2_S3_ENET_PHY.

PP1V2_S3_ENET_INTREG 6 71



IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

NC

BI

BI

BI

OUT

IN

IN

IN

OUT

VDDC

S R_ L X

P C I E_ P L L V D D L

S R_ V F B

S R_ V D D P

S R_ V D D

SCLK

SI/LINKLED*

CS*

SO

SPD100LED*/SERIAL_DO

TRAFFICLED*/SERIAL_DI

TRD0_P

TRD1_P

TRD0_N

TRD1_N

TRD2_N

TRD2_P

TRD3_N

TRD3_P

GPIO_1/CR_BUS_PWR

GPIO_0

RE*/GPIO_2

VMAIN_PRSNT

PCIE_TXD_N

PCIE_TXD_P

PCIE_RXD_N

PCIE_RXD_P

PCIE_REFCLK_N

PCIE_REFCLK_P

PERST*

CLKREQ*

WAKE*

LOW_PWR

SD_DETECT/WE*

CR_CMD/CLE

CR_CLK/RY_BY*

CR_DATA0

CR_DATA1

CR_DATA3

CR_DATA2

CR_DATA4

CR_DATA5

CR_DATA6

CE*/MS_INS*

CR_DATA7

CR_LED/ALE

XD_DETECTTHRM_PAD

XTALI

XTALO

RDAC

G P H Y_ P L L V D D L

AVDDH VDDO

X T A L V D D H

B I A S V D D H

AVDDL

SMD_DATA

SMB_CLK

CR_WP*/XD_WP*

OUT

IN

IN

OUT

IN

OUT

BI

BI

BI

IN

BI

BI

BI

BI

BI

NC

RESET*

CS*

SCK

SOWP*

SI

GND

VCC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

(IPD)

NOTE: Pull-down on SO plus internal pull-ups on

other 3 SPI pins configures ENET for the

Atmel AT45DB011D (1Mbit) ROM. If a different

ROM is used then the straps must change.

NOTE: ENETM requires SI pull-down instead of SO.

ENET 1.2V SR IS ENABLED IF SR_DISABLE is PULLed-DOWN.

NOTE: "IPx" == Programmable pull-up/down

( I P U )

LR_OUT/GPIO1 is used as a 3.3V/1.8V internal LDO out for

If PHY is always powered then alias

Internal 1.2V Switching Regulator pins.

281mA (1000base-T max power, Caesar IV)

is powered-down in S3/S5. Standard

PHY Non-Volatile Memory

BCM requests SD CR[0:7], CMD, CLK termination.

ENET supports both active-levels for WP.

Required for proper PHY operation.

ENET_CR Signals

???mA (1000base-T, Caesar V)

Must isolate from PCIe WAKE# if PHY

ROM contains MAC address, PCIe config

( I P D )

=ENET_WAKE_L to PCIE_WAKE_L.

(Required ROM size TBD)

info as well as code for Bonjour proxy.

(See note)

N-channel FET isolation suggested.

(OD)

Connect only to U3900 pin 20.

the card reader on-chip I/O.

(OD)

WAKE#

Resistor

VDD for Card Reader I/O

Control signal to light LED or control SD bus power.

No MS (Memory Stick) Insert feature needed.

LimitingCurrent

(IPD)

(OD)

(OD)

(IPD)

(IPD)

(IPU)

(IPx)

SD_DETECT can only be used active low due to errata.

( I P U )

( I P U )

o

0.1UF10%16V

402X7R-CERM

C3921 1

2

6.3V

805

10%10UF

X5R

C39351

2

4.7UF

6.3V10%

603X5R-CERM

C39251

2

FERR-600-OHM-0.5A

CRITICAL

SM

L3925

1 2

4.7UF

X5R-CERM6.3V10%

603

C39201

2

CRITICAL

FERR-600-OHM-0.5A

SM

L3920

1 2

FERR-600-OHM-0.5A

SM

CRITICAL

L3900

1 2

CRITICAL

SM


1 2

5%

402

1K

MF-LF

1/16W

R39421

2

1681

1681

3382

16

26

192333

2681

402

16V

0.1uF

X5R

10%

C3951

1 2

0.1uF

10%

16VX5R

402

C3950

1 2

0.1uF

16V

10%

X5R

402

C3956

1 2

402X5R

16V

10%

0.1uF

C3955

1 2

1.24K

1/16W1%

402MF-LF

R39651

2

1681

1681

1681

1681

38 82

38 82

38 82

38 82

38 82

38 82

38 82

38 82

1/16W

4.7K

MF-LF

5%

402

R39411

2

5%

4.7K

1/16WMF-LF

402

R39401

2

33 82

33 82

33 82

33 82

33

5%

MF-LF1/16W

402

0R3943

1 2

1/16W

NOSTUFF

MF-LF

5%

402

4.7KR3990

1

2

33 82

33

4.7UF

603

6.3V10%

X5R-CERM

C39701

2

10%

0.1UF

X7R-CERM402

16V

C39711

2

0.1UF

X7R-CERM16V10%

402

C39721

2

26

1/16W

5%

4.7K

402

MF-LF

R39101

2

OMIT

QFN-8X8

BCM57765

U3900

4 2

4 8

3 9

4 5

5 1

3 7

59

12

21

26

25

24

23

22

52

53

54

55

60

57

63

3 6

5

8

4

2 9

3 2

30

31

34

33

27

28

11

38

9

66

1

64

6

10

65

2

1 6

1 4

1 5

1 3

6 9

67

41

40

43

44

47

46

49

50

3 5

6 1

7 2 0

5 6

6 2

58

3

68

18

19

1 7

1K4021/16W5% MF-LF

R3980 1 2

8

37

37

37

37

33

SM

CRITICAL


1 2

37

37

37

37

33 82

33 82

33 82

0.1UF

X7R-CERM402

10%16V

C39101

2

33 82

33 82

0.1UF10%16V

X7R-CERM402

C3900 1

2

0.1UF

402

10%16V

X7R-CERM

C39111

2

X7R-CERM16V

402

0.1UF10%

C39901

2

10%

0.1UF

16VX7R-CERM402

C39051

2

4.7UF10%6.3VX5R-CERM603

C39301

2X7R-CERM

0.1UF

402

16V10%

C3931 1

2

CRITICAL

FERR-600-OHM-0.5A

SM

L3930

1 2

4.7UF

603

6.3V10%

X5R-CERM

C3915 1

2 X7R-CERM402

16V10%0.1UFC39161

2

SOIC-8S1

AT45DB011D

OMIT

U3990

4

7

3

2 1

8

6

5

4.7K

MF-LF402

5%1/16W

R39971

2

402X7R-CERM

16V10%

0.1UFC3936 1

2

402

16V10%

X7R-CERM

0.1UF

C3926 1

2

ETHERNET PHY (CAESA


ENET_MDI_N<1>

ENET_MDI_P<2>

ENET_MDI_N<2>

ENET_MDI_N<3>

ENET_MEDIA_SENSE

TP_BCM57765_SPD100LED_L

ENET_MDI_P<0>

ENET_CR_DATA<0>

ENET_CR_DATA<4>

ENET_CR_DATA<5>

ENET_CR_DATA<7>

ENET_MDI_P<1>

PCIE_ENET_D2R_C_P

BCM57765_WAKE_R_L

BCM57765_MOSI

BCM57765_CS_L

ENET_MDI_N<0>

ENET_CR_DATA<3>

ENET_CR_CLK

PP3V3R1V8_ENET_LR_OUT_REG

ENET_SR_VFB

ENET_SR_LX

ENET_MDI_P<3>

PP3V3_ENET

ENET_WAKE_L

PCIE_ENET_R2D_C_P

PCIE_ENET_R2D_C_N

PCIE_ENET_D2R_N

BCM57765_SCLK

BCM57765_CS_L

BCM57765_MISO

BCM57765_MOSI

PCIE_ENET_R2D_N

PCIE_CLK100M_ENET_P

ENET_RESET_L

ENET_LOW_PWR

ENET_CLKREQ_L

PCIE_ENET_D2R_P


ENET_CR_DATA<2>

ENET_CR_DATA<1>

BDM57765_SR_DISABLE

SDCONN_WP

ENET_CR_PWREN

PP3V3_ENET

PCIE_CLK100M_ENET_N

PP3V3_S0

PCIE_ENET_D2R_C_N

BCM57765_VMAIN_PRSNT

PCIE_ENET_R2D_P

SYSCLK_CLK25M_ENET

BCM57765_RDAC

PP3V3_S3_ENET_PHY_BIASVDDHMIN_LINE_WIDTH=0.4 mm

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mm

PP3V3_S3_ENET_PHY_XTALVDDHMIN_LINE_WIDTH=0.4 mm


NC_BCM57765_CE_L_MS_INS_LNO_TEST=TRUE

PP3V3_S3_ENET_PHY_AVDDH



PP1V2_ENET_PHY_AVDDLMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.2V

MAKE_BASE=TRUE


VOLTAGE=1.8V



ENET_CR_DATA<6>

TP_BCM57765_TRAFFICLED_L

BCM57765_MISO

BCM57765_SCLK

BCM57765_SMB_DATA

BCM57765_SMB_CLK

PP1V2_ENET_PHY_PCIEPLLMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm

VOLTAGE=1.2V

PP1V2_ENET_PHY_GPHYPLL


ENET_CR_DETECT_L

ENET_CR_CMD

81

37

71

71

6726377173

81

37

6726377173

678121617181920222326272933364041424648

49505152545761627172

7374757785

81

81

8

37

2 1345678

Page NotesPower aliases required by this page:

(NONE)



BI

RX

TX

BIRX

TX

BI

I O

N C

N C

I O

N C

I O

I O

N C

G N D

I O

N C

N C

I O

N C

I O

I O

N C

G N D

BI

BI

BI

BI

BI






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

sides of the boardmirrored on opposite



Transformers should be

514-0636

(NONE)

(NONE)

( )

Place one of 0.1uf cap close to each centertap pin of transformer

3782

SM

CRITICAL

TLA-6T213HF

T40001

10

11

12

2

3

4

5

6 7

8

9

402

1/16W5%75

MF-LF

R40001

2 402

1/16W5%

MF-LF

75R40011

2 402

1/16W5%

MF-LF

75R40021

2 402

1/16WMF-LF

755%

R40031

2 1000PF

CRITICAL

CERM1206

2KV10%

C4008

1 2

3782

16V

0.1UF10%

X5R-CERM0201

C40061

2

0.1UF

16V10%

X5R-CERM0201

C40041

2

0.1UF

16V10%

X5R-CERM0201

C40021

2

CRITICAL

SM

TLA-6T213HF

T40011

10

11

12

2

3

4

5

6 7

8

9

0.1UF

16V10%

X5R-CERM0201

C40001

2

3782

F-RT-THRJ45-M97-3

CRITICAL

J4000

1

10

11

12

2

3

4

5

6

7

8

9

SLP2510P8

CRITICAL

RCLAMP0524P

PLACE_NEAR=T4001.1:5mm

NOSTUFF

D4001

3

5 4 2 16 7 9 10

SLP2510P8

CRITICAL

RCLAMP0524P

PLACE_NEAR=T4000.5:5mm

NOSTUFF

D4000

3

5 4 2 16 7 9 10

3782

3782

3782

3782

3782

Ethernet Connector


ENET_MDI_N<2>

ENET_MDI_P<2>


ENET_BOB_SMITH_CAPMIN_LINE_WIDTH=0.6 mm

ENET_CTAP2

ENETCONN_N<3>

ENET_CTAP3

ENET_MDI_N<3>

ENET_CTAP1

ENET_CTAP0

ENETCONN_CTAP

ENETCONN_N<2>

ENETCONN_P<3>

ENETCONN_P<2>

ENET_MDI_P<3>

ENETCONN_P<1>

ENETCONN_N<1>

ENET_MDI_P<1>

ENET_MDI_N<1>

ENET_MDI_N<0>

ENET_MDI_P<0>

ENETCONN_N<0>

ENETCONN_P<0>

4

85

85

85

85

85

85

85

85

2 1345678

138 mA7 mA I/O

PP3V3_FW_FWPHY 7 39 40 41



DS2

ATBUSH

ATBUSN

VP25

OCR_CTL_V10

VAUX_DETECT

TMS

TCK

REFCLKN

PCIE_TXD0P

TRST*

ATBUSB

TDI

DS1

TPA0N

TPA0P

AVREG

CE

CLKREQN

FW_RESET*

FW620*

JASI_EN

MODE_A

NAND_TREE

OCR_CTL_V12

PCIE_RXD0N

PCIE_RXD0P

PCIE_TXD0N

PERST*

R0

REFCLKP

REGCLT

REXT

SCIFCLK

SCIFDAIN

SCIFDOUT

SCIFMC

SCL

SDA

SE

SM

TDO

TPA1N

TPA2N

TPA2P

TPB0N

TPB0P

TPB1N

TPB1P

TPB2N

TPB2P

TPBIAS0

TPBIAS1

TPBIAS2

TPCPS

VAUX_DISABLE

VBUF

VDDH VP VREG_PWR

WAKE*

XI

XO

DS0

TPA1P

VDD33VDD10

VREG_VSSVSS

SERIAL EEPROM

MISCELLANEOUS

CONTROLLER

POWER MANAGEMENT

TEST CONTROLLER

PCI EXPRESS PHY

CHIP RESET

SCIF

1394 PHY

NC

NC

NC

NC

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

NC

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

135 mA

114 mA FireWire PHY

(IPD) NT-2

17 mA PCIe SerDes

0 mA VReg PWR

1394B physical plug detect.

(OD)

(OD)

NT-12 (IPD)

(IPD)

(IPD) NT-1

(IPU)

(IPD)

(IPD)

(IPD) NT-11

NT-15 (IPD)

NT-14 (IPD)

NT-16 (IPD)

(IPD) NT-4

(IPD) NT-3

25 mA PCIe SerDes

NT-7

NT-6

NT-5

NT-OUT

(Reserved)

NT-9

(IPU) NT-8

NOTE: NT-xx notes show

NAND tree order.

NT-17

(IPU)

NT-19 (IPU)

NT-10 (IPD)

FIXME!!! - TYPO IN SYMBOL REGCTL

NT-20 (IPU)

NT-21 (IPU)

NT-13

- TP (or NC) PME#

- Gate CLKREQ# based on PHY power

isolated for systems that us

NOTE: FW_PME_L and FW_CLKREQ_L are

- Alias both signals to drop = pre

NT-18 (IPU)

WITH PLUG DETECT:

WITHOUT PLUG DETECT:

110 mA Digital Core

402

MF-LF

1/16W1%

191

R41701

2

10%

402

6.3V

0.33UF

CERM-X5R

C41621

2

470K

MF-LF402

5%1/16W

R41621

2

FW643E

CRITICAL

BGA

OMIT

U4100

B13

A13

A11

A10

L13

L2

F12

E12

E13

D12

K13

D1

J2

K1

J12

J13

N8

N7

N5

N6

N4

B11

N9

N10

D13

L8

G2

G1

H1

F2

N12

M11

M13

N13

M4

N2

M1

M3

B8

A8

B5

A5

B3

A3

B9

A9

B6

A6

B4

A4

B7

C3

A2

B10

N1

E1

D2

H13

A 1

B 1

M 1 2

N 3

N 1 1

B 1 2

C 1 3

E 2

E 1 0

H 2

H 1 2

K 2

L 1

C 1

C 1 2

F 1

G 1 2

J 1

L 3

L 1 1

M 2

A 1 2

D 5

D 6

D 8

L 5

L 1 0

L 6

L 9

K 1 2

L 1 2

B 2

D 4

F 7

F 8

F 1 0

G 4

G 6

G 7

G 8

G 1 0

H 4

H 6

D 7

H 7

H 8

H 1 0

J 4

J 5

J 9

J 1 0

K 4

K 5

K 7

D 9

K 8

K 9

L 7

K 6

K 1 0

D 1 0

E 4

E 5

E 9

F 4

F 6

C2

G13

F13

402

50V

5%

22PF

CERM

C4151

1 2

402CERM

22PF

5%50V

C4150

1 2

402

1/16WMF-LF

200K1%

R41601

2

412

MF-LF

1%1/16W

402

R4150

1 2

402

1/16W

5%

MF-LF

10K

R41631

2

402

5%

MF-LF

10K

1/16W

R41641

2

402

10K

MF-LF

5%1/16W

FW643_LDO

R41651

2402

1/16W5%

MF-LF

10K

R41661

2

10%1UF

402

6.3VCERM

C4130 1

2

10%1UF

402

6.3VCERM

C4131 1

2

10%

1UF

402

6.3VCERM

C41001

2

10%

1UF

402

6.3VCERM

C41011

2

10%

402

6.3VCERM

1UF

C4132 1

2

10%

1UF

6.3VCERM402

C41021

2

10%

1UF

402

6.3VCERM

C41031

2

10%

1UF

402

6.3VCERM

C4135 1

2

10%

1UF

402

6.3VCERM

C4136 1

2

10%

1UF

402

6.3VCERM

C41041

2

10%

1UF

402

6.3VCERM

C41101

2

10%

1UF

402

6.3VCERM

C41051

2

10%

1UF

402

6.3VCERM

C41061

2

10%1UF

402

6.3VCERM

C4120 1

2

402

10%1UF

6.3VCERM

C4121 1

2

10%1UF

402

6.3VCERM

C4122 1

2

10%1UF

402

6.3VCERM

C4123 1

2

10%1UF

402

6.3VCERM

C4124 1

2

0.1UF

10V20%

CERM402

C4141 1

2

10%

1UF

402

6.3VCERM

C41111

2

1UF

CERM6.3V

402

10%

C41401

2

16 81

16 81

16 81

16 81

16 81

16 81

8 40

40

MF-LF

2.94K

402

1/16W1%

R41611

2

41

41

41

4182

64182

4182

4182

641

641

64182

64182

4182

4182

641

641

41

4041

641

120-OHM-0.3A-EMI

0402-LF

L4130

1 2

0402-LF

120-OHM-0.3A-EMIL4135

1 2

40

120-OHM-0.3A-EMI

0402-LF

L4110

1 2

CRITICAL

SM-3.2X2.5MM

24.576MHZ

Y41502

4

1

3

PLACEMENT_NOTE=Place C4170 close to U1400

10% 402X5R16V0.1UF

C4170 1 2


10%0.1UF 402X5R16V

C4171 1 2


10%0.1UF 402X5R16V

C4175 1 2


10% 402X5R16V0.1UF

C4176 1 2

SSYNC_MASTER=T27_MLB

FireWire LLC/PHY (FW6

PP1V0_FW_FWPHY_AVDDMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.0V VOLTAGE=3.3V


PP3V3_FW_FWPHY_VP25

VOLTAGE=3.3V


PP3V3_FW_FWPHY_VDDA

FW_PORT1_TPB_N

FW643_R0

FW643_TPCPS

FW_CLK24P576M_XO_R

PPVP_FW_CPS

NC_FW643_TCK

NC_FW643_TDI

NC_FW643_VBUF

TP_FW643_JASI_EN

FW643_REXT

TP_FW643_SCIFDAIN

NC_FW643_TMS

FW643_TRST_L

FW643_WAKE_L

FW643_REGCTL

FW643_VAUX_DETECT

TP_FW643_VAUX_ENABLE

FW643_SCL

FW_RESET_L

FW643_PU_RST_L

NC_FW0_TPAN

NC_FW0_TPAP

NC_FW0_TPBP

FW_P1_TPBIAS

FWPHY_DS1

PP3V3_FW_FWPHY

FWPHY_DS0

FWPHY_DS2

NC_FW2_TPBIAS

NC_FW0_TPBIAS

NC_FW2_TPBP

NC_FW2_TPBN

FW_PORT1_TPB_P

NC_FW0_TPBN

NC_FW2_TPAP

NC_FW2_TPAN

FW_PORT1_TPA_N

FW_PORT1_TPA_PTP_FW643_TDO

NC_FW643_SM

TP_FW643_SE

NC_FW643_SDA

TP_FW643_SCIFDOUT

PCIE_CLK100M_FW_P

TP_FW643_NAND_TREE

TP_FW643_MODE_A

NC_FW643_FW620_L

TP_FW643_CE

NC_FW643_AVREG

PCIE_CLK100M_FW_N

NC_FW643_OCR10_CTL

FW_CLK24P576M_XOTP_FW643_SCIFMC

FW_CLKREQ_PHY_L

TP_FW643_SCIFCLK

PCIE_FW_R2D_P

PCIE_FW_R2D_C_P

PCIE_FW_R2D_N

PCIE_FW_R2D_C_N

PCIE_FW_D2R_C_N PCIE_FW_D2R_N

PCIE_FW_D2R_C_P

PCIE_FW_D2R_P

FW_CLK24P576M_XI

PP1V0_FW_FWPHY

4

41

6

6

6

6

7 39 40 41

66

6

6

6

81

81

81

81

740

2 1345678


- =PPBUS_S5_FWPWRSW (FW VP FET Input)

- =PPBUS_FW_FET (FW VP FET Output)

FireWire Port Power Switch

CRITICAL

F4260CRITICAL

FDC638P G

CRITICAL

Q4260



G

D

S

IN

IN

G

D

S

OUT

IN

S

G

D

(SYM-VER2)

G

S (SYM-VER1)

D

GND

VOUT

ON

VIN

GND

VOUT

ON

VIN

IN

OUT

IN

OUT

IN

IN

D

G S

RESET*

OUT

EN

MR*

GNDTHRM

IN

VDD

SENSE+-

PAD

(OD)

0.7V

DLY






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

DLY = 60 ms +/- 20%

3.3V FW Switch

Supervisor & CLKREQ# Isolation

Pull-up provided by another page.

TEXT NOTE FOR 3.3V RAIL CURRENT CHANGED TO EDP NUMBER.

EDP = 0.14A (85C)

When PHY is powered, FW_5KPD_DET_L acts as legacy PME# signal.

FireWire PHY WAKE# Support

1.0V FW Switch

U4201 & U420

Type

to reduce voltage.

TPS22924C

18 mOhm TypR(on)

Max Output: 2A

Part

Q4262 provides for fast-off of Q4260 in S0 (Late-VG detection)

- =PP3V3_S0_FWPWRCTL

- =PP1V0_FW_FWPHY (PHY 1.0V)


- =PP1V05_FW_P1V0FWFET (1.0V FET Input)

- =PP3V3_FW_P3V3FWFET (3.3V FET Input)

- =PP3V3_FW_FET (3.3V FET Output)

- =PP3V3_FW_FWPHY (PHY 3.3V Power)

- =PP1V05_S0_FWPWRCTL (5KPD Bias Rail)

(NONE)

- =PP1V0_FW_FET_R (1.0V FET Output)

- =PP3V3_S0_FWLATEVG

p

Current source only active when FW_PWR_EN is low.

All FireWire devices require 5K pull-down on TPB pair.

Host can detect as load on TPBIAS signal.

FireWire Port 5K Pull-Down Detect

Dual-purpose output:

1) 5K Pull-down Detect when FW_PWR_EN is low.

Pull-up provided on another page.

- =FW_PME_L

- =FW_CLKREQ_L


2) FW643 WAKE# (PME#) when PHY is powered.

50 mOhm Max

Load Switch

1.05V is used with a ser

To avoid an extra power

LSI FireWire PHY require

402

25VX5R

10%0.1UFC4260 1

21/16W5%

402MF-LF

300KR42601

2

470K

1/16W5%

402MF-LF

R42611

2

1.1A-24V

MINISMDC110H24

F4260

1 2

CRS08-1.5A-30V

SMD42601 2

CRITICAL

SOT563BC847CDXV6TXGQ4270

2

6

1

SOT563BC847CDXV6TXG

CRITICALQ4270

5

3

4

MF-LF

5%

402

1/16W

330KR42701

2

56K

MF-LF402

5%1/16W

R42711

2

5%1/16WMF-LF

402

12KR42731

2

PLACE_NEAR=C4360.1:2 mm

MF-LF402

5%1K

1/16W

R42721

2

CRITICAL

DMB53D0UV

SOT-563

Q4275

6

2

1

CRITICAL

SOT-563

DMB53D0UVQ42755

3

4

10%0.1UF

402X5R16V

C4270 1

2

3941

1/16WMF-LF

5%1K

402

R42751

2

1940

DMB53D0UVSOT-563

CRITICAL

Q42765

3

4

CRITICAL

DMB53D0UVSOT-563

Q4276

6

2

1

5%1/16WMF-LF402

100KR42761

2

NO STUFF

0.1UF10%16VX5R402

C4276 1

2

MF-LF

5%1/16W

402

10KR42771

2

8 19

83940

SOT-363BSS8402DWQ4262

3

5

4

402

1/16W5%

MF-LF

10KR42621

2

BSS8402DW

SOT-363

Q4262

6

2

1

402

25VX5R

10%0.1UF

NO STUFF

C4261 1

2

105%

1/16WMF-LF402

R42631

2

TPS22924

CRITICAL

CSP

U4201

C 1

C2

A2

B2

A1

B1

TPS22924

CRITICAL

CSP

U4202

C 1

C2

A2

B2

A1

B1

41

402MF1/16W1%0.549R42021

2

39

1/16W

402MF-LF

5%10KR42832

1

1940

1623

402

25VX5R

10%0.1UFC4290 1

2

1826303336

39 40

FDC638P_GSM

1

2

5

6

3

4

SOD-VESM-HF

SSM3K15FVQ4261

3

12

402CERM6.3V10%1UF

C4201 1

2

402CERM6.3V10%1UF

C4202 1

2

CRITICAL

SLG4AP016VTDFN

U4290

6

5

7

3

8

4

2

9

1

1/16WMF-LF402

5%100KR42901

2

SYNC_MASTER=T27_MLB SYNC_D

FireWire Port & PHY

MAKE_BASE=TRUEFW_5KPD_DET_L

PP1V05_FW_FETMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.05V

MAKE_BASE=TRUEFW643_WAKE_L


PPBUS_FW_FWPWRSW_FMIN_LINE_WIDTH=0.5 mm

VOLTAGE=12.6V VOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mm

PPBUS_FW_FWPWRSW_DMIN_LINE_WIDTH=0.5 mm

FW_CLKREQ_PHY_LMAKE_BASE=TRUE

PP1V05_S0

PP3V3_S0

PP1V0_FW_FWPHY

PPVP_FW

FWDET_MIRROR

FW_PWR_EN_L

FWDET_EMITFW_P1_TPBIAS_R

PP1V05_S0

FW_5KPD_DET_RC

PP3V3_FW_FWPHY

FW_WAKE

FW_P1_TPBIAS

FW_PWR_EN

FW_PLUG_DET_L

FW643_WAKE_L

FWPORT_PWREN_L_DIV

FWPORT_FASTOFF_L

PP3V3_S0

PPBUS_G3H

FWPORT_FASTOFF_L_DIV

FWPORT_PWREN_L

FWPORT_PWR_EN

PP3V3_FW_FWPHY

FW_CLKREQ_PHY_L

PP1V0_FW_FWPHY

PP3V3_S0

FW_RESET_R_L

PLT_RESET_L

FW_CLKREQ_L

FW_PWR_EN

FW_RESET_L

4

39 40

6791012141617202223364045687073

678121617181920222326272933363740414246

48495051525457616271

727374757785

7 39 40

7 41

67910121416172022233640456870

73

7394041

678121617181920222326272933363740414246

48495051525457616271

727374757785

678364950636477

7 39 40 41

7 39 40

678121617181920222326272933363740414246

48495051525457616271

727374757785

2 1345678

- =PPVP_FW_PORT1FET blocks current to TPCPS until VDD33 is powered.

FW643 TPCPS Leakage Protection

(All unused port signals TP/NC)

Disabled per LSI instructions

Unused FireWire Ports

- Port "1" Bilingual (1394B)

Configures PHY for:

FireWire PHY Config Straps

- =PPVP_FW_PHY_CPS_FET (From Port)


FW643 has internal leakage path from TPCPS pin to VDD33.



SC/NC

TPA+ TPA(R)

VG

VPTPB+

TPB(R)TPB-

TPA-

CHASSISGND

S

G

D

( S Y M - V E R 2 )

G

S (SYM-VER1)

D

NC

VCC

VCLMP

D1-

GNDD2-

D2+

D1+

FWPWR_ENOUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

BI

BI

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

AREF needs to be isolated from all

local grounds per 1394b spec

When a bilingual device is connected to a

beta-only device, there is no DC path

between them (to avoid ground offset issue)

- =FW_PHY_DS0

NOTE: This page is expected to contain

appropriate connectors and/or to

(PINS 5/6 AND 7/8 ARE

SWAPPED FOR BETTER ROUTING)

"Snapback" & "Late VG" Protection

(FW_PORT1_TPA_N)

(FW_PORT1_TPB_P)

(FW_PORT1_TPA_P)

(FW_PORT1_TPB_P)

FireWire Design Guide (FWDG 0.6, 5/14/03)

TerminationPlace close to FireWire PHY

(FW_PORT1_TPB_N)

(GND)

Cable Power

(FW_PORT1_TPB_N)

(FW_PORT1_TPA_P)

(FW_PORT1_TPA_N)

Note: Trace PPVP_FW_PORT1 must handle up to 5A

(FW_PORT1_BREF)

ground for speed signaling and connection

BREF should be hard-connected to logic

514S0605

TPA<R>

TPA+

TPA-

VG

BILINGUAL

TPB+

VP

NC

TPB<R>

TPB-

INPUT

OUTPUT

PORT 1

1394b implementation based on Apple

(NONE)


- =FW_PHY_DS2

- =FW_PHY_DS1

- =PP3V3_FW_FWPHY

- =PP3V3_S0_FWLATEVG

- =PPVP_FW_PHY_CPS (To PHY)

From Port

To FW643

properly terminate unused signals.

the necessary aliases to map the


FireWire TPA/TPB pairs to their

CANNOT SYNC THIS PAGE FROM T27, TPA AND TPB FOR U4350 IS SWAPPED

SIGNAL_MODEL=EMPTY

56.2

MF-LF402

1%1/16W

R43631

2

4.99K

MF-LF

402

1%1/16W

R43641

2

1/16W1%

402MF-LF

56.2

SIGNAL_MODEL=EMPTY

R43621

2

5%

402CERM

220pF

25V

C43641

2

1%

SIGNAL_MODEL=EMPTY

1/16W

402MF-LF

56.2R4361

1

2

6.3V10%

402CERM-X5R

0.33UFC43601

2

1/16W

SIGNAL_MODEL=EMPTY

56.2

MF-LF402

1%

R43601

2

0.1uF

X7R603-1

10%50V

PLACE_NEAR=J4310.5:2 mm

C4319 1

2

1/16W5%

402

1M

MF-LF

R43191

2

0.01UF

X7R402

10%50V

C43141

2

CRITICAL

SM

FERR-250-OHML4310

1 2

CRITICAL

1394B-M97F-RT-TH

J4310

1

10

11

12

13

2

3

4

5

6

7

8

9

1/16W1%

402MF-LF

10KR4381

1

2

10K

MF-LF402

1%1/16W

R43821

2

1/16W1%

402MF-LF

10K

R43801

2

B S S 8 4 0 2 D W

S O T - 3 6 3

Q 4 3 0 0

3

5

4

BSS8402DWSOT-363

Q4300

6

2

1

330K

MF-LF402

5%1/16W

R43121

2

470K

MF-LF402

5%1/16W

R43111

2

TPD4S1394LLP

CRITICAL

U4350

7

8

5

6

4

2

1

3

PLACE_NEAR=U4350.1:2 mm

402

10%

X5R

16V

0.1UF

C4350 1

2

1/16W

100K5%

MF-LF402

R43501

2

40

39 41

39 41

39 41

6394182

394182

6394182

6394182

63941

63941

63941

63941

3941

63941

394182

394182

394182

394182

3940

S YN C_ MA ST ER =T 27 _M LB S

FireWire Connector

MAKE_BASE=TRUE

FW_PORT1_TPB_P

FW_PORT1_TPA_PMAKE_BASE=TRUE

MAKE_BASE=TRUE

FWPHY_DS0

MAKE_BASE=TRUE

FWPHY_DS2

MAKE_BASE=TRUE

FWPHY_DS1


NC_FW0_TPBIAS


NC_FW0_TPAP


NC_FW0_TPAN

NO_TEST=TRUE

NC_FW0_TPBPMAKE_BASE=TRUE

NO_TEST=TRUE

NC_FW0_TPBNMAKE_BASE=TRUE

NO_TEST=TRUE

NC_FW2_TPBIASMAKE_BASE=TRUE


NC_FW2_TPAP


NC_FW2_TPAN

NO_TEST=TRUE

NC_FW2_TPBPMAKE_BASE=TRUE

NO_TEST=TRUE

NC_FW2_TPBNMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=12.6VMAKE_BASE=TRUE

PPVP_FW_CPS

PPVP_FW_PORT1_F

VOLTAGE=33V


PPVP_FW

PP3V3_FW_FWPHY

FWPHY_DS0

FWPHY_DS2

FWPHY_DS1

NC_FW0_TPBIAS

NC_FW0_TPBP

NC_FW0_TPAN

NC_FW0_TPAP

NC_FW2_TPBIAS

NC_FW2_TPAP

NC_FW0_TPBN

NC_FW2_TPBN

NC_FW2_TPBP

NC_FW2_TPAN

CPS_EN_L

PP3V3_FW_FWPHY

CPS_EN_L_DIV

PPVP_FW_CPS

PPVP_FW

FW_PORT1_TPB_C

FW_PORT1_TPA_P

FW_PORT1_TPA_N

FW_PORT1_TPB_P

FW_PORT1_TPB_N

FW_P1_TPBIAS

TP_FWLATEVG_VCLMP

FWPORT_PWR_EN

PP3V3_S0

FW_PORT1_TPA_NMAKE_BASE=TRUE

FW_PORT1_AREF

FW_PORT1_TPB_NMAKE_BASE=TRUE

4

394182

394182

3941

3941

3941

39 41

6 39 41 82

39 41 82

6 39 41 82

6 39 41 82

6 39 41

6 39 41

6 39 41

6 39 41

6 39 41

39 4174041

7394041

7394041

39 41

74041

678121617181920222326272933

3637404246484950

5152545761627172

7374757785

394182

394182

2 1345678



S

G

D

OUT

OUT

OUT

IN

IN

BI

IN

IN

EN

A_INN

A_INP

TEST

B_PRE0/I2C_ADDR0

APRE0/I2C_ADDR1

I2C_EN*

A_OUTP

B_INN

A_OUTN

B_INP

REXT

B_PRE1/SDA_CTL

A_PRE1/SCL_CTL

VDD

THRMGND

B_OUTP

B_OUTN

PAD

IN

NC

D

SG

D

SG






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

SATA HDD / IR / SIL Connector

SATA ODD ConnectorODD Power Control

ensure the drive is unpowered in S3/S5.

Indicates disc presence

(All 4 C’s)

338S0907

Internally PD ~150K

Address (W/R)

0x96/0x970x98/0x99

0xB6/0xB7

0xB8/0xB9

Write:0xB6 Read:0xB7

ADDR1

H

H

L

H

HL

L

ADD0

L

516S0687

NOTE: 3.3V must be S0 if 5V is S3 or S5 to

516S0616

R2D values for 3dB de-emphasis

D2R values for 3dB de-emphasis

CRITICAL

TPCP8102

23V1K-SM

Q4590

5

6

7

8

4

1

2

3

0.01UF 1 0% C ER M 4 0216V

C4525 1 2

10% 402CERM0.01UF 16V

C4526 1 2

402CERM16V10%0.01UF

C4520 1 2

40216V CERM10%0.01UF

C4521 1 2

645

1/16W5%

33K

402MF-LF

R45901

2

F-ST-SM

54722-0164

CRITICAL

J4500

1

10

1112

1314

1516

2

34

56

78

9

16 80

16 80

16 80

16 80

16 23 27 29 31 48 62 77 81

16 23 27 29 31 48 62 77 81

4.7K

402

1/16WMF-LF

5%

R45151

2

1/16WMF-LF

5%

402

4.7K

NO STUFF

R45131

2

GND_VOID=TRUE

402CERM1 0% 1 6V0.01UF

C4518 1 2

GND_VOID=TRUE

4020.01UF

CERM1 0% 1 6V

C4517 1 2

GND_VOID=TRUE

0.01UF40216V10% CERM

C4513 1 2

GND_VOID=TRUE

40216V10% CERM0.01UF

C4512 1 2

19

16V20%

CERM

402

0.01UF

C45191

2

402

20%10VCERM

0.1UF

C45141

2

MF-LF402

1%4.99K

1/16W

R45121

2

MF-LF

5%

1/16W

402

4.7K

NO STUFF

R45101

2

PLACE_SIDE=TOP

TQFN

PS8521A

CRITICAL

U4510

2

1

14

15

19

9

12

11

4

5

8

17

7

3 1 3

10

20

18

2 1

6 1 6

5%1/16W

0

402MF-LF

R45111

2

10%0.01UF

GND_VOID=TRUE

16V CERM 402

C4516 1 2

GND_VOID=TRUE

0.01UFCERM16V 40210%

C4515 1 2

1623

16V10% CERM 402

GND_VOID=TRUE

0.01UF

C4510 1 2

0.01UF402CERM1 0% 1 6V

GND_VOID=TRUEC4511 1 2

CERM

0.1UF10V

402

PLACE_NEAR=L4500.2:2mm

20%

C45022

1

FERR-70-OHM-4A

0603

CRITICAL

PLACE_NEAR=J4501.9:3mm

L4500

1 2

402CERM

10V


0.1UF20%

C45012

1

50V

0.001UF

402

CERM

10%

C4531 1

2

402

4.7

5%

MF-LF

1/16W

R4531

12

F-ST-SM

54722-0224

CRITICAL

J4501

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

3 4

5 6

7 8

9

10%16V

X7R-CERM

0.1UF

402

C45321

2

10

MF-LF

1/16W5%

402

R4532

12

4021/16W

MF-LFGND_VOID=TRUE41.2 1%

R45341 2

402CERM

50V5%

GND_VOID=TRUE

15PFC4534

1 2

402GND_VOID=TRUE

1/16W

MF-LF41.2 1%

R45331 2

402 50VCERM 5%GND_VOID=TRUE

15PFC4533

1 2

5%GND_VOID=TRUE

402CERM

50V

15PFC4536

1 2

GND_VOID=TRUE402MF-LF

1/16W

1%41.2R45361 2

MF-LFGND_VOID=TRUE4021/16W

41.2 1%

R45351 2

402CERM

50V

GND_VOID=TRUE 5%

15PFC4535

1 2

SOT563SSM6N37FEAPE

Q4596 3

54

402

100K5%

MF-LF1/16W

R45971

2

SOT563

SSM6N37FEAPE

Q4596 6

21

402

1/16W5%

MF-LF

100KR4596

1

2

1/16W

402MF-LF

100K

5%

R4595

1 2

10V10%

402

0.068UF

CERM

C4595 1

2

16V10%

CERM402

0.01UFC4596

1 2

SATA/IR/SIL Connecto


MIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.4mmVOLTAGE=5V

PP5V_S0_HDD_FLT

SATA_HDD_D2R_RC_P

SATA_HDD_D2R_RC_N

SATARDRVR_I2C_ADDR1

SATARDRVR_TEST

SATA_HDD_R2D_N

SATARDRVR_REXT

SMBUS_PCH_CLK

SMBUS_PCH_DATA

SATA_HDD_R2D_RDRVR_IN_P

ODD_PWR_EN

MIN_NECK_WIDTH=0.4mmVOLTAGE=5V

MIN_LINE_WIDTH=0.6mm

PP5V_SW_ODD

SATARDRVR_I2C_EN_L

SATA_HDD_R2D_RDRVR_IN_N

SATA_HDD_R2D_C_P

SATA_HDD_D2R_N

SATA_HDD_R2D_C_N

SATA_HDD_D2R_P

SATA_ODD_D2R_P

SATA_ODD_D2R_N

SATA_ODD_R2D_C_N

SATA_ODD_R2D_C_P

ODD_PWR_SS

PP3V3_S0

PP3V3_S0

SATA_ODD_R2D_P

SATA_ODD_D2R_UF_P

SYS_LED_ANODE_R

MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mmVOLTAGE=5V

PP5V_S3_IR_R

IR_RX_OUT

SYS_LED_ANODE

PP5V_S3

SATA_HDD_D2R_RDRVR_OUT_N

SATA_ODD_R2D_N

SATARDRVR_I2C_ADDR0

SATARDRVR_I2C_ADDR1

PP1V5_S0

ODD_PWR_EN_LS5V_L

PP5V_S3

SATA_ODD_D2R_UF_N

SATA_HDD_D2R_RDRVR_OUT_P

PP1V5_S0

PP1V5_S0

SMC_ODD_DETECT

ODD_PWR_EN_L

PP5V_S0

SATA_HDD_D2R_RDRVR_IN_N

SATA_HDD_R2D_RDRVR_OUT_N

SATA_HDD_D2R_C_P

SATARDRVR_I2C_ADDR0

SATARDRVR_EN

SATA_HDD_R2D_RC_P

SATA_HDD_R2D_RC_N

SATA_HDD_R2D_RDRVR_OUT_P

SATA_HDD_D2R_RDRVR_IN_P

SATA_HDD_D2R_C_N

SATA_HDD_R2D_P

4

6

80

80

42

680

85

6

85

678121617181920222326272933363740414246

484950515254576162

71727374757785

678121617181920222326272933363740414246

48495051525457616271

727374757785

680

685

6

644

46

6730324243444657596061666772

85

680

42

42

716202226425771

6730324243444657596061666772

685

85

716202226425771

716202226425771

6 7 22 47 52 54 65 68 70 72 7377

85

85

680

42

80

80

85

85

680

680

2 1345678



OUT

BI

BI

SYM_VER-1

IN

OUT

IN

SYM_VER-1

BI

BI

OUT

I O

I O

N C

GND

VBUSN C

I O

I O

N C

GND

VBUSN C

GNDTHRM

OUT2

OUT1

ILIM

IN_0

IN_1

EN2

FAULT1*

FAULT2*

EN1

PAD

VCC

GND

SELOE*

D+

D-

Y+

Y-

M+

M-






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

USB Port Power SwitchLeft USB Port A

Left USB Port B

We can add protection to 5V if we want, but leaving NC for now

Place L4605 and L4615 at connector pin

SEL=0 Choose SMC

USB/SMC Debug Mux

SEL=1 Choose USB

Current limit per port (R4600): 2.18A min / 2.63A max

CRITICAL

FERR-120-OHM-3A

0603

L4605

1 2

10UF

6.3VX5R

603

20%

C4695 1

2

402CERM

10V20%0.1UFC46911

2

24

2480

2480

CERM402

10V

0.1UF

SMC_DEBUG_YES

20%

C4650 1

2

SMC_DEBUG_YES

MF-LF

5%

10K

402

1/16W

R46501

2

CRITICAL

DLP11S

90-OHM-100MA

L4600

1 2

34

6454647

6454647

45

1/16W

MF-LF

0

5%

402

SMC_DEBUG_NO

R4651

1 2

SMC_DEBUG_NO

0

402

5%

1/16WMF-LF

R4652

1 2

16V

402

0.01uF

CERM

20%

C4605 1

2

20%0.01uF

16VCERM402

C4615 1

2

CRITICAL

FERR-120-OHM-3A

0603

L4615

1 2

DLP11S

CRITICAL

90-OHM-100MA

L4610

1 2

34

20%

603

10UF

X5R6.3V

C4617 1

2

2480

2480

24

RCLAMP0502N

CRITICAL

SLP1210N6

D4600

1

5 42 3

6

SLP1210N6

RCLAMP0502N

CRITICAL

D4610

1

5 42 3

6

603

10UF

X5R

6.3V20%

C4690 1

2

F-RT-TH-M97-4

CRITICAL

USB

J4600

1

2

3

4

5

6

7

8

F-RT-TH-M97-4

CRITICAL

USB

J4610

1

2

3

4

5

6

7

8

SON

TPS2561DR

CRITICAL

U4600

4

5

10

6

1

7

2

3

9

8

1 1

SMC_DEBUG_YES

TQFN

CRITICAL

PI3USB102ZLE

U4650

6

7

3

4

5

8 10

9

2

1

402

MF-LF

1/16W1%

23.2K

R46001

2

CRITICAL

220UF-35MOHM

POLY-TANT6.3V20%

CASE-B2-SM

C46961

2

External USB Connect


PP5V_S3

USB_EXTA_OC_L


PP5V_S3_RTUSB_A_FMIN_LINE_WIDTH=0.5 mm

VOLTAGE=5V

VOLTAGE=5V

PP5V_S3_RTUSB_B_F


USB2_LT1_P

USB2_LT1_N

USB_ILIM

USB_DEBUGPRT_EN_L

PP3V42_G3H

USB_EXTB_N USB_LT2_N

USB_EXTB_P

USB_LT2_P

USB_EXTA_N

USB_EXTA_P

VOLTAGE=5VMIN_NECK_WIDTH=0.375 mm


PP5V_S3_RTUSB_B_ILIM

SMC_RX_L

PP5V_S3_RTUSB_A_ILIMMIN_LINE_WIDTH=0.5 mm


DDRREG_EN

USB_EXTB_OC_L

USB2_EXTA_MUXED_N

USB2_EXTA_MUXED_P

SMC_TX_L

4

67303242444657596061666772

85

85

67264546474853636473

85

85

6773

85

85

2 1345678



BI

BI

VCC

P1.0/D+

P1.1/D-

P1.2/VREG

P1.3/SSEL

P1.4/SCLK

P1.5/SMOSI

P1.6/SMISO

P0.0

P0.1

INT0/P0.2

INT1/P0.3

TIO1/P0.6

NC

TIO0/P0.5

INT2/P0.4

VSSPADTHRML

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

IR SUPPORT

2480

2480

1UF

X5R402-1

10%10V

C48031

2

CY7C63803-LQXCQFN

OMITCRITICAL

U4800

5

4

3

8

9

10

20

21

22

23

24

7

6

12

13

15

16

17

18

19

2 5

2

1

1 4

1 1

X7R-CERM

10%0.1UF

402

16V

C48011

2

0.001UF

CERM402

10%50V

C48041

2

100

MF-LF402

5%1/16W

R4800

1 2 6 42


Front Flex Support

USB_IR_PDIFFERENTIAL_PAIR=USB2_IR

USB_IR_NDIFFERENTIAL_PAIR=USB2_IR

IR_RX_OUT_RC IR_RX_OUT

IR_VREF_FILTER

PP5V_S3

4

P/N 338S0633

67303242434657596061666772

2 1345678

NOTE: Unused pins have "SMC_Pxx" names. Unused

pins designed as outputs can be left floating,

those designated as inputs require pull-ups.

PP3V3_S5_AVREF_SMC

PP3V42_G3H

46

67264346474853636473



IN

IN

IN

OUT

OUT

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

BI

I

I

OUT

BI

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

BI

BI

BI

BI

BI

BI

OUT

OUT

IN

IN

OUT

ININ

BI

BI

OUT

I

OUT

OUT

NC

OUT

OUTNC

NCNC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

IN

OUT

P11

P82

P83

P35

P96

P95

P94

P93

P92

P91

P90

P86

P85

P84

P81

P80

P77

P67

P52

P51

P50

P47

P46

P45

P44

P43

P42

P41

P40

P37

P36

P34

P33

P32

P31

P30

P27

P26

P25

P24

P23

P21

P17

P12

P66P16

P15

P14

P13

P22

P20

P63

P61

P60

P65

P64

P62

P70

P71

P72

P73

P74

P75

P76

P97

P10

(1 OF 3)

PEVREF/PH4

PECI/PH3

PH2

PG5

PG4

PG3

PG2

PG1

PG0

PF7

PF6

PF5

PF4

PF3

PF2

PF1

PF0

PE4

PE3

PE2

PE1

PE0

PD7

PD6

PD5

PD4

PD3

PD2

PD1

PD0

PC7

PC6

PC5

PC4

PC3

PC2

PC1

PC0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PA7

PA6

PA3

PA2

PA1

PA0

PA4

PA5

PG6

PG7

PH0

PH1

PEVSTP/PH5

(2 OF 3)

EXTAL

XTAL

RES*

VSSAVSS

ETRST*

NMI

MD2

MD1

NC

AVCC VCC VCL AVREF

(3 OF 3)

OUT

NC

INBI

OUT

IN

OUT

BI

BI

BI

BI

IN

IN

IN

OUT

BI

IN

IN

IN

IN

BI

BI

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

NOTE: SMS Interrupt can be active high or low, rename net accordingly.

If SMS interrupt is not used, pull up to SMC rail.

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

6.3V20%

805CERM

22UF

C4902 1

2

6 17 47

464764

46 53

PLACE_NEAR=U4900.E1:3mm

6.3V10%

402CERM-X5R

0.47UFC4907 1

2

0.1UF

CERM10V20%

402

C49031

2

PLACE_NEAR=U4900.M12:3mm

0.1UF

CERM402

20%10V

C4920 1

2

PLACE_NEAR=U4900.M12:3mm

402

1/16W5%

MF-LF

4.7R4999

1 2

10V20%

402CERM

0.1UF

C49041

2

SM

PLACE_NEAR=U4900.L3:4mm

XW4900

12

1723

2636

10V20%

402CERM

0.1UF

C49051

2

17

73

232673

46

10V20%

402CERM

0.1UF

C49061

2

46 49

46 49

46

46

46 49

46 49

46

46 49

46 49 63 64

643454647

643454647

6 73

4884

402

1/16W

5%

MF-LF

10K

R49091

2

1/16W

5%

402MF-LF

10K

R49011

2

1/16W5%

402MF-LF

10K

R49021

2

NO STUFF

0

MF-LF402

5%1/16W

R49031

2

1/16W5%

MF-LF

10K

402

R49981

2

43

63

4673

642

46

52

46

46

46

46

46

46

52

46

4649

4650

4650

46

4650

4650

6 46 47

46

6 46 47

6 46 47

6 46 47

46 53 63

6 48 63 64 84

6 48 63 64 84

6 32 48 54 55 84

6 32 48 54 55 84

48 51 84

48 51 84

46

46

4649

6 43 45 46 47

6 43 45 46 47

46 55

46

61647

2729

1726

16 19

6 17 47

46

17 46 73

6 46 63

46

TLP-145V

OMIT

DF2117RVPLP20HV

U4900B12

A13

A12

B13

D11

C13

C12

D10

D13

E11

D12

F11

E13

E12

F13

E10

A9

D9

C8

B7

A8

D8

D7

D6

D4

A5

B4

A1

C2

B2

C1

C3

G2

F3

E4

L13

K12

K11

J12

K13

J10

J11

H12

N10

M11

L10

N11

N12

M13

N13

L12

A7

B6

C7

D5

A6

B5

C6

J4

G3

H2

G1

H4

G4

F4

F1

OMIT

TLP-145V

DF2117RVPLP20HV

U4900N3

N1

M3

M2

N2

L1

K3

L2

B8

C9

B9

A10

C10

B10

C11

A11

G11

G13

F12

H13

G10

G12

H11

J13

M10

N9

K10

L8

M9

N8

K9

L7

K1

J3

K2

J1

K4

A4

B3

C4

K5

N5

M6

L5

M5

N4

L4

M4

M8

N7

K8

K7

K6

N6

M7

L6

E2

F2

J2

TLP-145V

DF2117RVPLP20HV

OMIT

U4900

M 1 2

L 1 1

L9

H3

A2

D1

H1

E5

E3

D3

B 1

M 1

H 1 0

E 1

D 2

L 3

F 1 0

B 1 1

C 5

A3

16

463246

402

5%

MF-LF

1/16W

43R4910

1 2

0

1/16W

MF-LF

5%

402

R4911

1 2

1/16W

5%

MF-LF

0

402

R4912

1 2

10VCERM

0.1UF20%

402

C4910 1

2

8467376

46 53

1946

6164781

6164781

6164781

6164781

6164781

26

2681

54

632485184

6 17 30 73

6 17 30 73

17 73

46

6 32 48 51 84

48 84

46

SMC


SMS_INT_L

PM_SYSRST_L

SMC_GFX_OVERTEMP_L

SMC_FAN_0_CTL

SMC_FAN_0_TACH

NC_SMC_FAN_3_TACH

PM_CLKRUN_L

LPC_PWRDWN_L

SMC_TX_L

SMC_RX_L

SMBUS_SMC_MGMT_SCL

SMC_BC_ACOK

SMC_PME_S4_WAKE_L

PM_SLP_S3_L

PM_SLP_S5_L

PM_SLP_S4_L

SMBUS_SMC_0_S0_SDA

PP1V05_S0

PM_PECI_PWRGD

TP_SMC_PF5

SMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCL

PVCCIO_S0_SMC_R

SMBUS_SMC_A_S3_SCL

SMC_SYS_LED

SMC_ADAPTER_EN

SMC_OTHER_HI_ISENSE

CPU_PECI

SMC_VCL

SMC_MD1

SMC_KBC_MDE

SMC_NMI

SMC_TRST_L

SMC_RESET_L

SMC_XTAL

SMC_EXTAL

TP_SMC_P41

LPC_AD<3>

LPC_CLK33M_SMC

SMBUS_SMC_MGMT_SDA

TP_SMC_P43

TP_SMC_GFX_THROTTLE_L

SMC_SYS_KBDLED

PM_PECI_PWRGD_R

CPU_PECI_R

SMC_THRMTRIP

SMC_PROCHOT

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_A_S3_SDA

SMC_LID

G3_POWERON_L

SMC_TDO

SMC_TCK

SMC_CASE_OPEN

TP_SMC_ADC3

SMC_PROCHOT_3_3_L

SMC_LRESET_L

LPC_SERIRQ


VOLTAGE=3.3V

PP3V3_S5_SMC_AVCC


SMC_TDI

SMBUS_SMC_B_S0_SCL

SMC_PM_G2_EN

TP_SMC_P1V5S3_ISENSE

TP_SMC_P10

TP_SMC_RSTGATE_L

ALL_SYS_PWRGD

PM_DSW_PWRGD

NC_SMC_FAN_2_CTL

SMC_TMS

SMC_GFX_VSENSE

SMC_GFX_ISENSE

NC_SMC_FAN_1_CTL

SMC_ONOFF_L

TP_SMC_P24

SMC_BMON_MUX_SEL

LPC_FRAME_L

LPC_AD<2>

PM_PWRBTN_L

LPC_AD<1>

LPC_AD<0>

SMC_DELAYED_PWRGD

S5_PWRGD

TP_SMC_P20

NC_SMC_FAN_3_CTL

WIFI_EVENT_L

SMC_CPUVCCIO_ISENSE

SMC_SCI_L

SMC_BIL_BUTTON_L

SMC_CPU_VSENSE

SMC_CPU_ISENSE

TP_SMC_ADC2

GND_SMC_AVSS

SMC_CLK32K

SMBUS_SMC_0_S0_SCL

SMC_RX_L

SMC_TX_L

TP_SMC_ADC14

SMC_CPU_HI_ISENSE

SMC_BMON_ISENSE

SMC_PBUS_VSENSE

SMC_DCIN_ISENSE

SMC_DCIN_VSENSE

TP_SMC_SA_ISENSE

NC_SMC_FAN_2_TACH

NC_SMC_FAN_1_TACH

SMC_S4_WAKESRC_EN

SMC_ODD_DETECT

SMC_RUNTIME_SCI_L

SMC_DP_HPD_L

SYS_ONEWIRE

MEM_EVENT_L

USB_DEBUGPRT_EN_L

SPI_DESCRIPTOR_OVERRIDE_L

SMC_PA0_PU

SMC_PB4

SMC_BATLOW_L

4

6 7 9 10 12 14 16 17 20 22 23

36 40 68 70 73

73

46

10 19 78

46

46

46

46

46

46

4650

46

46 49 50

46

46

2 1345678

Desktops: 5V

Mobiles: 3 42V

SMC FSB to 3.3V Level ShiftingSMC Reset "Button", Supervisor & AVREF Supply

R50611

R50601

PP3V42_G3H

MAKE_BASE=TRUE

NC_SMC_FAN_3_TACH

MAKE_BASE=TRUE

NC_SMC_FAN_3_CTL

NC_SMC_FAN_2_CTLMAKE_BASE=TRUE

NC_SMC_FAN_2_TACH

NC_SMC_FAN_3_TACH

NC_SMC_FAN_3_CTLPP3V3_S0

MAKE_BASE=TRUE

NC_SMC_FAN_2_TACH

NC_SMC_FAN_2_CTL

PP3V42_G3H

6726434546474853636473

45 46

45 46

45 46

4546

4546

4546678121617181920222326272933363740414248

49505152545761627172

7374757785

45 46

4546

6726434546474853636473



D

S G

OUT

BI

D

S G

IN

E

Q2

C

BD

Q1

GS

OUT

G

D

S

IN

IN

REFOUT

MR1*

THRMGND

RESET*

DELAY

MR2*

VINV+

SN0903048

PAD

OUT

IN OUT

IN

OUT

D

G S

IN OUT

OUT D

G

SIN

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

BATLOW# Isolation

confirm if K90 needs Isense on DDR rail

Mobiles: 3.42V

SMC Crystal Circuit

(IPU)

MR1* and MR2* must both be low to cause manual reset.

(IPU)

NOTE: Internal pull-ups are to VIN, not V+.

Used on mobiles to support SMC reset via keyboard.

System (Sleep) LED Circuit

Debug Power "Buttons"

TO CPU

Below connections are different from K91

Internal 20K pull-up on PM_BATLOW_L in PCH.

SOT563SSM6N37FEAPE

Q50593

54

10K

5% 1/16W

R5070 1 2

100K1/16W5%

R5071 1 2

5%

10K1/16W

R5073 1 2

1/16W5%

100KR5074 1 2

10K5% 1/16W

R5077 1 2

10K5% 1/16W

R5078 1 2

10K1/16W5%

R5079 1 2

10K5% 1/16W

R5080 1 2

1/16W5%

10KR5085 1 2

10K5% 1 /1 6W

R5086 1 2

1/16W5%

10KR5088 1 2

19

PLACE_SIDE=TOP5%

603

OMIT

0

MF-LF1/10W

SILK_PART=PWR_BTN

R50151

2

1/16W5%

402MF-LF

3.3KR5062

1 2106878

SOT563

SSM6N37FEAPE

Q50596

2

1

1/16W5%

100KR5091 1 2

10K5% 1/16W

R5089 1 2

5% 1/16W

10KR5081 1 2

0

MF-LF402

5%1/16W

R5010

1 2

5X3.2-SM20.00MHZ

CRITICAL

Y50101

215pF

CERM402

5%50V

C5011

1 2

50VCERM

15pF

402

5%

C5010

1 25% 1/16W

470KR5087 1 2

NOSTUFF1/16W5%

10KR5093 1 2

10K

1/16W5%

R5072 1 2

45

1.47K

MF-LF402

1%

1/16W

R50321

2

402

523

MF-LF

1%1/16W

R50311

2

1/16WMF-LF

20

402

1%

R50301

2

CRITICAL

DMB54D0UV

SOT-563

Q5030

5

3

6 4

21

42

SOT-563

DMB53D0UV

Q50605

3

4

100K

MF-LF402

5%1/16W

R5061

2

SOT-563

DMB53D0UV

Q5060

6

2

1

1/16W5%

402MF-LF

10KR5060

2

PLACE_SIDE=BOTTOM

SILK_PART=PWR_BTN

05%

1/10W

603MF-LF

OMIT

R50161

2

PLACEMENT_NOTE=Place R5001 on BOTTOM side

OMIT

0

MF-LF603

5%1/10W

SILK_PART=SMC_RST

R50011

2

454653

53

CERM402

10%16V

0.01UFC5001 1

2

CERM-X5R402

10%6.3V

0.47UFC5020 1

2

VREF-3.3V-VDET-3.0V

DFN

U5010

4

2

6

7

8

5

9

1 3

603

6.3VX5R

20%10uF

C5025 1

2

10%16VCERM

0.01UF

402

C50261

2

1/16WMF-LF

5%

402

100K

R50001

2

45 47 64

17

1/16WMF-LF402

5%

22PLACE_NEAR=U1800.N14:5.1mm

R5012

1 2 45

MF-LF5% 4021/16W

10KR5095 1 2

75

45

1/16W5%

MF-LF402

100K

R50201

2

SOD-VESM-HFSSM3K15FV

Q50203

12

1/16W5%

100KR5090 1 2

1/16W

5%

MF-LF402

100K

R50761

2

454653 45 46 53

1/16W

1M

402

5%

MF-LF

NO STUFF

R50111

2

100K5% 1/16W

NOSTUFF

R5094 1 2

17

MF1/20W

5%100K

201

R50401

2

NOSTUFF

402MF-LF1/16W5%

0R50411 2

CRITICAL

SSM3K15FV

SOD-VESM-HF

Q5040

3

1

24573

45 46 53

SSYNC_MASTER=LINDA_K90I

SMC Support

SMC_MANUAL_RST_L

SYS_LED_ANODE

SMC_BATLOW_L PM_BATLOW_L

PP3V3_S5 PP3V3_SUS

TP_SMC_GFX_THROTTLE_L TP_SMC_GFX_THROTTLE_LMAKE_BASE=TRUE

SMC_GFX_OVERTEMP_L

T P_S MC_ AD C3 T P_ SM C_ AD C3MAKE_BASE=TRUE

TP_SMC_ADC14 TP_SMC_ADC14MAKE_BASE=TRUE

NC_SMC_FAN_1_TACH NC_SMC_FAN_1_TACH

MAKE_BASE=TRUE

T P_S MC_ AD C2 T P_ SM C_ AD C2MAKE_BASE=TRUE

NC_SMC_FAN_1_CTL NC_SMC_FAN_1_CTLMAKE_BASE=TRUE

PP3V42_G3H

SMC_PME_S4_WAKE_L

DP_A_EXT_HPD

SMC_CLK32K

TP_SMC_P24

SMC_BMON_MUX_SEL

TP_SMC_P41

TP_SMC_PF5

SYS_LED_L_VDIV

SMC_BIL_BUTTON_L

SMC_BC_ACOK

SMS_INT_L

SYS_LED_ILIM

SMC_RUNTIME_SCI_L

TP_SMC_PF5MAKE_BASE=TRUE

TP_SMC_P20

MAKE_BASE=TRUE

SMC_BMON_MUX_SEL

SMC_ONOFF_L

SMC_LID

PP3V42_

SMC_SYS_LED

SMC_XTAL

SMC_EXTAL

PP5V_S3

MAKE_BASE=TRUE

SMC_CPU_VSENSE

MAKE_BASE=TRUE

SMC_CPU_ISENSE

MAKE_BASE=TRUE

SMC_DCIN_ISENSE

SMC_PBUS_VSENSEMAKE_BASE=TRUE

SMC_BMON_ISENSEMAKE_BASE=TRUE

TP_SMC_P43MAKE_BASE=TRUE



VOLTAGE=3.3V

PP3V3_S5_AVREF_SMC


MAKE_BASE=TRUE

TP_SMC_SA_ISENSE


SMC_GFX_ISENSEMAKE_BASE=TRUE

TP_SMC_P1V5S3_ISENSEMAKE_BASE=TRUE

SMC_CPUVCCIO_ISENSEMAKE_BASE=TRUE

GND_SMC_AVSS


VOLTAGE=0V

SMC_GFX_VSENSE

SMC_GFX_ISENSE

SMC_CPUVCCIO_ISENSE

SMC_PBUS_VSENSE

SMC_BMON_ISENSE

SMC_CPU_ISENSESMC_RESET_L

TP_SMC_P10

PM_THRMTRIP_L_R

TP_SMC_P43

SMC_DCIN_VSENSE

SMC_OTHER_HI_ISENSE

SYS_LED_L

SMC_TPAD_RST_L

SMC_XTAL_R

TP_SMC_RSTGATE_L

TP_SMC_SA_ISENSE

CPU_PROCHOT_BUF

SMC_CPU_HI_ISENSEMAKE_BASE=TRUE

CPU_PROCHOT_L_R

SMC_PROCHOT_3_3_L

SMC_CPU_VSENSE

MAKE_BASE=TRUE

SMC_DCIN_VSENSE

G3_POWERON_L



SMC_GFX_VSENSEMAKE_BASE=TRUE

PM_CLK32K_SUSCLK_R

TP_SMC_P1V5S3_ISENSE

SMC_ONOFF_L

MAKE_BASE=TRUE

TP_SMC_RSTGATE_L

MAKE_BASE=TRUE

SMC_BC_ACOK

SMS_INT_LMAKE_BASE=TRUE

SMC_CPU_HI_ISENSE

MAKE_BASE=TRUE

SMC_OTHER_HI_ISENSE

PP3V3_WLAN

WIFI_EVENT_L

SMC_S4_WAKESRC_EN

SMC_PB4

SMC_CASE_OPEN

SMC_TMS

SMC_TDO

SMC_RX_L

SMC_TX_L

SMC_DCIN_ISENSE

SMC_THRMTRIP

SMC_ADAPTER_EN

SMC_TCK

SMC_TDI

SMC_PA0_PU

SMC_ONOFF_L

SMC_PROCHOT

SMS_INT_L

SMC_BC_ACOK

CPU_PROCHOT_L

PP3V3_S4

PP3V3_S4

SMC_PME_S4_WAKE_LMAKE_BASE=TRUE

SMC_DP_HPD_L

5

678171920222324263056667273747685

7 16 17 18 19 20 22 71 72 73

4546 45 46

45

4546 45 46

4546 45 46

4546 45 46

4546 45 46

4546 45 46

6726434546474853636473

4546

454650

4546

4546

64563

4546496364

454655

1945

45 46

4546

45 46 50

454653

455363

6726434546474853636473

45

45

6730324243

44575960

61666772

45 46 49

45 46 49

45 46 50

45 46 49

45 46 50

45 46

45 46

45

45 46

45 46

45 46 49

45 46

45 46 49

45 49 50

454649

454649

454649

454649

454650

454649

4546

4546

454649

454650

4546

4546

45 46 50

454649

45 46 49

45

45 46

45 46

45 46 49

4546

45 46

45 46 49 63 64

45 46 55

454650

45 46 50

632

3245

8457376

45

45

64547

64547

6434547

6434547

454650

174573

64547

64547

45

454655

4546496364

7 46 53 54 72

7 46 53 54 72

2 1345678



OUTIN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

IN

OUT

IN

BI

BI

OUT

IN

BI

IN

IN

OUT

BI

BI

IN

OUTIN

OUTIN

INOUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

516S0573

SPI Bus Series Termination

LPC+SPI Connector

PLACE_NEAR=J5100.12:5mm47

402

MF-LF1/16W5%

LPCPLUS

R51261

2

56


47

MF-LF

5%1/16W

402

R5122

1 2

PLACE_NEAR=U1800.V4:5mm

5%1/16WMF-LF402

15R5112

1 21681


LPCPLUS

5%1/16WMF-LF

402

R51271

2

0

402

MF-LF1/16W5%

LPCPLUS

PLACE_NEAR=J5100.11:5mm

R51281

2

6434546

645

645

64546

55909-0374

CRITICAL

LPCPLUS

M-ST-SM

J5100

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

4

5 6

7 8

9

6 19

6 43 45 46

45

45 46 64

6 45 46

64546

62681

647

6164581

61745

647

6164581

6164581

6 45 46

6 17 45

6 16 45

6 47

6 47

6 19 56

6 16 45 81

6 16 45 81

6 26 81

56

PLACE_NEAR=U1800.Y14:5mm

402MF-LF1/16W5%

15R5110

1 21681

56

PLACE_NEAR=U1800.T3:5mm

1/16W5%

MF-LF402

15R5111

1 21681

56

MF-LF

PLACE_NEAR=U6100.2:5mm

15

402

5%1/16W

R5123

1 21681


47

402

1/16W5%

MF-LF

R5120

1 2


402

MF-LF1/16W5%

LPCPLUS

R51251

2

PLACE_NEAR=R5126.2:5mm1/16W

47

MF-LF

5%

402

R5121

1 2

LPC+SPI Debug Connec


SPI_MOSI_R

SPI_MISO SPI_MLB_MISO

SPI_MLB_CS_L

SPI_MLB_CLK

SPI_MLB_MOSI

SPI_ALT_CS_L

SPI_ALT_CLK

SPI_ALT_MOSI

SPI_ALT_MISO

SPI_CS0_LSPI_CS0_R_L

SPI_CLK_R SPI_CLK

SPI_MOSI

PP3V42_G3H

PP5V_S0

LPC_CLK33M_LPCPLUS

LPC_AD<2>

LPC_AD<3>

SPI_ALT_CS_L

LPC_SERIRQ

LPC_PWRDWN_L

SMC_TDI

SMC_TCK

SMC_RESET_L

SMC_NMI

SMC_RX_L

LPCPLUS_GPIO

LPC_AD<0>

LPC_AD<1>

SPI_ALT_MOSI

SPI_ALT_MISO

PM_CLKRUN_L

LPC_FRAME_L

SMC_TMS

SMC_TDO

LPCPLUS_RESET_L

SMC_MD1

SMC_TRST_L

SMC_TX_L

SPIROM_USE_MLB

SPI_ALT_CLK

5

6 47

6 47

6 47

6 47

81

81

81

67264345464853636473

6722425254656870727377

2 1345678

SMC "Battery A" SMBus ConnectionsSMC "0" SMBus Connections

C P i t

PCH SMBus "0" Connections

SMC B tt ChSMCSO DIMM "A" R52801

R52811

R52511

R52501

R52011

R52001

PP3V42_G3HPP3V3_S0 PP3V3_S0 67264345464753636473

678121617181920222326272933363740414246

484950515254576162

71727374757785

678121617181920222326272933363740414246

484950515254576162

71727374757785








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

NOTE: SMC RMT bus remains powered and may be active in S3 state

(Write: 0xA4 Read: 0xA5)

J3100

PCH "SMLink 0" Connections

(MASTER)

U4900

SMC

EMC1414-A: U5570

CPU Temp

(Write: 0x98 Read: 0x99)

(Write: 0x94 Read:

U9310

DP Re-driv

T29 Plug

(Write: 0xA0 Read

J9400U3600

(MASTER)

actual CDR(s) in plug.

Microcontroller abstra


Cougar-Point

Margin Control


Mikey

SMC "A" SMBus Connections



(MASTER)

XDP Connectors

J2600 & J2650

(WRITE: 0x58 READ: 0x59)

U4900(Write: 0xA0 Read: 0xA1)

access PCH & CPU via PECI.


J3402

Cougar-Point

Cougar-Point

U3301

U3300

U1800

(MASTER)

PCH "SMLink 1" Connections

SMLink 1 is slave port to

SMC "Management" SMBus Connections

SO-DIMM "B"


X19


Battery LED Driver - (Write: 0x36 Read: 0x37)

SMC

U4900

(MASTER)

Digital SMS

Trackpad

J5800

ALS


LIS331DLH: U5920

(See Table

(Write: 0x12 Read

U4900

SMC

J2900

U1800

Battery

(MASTER)

SMC

(MASTER)

U4900

J6955

ISL6258 - U7

Battery

Battery Cha

(MASTER)

U1800

SMC

VRef DACs

SO-DIMM "A"

U9701

U6800

LED BACKLIGHT

(MASTER)


Battery Temp - (Write: 0x90 Read: 0x91)

Battery Manager - (Write: 0x16 Read: 0x17)

EMC1414-A: U5520

T29 Temp

U4510

T29 IC

SATA_Redriver

(Write: 0xB6 Read: 0xB7)

SMC "B" SMBus Connections

For Compliance Testing

T29 I2C Connections

4.7K

MF-LF402

5%1/16W

R52911

2

4.7K

MF-LF402

5%1/16W

R52901

2

5%

MF-LF1/16W

4.7K

402

R52611

2

4.7K

1/16W

402

5%

MF-LF

R52601

2

2.0K5%

1/16W

MF-LF

402

R5280

2

2.0K5%1/16W

MF-LF

402

R5281

2

1/16W5%

MF-LF402

1K

R52701

2

1K5%1/16WMF-LF402

R52711

2

402MF-LF1/16W5%4.7K

R5251

2

5%

MF-LF402

1/16W

4.7K

R5250

2

MF-LF402

5%1/16W

8.2KR5210

1

2

8.2K

1/16W

402

5%

MF-LF

R52111

2

5%

MF-LF402

1/16W

NO STUFF

8.2KR5221

1

2402

5%1/16W

8.2K

MF-LF

NO STUFF

R52201

2

402

05%

1/16W

MF-LF

R5223

1 2

05%

MF-LF

402

1/16W

R5222

1 2

MF-LF402

1/16W5%

1K

R5201

2

5%

MF-LF

1K

1/16W

402

R5200

2

4.7K

402MF-LF

5%1/16W

R5230

1

2

4.7K

402MF-LF1/16W5%

R5231

1

2

201

1/20WMF

5%0

SDRVI2C:MCU

R52351

2201

1/20WMF

5%0

SDRVI2C:MCU

R52341

2

201

SDRVI2C:SB

1/20WMF

05%

R5236 1 2

SDRVI2C:SB

2011/20W

MF5%

0R5237 1 2


SMBus Connections

PP3V3_S0

I2C_T29_SCLMAKE_BASE=TRUE

I2C_T29_SCL

MAKE_BASE=TRUE

I2C_T29_SDA

SMBUS_PCH_DATA

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

SMBUS_PCH_CLK

SMBUS_PCH_DATA

SMBUS_PCH_DATA

SMBUS_PCH_CLK

SMBUS_PCH_CLK

SMBUS_SMC_MGMT_SDA

SMBUS_SMC_MGMT_SCL

SMBUS_PCH_CLK

SMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCL

SMBUS_SMC_BSA_SCL

SMBUS_PCH_CLK

SMBUS_PCH_CLK

SMBUS_SMC_BSA_SDASMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCL

PP3V3_S0

PP3V3_S0

PP3V3_S3

SMBUS_PCH_DATA

SMBUS_PCH_CLK

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCL SMBUS_SMC_A_S3_SCL

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SDA

MAKE_BASE=TRUE

SMBUS_SMC_BSA_SDA

MAKE_BASE=TRUE

SMBUS_SMC_BSA_SCL

SML_PCH_0_DATAMAKE_BASE=TRUE

SML_PCH_0_CLKMAKE_BASE=TRUE

SMBUS_SMC_MGMT_SCLMAKE_BASE=TRUE

MAKE_BASE=TRUE

SMBUS_SMC_MGMT_SDA

SMBUS_PCH_DATA

SMBUS_PCH_DATA

MAKE_BASE=TRUE

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

PP3V3_S3

SML_PCH_1_CLKMAKE_BASE=TRUE

SMBUS_PCH_DATA

SMBUS_PCH_CLK

SMBUS_SMC_A_S3_SCLMAKE_BASE=TRUE

SMBUS_SMC_A_S3_SDAMAKE_BASE=TRUE

SMBUS_SMC_A_S3_SDA

SMBUS_PCH_DATA

MAKE_BASE=TRUE

SMBUS_SMC_0_S0_SDA

I2C_T29_SDA

I2C_DPSDRVA_SCL

I2C_DPSDRVA_SDA

I2C_DPSDRVA_SDAMAKE_BASE=TRUE

PP3V3_S0

MAKE_BASE=TRUE

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

MAKE_BASE=TRUE

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

MAKE_BASE=TRUE

SML_PCH_1_DATA

SMBUS_PCH_DATAMAKE_BASE=TRUE

SMBUS_PCH_CLKMAKE_BASE=TRUE

MAKE_BASE=TRUEI2C_DPSDRVA_SCL

5

678121617181920222326272933363740414246

48495051525457616271

727374757785

34487583

34487583

162327293142

486277

81

6 3245 48 51

84

6 3245 48 51

84

6 3245 48 51

84

6 3245 48 51

84

16 23 2729 31 42

48 62 77

81

16 23 2729 31 42

48 62 77

81

16 23 2729 31 42

48 62 77

81

16 23 2729 31 42

48 62 77

81

16 23 2729 31 42

48 62 77

81

454884

454884

16 23 2729 31 42

48 62 77

81

162327293142

486277

81

162327293142

486277

81

64548636484

64548636484

678121617181920222326272933363740414246

484950515254576162

71727374757785

678121617181920222326272933363740414246

484950515254576162

71727374757785

67818242630313233485054557273

16 23 2729 31 42

48 62 77

81

16 23 2729 31 42

48 62 77

81

6 3245 48 54

55 84

6 3245 48 54

55 84

6 3245 48 54

55 84

6324548545584

6 3245 48 54

55 84

63245485184

6 32

45 48 54

55 84

6 3245 48 54

55 84

1681

1681

454884

454884

16 23 2729 31 42

48 62 77

81

16 23 2729 31 42

48 62 77

81

63245485184

67818242630313233485054557273

1681

1623272931424862

7781

1623272931424862

7781

6324548545584

162327293142

486277

81

4875

678121617181920222326272933363740414246

484950515254576162

71727374757785

45485184

45485184

45 48 5184

45 48 5184

45485184

45485184

1681

1623272931424862

7781

1623272931424862

7781

4875

2 1345678

PBUS Voltage Sense Enable & Filter

CPU VCore Load Side Current Sense / Filter

NTUD3169CZQ5300

IMVPISNS_ENG

PLACE_NEAR=U5340.5:3MM

C53401

PLACE_NEAR=R7510.4:5MM

4 42K

IMVPISNS_ENG

R5346PP3V3_S0678121617181920

2223262729333637

40414246484950515254

5761627172737475

7785



OUT

IN

OUT

S

S

D

N-CHANNEL

G

D

G

P-CHANNEL

OUT

S

S

D

N-CHANNEL

G

D

G

P-CHANNEL

IN

OUTIN

IN

V+

REFIN+

IN- OUT

GND

OUT

IN

IN

IN

IN

IN

IN

V+

V-THRM

V+

V-THRM

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

Max VOut: 3.3V at 19.77V Input

DC-In Voltage Sense Enable & Filter

Scale: 16.48A / VMax VOut: 3.3V at 54.4A

Gain:161.765x

EDP: 17.5A TDP :13.1A

CPU 1.05V VCCIO Current Sense / Filter

divider when AC present.

divider when in S0.

Enables PBUS VSense

(200V/V)

Sense R is R7640, 1mOhm

Max VOut: 3.3V at 16.5AScale: 5A / V

Gain: 200x

RTHEVENIN = 4573 Ohms

CPU Vcore Voltage Sense / Filter

Enables DC-In VSense

RTHEVENIN = 4573 Ohms

GFX/IG Vcore Voltage Sense / Filter

(Effective Sense R is 0.375mOhm

Sense R is 0.75mOhm

EDP: 53A TDP :36A

Sense R is R7510 & R7520

Max VOut: 3.3V at 27.2AScale: 8.24A / V

Gain:161.765xSense R is 0.75mOhmEDP: 26A TDP: 21.5A

Sense R is R7550

GFX/IG VCore Load Side Current Sense / Filter

Max VOut: 3.3V at 19.77V Input

due to averaging of the 2 cores)

45 46

0.22UF

X5R402

20%6.3V

PLACE_NEAR=U4900.N12:5MM

C53301

2

4.53K

MF-LF402

1%1/16W


R53301 2

7273

MF-LF402

1%1/16W

100KR53021

2

100K

MF-LF402

1%1/16W

R53011

2

45 46

0.22UF20%6.3V

402X5R

PLACE_NEAR=U4900.L8:5MM

C53041

2

27.4K

MF-LF402

1%PLACE_NEAR=U4900.L8:5MM1/16W

R53031

2

MF-LF

1%1/16W

402


5.49KR53041

2

NTUD3169CZSOT-963

6

3

2

5

1

4

45 46

27.4K

MF-LF402

1%1/16W PLACE_NEAR=U4900.N9:5MM

R53131

2

MF-LF402

1%1/16W

100KR53121

2

NTUD3169CZSOT-963

Q5310

6

3

2

5

1

4


0.22UF

X5R402

20%6.3V

C53141

2

5.49K

402

1/16W


MF-LF

1%

R53141

2

100K

MF-LF402

1%1/16W

R53111

2

45466364

45 46


4.53K

MF-LF402

1%1/16W

R53611 2


0.22UF

X5R402

20%6.3V

C53611

2

0.1uF

CERM402

20%10V

C53601

2

7085

7085


INA210SC70

CRITICAL

U5360

2

5

4

6

1

3

IMVPISNS_ENG

PLACE_NEAR=U4900.M11:5MM

4.53K

MF-LF402

1/16W1%

R53411 2

IMVPISNS_ENG

0.22UF

X5R402

20%

PLACE_NEAR=U4900.M11

6.3V

C53411

2

IMVPISNS_ENG X5R402

20%6.3V

0.22UF


C53511

2

10V20%

402CERM

0.1UFC5340

2

0.1%1/16WMF

IMVPISNS_ENG

2.21K

0402

R53431 2

IMVPISNS_ENG

MF-LF402

1%1/16W


4.53KR53511 2

715K0.1%

MF402

1/16W

IMVPISNS_ENG

R53441

2

6985

6985

IMVPISNS_ENG

1/16WMF

0.1%

2.21K

0402

R53421 2

IMVPISNS_ENG

1/16W0.1%

0402MF

4.42KR53521 2

4.42K

MF0402

0.1%1/16W

IMVPISNS_ENG

R53531 2

MF402

IMVPISNS_ENG

715K

1/16W0.1%

R53541

2

IMVPISNS_ENG

715K

MF402

0.1%1/16W

SIGNAL_MODEL=EMPTY

R53551 2

0402MF

0.1%1/16W

4.42K1 2

IMVPISNS_ENG

1/16W0.1%

MF

4.42K

0402

PLACE_NEAR=R7520.3:5MM R53471 2

686985

686985

6985

6985

OPA2333DFN

IMVPISNS_ENG

CRITICAL

U5340

3

2

1

9

4

8

IMVPISNS_ENG

CRITICAL

OPA2333DFN

U5340

5

6

7

9

4

8

470PF

CERM50V

402

10%

NOSTUFF

C5344 1

2

IMVPISNS_ENG

SIGNAL_MODEL=EMPTY1/16W0.1%

402MF

715KR53451 2

SIGNAL_MODEL=EMPTY

50VCERM

470PF

NOSTUFF

402

10%

C5345

1 2

NOSTUFF

470PF

50V10%

CERM402

C5354 1

2

NOSTUFF

SIGNAL_MODEL=EMPTY10%50VCERM

470PF

402

C5355

1 2


1/16W0.1%

4.42K

MF0402

IMVPISNS_ENG

R53481 2

MF

4.42K

0.1%1/16W

0402

IMVPISNS_ENG

R53491 2

SM

PLACE_NEAR=R7550.2:5 MM

XW5330

1 2

45 46


4.53K

MF-LF402

1%1/16W

R53201 2


0.22UF

X5R402

20%6.3V

C53201

2

PLACE_NEAR=R7510.2:5 MM

SMXW5320

1 2

SYNC_DSYNC_MASTER=LINDA_K90I

Voltage & Load Side Current

CPUIMVP_ISNS2_N

CPUIMVP_ISNS_N

CPUIMVP_ISUM_R_P

CPUIMVP_ISUM_R_N

CPUIMVP_ISUMG_R_NCPUIMVP_ISNS1G_N

CPUIMVP_ISNS1G_PSMC_GFX_ISENSE

CPUIMVP_ISUMG_R_P

CPUIMVP_ISUMG_IOUT

GND_SMC_AVSS

CPUIMVP_ISUM_IOUT

GND_SMC_AVSS

CPUIMVP_ISNS1_N

CPUIMVP_ISNS_PCPUIMVP_ISNS2_P

CPUIMVP_ISNS1_P

SMC_CPU_ISENSE

SMC_PBUS_VSENSE

PPBUS_G3H

CPUVSENSE_IN

SMC_DCIN_VSENSE

GND_SMC_AVSS

PPVCORE_S0_AXG

PPVCORE_S0_CPU

PPDCIN_G3H

SMC_BC_ACOK

PDCINVSENS_EN_L_DIV

CPUVCCIOS0_CS_PGND_SMC_AVSS

GFXVSENSE_IN

SMC_CPU_VSENSE

CPUVCCIO_IOUT SMC_CPUVCCIO_ISENSE

PP3V3_S0

GND_SMC_AVSS

PM_SLP_S3_R_L

GND_SMC_AVSS

PBUS_S0_VSENSE

DCINVSENS_EN_L

PBUSVSENS_EN_L_DIV

SMC_GFX_VSENSE

GND_SMC_AVSS

CPUVCCIOS0_CS_N

PBUSVSENS_EN_L

DCIN_S5_VSENSE

5

85

85

85

85

45 46 49 50

45 46 49 50

85

678364050636477

45 46 49 50

679121569

679121469

76364

45 46 49 50

678121617181920222326272933363740414246

48495051525457616271

727374757785

45 46 49 50

45 46 49 50

45 46 49 50

2 1345678



V+

REFIN+

IN- OUT

GND

IN

OUT

VER 1

VCC

A

1

0

B1

GND

B0

SELIN

IN

IN

OUTIN

OUTOUT

V+

REFIN+

IN- OUT

GNDIN

OUTOUT

V+

REFIN+

IN- OUT

GNDIN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

CHARGER BMON High Side (BATTERY DISCHAEGE) Current Sense, MUX & Filter

DC-In AMON

ISL6259 Gain: 20xScale: 2.5A / V

Max VOut: 3.3V at 8.25A



INA Solution

DC-IN (AMON) Current Sense Filter

Charger BMON (Production) Solution


Scale: 2.78A / V

ISL6259 Gain: 36x

across R7050

battery to PBUS (battery discharge)

From charger

NOTE: Monitoring current from

Scale: 2A / V


Gain: 50x

For engineering, stuff BMON_ENG

For production, stuff BMON_PROD


Scale: 2A / V

Gain: 50x(50V/V)(50V/V)

(50V/V)

Charger/Load side

OTHER High Side Current Sense / Filter

Battery side

EDP: 10.0A TDP :5.2A

Gain: 50x


Scale: 2A / V

Gain: 50x

INA (Engineering) Solution

EDP: 15.5A TDP :11.1A

Scale: 4A / V

COMPUTING High Side Current Sense / Filter


CERM10V

0.1uF20%

BMON:ENG

402

C54201

2

SC70

INA213PLACE_NEAR=R7050.3:5MM

CRITICAL

BMON:ENG

U5420

2

5

4

6

1

3

64

BMON:PROD

402MF-LF

5%1/16W

0

PLACE_NEAR=U5421.1:5MM

R5420

2 1

0.1uF

CERM402

20%10V

BMON:ENG

C5421 1

2

45 46

BMON:ENG

NC7SB3157P6XGSC70

U5421

43

1

2

6

5

45 46

6485

6485

45 46

X5R

PLACE_NEAR=U4900.K10:5MM

6.3V20%

402

0.22UF

C54311

2

PLACE_NEAR=U4900.K10:5MM

4.53K

MF-LF402

1%1/16W

R5431

1 264

20%

0.22UF

6.3VX5R402


C54031

2

402

1%

1/16W

4.53K

MF-LF


R5403

1 245 46

MF-LF


4.53K

1%1/16W

402

R5413

1 2


402X5R6.3V

0.22UF20%

C54131

2

45 46

45.3K


402

1/16W1%

MF-LF

R5422

1 2

10%0.022UF

CERM-X5R16V


402

C54221

2

BMON:ENG

1/16W5%

402MF-LF

100K

R54231

2

CRITICAL

SC70

INA213

U5400

2

5

4

6

1

3

67836404950636477

76567686970

10%

0201X5R-CERM

16V

0.1UF

C54011

2

402

0.1UF

CERM

20%10V

C54111

2

766

INA213SC70

CRITICAL

U5410

2

5

4

6

1

3

CRITICAL

1W

MF

0.010.5%

0612-3

R54101

2

3

4

67836404950636477

CRITICAL

1%1W

0612

0.005

MF

R54001

2

3

4


High Side Current Sen

PP3V3_S0

GND_SMC_AVSS


PPBUS_G3H

ISNS_HS_COMPUTING_P

ISNS_HS_COMPUTING_N

CHGR_CSO_R_P

PP3V3_S0

HS_OTHER_IOUT

BMON_AMUX_OUT

PPBUS_G3H

SMC_OTHER_HI_ISENSE

GND_SMC_AVSS

CHGR_CSO_R_N

SMC_BMON_ISENSE

GND_SMC_AVSS


HS_COMPUTING_IOUT

ISNS_HS_OTHER_P

ISNS_HS_OTHER_N

PP3V3_S3

CHGR_BMON

SMC_CPU_HI_ISENSE

GND_SMC_AVSS

SMC_DCIN_ISENSECHGR_AMON

BMON_INA_OUT SMC_BMON_MUX_SEL

5

678121617181920222326272933363740414246

48495051525457616271

727374757785

45 46 49 50

85

85

678121617181920222326272933363740414246

48495051525457616271

727374757785

45 46 49 50

45 46 49 50

85

678182426303132334854557273

45 46 49 50

2 1345678



BI

BI THRM_PAD

DN2/DP3

DP2/DN3

VDD

SMDATA

SMCLK

GND

DN1

DP1 THERM*/ADDR

ALERT*

BI

THERM*/ADDR

ALERT*

GND

VDD

DN

DP

SMDATA

SMCLK

THRMPAD

BI

BI

BI

BI






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

Placement note:

Use GND pin B1 on U3600 for N leg

Write Address: 0x98

Detect T29 Die Temperature

T29 Die

Placement note:

Detect Fin Stack Temperature

Read Address: 0x99

Placement note:

Place U5520 between PCH and T29 on TOP side

Placement note:

CPU Proximity/CPU Die/5V-3.3V Proximity

Detect CPU Die Temperature

Place U5510 under CPU

Detect DDR/5V/3.3V Proximity Temperature

Place Q5510 next to DDR/5V/3.3V supply on TOP side

PCH-T29 Proximity/FinStack

Place Q5520 on BOTTOM side close to finstack

Read Address: 0x99Write Address: 0x98

10K5%1/16W

MF-LF402

R55121

2402

5%

MF-LF

10K

1/16W

R55111

2

SOT732-3BC846BMXXH

Q5510 1

3

2


CERM402

50V10%

0.0022uF

SIGNAL_MODEL=EMPTY


C5511 1

2

985

985

DFN

CRITICAL

EMC1413U5510

83

5

2

4

6

10

9

7

11

1

BC846BMXXHSOT732-3

Q5520 1

3

2

345185

PLACE_NEAR=U5520.3:5mmPLACE_NEAR=U5520.2:5mm

SIGNAL_MODEL=EMPTY

CERM50V10%

402

0.0022uF

C5522 1

2

1/16WMF-LF402

5%

47R5520

1 2

CERM

0.1uF20%10V

402

C55201

2

402

5%

MF-LF

10K

1/16W

R55211

2

10K5%1/16WMF-LF402

R55221

2

PLACE_NEAR=U3600.B1:2mm

SMXW5520

1 2

EMC1412-A

CRITICAL

TQFN

U5520

63

2

5

8

7

4

9

1

PLACE_SIDE=BOTTOM

NOSTUFF

603

1/10W5%

MF-LF

10KR5523

1

2

632454884

632454884

45 48 84

45 48 84

0.1uF20%10VCERM402

C55101

2

1/16WMF-LF402

5%

47R5510

1 2

0.0022uF

402

10%50VCERM

SIGNAL_MODEL=EMPTY


C5512 1

2

Thermal Sensors


T29THMSNS_D2_N

VOLTAGE=3.3V


PP3V3_S0_CPUTHMSNS_R

CPU_THERMD_N

CPUTHMSNS_D2_N

CPUTHMSNS_ALERT_L

CPUTHMSNS_THM_LCPU_THERMD_P

PP3V3_S0

CPUTHMSNS_D2_P

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_0_S0_SDA

SMBUS_SMC_0_S0_SCL

PP3V3_S0_T29THMSNS_RMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

T29THMSNS_ALERT_L

T29THMSNS_THM_L

T29_THERMD_PMAKE_BASE=TRUE

T29_THERMD_N

T29_THERMD_P

T29THMSNS_D2_P

PP3V3_S0

5

85

85

678121617181920222326272933363740414246

48495051525457616271

727374757785

85

345185

85

85

678121617181920222326272933363740414246

48495051525457616271

727374757785

2 1345678



D

G

S






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

NC

NC

518S0521

GND

MOTOR CONTROL

TACH

5V DC47K

1/16W5%

MF-LF402

R5665

1 2

5%

402MF-LF1/16W

47K

R5660 1

2

5%1/16WMF-LF402

100K

R5661 1

2SSM3K15FV

SOD-VESM-HF

Q5660

3

1

2

CRITICAL

78171-0004M-RT-SM

J5601

5

6

1

2

3

4

Fan


FAN_RT_PWM

PP5V_S0

PP3V3_S0

SMC_FAN_0_CTL

FAN_RT_TACHSMC_FAN_0_TACH

5

6

6722424754656870727377

678121617181920222326272933363740414246

484950515457616271

727374757785

45

645

2 1345678

- TRACKPAD PICK BUTTONS

Keyboard ConnectorPIN NAME

36E-3 W

0 72 3

16.32E-6 W

0.255E-6 W

0 2

10 OHM

2.55 KOHM

60 ( )

60MA (MAX)VDD

80UA

V+TMP102- USB INTERFACES TO MLB

10UA

IC CURRENT R_SNS V_SNS POWER

0.0255 V

0.204 V

0 012

3V3 LDO 0.6 V

- SPI HOST TO Z2

PSOC USB CONTROLLER

32PP3V3 S4



D

G S

P 2_

4

P 2_

6

V D

D

P 0_

4

P 0_

2

P2_0

P2_2 P 0_

0

P2_3

P2_1

P4_7

P4_5

P4_3

P4_1

P3_7

P3_5

P3_3

P3_1

P5_7

P5_5

P5_3

P5_1

P 1_ 1

P 1_ 3

P 1_ 5

P 1_ 7

P 7_ 7

V S S

D + D - V D D

P 7_ 0

P 1_ 0

P 1_ 2

P 1_ 4

P 1_ 6

P5_0

P5_2

P5_4

P5_6

P3_0

P3_2

P3_4

P4_0

P4_2

P4_4

P4_6

P3_6

P 2_

5

P 2_

7

P 0_

3

V S

S

P 0_

5

P 0_

7

P 0_

6

PADTHRML

(SYM-VER2)

P 0_

1

IN

NC

NC

OUT

IN_A1

OUT_B

IN_A3_B2

GNDTHRM

OUT_A

VDD

IN_A2

IN_B1

PAD

(IPD)

(IPD)

(IPD)

(IPD)

OUT

D

G S

IN_B1

IN_A2

VDD

THRMGND

IN_A3_B2

OUT_B

IN_A1

OUT_A*(IPD)

(IPD)

(IPD)

(IPD)

PAD

OUT

IN

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

SMC Manual Reset & IsolationLeft shift, option & control keys combined with power button cause SMC RESET# assertion.

Keys ANDed with PSOC power to isolate when PSOC is not powered.

1.5 OHM

LID CLOSE => SMC_LID_LC < 0.50V

PLACE THESE COMPONENTS CLOSE TO J5800

THE TPAD BUTTONS WILL BE DISABLE

LID OPEN => SMC_LID_LC ~ 3.42V

THIS ASSUMES THERE’S A PP3V42_G3H PULL UP ON MLB

518S063

- KEYBOARD SCANNER

WHEN THE LID IS CLOSED

TPAD Buttons Disable

96E-6 W

75.2E-6 W

294E-6 W

0.72E-3 W

4.7 OHM

0.2 OHM

14MA (MAX)

4MA (MAX)

8MA (TYP)

60MA (MAX)VOUT 0.012 V

0.012 V

0.021 V

0.0188 VVIN

VDD

ISSP SDATA/I2C SDA

(PP3V3_S3_PSOC)

ISSP SCLK/I2C SCL

337S2983

18V BOOSTER

PSOC

SOD-VESM-HF

SSM3K15FVQ5701

3

12

4.7UF

BYPASS=U5701.49:50:11 mm

603X5R6.3V20%

C57061

2

BYPASS=U5701.49:50:8 mm

0.1UF

402X7R-CERM16V10%

C57051

250V

100PF

BYPASS=U5701.49:50:5 mm

5%

CERM402

C57041

2

0.1UF

402X7R-CERM16V

10%

BYPASS=U5701.22:19:8 mm

C57031

2

100PF

BYPASS=U5701.22:19:5 mm

402CERM50V

5%

C57021

2

BYPASS=U5701.22:19:11 mm

20%

6.3V603

4.7UF

X5R

C57011

2

24

1/16WMF-LF

5%

402

R57021 2

CRITICAL

OMIT

CY8C24794MLF

U5701

2 0

2 1

4 5

5 4

4 6

5 3

4 7

5 2

4 8

5 1

2 5

1 8

2 6

1 7

2 7

1 6

2 8

1 5

412

421

4 3

5 6

4 4

5 5

3310

349

358

367

376

385

394

403

2914

3013

3112

3211

2 4

2 3

57

2 2

4 9

1 9

5 0

402

5%

MF-LF1/16W

24R57011 2

454663

20%0.1UF

PLACEMENT_NOTE=NEAR J5713

402

10VCERM

C5710 1

2

1K

402

5%

MF-LF1/16W

R57101 2

1/16WMF-LF

1%

402

470R57141 2

402

1%

MF-LF1/16W

10KR57151 2

CRITICAL

FF14-30A-R11B-F-RT-SM

J5713

31

32

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

4

5

6

7

8

9

4546

402

5%

MF-LF1/16W

1.5R57042 1

0.1UF

X7R-CERM16V10%

402

C57551

2

X7R-CERM16V10%

402

0.1UFC57501

2

SLG4AP006TDFN

CRITICAL

U5750

5

2

3

7

6

4

8

9

1

5%1/16W

402MF-LF

0R57201 2

46

SOD-VESM-HF

SSM3K15FV

NO STUFFQ5702

3

12

TDFN

CRITICAL

SLG4AP015VU5755

5

2

3

7

6

4

8

9

1

4546

73

5%220K

MF-LF

402

1/16W

R57031

2

SYNC_DSYNC_MASTER=LINDA_K90I

WELLSPRING 1

PP3V3_S3_PSOC

MIN_NECK_WIDTH=0.20MMVOLTAGE=3.3V


PICKB_L

SMC_PME_S4_WAKE_L WS_KBD23

NC_PSOC_P1_3

TP_PSOC_SDA

Z2_MOSI

WS_CONTROL_KEY

PSOC_VBUS_EN

Z2_RESET

WS_KBD19

WS_KBD22

BUTTON_DISABLE

WS_KBD20Z2_HOST_INTN

WS_LEFT_OPTION_KEY

PSOC_F_CS_L

PSOC_MOSI

WS_LEFT_SHIFT_KEY

PSOC_MISO

SMC_TPAD_RST_L

PSOC_SCLK

TP_PSOC_SCL

TP_ISSP_SCLK_P1_1

USB_TPAD_R_N

TP_P7_7

Z2_DEBUG3

Z2_KEY_ACT_L

WS_KBD6

SMC_ONOFF_L

USB_TPAD_R_P

WS_KBD9

WS_CONTROL_KBD

WS_LEFT_SHIFT_KBD

WS_KBD_ONOFF_L

Z2_CLKIN

SMC_LID

BUTTON_DISABLE

USB_TPAD_N

USB_TPAD_P

WS_KBD3

WS_KBD2

WS_KBD1

WS_KBD7

WS_KBD8

WS_KBD10

WS_KBD11

WS_KBD13

WS_KBD12

WS_KBD14

WS_KBD16N

WS_KBD17

WS_KBD6

WS_KBD4

WS_KBD5

WS_KBD18

WS_KBD1

WS_KBD2

WS_KBD3

WS_KBD4

WS_KBD5

WS_KBD18WS_KBD17

WS_KBD14

WS_KBD13

WS_KBD11

WS_KBD12

WS_KBD10

WS_KBD9

WS_KBD21

WS_KBD20

WS_KBD19

WS_KBD22

WS_KBD23

WS_KBD7

WS_KBD8

WS_KBD15_CAP

WS_KBD16N

WS_KBD15_C

WS_KBD16_NUM

WS_LEFT_OPTION_KEY

TP_ISSP_SDATA_P1_0

WS_LEFT_OPTION_KBD

WS_KBD15_C

SMC_TPAD_RST

WS_CONTROL_KEY

WS_CONTROL_KBD

PP3V42_G3H

WS_LEFT_OPTION_KBD

PP3V42_G3H

PP3V3_S4

WS_KBD21

PP3V3_S4

WS_LEFT_SHIFT_KBD

PP3V3_S4

WS_LEFT_SHIFT_KEY

Z2_MISO

Z2_CS_L

Z2_SCLK

5

654

6 53

6

654

53

654

6 53

6 53

53

6 53654

53

654

654

53

654

654

8

85

654

654

653

85

6 53

653

653

6

6 54

53

2480

2480

6 53

6 53

6 53

6 53

6 53

6 53

6 53

6 53

6 53

6 53

53

6 53

6 53

6 53

6 53

6 53

653

653

653

653

653

653

653

653

653

653

653

653

653

653

653

653

653

653

653

653

6

53

53

6

53

8

653

53

53

653

6726434546474853636473

653

6726434546474853636473

746535472

6 53

746535472

653

746535472

53

654

654

654

2 1345678



CTRL

P G N D

THRML

L

VIN

DO

FB

SW

PAD G N D

BI

THRML

CAP

SW

LED

VIN

CTRL

PADGND

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

BOOSTER DESIGN CONSIDERATION:

(SMC_KBDLED_PRESENT_L)

If LOW, keyboard backlight present

- STARTUP TIME LESS THAN 2MS

Keyboard Backlight Connector

J5815 pin 1 is grounded

on keyboard backlight flex

518S0691

grounded when KB BL flex connected.

R5853 always stuffed, R5854 only

If HIGH, keyboard backlight not present

To detect Keyboard backlight, SMC will

516S0689

- R5812,R5813,C5818 MODIFIED

- RIPPLE TO MEET ERS

IPD Flex Connector

- 100-300 KHZ CLEAN SPECTRUM

- DROOP LINE REGULATION

CONFRIM IF THIS CAN BE CONNECTED TO S3!!

- POWER CONSUMPTION

BOOSTER +18.5VDC FOR SENSORS

K6 NOTES : C5850 HAS BYPASS PROPERTY, SHOULD BE ADDED INCASE THIS PAGE IS SYNC’ED FROM T27

tristate and read SMC_SYS_KBDLED:

Keyboard Backlight Driver & Detection

CRITICAL

55560-0228M-ST-SM

J5800

1

10

1112

1314

1516

1718

19

2

20

2122

34

56

78

9

B0520WSXG

SOD-323

CRITICAL

D58021 2

1UF25V

603-1X5R

10%

C5819 1

2

1/16WMF-LF

5%

402

0R58061 2

10%

X7R-CERM402

0.1UF16V

C5816 1

2

0

1/16WMF-LF

5%

402

R58052 1

16V

2.2UF

603X5R

10%

C58171

2

TPS61045QFN

CRITICAL

U5805

53

4

6

1

7

8

9

2

VLF3010AT-SM-HF

3.3UH-870MA

CRITICAL

L5801

1 2

402MF-LF1/16W1%100KR58111

2

45

4.7K

KB_BL

402MF-LF1/16W5%

R58541

2

MF-LF

470K5%

1/16W

402

R58531

2

LT3491DFN

CRITICAL

KB_BL

U5850

4

6

2

5

3

7

1

1/16W5%

NO STUFF

402MF-LF

10KR58521

2

BYPASS=U5850.1:2:2 MM

10%

X5R402-1

1UF10V

KB_BL

C5850 1

2

KB_BL

402

1%

MF-LF1/16W

10R58551

2

CRITICAL

KB_BL

1098AS-SM

10UH-0.58A-0.35OHML5850

1 2

KB_BL

35V

1UF

603X5R

10%

C58551

2

CRITICAL

KB_BL

FF18-4A-R11AD-B-3HF-RT-SM

J5815

1

2

3

4

5%

CERM402

39PF50V

C5818 1

2402MF-LF1/16W1%1M

R58121

2

71.5K1%1/16WMF-LF402

R58131

2

NO STUFF

1/16W5%

0

MF-LF 402

R5800

1 2

WELLSPRING 2SYNC_DSYNC_MASTER=LINDA_K90I

PP18V5_S5

SMBUS_SMC_A_S3_SCL

PP3V3_S4

P3V3_S3_TPAD

MIN_LINE_WIDTH=0.40MMMIN_NECK_WIDTH=0.20MMVOLTAGE=3.3V

Z2_CLKIN

PP3V3_S3


SWITCH_NODE=TRUE

KBDLED_SW

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.25 MMKBDLED_CAP

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MMKBDLED_ANODE

PP5V_S3_P18V5S5MIN_LINE_WIDTH=0.50MM

VOLTAGE=5VMIN_NECK_WIDTH=0.20MM

VOLTAGE=18.5VMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MMPP18V5_S5

PP5V_S3_P18V5S5_VIN


VOLTAGE=5V

PP18V5_S5_RMIN_LINE_WIDTH=0.50MMMIN_NECK_WIDTH=0.20MMVOLTAGE=18.5V

P18V5S5_FB

PSOC_F_CS_L

PICKB_L

PSOC_MISO

PSOC_MOSI

PSOC_SCLK

SMBUS_SMC_A_S3_SDA

Z2_KEY_ACT_LZ2_CS_LZ2_DEBUG3

Z2_MOSI

Z2_MISO

Z2_SCLK

Z2_BOOST_EN

Z2_HOST_INTNZ2_BOOST_EN

PP3V3_S0

PP5V_S5

SMC_KDBLED_PRESENT_L

PP5V_S0

SMC_SYS_KBDLED

Z2_RESET

P18V5S5_SW

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM

5

6 54

6 32 45 48 55 84

7465372

653

678182426303132334850557273

6

6 54

6 53

6 53

6 53

6 53

6 53

6 32 45 48 55 84

6 53653

653

653

653

653

654

653

6 54

678121617181920222326272933363740414246

48495051525761627172

7374757785

76672

6

6722424752656870727377

6 53

2 1345678



INT2

VDD VDD_IO

SDO

GND

NC

RESERVED

INT1

CS

SDA/SDI/SDO

SCL/SPC

NC

NC

OUT

BI

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

NOTE: SDA and SCL have internal pull-ups to VDD_IO.

in correct orientation

SMS_ADDR_SELECT=1 Addr: 0x32(Wr)/0x33(Rd)

SMS_ADDR_SELECT=0 Addr: 0x30(Wr)/0x31(Rd)

Front of system

338S0687

Circle indicates pin 1 location when placed

Desired orientation when placed on top-side:

+Z (up)

+Y

+X

PLACE_SIDE=TOP

PLACEMENT_NOTE=See schematic for orientation.

LGA

LIS331DLH

CRITICAL

U5920

8

5 1 2

1 3

1 6

11

9

2

3

10

15

4

6

7

1 4

1

BYPASS=U5920.14:13:8 mm

402

16V10%

X5R

0.1UF

C59221

2

BYPASS=U5920.14:13:8 mm

603

X5R

6.3V

10UF20%

C5926 1

2

10K

402

1/16W

MF-LF

5%

R59201

2

402

1/16WMF-LF

5%

10K

R59211

2402

1/16WMF-LF

0

5%

R5922

1 2

402

1/16WMF-LF

5%

0R5923

1 2

10K

1/16W

402

MF-LF

5%

R59241

2

4546

6 32 45 48 54 84

6 32 45 48 54 84


Digital Acceleromet

SMS_I2C_SEL

PP3V3_S3

I2C_SMC_SMS_SCL_R

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCL

SMS_ADDR_SELECT

I2C_SMC_SMS_SDA_RSMS_INT_L

TP_SMS_INT2

5

678182426303132334850547273

2 1345678



OUTIN

IN IN

IN

WP*

SI

HOLD*

VSS

SCK

CE*

VDD

SO






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

NOTE: If HOLD* is asserted

ROM will ignore SPI cycles.

402

20%

CERM

0.1UF

10V

C6100 1

2

402

3.3K5%

MF-LF1/16W

R61011

2

47

47

47 47

61947

OMIT

CRITICAL

SOIC

64MBIT

SST25VF064C

U6100

1

7

6 5

2

8

4

3

SPI ROM


SPI_MLB_CLK

SPI_WP_L

SPI_MLB_CS_L

PP3V3_S5

SPIROM_USE_MLB

SPI_MLB_MISO

SPI_MLB_MOSI

6

678171920222324263046667273747685

IN

2 1345678

APPLE P/N 353S2355

U6201 CONSUMES ?MA MAX. FROM 1.5V RAIL

AUDIO CODEC

716202226425771

FERR-220-OHML6201

1 2

PP1V8R1V5_S0_AUDIO_DIG

PP5V_S3

PP1V5_S0

6 7 30 32 42 43 44 46 57 59 6061 66 67 72



IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

OUTOUT

NR/FB

NC

IN

EN

GND

OUT

OUT

OUT

IN

IN

IN

OUT

IN

OUT/SPDIF_OUT2

VL_HD

SENSE_A

GPIO1/DMIC_SDA2

GPIO0/DMIC_SDA1

VHP_FILT+

GPIO2

RESET*

LINEOUT_L1-

VBIAS_DAC

FLYP

VA_REFVD

GPIO3

VHP_FILT-

LINEOUT_R1-

LINEOUT_R1+

LINEOUT_R2-

SPDIF_OUT

LINEIN_C-

FLYC

FLYN

SPDIF_IN

LINEOUT_L1+

THRM_PAD

VA_HP

HPOUT_R

HPREF

VCOM

AGND

VA

LINEIN_R+

LINEIN_L+

MICIN_L+

MICIN_L-

MICBIAS

SYNC

DGND

DMIC_SCL

HPOUT_L

SDI

SDO

VL_IF

BITCLK

MICIN_R-

MICIN_R+

VREF+_ADC

LINEOUT_L2+

LINEOUT_L2-

LINEOUT_R2+






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

RT. SPKR AMP. SIG. SOURCE

NC

DAC2/3 FSOUTPUTSE= 1.34VRMS

SE FSINPUT= 1.22VRMS

APPLE P/N 353S2456

DIFF FSINPUT= 2.45VRMS

BI MIC CODEC INPUT

EXT MIC CODEC INPUT

LFT. SPKR AMP. SIG. SOURCE

FR SPKR AMP. SIG. SOURCE

NC

NC

NC

4.5V POWER SUPPLY FOR CODEC

GPIO1 = HP AMP CONTROL

GPIO2 = ANALOG SW CONTROL

DAC1 FSOUTPUT= 1.34VRMS

DAC2/3 FSOUTPUTDIFF= 2.67VRMS

NOTES ON CODEC I/O

Digial Mic

GPIO3 = SPKR AMP SHDN CONTROL

603-1X5R

20%

CRITICAL

6.3V

10UF

C6221 1

2

SM

XW6201

1 2

6.3V20%

CERM

402-LF

2.2UF

C6222 1

26.3VCERM

20%2.2UF

402-LF

C62231

2

X5R603-1

6.3V20%

10UF

CRITICAL

C62201

2

16V

20%

TANT

1UF

0603-SM

C62241

2

X5R-1

4.7UF20%

402

4V

C6210 1

2

1681

1681

1681

1681

1681

62

60

59

59

60 85

60 85

60 85

62

62

62

62

62

20%

603-1

X5R6.3V

10UFCRITICAL

C62131

2

402X5R

10V10%

1UFC62011

2

1UF

X5R

402

10V10%

C62031

2

0402

FERR-220-OHM

L6200

1 2

2.21K

1/16W

402

MF-LF

1%

R6200

1 2

402

X5R10V10%1UF

C62001

2

16V

X5R402

0.1UF10%

C6215 1

2

402

0.1UF

X5R

16V10%

C62111

2

X5R

0.1UF

16V10%

402

C6214 1

2

1%

MF-LF

402

1/16W

2.67K

R62101

2

NOSTUFF

MF-LF

5%

402

1/16W

100K

R62131

2

402MF-LF

1/16W5%

22

R6211

1 2

16V

0.1UF

X5R

10%

402

C6218 1

2

10UF

16V

2012-LLP

20%

TANT-POLY

C62251

2

10UF

16V

20%

TANT-POLY

2012-LLP

C62171

2

TANT-POLY16V

2012-LLP

10UF20%

C62191

2

6730324243444657596061666772

6781216171819202223262729333637404142

464849505152545761

6271727374757785

61

657

6 57

61

6 57

X5R402-1

10V10%

1UF

C6216 1

2

TPS71745SON

CRITICAL

U6200

4

2

6

5

3

1

402

X7R-CERM

16V10%

0.1UF

C6202 1

2

60 85

60 85

60 85

SM

XW6200

1 2

NOSTUFF

5%

MF-LF

0

1/16W

402

R6201

1 2

0402

402

1/16W

5%

39

MF-LF

R6212

1 2

58

58

58

59

16V

X5R

10%

0.1UF

402

C62261

2

6781216171819202223262729333637404142

464849505152545761

6271727374757785

MF-LF

22

402

5%

1/16W

R6214

1 2

61

CS4206B

CRITICAL

QFN

U6201

2 6

6

7

4

43

42

45

2

12

14

15

38

40

39

22

21

23

34

35

30

31

37

36

33

32

16

17

18

20

1911

8

5

13

47

48

10

4 9

2 5

4 6

2 4

29

28

9

41

44

3

1

27

AUDIO: CODEC/REGULA

SSYNC_MASTER=LENG_K90I

AUD_SENSE_A

AUD_GPIO_1

TP_AUD_DMIC_SDATA

CS4206_FP

AUD_GPIO_2

HDA_RST_L

TP_AUD_LO1_N_L

VBIAS_DAC

CS4206_FLYP

PP4V5_AUDIO_ANALOG

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 MM

AUD_GPIO_3

CS4206_FN

AUD_LO1_N_R

AUD_LO1_P_R

AUD_LO2_N_R

AUD_SPDIF_OUT_CHIP

AUD_LI_REF

CS4206_FLYC

CS4206_FLYN

TP_AUD_SPDIF_IN

TP_AUD_LO1_P_L


VOLTAGE=0VMIN_NECK_WIDTH=0.2MMGND_AUDIO_CODEC

AUD_HP_PORT_RMIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM

AUD_HP_PORT_REFMIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM

CS4206_VCOM

AUD_LI_P_R

AUD_LI_P_L

AUD_MIC_INP_L

AUD_MIC_INN_L

AUD_CODEC_MICBIAS

HDA_SYNC

AUD_DMIC_SCL

MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM AUD_HP_PORT_L

AUD_SDI_R

HDA_SDOUT

PP3V3_S0

HDA_BIT_CLK

AUD_MIC_INN_R

AUD_MIC_INP_R

CS4206_VREF_ADC

AUD_LO2_P_L

AUD_LO2_N_L

AUD_LO2_P_R

TP_AUD_DMIC_CLK TP_AUD_DMIC_CLKMAKE_BASE=TRUE

TP_AUD_DMIC_SDATAMAKE_BASE=TRUETP_AUD_DMIC_SDATA

TP_AUD_DMIC_CLK

GND_AUDIO_CODEC

GND_AUDIO_CODEC

PP3V3_S0

PP5V_S3 4V5_REG_IN

VOLTAGE=5VMIN_NECK_WIDTH=0.10MMMIN_LINE_WIDTH=0.15MM

GND_AUDIO_HP_AMP

VOLTAGE=4.5VMIN_NECK_WIDTH=0.10MM

PP4V5_AUDIO_ANALOG


VOLTAGE=0V

GND_AUDIO_HP_AMPMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM

4V5_NR4V5_REG_EN

HDA_SDIN0

AUD_SPDIF_OUT

PP4V5_AUDIO_ANALOG

PP1V5_S0

GND_AUDIO_HP_AMP

6

57

57586162

81

57 57

57 57

57

57 58 61 62

57 58 61 62

57 59 61

57 59 61

7 16 20 22 26 42 57 71

575961

2 1345678



IN

IN

IN

OUT

OUT

OUT

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

VIN = 2VRMS, CODEC VIN = 1.14 VRMS

LINE INPUT VOLTAGE DIVIDER

CODEC RIN = 20K OHMS

FC_HP = 3.6 HZNET RIN = 10.36K OHMS (INCLUDING PULL-DOWNS AT ANALOG SWITCH COM PINS)

FC_LP = 43KHZ

61

61

61

57

57

57

576162

20%

X5R-CERM

CRITICAL

2.2UF

10V

402

C6301

1 2

CRITICAL

402X5R-CERM

2.2UF

10V20%

C6302

1 2

X5R-CERM

CRITICAL

2.2UF

10V

402

20%

C6312

1 2

CRITICAL

X5R-CERM

20%10V

402

2.2UFC6311

1 2

7.87K

1%

402

1/16WMF-LF

R63011 2

7.87K

1%

402

1/16WMF-LF

R63111 2

21.5K1%

402

1/16WMF-LF

R63021

2

21.5K1%

402

1/16WMF-LF

R63121

2

10%820PF

402CERM50V

NOSTUFF

C63031

2

10%820PF

402CERM50V

NOSTUFF

C63131

2

1/16WMF-LF402

1%10R63001

2

AUDIO: LINE INPUT F

MIN_NECK_WIDTH=.1MMMIN_LINE_WIDTH=.1MM

AUD_LI_REFMIN_NECK_WIDTH=.1MMMIN_LINE_WIDTH=.1MM

AUD_LI_GND

AUD_LI_L_DIVMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM MIN_NECK_WIDTH=.1MM

MIN_LINE_WIDTH=.1MMAUD_LI_P_L

AUD_LI_R


AUD_LI_P_RMIN_LINE_WIDTH=.1MMMIN_NECK_WIDTH=.1MM

AUD_LI_L


MIN_NECK_WIDTH=.1MMMIN_LINE_WIDTH=.1MMAUD_LI_R_DIV

GND_AUDIO_CODEC

6

2 1345678

FOR PROTO2, STUFF R6521 AND NO STUFF R6520 AND R6522 UNTIL

RE-TASKABLE IO SW SUPPORT AVAILABLE (FORCES IO INTO OUTPUT MODE).



S V S S

INL

SHDN*

INR

VDD

P V S S

P G N D

S G N D

T H R M

OUTR

OUTL

C1PC1N

P A D

IN

IN

IN

OUT

OUT

IN

IN

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

ZOBEL NETWORK & 1ST ORDER DAC FILTER PLACEHOLDER

APN: 353S1637

MAX9724 GAIN/FILTER COMPONENTS

NC

HP/LO AMP

AV_PB = -1V/V, FC_LPF = 35.2KHZ

NC

16V

CRITICAL

X7R-CERM

402

10%

0.1UF

C6500 1

2

5%

1/16W

MF-LF

402

39

R65001

2

CRITICAL

402

X7R-CERM

16V

10%

0.1UF

C6510 1

2

1/16W

MF-LF

402

395%

R65101

2

CRITICAL

TQFN

MAX9724A

U6500

3

1

6

8

11

10

2 4 7

5

9 1 3

1 2

CRITICAL

10%1UF

X5R

10V

402

C65221

2

10V10%1UF

CRITICAL

X5R

402

C65231

2

CRITICAL

10V

X5R

10%1UF

402

C65241

2

6.3V20%

10UF

X5R603

C65211

2

10%

X7R-CERM

0.1UF

16V

402

C65201

2

FERR-120-OHM-1.5A

0402-LF

L6520

1 2

5%

MF-LF1/16W

100K

402

R65221

2

1/16W

MF-LF

13.7K

1%

402

R6531

1 2

1/16W1%

13.7K

MF-LF

402

R6530

1 2

MF-LF

1/16W

13.7K

1%

402

R6533

1 2

MF-LF1/16W

13.7K

1%

402

R6532

1 2

5%

330PF

CRITICAL

COG50V

402

C6530

1 2

50V

COG

330PF

5%

CRITICAL

402

C6531

1 2

0

MF-LF

402

1/16W

5%

R6520

1 2

0

MF-LF

1/16W

NO STUFF

5%

402

R65211

2

5759

5759

57

59 61

59 61

1%2.21K

1/16WMF-LF402

R65231

2

1%2.21K

1/16WMF-LF402

R65241

2

5759

575961

5759


AUDIO: HEADPHONE FIL

GND_AUDIO_HP_AMP

AUD_GPIO_1_R

AUD_LO_AMP_INR_M

MAX9724_SVSS

MAX9724_C1N

MAX9724_C1P

AUD_LO_AMP_INR_M

AUD_HP_ZOBEL_L

AUD_HP_PORT_L

AUD_HP_PORT_R

AUD_HP_ZOBEL_R

GND_AUDIO_HP_AMP

AUD_LO_AMP_OUTRAUD_HP_PORT_R

AUD_HP_PORT_LAUD_LO_AMP_INL_M

PP5V_S3

AUD_LO_AMP_OUTL

AUD_LO_AMP_INL_M

AUD_GPIO_1

AUD_LO_AMP_OUTL




MIN_LINE_WIDTH=0.2MMAUD_LO_AMP_OUTR

AUD_PP5V_F



6

575961

59

59

59

67303242434446576061666772

59

2 1345678

SATELLITE & SUB TWEETER AMPLIFIER

APN:353S2888

SATELLITE 169 HZ < FC < 282 HZ



IN

IN

IN

IN

IN

IN

IN

IN-

IN+ OUT+

OUT-

GAINSHDN*

PVDD

NC

PGND

IN-

IN+ OUT+

OUT-

GAINSHDN*

PVDD

NC

PGND

IN-

IN+ OUT+

OUT-

GAINSHDN*

PVDD

NC

PGND






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

GAIN

SUB

ALIAS OF PP5VLT_S3, MIN_LINE_WIDTH=0.60MM, MIN_NECK_WIDTH=0.20MM

SATELLITE

3DB

80 HZ < FC < 132 HZ

169 HZ < FC < 282 HZ



0.0047UF

25V

CRITICAL

CERM402

10%

C6610

1 25785

5785

X5R

10%0.1UF

16V

402

C6607 1

2

FERR-1000-OHM

0402

L6620

1 2

FERR-1000-OHM

0402

L6610

1 2

FERR-1000-OHM

0402

L6630

1 25785

402

10%

X5R

0.1UF

16V

C6609 1

2

X5R

10%0.1UF

16V

402

C6608 1

2

2012-LLP

47UF

TANT16.3V20%

CRITICAL

C66011

2

20%

100UF

6.3VTANT

CASE-AL1

CRITICAL

C66031

2

TANT1

47UF20%6.3V

2012-LLP

CRITICAL

C66051

2

5%

1/16W

402MF-LF

0R6610

1 257

402

5%1/16W

100K

MF-LF

R66111

2

0402

FERR-1000-OHML6611

1 25785

FERR-1000-OHM

0402

L6621

1 25785

FERR-1000-OHM

0402

L6631

1 25785

0.0047UF

25V

CRITICAL

10%

CERM402

C6611

1 2

0.0047UF

25V

CRITICAL

CERM

10%

402

C6630

1 2

0.0047UF

25V

CRITICAL

10%

CERM402

C6631

1 2

CRITICAL

0402

25V

X7R

0.022UF

10%

C6621

1 2

10%

0402

0.022UF

X7R

25V

CRITICAL

C6620

1 2

MAX98300

CRITICAL

WLPU6610

C3

B3

A3

B2

C1

B1

A 2

A 1

C2

MF-LF

100K

1/16W5%

402

R66121

2

MF-LF

100K

1/16W5%

SPKAMP2_GAIN

402

R66221

2

CRITICAL

MAX98300WLP

U6620

C3

B3

A3

B2

C1

B1

A 2

A 1

C2

MAX98300

CRITICAL

WLP

U6630

C3

B3

A3

B2

C1

B1

A 2

A 1

C2

MF-LF

100K

1/16W5%

402

R66321

2

AUDI0: SPEAKER AMP


SSM2315_R_P

PP5V_S3

AUD_GPIO_3

SPKRAMP_SHDN

PP5V_S3

PP5V_S3

SPKRAMP_INR_P

AUD_LO1_P_R

SPKRAMP_SHDN

AUD_LO1_N_R

AUD_LO2_P_L SPKRAMP_INL_P


SPKRAMP_L_P_OUT


SPKAMP3_GAIN



SPKRAMP_L_N_OUT

SPKRAMP_SHDN

SSM2315_L_NSPKRAMP_INL_N

SSM2315_L_P

SSM2315_SUB_N

AUD_LO2_N_L


SPKRAMP_R_P_OUT




SPKRAMP_R_N_OUT

SPKRAMP_SUB_N_OUT




SPKRAMP_SUB_P_OUT


SSM2315_SUB_P

AUD_LO2_P_R

SPKRAMP_INSUB_P

SSM2315_R_N

SPKRAMP_INSUB_N

AUD_LO2_N_R SPKRAMP_INR_N

SPKAMP1_GAIN

6

85

6730324243444657596061666772

60

6730324243444657596061666772

6730324243444657596061666772

85

60

85 6 61 85

6 61 85

60

8585

85

85

6 61 85

6 61 85

6 61 85

6 61 85

85

85

85

85

85

OUT

IN

2 1345678

AUDIO JACK: LI/LO/HP CONNECTOR, SPDIF TX

FERR-1000-OHML6702

FERR-1000-OHM

0402

L6701

1 262

57

HS_MIC_HIPP3V3_S0

AUD_SPDIF_OUT

6781216171819202223262729333637

4041424648495051

5254576271727374

757785



IN

IN

IN

IN

IN

IN

OUT

OUT

BI

BI

BI

BI

RIGHT

MIC

AUDIO

GND

LEFT

SWITCH

DETECT

B - VCC

POF

SHIELD

SHELL

PINS

C - GND

A - VIN

OPERATING VOLTAGE 3.3

IN

IN

OUT

OUT

IN

VCC

COM1

COM2

EN*

NC1

CB

NO1

NEG

GND

NO2

NC2

OUT

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

ANALOG MIC CONNECTOR

APN:518S0

C6760 - C6763 ARE FOR FILTERING POTENTIAL FSB NOISE COUPLED ON SPKR LINES

SPEAKER CONNECTOR

ANALOG AUDIO IO SWITCH

APN: 353S2803

GPIO0 = 1 AND GPIO1 = 0 --> LI PATH SELECTED

APN:518S0519

APN:518S0520

APN:514-0671

CHASSIS GND STITCHES

GND STUFFING OPTIONS FOR CMOS SWITCH

GPIO0 = 0 AND GPIO1 = 1 --> HP PATH SELECTED

(AUD_CONN_GND)

CERM

6.3V

10%

402

1UF

C67001

2

66085

66085

66085

66085

66085

66085

CRITICA

M-RT-S

78171-0

J670

5

6

1

2

3

4

78171-0M-RT-SM

CRITIC

J6702

3

4

1

2

CRITICAL

6.8V-100PF402

DZ6704

1

2

402

6.8V-100PF

CRITICAL

DZ6703

1

2

6.8V-100PF

CRITICAL

402

DZ6700

1

2

CRITICAL

402

6.8V-100PF

DZ6705

1

2

M-RT-SM

78171-0003

CRITICAL

J6701

4

5

1

2

3

NO STUFF

33PF

50V

402

5%

CERM

C67611

2

NO STUFF

5%

402

33PF

50V

CERM

C67601

2

NO STUFF

50V5%33PF

402

CERM

C67621

2

33PF

402

CERM50V5%

NO STUFFC67631

2

MF-LF

1/16W5%

0

402

R6760

1 2

0402

1 262

402

6.8V-100PF

CRITICAL

DZ6701

1

2

57

10%

0.0033UF

50VCERM402

C67111

2

SM

XW6700

1 2

SM

XW6701

1 2

61

61

0

5%

1/16W

MF-LF402

R67141 2

1/16WMF-LF

402

0

5%

R6715

1 2

SM

XW6711

1 2

SM

XW6710

1 2

0

5%

1/16WMF-LF402

R6717

1 2

0

5%

1/16W

402MF-LF

R6718

1 2

402

5%

0

1/16WMF-LF

R6719

1 2

MF-LF

1/16W5%

0

402

R6716

1 2

61

61

100K

1/16W

MF-LF

5%

402

R67211

2

402X5R

1UF

10V10%

C67101

2

F-RT-TH

CRITICAL

SPDIF-TXRX-K24

J6700

5

4

10

11

12

13

7

8

9

1

6

3

2

1/16W

24K

MF-LF

5%

402

R67121

2

5%

24K

MF-LF

1/16W

402

R67131

2

NOSTUFF

MF-LF

5%

0

1/16W

402

R6727

1 2

58

58

59

59

57

SM

XW6702

1 2

MAX14560EWC+WLP

CRITICAL

U6700

C2

B4

B1

B2

B 3

C 3

C4

C1

A2

A4

A1

A 3

FERR-120-OHM-1.5A

0402-LF

CRITICAL

L6703

1 2

FERR-220-OHM

CRITICAL

0402

L6705

1 2

CRITICAL

0402

FERR-220-OHML6704

1 2

62

62

10K

402

5%

MF-LF1/16W

R6700

1 2

1/16W5%

MF-LF

4.7

402

R6701

1 2

100PF

402

5%

CERM50V

C67011

2

SYNC_MASTER=LENG_K90I

AUDIO: JACK

S

VOLTAGE=0V

GND_CHASSIS_AUDIO_JACK

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.1MM

AUD_GPIO_2

VOLTAGE=0V

AUD_SWITCH_GND



AUD_CONNJ1_SLEEVEDET



AUD_CONN_GND


MIN_NECK_WIDTH=0.15MM AUD_CONN_R



AUD_CONN_L

SPKRAMP_SUB_P_OUT

AUD_LI_L_SWITCH

SWITCH_CP

AUD_LI_R_SWITCH

AUD_LO_AMP_OUTR_SWITCH

AUD_CONNJ1_MIC

SPKRAMP_SUB_N_OUT

SPKRAMP_L_N_OUT

BI_MIC_LO

BI_MIC_SHIELD

BI_MIC_HI

AUD_CONN_GND

AUD_LI_GND

SPKRAMP_L_P_OUT

SPKRAMP_R_P_OUT

GND_AUDIO_HP_AMP

AUD_HP_PORT_REF

AUD_J1_TIPDET_R

GND_AUDIO_CODEC

AUD_LO_AMP_OUTL_SWITCH

AUD_CONNJ1_TIPDET

AUD_CONN_L

AUD_LI_R

AUD_LI_L

AUD_J1_SLEEVEDET_R

AUD_CONNJ1_RING

SPKRAMP_R_N_OUT

AUD_LO_AMP_OUTL

AUD_LO_AMP_OUTR

PP5V_S3

AUD_CONNJ1_SLEEVE


AUD_CONN_R

AUD_CONNJ1_TIP

HS_MIC_LO

6

61

662

662

662

61

58

57 59

575862

67303242434446575960666772

2 1345678

HP=80HZ, LP=8.82KHZ

N/A

N/A

0X0D (B)

0X09 (A)AND UI ELEMENT

0X09 (A)

DET ASSIGNMENTMUTE CONTROL

GPIO_3

GPIO_3

N/A

PIN COMPLEX

0X09 (9,A)

0X0A (10)

0X10 (16)

0X0B (11)

N/A

VOLUME

0X02 (2)

0X03 (03)

0X04 (4)

0X08 (8)

CODEC INPUT SIGNAL PATHS

SATELLITES

SUB

SPDIF OUT

HP/LINE OUT

LINE IN

FUNCTION

0X03 (3)

0X04 (4)

0X05 (5)

0X02 (2)

0X05 (5) 0X0C (12) GPIO_2 AND GPIO_1

GPIO_2 AND GPIO_1

CONVERTER

CODEC OUTPUT SIGNAL PATHS

PORT B LEFT(HEADSET MIC)

APN:353S2640

WCSP MIKEY 1A

FERR-1000-OHM

MIKEY

0402

L6880

1 2

CRITICAL

PP3V3_S0

VOLTAGE=3.3VMIN_NECK_WIDTH=0.10MMMIN_LINE_WIDTH=0.10MM

PP3V3_S0_HS_RX678121617181920222326272933363740414246

48495051525457616271

727374757785



IN

OUT

IN

D

SG

D

SG

D

SG

D

SG

IN

OUT

OUT

IN

IN

IN

IN

IN

OUT

OUT

IN

BI

IN

OUT

OUT

IN

D

SG

D

SG

CS

HDET

A G N D

D G N D

ENABLE

AVDD

SDA

BYPASS

DETECT

MICBIAS

INT*

SCL






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

0X0D (13,B,RIGHT)

PULLUPS ON MCP PAGE

PORT A DETECT (HEADPHONES)

NC

APN:376S0613

HP=80HZ

NC

PORT B RIGHT(BUILT-IN MIC)

N/A

MIKEY

DET ASSIGNMENTVREF

MIC_BIAS (80%)

PIN COMPLEX

0X0D (13,V22,B,LEFT)

COUGAR_POINT GPIO5/PIRQH

COUGAR_POINT GPIO3/PIRQH

SYSTEM INTERRUPT

N/A

N/A

0X06 (6)

AUD_IPHS_SWITCH_EN


SOUTHBRIDGE RESOURCES

FUNCTION

AUD_I2C_INT_L

FUNCTION

BUILT-IN MIC

HEADSET MIC

N/A

COUGAR_POINT GPIO16

SYSTEM GPIO

0X06 (6)

CONVERTER

PORT B DETECT(SPDIF DELEGATE)

MIKEY

PLACE L6800/C6800 CLOSE TO JACK TRANS. AREA

EXTRACTION NOTIFICATION CKT

10V20%

C ER M 4 02

0.1UF

C6801

1

2

5%

402

MF-LF

1/16W

47K

R6802

1 26162

MF-LF

1%

1/16W

39.2K

402

R68061

2

MF-LF

402

220K

5%

1/16W

R6803

1 2

220K5%

1/16W

402

MF-LF

R68041

2

16V

CERM

0.01UF

402

10%

C68021

2

57

6162

402

1%

MF-LF

1/16W

20.0K

R68051

2

SOT563

SSM6N37FEAPE

Q68003

54

SOT563

SSM6N37FEAPE

Q68006

21

SOT563

SSM6N37FEAPE

Q68013

54

SOT563

SSM6N37FEAPE

Q68016

21

MF

402-1

1%

1/16W

2.4K

R6851

1 2

CRITICAL

50V

27PF5%

402CERM

C6854

1

2

X5R

0.1UF

CRITICAL

402

25V

10%

C6850

1 2

0.001UF10%

CRITICAL

CERM

50V

402

C6853

1

2MF-LF

1/16W

5%

100K

402

R68521

2

SM

XW6851

1 2

57

57

57

6 61

6 61

6 61

20%

TANT

6.3V

2.2UF

CRITICAL

402-1

C68521

2

0402

FERR-1000-OHM

L6851

1 2

0402

FERR-1000-OHM

L6850

1 2

61

61

MIKEY

2.2K5%

402

1/16W

MF-LF

R68821

2

CRITICAL

MIKEY

27PF5% 50V

402CERM

C6885

1

2

MIKEY

X7R

CRITICAL

0.0082UF10%

402

25V

C6884

1

2

MIKEY

1/16W

MF-LF

402

100K

5%

R68831

2

CRITICALMIKEY

402

25V

10%

0.1UF

X5R

C6883

1 2

SM

XW6880

1 2

57

MIKEY

1/16W

1K

MF-LF

1%

402

R68811

2

1/16W

5%

402

MF-LF

100K

R68801

2

MIKEY

CERM402

10%16V

0.01UF

C6881

1

2

MIKEY

CRITICAL

20%

2.2UF

6.3V

TANT

402-1

C68821

2

18

162327293142487781

162327293142487781

1923

MF-LF

402

MIKEY

2.2K

5%

1/16W

R6884

1 2

MIKEY

402

25V

10%

X5R

0.1UF

CRITICAL

C6886

1 257

10%

402

X5R

25V

0.1UF

CRITICAL

C6851

1 2

100

402

1%

1/16W

MF-LF

R6850

1 2

402-1

1/16W

1%

MF

2.4K

R6853

1 2

18

1/16W

0

MF-LF

5%

402

R6861

1 2

10V 20%

402

0.1UF

CERM

C6861

1

2

0402

FERR-1000-OHM

L6862

1 26781216171819202223

262729333637404142

464849505152545761

6271727374757785

X5R

MIKEY

10V

10%1UF

402

C6880 1

2

SOT563

SSM6N37FEAPE

Q6802 6

21

SOT563

SSM6N37FEAPE

Q6802 3

54

402MF-LF1/16W

15K

5%

R6860

1 2

402

20%

0.1UF

CERM

10V

C68601

2

402MF-LF

1/16W

5%

220K

R68641

2

MF-LF402

100K5%

1/16W

R68651

2

300K

402MF-LF

1/16W5%

R68011

2

WCSPCD3282A1

MIKEY

CRITICAL

U6880

D 2

A 2

D1

B2

B1

C 2

A3

A1

D3

C1C3

B3

5%

1/16W

NOSTUFF

402MF-LF

0

R6885

1 2


AUDIO: JACK TRANSLAT

AUD_OUTJACK_INSERT_L

AUD_PERPH_DET_R

GND_AUDIO_CODEC

HS_MIC_HI_RC

MIKEY_HDET

AUD_MIC_INN_L

VOLTAGE=3.3V


PP3V3_S0_AUDIO_F

AUD_J1_TIPDET_R

BI_MIC_HI_F

BI_MIC_SHIELD

PP3V3_S0

GND_AUDIO_CODEC

AUD_PORTB_DET_L

HS_MIC_BIAS

GND_AUDIO_CODEC

AUD_IPHS_SWITCH_EN

HS_MIC_LO

SMBUS_PCH_CLK

AUD_I2C_INT_L

AUD_J1_TIPDET_R

AUD_J1_TIPDET_R

PP3V3_S0_AUDIO_F AUD_J1_SLEEVEDET_INV

AUD_J1_TIPDET_INV

AUD_SENSE_A

AUD_J1_SLEEVEDET_R

AUD_J1_SLEEVEDET_R

GND_AUDIO_CODEC

GND_AUDIO_CODEC

HS_SW_DET

MIC_BIAS_FILT

BI_MIC_LO_F

AUD_J1_DET_RC

BI_MIC_HI

GND_AUDIO_CODEC

AUD_CODEC_MICBIAS

AUD_MIC_INN_R

AUD_MIC_INP_R

BI_MIC_LOGND_AUDIO_CODEC

TIPDET_FILT

PP3V3_S0_AUDIO_F

AUD_PORTA_DET_L

HS_MIC_HI

GND_AUDIO_CODEC

AUD_MIC_INP_L

HS_RX_BP


SMBUS_PCH_DATA

6

57586162

62

6162

57586162

57 586162

62

6162

57586162

57586162

57586162

57586162

62

57586162

2 1345678

MagSafe DC Power Jack

C69051

CRITICAL

78048-0573M-RT-SM

J6900

1

2

3

CRITICAL

6AMP-24V

1206-1

F6905

1 2

VOLTAGE=18.5V

MIN_NECK_WIDTH=0.20mm

MIN_LINE_WIDTH=1mm

PP18V5_DCIN_FUSE PPDCIN_G3H

PP3V42 G3H

6 7 49 63 64

6 7 26 43 45 46 47 48 53 63 64



VCC

EXTINT

NCGND

BI

Y

B

A

BI

BI

P3

P4

P5

P6

P7

P8

P1

P2

P9

SHLD_PIN

SHLD_PIN

SHLD_PIN

SHLD_PIN

NC

BYP

GND

REF

TON

SW

FB

EN

R E F

3

THRM

V I

N

VCC

PAD

NC






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

3.425V "G3Hot" Supply

BATTERY CONNECTOR

1-Wire OverVoltage Protection

TO SMC

NC

516S0523

BIL CONNECTOR

NC

300mA max output

f = 470 kHz

Vout = 3.425

518S0656

353S2776

Supply needs to guarantee 3.31V delivered to SMC VRef generator

518-0375

50V

0.01UF

603

20%

CERM

C6905

2

4

5

CERM

10%

402

0.001UF

50V

C6954 1

2

0.1UF

25V10%

402

X5R

C6950 1

2

0.1UF

X5R

10%25V

402

C6951 1

2

SC-75

CRITICAL

RCLAMP2402B

D6950

3

1 2

20%10VCERM402

0.1UF


C69081

2

MAX9940SC70-5

U6900

5

2

4

3

1

45

SOT665TC7SZ08AFEAPE

U6901

2

1

3

5

4

10K5%

1/16W

402

MF-LF

R69501

2

CRITICAL

CPB6312-0101F

F-ST-SM

J6955

1

10

1112

1314

1516

2

34

56

78

9

CERM

402

5%

50V

47PF

C69521

2

47PF5%50V

CERM

402

C6953 1

2

64548636484

64548636484

50V

402

0.001UF10%

CERM

C69551

2

4021/16W

5%

100

MF-LF

R6961

1 2

BAT-K90-K91-K92

CRITICAL

M-RT-TH

J6950

10

11

12

13

1

2

3

4

5

6

7

8

9

2.0K402

5%

1/16WMF-LF

R6929

1

2

NOSTUFF

MF-LF

402

5%

1/16W

100K

R69001

2

1UF

603-1

25V

X5R

10%

C6960 1

2

47

1%1/3WMF

805

R69901 2

SOT-323BAT30CWFILMD6990

1

2

3

1/8W

MF-LF805

1%1.00MR69951

2

25V

1UF

X5R

10%

603-1

C6991 1

2

16V

402-1

10%0.1UF

X5R

C6994 1

2

CRITICAL

DFN

PM6640U6990

9

4

2

5

1

1 0

6

1 1

3

8

7

CRITICAL

33UH-20%-0.44A-0.455OHM

D52LC-SM

L6995

1 2

603X5R-CERM-1

22UF20%6.3V

C69991

2

10%35V

X5R-CERM

4.7UF

0805

C6990 1

2

402-1

16VX5R

0.1UF10%

C69961

2

S YN C_ MA ST ER =J AC K_ K9 0I S

DC-In & Battery Connec

SMBUS_SMC_BSA_SCL

PPVBAT_G3H_CONN

P3V42G3H_REF3

PPVIN_G3H_P3V42G3H


P3V42G3H_FB

ADAPTER_SENSE


PPDCIN_S5_P3V42G3H

P3V42G3H_SW

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

DIDT=TRUE

SMC_BC_ACOK

SYS_ONEWIRE

SMBUS_SMC_BSA_SDA

SYS_DETECT_L

P3V42G3H_TON

PPDCIN_G3H

SMC_LID_R SMC_LID

SMC_BIL_BUTTON_L

SMBUS_SMC_BSA_SCL

SMBUS_SMC_BSA_SDA

SMC_BC_ACOK_VCC

PP3V42_G3H

PPBUS_G3H

PP3V42_G3H

PP3V42_G3H

6

6 45 48 63 64 84

664

6

45 46 49 64

645 48 63 64 84

6

7496364

6

64546

6 7 26 43 45 46 47 48 53 63 6473

678364049506477

6 7 26 43 45 46 47 48 53 63 6473

2 1345678

Inrush Limiter

FROM ADAPTER

Reverse-Current Protection

OMIT

CRITICAL

AON6405LDFN5X6

Q7085

1

DFN5X6

AON6405L

CRITICAL

OMIT

Q7080

1 PPDCIN G3H INRUSH

PPDCIN_G3H74963



IN

IN

BI

IN

OUT

OUT

OUT

AMON

BMON

ACOK

LGATE

PHASE

BOOT

SGATE

AGATE

CSIP

CSIN

DCIN

VNEG

CSOP

CSON

T H R M_ P A D

P G N D

VDDPVDD

BGATE

UGATE

ICOMP

VCOMP

ACIN

SDA

VFRQ

CELL

VHST

SCL

SMB_RST_N

G

D S

G

D S

G

D

SYM-VER-2

S

G

D

S

G

D

S

DESCRIPTION REFERENCE DES BQTYPART NUMBER CRITICAL

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)







36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

36V/V

(OD)

20V/V

TO SYSTEM

Max Current = 8A

(L7030 limit)

ACIN pin threshold is 3.2V, +/- 50mV

f = 400 kHz

K6 NOTES : L7030 CHANGED BACK TO K24 IND DUE TO LAYOUT

Input impedance of ~40K meets

(CHGR_CSO_N)

(GND)

(CHGR_CSO_P)

(PPVBAT_G3H_CHGR_R) (PPVBAT_G3H_CHGR_R)

(CHGR_BGATE)

TO/FROM BA

(CHGR_DCIN)

sparkitecture requirements

(CHGR_AGATE)

353S2929

Divider sets ACIN threshold at 13.55V

( A G N D )

30mA max load

Float CELL for 1S

(CHGR_SGATE)

0.068UF10%

402

10VCERM

C70421

2

4546

47

10%

402X5R

1UF10V

C7002 1

2

10%

402

16V

0.01UF

CERM

C7011 1

2

10%

X5R

1UF10V

402-1

C70001

2


SMXW7000

1 2

X5R25V

603

0.22UF20%

C7005 1

2

10%

402

X5R16V

1UFC70501

2

73

645486384

645486384

470PF

CERM402

10%50V

C70161

2

1/16W

402MF-LF

0

5%

R70001 2

NO STUFF

100K

402

5%

MF-LF1/16W

R70021

2

402MF-LF1/16W5%

4.7R70011 2

5%

MF-LF

20

402

1/16W

R70051 2

402X5R10V10%1UF

C7001 1

2

SOT-323

CRITICAL

BAT30CWFILMD7005

1

2

3

X5R

10%0.1UF

402

25V

C70851

2 MF-LF

470K

1/16W

402

1%

R70851

2

1K

BATT_2S

MF-LF402

1/16W1%

R70131

2

1%332K

MF-LF402

1/16W

R70861

2

45 46 49 63

50

50

10%

402

0.001UF

CERM50V

C7026 1

2

4021/16W5% MF-LF2.2R7051 1 2

4020

1/16W5% MF-LFR7052 1 2

1/16WMF-LF

9.31K

402

1%

R70111

2

CERM

10%10V

402PLACE_NEAR=U7000.25:2mm

0.22UFC70251

2

10%0.1UF

402X5R25V

C7022 1

2

10%0.047UF10V

402CERM

C70201

2

402

10%

X5R25V

0.1UFC70211

2

402

5%

MF-LF1/16W

10R70221 2

4021/16W

5%

MF-LF

10R70211 2

NO STUFF

470PF

402CERM50V10%

C70391

2

603

5%

MF-LF1/10W

180

NO STUFF

R70391

2

10%

X5R25V

1UF

603-1

C7055 1

2

10%0.1UF

402-1X5R16V

C7056 1

2402

16V

0.01uF10%

CERM

C7057 1

2

22UF

CASE-D2-SM

20%

CRITICAL

25VPOLY-TANT

C70401

2

CRITICAL

20%25V

CASE-D2-SMPOLY-TANT

22UFC70301

2

CRITICAL

22UF

25VPOLY-TANT

20%

CASE-D2-SM

C70311

2

3.01K

MF-LF1/16W

402

1%

R70161

2

603-1X5R

10%1UF25V

C70351

2

0.001UF10%

402X7R50V

C70451

2

1206

8AMP-24V

CRITICAL

F7040

1 2

10%

X5R603-1

1UF25V

C70361

2

10%

402X7R

0.001UF

50V

C70371

2

62K

1/16WMF-LF402

5%

R70811

2

1/16WMF-LF402

100K5%

R70801

2

IHLP4040DZ-SM

4.7UH-9.5A

CRITICAL

L7030

1 2

CRITICAL

TQFN

I S L 6 2 5 9

U7000

3

14

1

9

16

15

25

627

28

17

18

2

5

21

2 2

23

11

10

2613

2 9

24

7

1 9

2 0

4

12

8

MF1W0.5%0.02

0612-1

CRITICAL

R70201

2

3

4

MF-LF1/16W

402

5%0

R70251

2

BATT_3S

0.5%0.01

1WMF

0612-3

CRITICAL

R7050

1 2

3 4

402

1/16WMF-LF

1%30.1KR70101

2

402MF-LF1/16W

100K1%

R70151

2

5%330PF

COG50V

402

C70151

2

5

4

1

2

3

5

4

1

2

3

OMIT

DFN5X6

CRITICAL

AON6403LQ7055

5

4

1

2

3

OMITCRITICAL

RJK03E1DNSHWSON-8

Q7030

5

4

1 2 3

RJK03E1DNSHWSON-8

CRITICALOMIT

Q7035

5

4

1 2 3

BATT_3S

402

1/16W

1K

MF-LF

1%

R70121

2

CRITICAL1 Q7035376S0966 RJK03E1DNS

SSYNC_MASTER=JACK_K90I

PBus Supply & Battery Ch

SI7149DP Q70851376S0845 CRITICAL

SI7149DP Q70801 CRITICAL376S0845

1 R7050 CRITICAL107S0129 BATT_2SRES,5MOHM,1%,1W,0612,4-TERM

SI7137DP Q70551 CRITICAL376S0761

CRITICAL1 Q7030RJK03E1DNS376S0966


PPVBAT_G3H_CHGR_REGMIN_LINE_WIDTH=0.6 mm

VOLTAGE=12.6V

DIDT=TRUE

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmCHGR_LGATEGATE_NODE=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmGND_CHGR_AGND

VOLTAGE=0V


PPVBAT_G3H_CHGR_R

VOLTAGE=18.5VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mmPPDCIN_G3H_CHGR

PPDCIN_G3H_INRUSHMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mmVOLTAGE=18.5V


CHGR_SGATE_DIV

CHGR_BOOT MIN_NECK_WIDTH=0.2 mm

DIDT=TRUESWITCH_NODE=TRUE


CHGR_PHASE_RCDIDT=TRUE

PPVBAT_G3H_CONMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mmVOLTAGE=12.6V

PPDCIN_G3H_INRUSH_FET

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.3 MMVOLTAGE=18.5V

CHGR_AGATE_DIVMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.3 mm

CHGR_VCOMP_R

CHGR_VNEG

CHGR_VCOMP

CHGR_CELL

CHGR_ACIN

PP3V42_G3H

CHGR_VNEG_R

PP5V1_CHGR_VDD


VOLTAGE=5.1V

SMBUS_SMC_BSA_SCL

SMBUS_SMC_BSA_SDA

CHGR_AMON

CHGR_CSO_P

GND_CHGR_AGND

SMC_RESET_L

CHGR_CSI_R_N

CHGR_CSI_R_P

CHGR_VFRQ

CHGR_CSO_R_P

CHGR_CSO_R_N

CHGR_DCIN_D_R

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmCHGR_BOOT_R


PP5V1_CHGR_VDDPMIN_LINE_WIDTH=0.2 mm

CHGR_CSI_P

CHGR_AGATE

CHGR_SGATE

PPBUS_G3H

CHGR_RST_L

SMC_BC_ACOK

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmSWITCH_NODE=TRUEDIDT=TRUE

CHGR_PHASE

CHGR_DCIN

CHGR_UGATEGATE_NODE=TRUE


DIDT=TRUE

CHGR_CSI_N

CHGR_BGATE

CHGR_BMON

CHGR_CSO_N

CHGR_ICOMP

7

64

67264345464748536373

84

64

85

85

5085

5085

84

84

84

2 1345678

D

System Agent Power Supply



OUT

IN

FB

EN

PVCCVCC

SREF

VO

OCSET

PGOOD

FSEL

RTN

PHASE

LGATE

UGATE

BOOT

PGNDGND

SET0

SET1

VID0

VID1

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

6A Max Output

f = 300 kHz

(VCCSAS0_VO)

(VCCSAS0_OCSET)

1000PF

25VNP0-C0G5%

402

C71051

2

402

16V10%0.022UF

CERM-X5R

C71031

2

73

73

5%

402

0

MF-LF1/16W

R71031

2

603

20%

X5R10V

10UFC71011

2

402MF-LF1/16W

47.5K1%

R71481

2

402

1K1%1/16WMF-LF

R71421

2

402

1K1%

1/16WMF-LF

R71411

2

25V5%

402NP0-C0G

1000PFC7140

12

2.2

1/10WMF-LF

5%

603

R71301

2

1UF

402X5R

10%16V

C71301

2

39UF-0.027OHM20%

POLY

CRITICAL

B1A-SM

16V

C7120 1

2

FDV0630H-SM

1.0UH-7.7A

CRITICAL

L7100

1 2

0.0011%1W

0612MF-1

CRITICAL

R7140

21

43

402

25VX5R

0.1UF10%

C7121 1

2

1000PF


402NP0-C0G

5%25V

C71221

21/16WMF-LF402

2.25%

R71011

2

UTQFN

CRITICAL

ISL95870AHU7100

1815

10

13

3

1

11

2

14

16

2 0

4

8

9

7

17

1 9

6

5

12

SIZ700DTPOWERPAIR-6X3.7

CRITICAL

Q7100

1

6

4 5

2 3 7

8

140K

1/16WMF-LF

1%

402

R71471

2

113K

MF-LF1/16W1%

402

R71461

2

12

2.2UF10%16V

603X5R

C7102 1

2

SYNC_DSYNC_MASTER=JACK_K90I

System Agent Supply


CPU_VCCSASENSE

DIDT=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmVCCSAS0_LL

SWITCH_NODE=TRUE


VCCSAS0_DRVH

DIDT=TRUEGATE_NODE=TRUE


VCCSAS0_DRVL

GATE_NODE=TRUEDIDT=TRUE

PVCCSA_EN

VCCSAS0_FSEL

VCCSAS0_CS_N

VCCSAS0_CS_P

MIN_LINE_WIDTH=0.3 mmVCCSAS0_BOOT_RC

MIN_NECK_WIDTH=0.2 mmDIDT=TRUE

PPVCCSA_S0_REG_RMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.05V

PPVCCSA_S0_CPU

VCCSAS0_SET0

DIDT=TRUEMIN_NECK_WIDTH=0.2 mm

VCCSAS0_VBSTMIN_LINE_WIDTH=0.3 mm

PP5V_S0

PVCCSA_PGOOD

VCCSAS0_OCSET

VCCSAS0_VO

VCCSAS0_SREF


VOLTAGE=5V

PP5V_S0_VCCSAS0_VCC


CPU_VCCSA_VID<1>

VCCSAS0_SET1

VCCSAS0_FB

7

75067686970

12

85

85

6 7 12 15

6722424752546870727377

2 1345678

D

5V_S3/3.3V_S5 POWER SUPPLY



IN

IN

D

SG

D

SG

D1

G1

S2

G2

S1/D2

NC

G

D

S

G

D

S

DRVH1

SKIPSEL

VBST1

GND THRM_PAD

ENTRIP1

VFB1

VO1

DRVL1

LL1

EN0

VCLK

ENTRIP2

PGOOD

VO2

VFB2

DRVL2

LL2

DRVH2

VBST2

VREG5

VREG3

VREFVIN

TONSEL

DESCRIPTION REFERENCE DES BOM OPT IONQTYPART NUMBER CRITICAL






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

<RC><RD><RA>

PWM FREQ. =

VOUT = (2 * RC / RD) + 2

SEPERATED MASTER PGOOD FOR BOTH 5V AND 3V3.

PWM FREQ. = 300 KHZ

MAX CURRENT = 12.947AMAX CURRENT

VOUT = (2 * RA / RB) + 2

<RB>

6.3VX5R

20%

603

10UFC72731

2

SM

PLACE_NEAR=U7200.25:1 MM

XW7201

1 2

73

73

SSM6N37FEAPE

SOT563

Q72216

21

SSM6N37FEAPE

SOT563

Q72213

54

PLACE_NEAR=C7291.1:1 MM

SM

XW7202

12

PLACE_NEAR=L7260.1:1 MM

SM

XW7203

12

PLACE_NEAR=C7251.1:1 MM

SM

XW7205

12

PLACE_NEAR=L7220.2:1 MM

SM

XW7204

12

402

5%

1/16W

MF-LF

100K

R72731

2

402X5R16V10%

0.1UFC7220

12

CERM

0.001UF20%

402

50V

C72821

2

402CERM

20%50V

0.001UF

C72421

2

0.001UF

402

20%

CERM50V

C72931

220%

402CERM50V

0.001UFC72531

2

CRITICAL

B1A-SM

20%

16VPOLY

39UF-0.027OHM

C72401

2

220UF20%

6.3VELEC

D1A-SM

CRITICAL

C72911

2

CRITICAL

B1A-SM

150UF20%

6.3VPOLY

C72511

2

39UF-0.027OHM

B1A-SM

POLY

16V

20%

CRITICAL

C72801

2

MF-LF

01/16W5%402

R7220

1 2

IHLP2525CZ

4.7UH-5.5A

CRITICAL

L7220

1 2

PCMB104E4R7-SM

CRITICAL

4.7UH-13A-15MOHML7260

1 2

5%

01/16W4 02 M F- LF

R7260

1 2RJK0384DPAWPAK

CRITICAL

Q7220

2

1

6

7

3 4 5

1%88.7K

1/16WMF-LF402

R72711

2

OMITCRITICAL

HWSON-8

RJK03E1DNSQ7260

5

4

123

HWSON-8RJK03E0DNS

CRITICALOMIT

Q7261

5

4

123

6.3V

603X5R

20%10UFC72501

2

1/16WMF-LF402

1%6.49KR7270

1 2

10K

1/16WMF-LF

1%

402

R7269

1 2

1UF

25V10%

X5R603-1

C72411

2

X5R

0.1UF

16V10%

402

C7260

12

15.0K1%

MF-LF1/16W

402

R7267

1 2

1/16WMF-LF402

1%10KR7268

1 2

603-1

25VX5R

10%1UFC72811

2

20%10UF

X5R10V

603

C72901

2

P3V3S5_VFB

QFN

T P S 5 1 1 2 5

CRITICAL

U720021 10

19 12

13

1 6

1 5

20 11

23

14

2 5

4

22 9

18

2 5

1 6

24 7

3

8

17

MF-LF

1%1/16W

402

75K

R72721

2

1UF

25V

603-1X5R

10%

C72721

2

10V

603

20%

CERM

1UFC72701

2

CERM10V

402

10%0.22UFC72711

2

5V/3.3V SUPPLY

S YN C_ MA ST ER =J AC K_ K9 0I S

Q72611 CRITICALRJK03E0DNS376S0895

Q7260 CRITICAL1 RJK03E1DNS376S0966

P5VS3_EN_L


GND_5V3V3S5_SGND


VOLTAGE=0V

P5VS3_VO1




DIDT=TRUE

P5VS3_DRVL

P5VS3_LL


MIN_LINE_WIDTH=0.6 MM DIDT=TRUE

PP5V_S3


P5VS3_DRVH



DIDT=TRUEMIN_LINE_WIDTH=0.6 MM


P3V3S5_VBST_RP5VS3_VBST_R

DIDT=TRUE



P5VS3_VBST

DIDT=TRUEMIN_LINE_WIDTH=0.6 MM

MIN_NECK_WIDTH=0.2 MMDIDT=TRUE

P3V3S5_VBST




MIN_LINE_WIDTH=0.6 MMDIDT=TRUE

P3V3S5_DRVL



DIDT=TRUE

P3V3S5_DRVH

P3V3S5_LL



DIDT=TRUE

PP3V3_S5

P3V3S5_VO2

PPBUS_S5_HS_OTH

P3V3S5_ENTRIP

P5V3V3_PGOOD

5V3V3_REG_EN

P5VP3V3_REG3

P5V3V3_REG_EN

P5VS3_VFB

PP5V_S5

P5VP3V3_VREF

5V_S3_VFB_XW7203 3V3S5_VFB_R7270

P3V3S5_EN_L

P5VS3_ENTRIP

7

75066

6730324243444657596061

6772

75066

73

73

75472

2 1345678

D



IN

V5IN

REFIN

S5

VREF

S3

MODE

TRIP

SW

DRVL

PGOOD

VDDQSNS

VTT

VTTSNS

VTTREF

DRVH

VBST

VLDOIN

THRMVTTGNDPGND PADGND

OUT

IN

G

D

S

G

D

S

TABLE_ALT_ITEM

PART NUMBERALTERNATE FORP AR T N UM BE R B OM O PT IO N REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1


14.1A max output

(Q7335 limit)

VTT Enable

f = 400 kHz

Vout = 1.5V

(DDRREG_DRVL)

10mA max load

(DDRREG_VDDQSNS)

(DDRREG_DRVH)

C7360, C7361 close to memory

VDDQ/VTTREF Enable(DDRREG_LL)


10V

10UF

X5R

20%

603

C7300 1

2

25V10%

603-1X5R

1UF

C73321

2

10%

0.1UF

X5R25V

402

C7325

1 2

50V10%

X7R

0.001UF

402

C73331

2

CRITICAL

20%

270UF

TANT2V

CASE-B4-SM

C73401

2

CASE-B4-SM

2VTANT

270UF20%

CRITICAL

C73411

26.3V20%

603X5R

10UF

C73451

2

0.001UF

X7R402

10%50V

C73461

2


SM

XW7301

1

2

4373

TPS51916

QFN

CRITICAL

U730014

11

7

19

1 0

20

8

17

16

13

2 1

18

12 15

9

2

6

3

4

5

1

8

SM

PLACE_NEAR=C7361.1:3mm

XW7360

1 2


SM

XW7300

1

2

10%

402

0.22UF

CERM10V

C7350 1

2


603

CRITICAL

6.3V20%

10UF

X5R

C7360 1

2

830

0.1UF

PLACE_NEAR=U7300.6:1mm402

10%16VX5R

C7315 1

2


20%6.3V

CRITICAL

10UF

X5R603

C73611

2


200K1%

402

1/16WMF-LF

R73171

2

20.0K

1/16WMF-LF

402

1%


R73151

2

100K

MF-LF

402

1%1/16W


R73161

2

0.01UF10%16VCERM


C73161

2

16V20%

B1A-SMPOLY

39UF-0.027OHM

CRITICAL

C73311

2

10UF


20%

X5R10V

C7301 1

2

1/16W05%

MF-LF402R7325

1 2


95.3K

402MF-LF1/16W1%

R73181

2

0.88UH-20%-19A-2.3MOHM

CRITICAL

MPCG1040LR88-SM

L7330

1 2

NO STUFFCASED2E-SM

CRITICAL

16VPOLY-TANT

33UF20%

C73341

2

CRITICAL

39UF-0.027OHM20%16VPOLYB1A-SM

C73301

2

3.3X3.3-QFN-COMBOCSD58858Q3

CRITICAL

OMIT

Q7330

5

4

1 2 3

CRITICAL

3.3X3.3-QFN-COMBOCSD58858Q3

OMIT

Q7335

5

4

1 2 3

CRITICALQ7335FDMC2514SDC1376S0928

1 CRITICALQ7330CSDS58858Q3376S0790


1.5V DDR3 Supply

ALL128S0218128S0299

ALL128S0218128S0093

DDRREG_LL

SWITCH_NODE=TRUE


DIDT=TRUE




DDRREG_DRVL

GATE_NODE=TRUE DIDT=TRUE



DDRREG_VDDQSNS

PP1V5_S3

GATE_NODE=TRUE

DDRREG_DRVH

DIDT=TRUE



DDRREG_FB



DDRREG_VBST


PP0V75_S0_DDRVTT

DDRREG_1V8_VREF

PP5V_S3



DDRREG_VBST_RC

TP_DDRREG_PGOOD

PP1V5_S3

DDRREG_VTTSNS

DDRREG_TRIP

DDRREG_MODE

PPVTTDDR_S3

DDRREG_EN

MEMVTT_EN

GND_DDRREG_SGND

VOLTAGE=0V



7

6 7 27 29 3

31

75065686970

67303242434446575960616672

672729306772

2 1345678

D

DESCRIPTION REFERENCE DES BOM QTYPART NUMBER CRITICAL

Need symbol to be re-drawn to clean up this page

353S3259 U7400 CRITICAL1 IC,MAX15092,3+1PH CPU REG,IMVP7,5X5QFN40

PP5V_S0 6 7 22 42 47 52 54 65 70 72 7377



IN

IN

IN

EN

VDIO

V D D A

IMAXA

V D D B

DRVPWMA

V C C

POKB

TON

BSTA1

DHA1

LXA1

DLA1

CSPA1

CSPAAVE

FBA

CSNA

BSTA2

CSPA2

DHA2

LXA2

DLA2

BSTB

LXB

DHB

CSPB1

DLB

CSNB

FBB

POKA

CSPA3

VRHOT*

CLK

ALERT*

THERMA

THERMB

SR

IMAXB

T H R M

G N D S A

G N D S B

P A D

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

NC

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


D

B

8 7 5 4 2 1

1/16W

MF-LF

5%

10

402

R7401

1 2

20%

2.2UF

X5R-CERM

10V

402

C7401 1

2


2.2UF20%

X5R-CERM

10V

402

C74021

2

1278

1278

1278

50V

CERM

100PF

402

NO STUFF

5%

C74141

2

MF-LF

5%

402

300

1/16W

R7406

1 2

402

1/16W

1

MF-LF

5%

R7410

1 2

NO STUFF

0.039UF

10V10%

X5R-CERM

0402

C7408

1 2

NO STUFF

1%

MF-LF1/16W

40.2K

402

R7409

1 2

QFN

MAX17511

CRITICAL

OMIT

U7400

17

20

28

11

18

37

9

36

38

39

35

8

22

26

13

23

25

14

31

1

4

6

3 7

29

30

21

27

12

19

10

32

33

34

4 1

2

4 0

2 4

1 5

16

5

26

73

73

104678

69

69

69

69

69

69

69

69

69

69

69

69

69

69 85

SMXW7400

12

X5R-CERM

10V20%

2.2UF

402


C74031

2

NO STUFF

200K

MF-LF

1%

402

1/16W

R74641

2

402

5%

100PF

CERM

50V

NO STUFF

C74151

2

NO STUFF

402

50V

CERM

5%

100PF

C74161

2

69

MF-LF1/16W5%

10

402

R7440

1 2

1/16W

402

MF-LF

10

5%

R7441

1 2

12 78

12 78

5%25V

402

1000PF

NP0-C0G

C74401

2

1000PF5%

402

NP0-C0G

25V

C74411

2

25V

NP0-C0G

1000PF5%

402

C74121

2

5%

1/16WMF-LF

10

402

R7413

1 2

25V

NP0-C0G

1000PF5%

402

C7422 1

2

10

MF-LF

1/16W5%

402

R7423

1 2

CERM

5%

100PF

NO STUFF

402

50V

C74191

2

NO STUFF

402

5%50V

CERM

100PF

C74181

2

69 85

NOSTUFF

402

NONENONENONE

OMIT

C74421

2

NOSTUFF

OMIT

402

NONE

NONENONE

C74431

2


402

MF-LF1/16W

54.91%

R74791

2


130

1/16WMF-LF

402

1%

R74801

2

300

MF-LF

5%

1/16W

402

R7407

1 2

69

1%154K

1/16WMF-LF402

R74621

2

1%107K

1/16WMF-LF402

R74631

2

1%215K

1/16WMF-LF402

R74601

2

1%137K

1/16WMF-LF402

R74611

2

1%

8.45K

1/16WMF-LF402

R74121 2

1%

8.66K

1/16WMF-LF402

R74221 2

90.9K

1/16WMF-LF402

1%

R74021 2

402MF-LF1/16W

200K1%

R74651

2

402MF-LF1/16W

5.76K1%

R74681

2

1%5.76K

1/16WMF-LF402

R74661

2

NO STUFF

402

50VCERM

0.0022UF10%

C74071

2

402

50VCERM

0.0022UF10%

C74041

2

402

50VCERM

0.0022UF10%

C74051

2

100KOHM-1%-100MW

CRITICAL

0603

R7469

1

2

0603

CRITICAL

100KOHM-1%-100MW

R7467

1

2

5%

470PF

NP0-C0G50V

402

C7409

1 2

CPU IMVP7 & AXG VCore Regula


CPUIMVP_PHASE1

CPUIMVP_ISUM_N

CPUIMVP_ISUM

VOLTAGE=0V

CPU_VCCSENSE_R


VOLTAGE=0V


GND_CPUIMVP_SGND

CPUIMVP_FBB_R

CPUIMVP_FBA_R

CPU_VCCSENSE_N

VOLTAGE=0V

CPU_AXG_SENSE_R

CPUIMVP_ISUM_RCPUIMVP_ISUM1_P

CPUIMVP_ISUM2_P

CPUIMVP_ISUMG_P

CPUIMVP_NTC

CPU_VIDSOUT

CPUIMVP_FBA

CPUIMVP_VR_ON

CPU_VIDSCLK

CPUIMVP_LGATE2

CPUIMVP_LGATE1

CPUIMVP_BOOT1

CPUIMVP_FBB

CPUIMVP_LGATE1G

CPU_AXG_SE

CPU_AXG_SENSE_N

CPUIMVP

CPUIMVP

CPUIMVP_PGOOD

CPUIMVP_BOOT1G

CPU_VIDALERT_L

CPU_VCCSEN

CPUIMVP_UGATE1

PP1V05_S0

CPU_PROCHOT_L

CPUIMVP_PHASE2

CPUIMVP_FBA

CPUIMVP_FBB

CPUIMVP_UGATE2

CPUIMVP_BOOT2

CPUIMVP_AXG_PGOOD

CPUIMVP_IMAXA

CPUIMVP_SLEW

CPUIMVP_IMAXB

CPUIMVP_PHASE1G

CPUIMVP_UGATE1G

CPUIMVP_TON


CPUIMVP_NTCG

CPUIMVP_ISUMG_N

P5V_S0_CPUIMVP_VDD



VOLTAGE=5V

7

68

68

67910121416172022233640457073

68

68

7 50 65 67 69 70

2 1345678

D

THESE TWO CAPS ARE FOR EMC

PHASE 1

CRITICAL

0805

10%

X5R-CERM16V

10UFC7515

1

2

CRITICAL

10UF

16V10%

X5R-CERM0805

C75161

2 X5R402

1UF10%16V

C75171

2

0.001UF

402

10%50VX7R

C75181

2

402X7R50V10%0.001UFC7519

1

2

20%

39UF-0.027OHM

POLY

CRITICAL

16V

B1A-SM

C75141

2

R75111

C75111

CASED2E-SMPOLY-TANT16V20%

33UF

CRITICAL

C75401

2

CRITICAL

B6S-SMELEC16V20%

82UFC7513

1

2



CPUIMVP_BOOT1_RC

DIDT=TRUE


7506567686970



IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

VSW

PGND

TGR

TG

BG

VIN

VSW

PGND

TGR

TG

BG

VIN

VSW

PGND

TGR

TG

BG

VIN

IN

IN

IN

IN

IN

IN

OUT

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

376S0906

AXG PHASE

152S1271

376S0906

376S0906

PHASE 2

152S1271



152S1271

Removed snubber with EMC’s comment

NOSTUFF

0.001UF

402

10%

CERM50V

C75121

2

0.36UH-20%-35A-0.00081OHM

FCUL1040-SM

CRITICAL

L7510

1 2

68

68

68

68

68

68

68

68

FCUL1040-SM

CRITICAL

0.36UH-20%-35A-0.00081OHML7520

1 2

20%

POLYB1A-SM

16V

39UF-0.027OHM

CRITICAL

C75241

2

10UF

CRITICAL

16V

0805X5R-CERM

10%

C75251

2

CRITICAL

10UF10%16VX5R-CERM0805

C75261

2

402

1UF10%

X5R16V

C75271

2

402

10%50VX7R

0.001UFC75281

2

402

0.001UF

X7R50V10%

C75291

2

0.22UF

402

10%

CERM10V

C75211

2

5%

MF-LF

0

1/16W

402

R75211

2

0

MF-LF1/16W

402

5%

R7511

2

10VCERM

10%

402

0.22UF

C75111

2

10%50VX7R

0.001UF

402

C75591

250V10%0.001UF

X7R402

C75581

2X5R

10%1UF

402

16V

C75571

216V10%

0805X5R-CERM

10UF

CRITICAL

C75561

2POLY16V

B1A-SM

20%

39UF-0.027OHM

CRITICAL

C75541

2

NOSTUFF

603MF-LF1/10W5%

2.2R7552

1

2

50VCERM

10%

402

NOSTUFF

0.001UF

C75521

2

402

10%

CERM

10V

0.22UFC7551 1

2

5%0

402

1/16WMF-LF

R75511

2

68

68

68

68

1/16W

1%

10

MF-LF402

R75141

2

1%10

1/16WMF-LF402

R75241

2

1%

402

1/16WMF-LF

10R7554

1

2

CRITICAL

SON5X6

CSD58864Q5D

Q7550

5

9

3

4

1

6

7

8

10%

X5R-CERM16V

CRITICAL

0805

10UFC75551

2

FCUL1040-SM

CRITICAL

0.36UH-20%-35A-0.00081OHML7550

1 2

CRITICAL

SON5X6

CSD58864Q5D

Q7510

5

9

3

4

1

6

7

8

CSD58864Q5D

CRITICAL

SON5X6

Q7520

5

9

3

4

1

6

7

8

68 69

68

68 69

68

68 85

68 85

49 68 85

49 68 85

CRITICAL


33UFC7530

1

2

CRITICAL


33UFC75601

2

4.7

5%1/16WMF-LF402

R7515

1 2

4.7

5%1/16WMF-LF402

R7525

1 2

4.7

5%

MF-LF402

1/16W

R75551 2

B6S-SMELEC16V20%

82UF

CRITICAL

C75231

2

B6S-SMELEC16V20%

82UFC75531

2

CRITICAL

0612MF1W

0.000751%

R7510

12

34

CRITICAL

0612MF1W

0.000751%

R7520

1 2

3 4

CRITICAL

0612MF1W

0.000751%

R7550

1 2

3 4

402MF-LF1/16W

46.41%

R75531

2

402MF-LF1/16W

46.41%

R75231

2

402MF-LF1/16W

46.41%

R75131

2

NO STUFF

0.0022UF10%50VCERM402

C75711

2

NO STUFF

402

50VCERM

0.0022UF10%

C75721

2

10%0.001UF

X7R50V

402

C75741

2

1/10W

603

2.2

MF-LF

5%

NOSTUFF

R75121

2


CPU IMVP7 & AXG VCore Outp

CPUIMVP_BOOT1G_RCMIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.25 MM

DIDT=TRUE



CPUIMVP_UGATE1G_RDIDT=TRUEGATE_NODE=TRUE


CPUIMVP_AXG_SNUB

VOLTAGE=1.25V

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMDIDT=TRUE

CPUIMVP_VSWGMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.25 MM

SWITCH_NODE=TRUE

DIDT=TRUE


VOLTAGE=1.25V

PPVCORE_S0_CPU_PH2_L

DIDT=TRUE

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.5 MMSWITCH_NODE=TRUE

VOLTAGE=1.05V


PPVCORE_S0_AXG_R PPVCORE_S0_AXG

VOLTAGE=1.25V


PPVCORE_S0_CPU_PH2

CPUIMVP_ISUMG_P

CPUIMVP_ISUMG_N

CPUIMVP_ISUM1_P

CPUIMVP_ISUM_N

CPUIMVP_ISNS2_P

CPUIMVP_ISUM2_P

CPUIMVP_ISUM_N

CPUIMVP_ISNS1_P

CPUIMVP_ISNS1G_P

CPUIMVP_ISNS1_NVOLTAGE=1.25V

PPVCORE_S0_CPU_PH1


PPVCORE_S0_CPU

CPUIMVP_ISNS2_N

PPVCORE_S0_CPU

CPUIMVP_ISNS1G_N

PPVCORE_S0_CPU_PH1_L

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.5 MMSWITCH_NODE=TRUE

DIDT=TRUE

VOLTAGE=1.25V


CPUIMVP_BOOT1GDIDT=TRUEMIN_LINE_WIDTH=0.25 MM


CPUIMVP_PHASE2


CPUIMVP_LGATE2DIDT=TRUEMIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.5 MMGATE_NODE=TRUE

MIN_NECK_WIDTH=0.2 MMDIDT=TRUEMIN_LINE_WIDTH=1.5 MM

CPUIMVP_PHASE1GSWITCH_NODE=TRUE

MIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUE

CPUIMVP_LGATE1DIDT=TRUEMIN_LINE_WIDTH=0.5 MM


CPUIMVP_UGATE1GDIDT=TRUEGATE_NODE=TRUEMIN_LINE_WIDTH=0.5 MM

CPUIMVP_UGATE2_R

GATE_NODE=TRUEDIDT=TRUEMIN_LINE_WIDTH=0.5 MM


CPUIMVP_UGATE2


GATE_NODE=TRUEDIDT=TRUE


CPUIMVP_UGATE1_R

GATE_NODE=TRUEMIN_NECK_WIDTH=0.2 MM


CPUIMVP_BOOT2_RC


DIDT=TRUE



CPUIMVP_BOOT2DIDT=TRUEMIN_LINE_WIDTH=0.25 MM


CPUIMVP_LGATE1GDIDT=TRUEGATE_NODE=TRUE

CPUIMVP_PH1_SNUB

DIDT=TRUE

VOLTAGE=1.25V


MIN_NECK_WIDTH=0.2 MM DIDT=TRUE

CPUIMVP_BOOT1MIN_LINE_WIDTH=0.25 MM

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=1.5 MM DIDT=TRUE

SWITCH_NODE=TRUE

CPUIMVP_PHASE1

MIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUEDIDT=TRUEMIN_LINE_WIDTH=0.5 MM

CPUIMVP_UGATE1

7

7506567686970

7506567686970

6 7 9 12 15 49

4985

4985

6 7 9 12 14 49 69

4985

6 7 9 12 14 49 69

4985

2 1345678

D

CPU VCCIO (1 05V S0) Regulator



OUT

IN BOOT

UGATE

LGATE

PHASE

RTN

FSEL

PGOOD

OCSET

VO

SREF

VCC PVCC

GND PGND

EN

FB






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

f = 300 kHz

Vout = 0.5V * (1 + Ra / Rb)

(CPUVCCIOS0_OCSET)

CPU VCCIO (1.05V S0) Regulator

Vout = 1.05V

18A Max Output

<Ra>

<Rb>

OCP = 22.695A

(CPUVCCIOS0_VO)

OCP = R7641 x 8.5uA / R7640

10%16V

X7R

0.047UF

402

C76031

2

603

10%

X5R

2.2UF

16V

C7602 1

2

0

1/16W

402MF-LF

5%

R76031

2

73

7173

SM


XW7600

1 2

ISL95870

CRITICAL

UTQFN

U7600

123

6

5

1

15

7

1 6

9

10

1 4

2

4

11

1 3

8

10UF20%

X5R10V

603

C76011

2

10%

402

16V

1UF

X5R

C76301

2

25V

1000PF

5%

402NP0-C0G

C7640

12

PCMB103T

0.68UH-18A-3.3MOHM

CRITICAL

L7630

1 2

5%

402NP0-C0G

25V

1000PF

C7623 1

2


NP0-C0G25V5%1000PF

402

C76221

2

2.74K

1/16W

MF-LF

402

1%

R76051

2

3.01K

402

1%

1/16WMF-LF

R76441

2

20%39UF-0.027OHM

CRITICAL

B1A-SM

16VPOLY

C76201

2

B1A-SM

20%16VPOLY

39UF-0.027OHM

CRITICAL

C76211

2MF-LF402

1/16W

05%

R76301

2

1%1W

0612

MF-1

CRITICAL

0.001R7640

21

43

1%

402

1/16W

MF-LF

2.74K

R76451

2

10%

402CERM

50V

NOSTUFF

0.001UFC76311

2

MF-LF1/10W

2.2

5%

603

NOSTUFF

R763112

402MF-LF1/16W

2.67K1%

R76411

2

402MF-LF1/16W

2.67K1%

R76421

2

MF-LF402

1/16W

2.25%

R76011

2

CRITICAL

POWER56

FDMS3602S

Q7630

2

1

6

7

3 4 5

5%

402

50V

CERM

47PFC7604 1

2

5%

402

50V

CERM

47PFC76051

2

MF-LF

1%

402

1/16W

3.01K

R76041

2

S

CPUVCCIO (1.05V) Power Su



CPUVCCIOS0_AGND

MIN_NECK_WIDTH=0.2 mmVOLTAGE=0V

CPU_VCCIOSENSE_P

CPUVCCIOS0_RTN

CPUVCCIOS0_FB

PP5V_S0_CPUVCCIOS0_VCC



DIDT=TRUE


CPUVCCIOS0_VBST


CPUVCCIOS0_OCSET

CPUVCCIOS0_VO

CPU_VCCIOSENSE_N

CPUVCCIOS0_SREF

CPUVCCIOS0_PGOOD

CPUVCCIOS0_CS_N

CPUVCCIOS0_CS_P

CPUVCCIOS0_EN

CPUVCCIOS0_FSEL

PP1V05_S0

DIDT=TRUE

CPUVCCSAS0_SNUBMIN_LINE_WIDTH=0.6 MM




PPCPUVCCIO_S0_REG_R

PP5V_S0


CPUVCCIOS0_VBST_RC

DIDT=TRUE

CPUVCCIOS0_DRVLMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmGATE_NODE=TRUEDIDT=TRUE

GATE_NODE=TRUEMIN_NECK_WIDTH=0.2 mm

CPUVCCIOS0_DRVHMIN_LINE_WIDTH=0.6 mm

DIDT=TRUE


SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2 mm

CPUVCCIOS0_LL

DIDT=TRUE


7

1278

1278

4985

4985

6 7 9 1036 40 45

6722424752546568727377

75065676869

2 1345678

D70mA is required to support pull-ups. Alternative is strong voltage

CAESAR IV 1.2V INT.VR CMPTS

1.05V S5 LDOPull-ups (3) must be 51 ohms to support XDP (not required in production).

Cougar Point requires JTAG pull-ups to be powered at 1.05V in S5.

CRITICAL

4.7UH-0.91A

PLE031B-SM

L7700

1 2 ENET_SR_LX

MIN LINE WIDTH 0 4MM

PP3V3_ENET37

67263773



IN

IN

BIAS

NC

OUT

THRM

EN

PADGND

NC

LX

PGOOD

IN

SS/REFIN

FB

COMP

EN

SKIP

GNDOUT

IN

VI

SWEN

FB

GND

NC

IN

BIAS

NC

OUT

THRM

EN

PADGND






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

Max Current = 0.35A

F = 1MHZ

dividers (200/100) to 3.3V S5, which burns 100mW in all S-states.

Vout = 1.05V

Vout = 1.05V

MAX CURRENT = 0.3A

Vout = 1.5V

F = 1MHZMAX CURRENT = 2A

Vout = 1.8V

1.8V S0 Switcher

1.5V S0 Switcher

Max Current = 0.35A

1.05V S0 LDO

73

1UF

402CERM6.3V10%

XDP_PCH

C7740 1

2

XDP_PCH

TPS720105

CRITICAL

SON

U7740

4

3

5

6

2

1

7

X5R402

XDP_PCH

6.3V10%2.2UFC77411

2

MAX15053EWLWLP

CRITICAL

U7760

B1

B3

C1

A 1

A3

A2

C3

B2

C2

20.0K1%1/16WMF-LF402

R77601

2

MF-LF

10K

1/16W1%

402

R77611

2

3.24K

1%

402

1/16WMF-LF

R77651 2

X7R

1500PF

402

10%25V

C77651

2

805

20%6.3VCERM-X5R

22UFC77601

2

402-1

0.1UF10%16VX5R

C77611

2

0.1UF10%16VX5R402-1

C77631

2

100PF

402

50VCERM

5%

C77661

2

402

NOSTUFF50V5%100PF

CERM

C77671

2

NOSTUFF10K1%1/16WMF-LF402

R77671

2


402

0.1UF

16VX5R

10%

C77261

2


603-2

10UF

X5R

20%

6.3V

C77251

2

0.1UF10%

X5R16V


402

C77181

2CERM603


20%6.3V

4.7UFC77171

2

CERM-X5R402

0.022UF10%16V

C77641

2

PIC0503H-SM

1.0UH-20%-11A-0.013OHM

CRITICALL7760

1 2

73


PLE031B SM


SM

XW7700

1 2

73

X5R6.3V20%

10uF

603

C7770 1

2

CRITICAL

10UH-0.55A-330MOHMPCAA031B-SM

L7770

1

2

X5R6.3V20%

603

10uFC77731

2SOT23-5

TPS62201

CRITICAL

U7770

3

4

2

5

1

2.2UF10%6.3V

402X5R

C77811

2

SONTPS720105

CRITICAL

U7780

4

3

5

6

2

1

7


10%1UF

402CERM6.3V

C7780 1

2

603X5R-CERM-1

20%22UF6.3V

C77621

2

603X5R-CERM-1

20%22UF6.3V

C77721

2


10%6.3VCERM402

1UFC7782 1

2

Misc Power Suppl


PP1V8_S0

PP1V8_S0

CPUVCCIOS0_EN

PP1V05_SUS

PP3V3_S0

PP3V3_S0

PP1V2_S3_ENET_INTREG

VOLTAGE=1.2VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MMMAKE_BASE=TRUE

P1V8_S0_COMP_RC

P1V8S0_SS


P1V8_S0_RC

PP3V3_SUS

PP3V3_S0

P1V5S0_EN P1V5S0_SW

SWITCH_NODE=TRUE


DIDT=TRUE


ENET_SR_VFB

VOLTAGE=1.2V



DIDT=TRUESWITCH_NODE=TRUEVOLTAGE=1.2VMIN_NECK_WIDTH=0.2MM

PP1V2_S3_ENET_INTREG

P1V8S0_PGOOD

P1V8S0_EN

MIN_NECK_WIDTH=0.2 mmSWITCH_NODE=TRUEDIDT=TRUE

P1V8S0_SWMIN_LINE_WIDTH=0.4 mm

P1V8S0_COMP

PP1V5_S0

P1V8SO_FB

7

6 7 14 17 20 22 26 71

67141720222671

7073

7 23

678121617181920222326272933363740414246

48495051525457616271

727374757785

678121617181920222326272933363740414246

48495051525457616271

727374757785

6 37 71

7161718192022467273

678121617181920222326272933363740414246

48495051525457616271

727374757785

37

6 37 71

7 16 20 22 26 42 57

D

D S

D S

G

2 1345678

D

3.3V S0 FET

CHANNEL

MOSFET

P-TYPE 8V/5V

3.3V S0 FET

SiA427

3.3V S4 FET

402

16V

0.033UF10%

X5R

C7831 1

2SSM6N37FEAPE

Q7812 3

NO STUFF

CRITICAL

SIA427DJSC70-6L

Q7800

1 4

7

SC70-6L

SIA427DJ

CRITICALQ7830

1

3

4

7

MF-LF1/16W

10K5%

R78321

NO STUFF

603

0

5%

1/10W

MF-LF

R78031 2

PP3V3_S5

PP3V3_S4

PP3V3_S5PP3V3_S0

67817192022232426304656667273747685

7 46 53 54

67817192022232426304656667273747685

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52 54 57 61 62 71

73 74 75 77 85



IN

IN

IN

D

SG

SG

IN

S

G

D

THRMGND

G

PG

SHDN*

D

VCC

S

ON

PAD

OUT

IN

D

SG

IN

IN

D

SG

D

SG

D

SG

G

D S

G

D S

G

S

D

G

D S

G






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

3.3V S3 FET

3.3V SUS FET

5V SUS FET

MOSFET

5V_SUS FET

MOSFET

1.5V S3/S0 FET

LOADING

CHANNEL

18 MOHM @4.5V

P-TYPE

TPCP8102MOSFET

5.0V S0 FET

LOADING

CHANNEL

LOADING

RDS(ON)

1.678 A (EDP)

CHANNEL P TYPE 8V/5V

RDS(ON)

N-TYPE

3.2 A (EDP)

3.3V_SUS FET1.35 A (EDP)

CHANNEL

APN 376S0928

RDS(ON)

MOSFET

LOADING 5 A (EDP)

RDS(ON)

3.3V S4 FET

P-TYPE 8V/5V

SiA427

6 mOhm @4.5V

SI7108DN

26 mOhm @1.8V

P-TYPE 8V/5V

100? mA (EDP)

RDS(ON)

CHANNEL

LOADING

P-TYPE 8V/5V

100? mA (EDP)LOADING

RDS(ON)

CHANNEL

MOSFET

SiA427

26 mOhm @1.8V

SiA427

16 mOhm @4.5V

26 mOhm @1.8V

LOADING

5.0V S0 FET

1.5V S3/S0 FET

RDS(ON)

P-TYPE 8V/5V

SiA427

CHANNEL

MOSFET

1.608 A (EDP)

31 mOhm @1.8V

3.3V S3 FET

30

16VCERM

10%

0.01UF

402

C7810

1 2

10%

402

X5R

0.033UF

16V

C7811 1

2

MF-LF

1/16W5%

47K

402

R7810

1 2

0.01UF

402

16V10%

CERM

C7830

1 2

402

73

497273

SOT563

SSM6N37FEAPE

Q7812 6

21

SOT563

54

497273

10K

402

MF-LF

1/16W

5%

R78601 2

402

16V

0.033UF

X5R

10%

C7861 1

2

0.01UF

10%

402

CERM

16V

C7860

1 2

TPCP8102

23V1K-SM

CRITICALQ7860

5

6

7

8

4

1

2

3

CRITICAL

TDFN

SLG5AP020U7801

5

7

4

2

8

6

3

9

1

402

20%0.1UF10V

CERM

C7801 1

2

1/16W

402MF-LF

0

5%

R78011 2

4.7UF10%

X5R-CERM6.3V

603

NO STUFF

C7802 1

2

8

73

SOT563

SSM6N37FEAPE

Q7802 6

21

0.033UF

NO STUFF

10%

X5R

402

16V

C7809 1

2 NO STUFF

402

16V

10%

CERM

0.01UF

C7800

1 2

7273

7273

SOT563

SSM6N37FEAPEQ7822 6

2 1

10%16V

402X5R

0.033UFC7841 1

2

10%16V

402X5R

0.033UFC7821 1

2

0.01UF

10%16VCERM402

C7840

1 2

0.01UF

10%16VCERM402

C7820

1 2

SOT563

SSM6N37FEAPEQ7822 3

5 4

SOT563

SSM6N37FEAPE

Q7802 3

5 4

402

100K

MF-LF1/16W5%

R78121

2

NO STUFF

402MF-LF1/16W

5.1K

5%

R78001 2

402MF-LF1/16W

12K

5%

R78201 2

402

3.3K

1/16WMF-LF

5%

R78401 2

402MF-LF1/16W

220K5%

R78621

2

NO STUFF

3

SC70-6L

CRITICAL

SIA427DJQ7820

1

3

4

7

SC70-6L

CRITICAL

SIA427DJ

Q7810

1

3

4

7

CRITICAL

SI7108DNPWRPK-1212-8-HF

Q7801

5

4

1 2 3

402MF-LF1/16W

91K

5%

R78301 2

4022

NO STUFF

5%220K

1/16WMF-LF402

R78021

2

5%220K

1/16WMF-LF402

R78421

2

5%1/16W

MF-LF

100K

402

R78221

2

CRITICAL

SIA413DJSC70-6L

Q7840

1

3

4

7


Power FETs

P3V3S3_EN_L

P5VSUS_SS

PP5V_SUS

PP5V_S5

PP3V3_S5

P3V3SUS_SS

PP5V_S0

P5VSUS_EN_L

PP3V3_S5

P3V3SUS_EN_L

P3V3S4_EN_L

P3V3S0_EN_L P3V3S0_SS

P1V5S0FET_GATE_R

PP1V5_S3

PP1V5_S3RS0

PP5V_S3

P5V0S0_SS

P3V3S3_SS

PP3V3_S3

P3V3S4_GATE

PP3V3_SUS

P5V0S0_EN_L

PM_SUS_EN

PM_SLP_S3_R_L

P1V5S0FET_GATE

P1V5CPU_EN

P3V3_S4_EN

P3V3S3_EN

PM_SLP_S3_R_L

TP_P1V5S3RS0_RAMP_DONE

PM_SUS_EN

PP5V_S5

7

7 22

7546672

67817192022232426304656667273747685

6 7 22 42 47 52 54 65 68 70 7377

67817192022232426304656667273747685

6727293067

6 7 10 12 15 30 73 85

67303242434446575960616667

6 7 8 18 24 26 30 31 32 33 4850 54 55 73

7 16 17 18 19 20 22 46 71 73

7546672

OUT

IN

OUT

IN

VDD

OUT_A*

OUT_A

IN_A

IN B

(OD IPU)

(OD,IPU)(IPD)

D

G S

OUT

2 1345678

D

S5 Rail Enables & PGOOD

Delete R when pull-down added to PCH page

Internal pull-ups 100K +/- 20%

00

3.3V,5V S3 ENABLE

Deep Sleep (S4)

343S0497

Battery Off (G3Hot)

State

Run (S0)

Deep Sleep (S5)

0

1

1

0

0

0

0

1 1

0

0

PM_SLP_S3_LPM_SLP_S5_LSMC_PM_G2_ENABLE

1

1

1

PM_SLP_S4_L

0

1Sleep (S3) 1

1

66 73

1/16W5%

402

5.1K

MF-LF

R7911

1

2

6173045

MF-LF402

1/16W5%

100KR79101

2

66 73

X5R16V

402

0.033UF10%

NO STUFF

C79421

2

402

100

MF-LF

5%1/16W

R79411 20.1uF

20%

402CERM10V

C79401

2

645

CRITICAL

SLG4AP012TDFN

U7941

2

63

4

1

SSM3K15FVQ7911

3

1

1/16W

402

68K

5%

MF-LF

R7913

1 2

10%

402

0.068UF

CERM

10V

NO STUFFC79131

2


3.3K

402

1/16WMF-LF

5%

R7914

1 2

53 73

5%

402MF-LF1/16W

9.1K

PLACE_NEAR=Q7812.2:6mm

R7912

1

2

MAKE_BASE=TRUEP5VS3_EN_LPP3V42_G3H

PSOC_VBUS_ENMAKE_BASE=TRUE

P5VS3_EN_L

MAKE_BASE=TRUEP3V3S5_EN_L_R

P3V3S5_EN_L

PP3V3 S5

SMC_PM_G2_ENMAKE_BASE=TRUE

MAKE_BASE=TRUEP3V3S5_EN_L

MAKE BASE=TRUEP5V3V3_REG_EN

PSOC_VBUS_EN

MAKE_BASE=TRUE

PM_SLP_S4_L

PP3V42_G3H

6726434546474853636473

5373

67817192022667273747685

66 73

6673

6726434546474853636473



G

D

SIN

IN

IN

G

D

SIN

OUT

G

DS

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

D

G S

IN

OUT

OUT

OUT

IN

IN

IN

IN

NC

NC

NC

Q3

Q2

Q4

Q1

OUTIN

SENSE

CT

VDD

GND

RESET*

MR*

IN

G

D

S

G

D

S

OUT

OUT

VDD

MR*

RST*V4MON

V3MON

V2MON

GND THRM_PAD

D

G S

OUT

OUT

THRMGND

DLY_1C

IN_B

OUT_BDLY (OD,IPU)

(OD,IPU)

1.3V

PAD

2:1

-

+

OUT

G S

IN

OUT

NC

VCC

A

Y

GND

B

CIN

IN

OUT






36

BRANCH

REVISION

D RA WI NG NU MB ER

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1


3.3V S4 ENABLE

(ISL Version in development)Thresholds:

Threshold: ??

(PM_SLP_S3_R_L)

S0 ENABLE


VFRQ High: Variable Frequency

CHGR VFRQ Generation

353S2310

353S2809

WLAN Enable Generation

PP1V5_S3RS0

(PM_SLP_S3_L)

(AC_EN_L)

3.3V ENET FET

NOTE: S3 term is guaranteed by S3 pull-up on open-drai"WLAN" = ("S3" && "AP_PWR_EN" && ("AC" || "S0"))

"ENET" = "S0" || ("S3" && "AC" && "WOL_EN")

P1V5S0_PGOOD from U7710

(IPU)

SMC-->PM_DSW_PWRGD

Q3: 0.640V

Q4: 0.660V

DLY > 10 ms

VFRQ Low: Fix Frequency

S0 Rail PGOOD (BJT Version)

CPUVCORE ENABLE

V4MON: 0.572V-0.630V

V3MON: 0.572V-0.630V

V2MON: 2.815V-3.099VVDD: 2.734V-3.010V

S0 Rail PGOOD Circuitry

Q2: 0.XXXV

3.3V w/Divider: 2.345V

Worst-Case Thresholds:

ENET Enable Generation

DP S4 Power Enable

PSOC USB Power Enable

PM_RSMRST_L goes to U1800.C21

(90K IPU)

3.3V SUS Detect

U7930 Sense input

Min delay timeNo stuff C7931, 12ms

threhold is 3.07V

S5_PWRGD (old name RSMRST_PWRGD)-->SMC


SMC_BATLOW_L:100K pull up on SMC page

3.3V/5.0V Sus ENABLE

2N7002DW-X-GSOT-363

Q79206

2

1

174546

19

617304573

10K

402

5%

MF-LF1/16W

R79211

2

5%

MF-LF

100K

1/16W

402

R79221 2

2N7002DW-X-GSOT-363

Q79256

2

1

18 32

32

10%16V

402X5R

0.033UFC79211

2

SOT-23-HF

NTR4101P

CRITICALQ7922

3

1

2

0.01UF

10%16VCERM402

C7922

12

43 67

72 73

PLACE_NEAR=Q7812.2:6mm

CERM-X5R

10%

402

0.47UF

6.3V

C79121

2

68

1/16WMF-LF

5%

0

402


R79741 2

49 72 73

49 72 73

49 72 73

70 71

71 73

65 73



0.47UF10%6.3V

CERM-X5R

402

C79101

2

0.47UF10%

CERM-X5R

402

6.3V


C79861

2

5%

402

1/16W

5.1K

MF-LF


R7986

1

2


402

CERM-X5R

0.47UF10%6.3V

C79811

2

0.47UF

CERM-X5R

6.3V10%

402


C79871

2


1/16W

33K

402

5%

MF-LF

R7987

1

2

100K

MF-LF402

1/16W5%

PLACE_NEAR=U1800.P12:5mm

R79791

2

MF-LF402

10K

1/16W5%

R7931

1

2

64


Q79313

12

617304573

8 45 46 73 76

402

0

5%1/16WMF-LF


R79751 2 45

PLACE_NEAR=U7400.7:5mmNO STUFF

MF-LF

5%

0

402

1/16W

R79761 2

NO STUFF

MF-LF402

5%0

1/16W

R79291

2

10K

MF-LF1/16W

5%

402

R79671

2

23 26 45 73

5%100

402MF-LF1/16W

R79571

2

402

5%1/16WMF-LF

100

R7966

1 2

MF-LF1/16W5%

402

100R7964

1 2402

MF-LF1/16W5%

100R79651 2

71

66

5%

1/16WMF-LF402

100R7963

1 2

330

5%1/16W

402MF-LF

S0PGOOD_ISLR79621 2

7073

65

150K

1/16W1%

402MF-LF

R79561

2

S0PGOOD_ISL

0.1uF

402CERM10V20%

C7960 1

2

MF-LF1/16W

1K

5%

402

R79531 2

15.0K

402

1/16W1%

MF-LF

R79511

2

1/16W

402MF-LF

1%7.15KR79521

2

ASMCC0179DFN2015H4-8

CRITICAL

Q7950

5

7

1

6 4

8

2

3

MF-LF402

1/16W5%

1KR79541 2

402

5%

MF-LF1/16W

1KR79551 2

72 73

PLACE_NEAR=U1800.G18:5mm

402

NO STUFF

5%1/16W

0

MF-LF

R79161 2

1745

CRITICAL

SOT23-6TPS3808G33DBVRG4

U7930

4

2

3

15

6

NO STUFF

0.001UF

402CERM

20%50V

C79311

2

1/16W5%

100K

MF-LF402

R79331

2

402

10V20%

CERM

0.1uF

PLACE_NEAR=U7930.6:2.3mm

C7930 1

2

NO STUFF

5%

402MF-LF1/16W

100R79681 2

68

2N7002DW-X-GSOT-363Q7920

3

5

4

SOT-3632N7002DW-X-G

Q79253

5

4

100

MF-LF1/16W5%

402

R7978

1 2

71 73


0.47UF

6.3V

CERM-X5R

10%

402

C79881

2

17

MF-LF1/16W

5%

402

100KR79151

2

S0PGOOD_ISL

TDFNCRITICAL

ISL88042IRTEZU7960

4

1

8

9

3

5

6

2 7

S0PGOOD_ISL

402

15.0K

MF-LF1/16W

1%

R79731

2

10K1%

1/16WMF-LF402

S0PGOOD_ISLR79711

2

S0PGOOD_ISL

15.0K

402

1/16WMF-LF

1%

R79611

2

S0PGOOD_ISL

1/16WMF-LF402

10K1%

R79701

2

402

6.04K

S0PGOOD_ISL

MF-LF

1%1/16W

R79721

2

402

1/16W1%

MF-LF

S0PGOOD_ISL

6.04KR79601

2

SOD-VESM-HFSSM3K15FVQ7921

3

1 2

66 73

457

5

6

8

9CERM402

5%25V

220PFC79411

2

43 67


12

845467376

70 71


1/16WMF-LF402

20K5%

R7981

1

2

402

NO STUFF

5%

0

MF-LF1/16W

R79171 2

SOT89174AUP1G3208U7940

1

3

6

2

5

4

PLACE_NEAR=U7940.1:2.3mm

402

10VCERM

20%0.1uFC7943 1

2

17

4546

MF-LF


402

1/16W5%

100K

R79181

2

72 73

PLACE_NEAR=U7770.3:6mm402MF-LF1/16W5%39K

R7988

1

2

NO STUFF

5%

1/16W402

0

MF-LF


R7919

1 2

SYNC_DATE=10/22/2SYNC_MASTER=JACK_K90I

Power Control 1/ENABLE

SMC_BATLOW_L

PM_SLP_SUS_L

S4_PGOOD_CT

PP3V3_SUS PM_RSMRST_L

PP3V3_S5 PP3V3_SUS

PP3V3_S3

P5V3V3_REG_EN

P1V8S0_PGOOD

P5V3V3_PGOOD

PVCCSA_PGOOD

ALL_SYS_PWRGD_R

CPUVCCIOS0_PGOOD

CPUIMVP_VR_ON

P5V_DIV_VMON

P3V3S3_EN

DDRREG_EN

DDRREG_EN

CPUIMVP_AXG_PGOOD

CPUVCCIOS0_PGOOD

VMON_Q2_BASE

CPUVCCIOS0_EN

PM_SLP_S3_R_L

PM_SLP_S3_R_L

P1V8S0_EN

S5PGOOD_DLY

P1V5_DIV_VMON

P1V05_DIV_VMON

PP3V3_S0

ALL_SYS_PWRGD

PP3V3_S0

CHGR_VFRQ

PM_PECI_PWRGD

PVCCSA_EN

PP3V3_ENET

PP1V5_S3RS0

PP1V05_S0

ALL_SYS_PWRGD

PP5V_S0

PM_SLP_S3_L

SMC_ADAPTER_EN

PM_SLP_S3_L

PM_SLP_S3_R_L

P3V3ENET_SS

CPUVCCIOS0_EN

P1V5S0_EN

PP3V42_G3H

PP3V3_S5

MAKE_BASE=TRUES5_PWRGD

S0PGD_C

S0PGD_BJT_GND_R

VMON_Q4_BASE

PP3V3_S5

PP3V3_S0

VMON_Q3_BASEPP1V5_S3RS0

PP1V05_S0

AC_EN_L

PM_WLAN_EN_L

AP_PWR_EN

WOL_EN

MAKE_BASE=TRUE

PM_ENET_EN_L

CPUVCCIOS0_ENMAKE_BASE=TRUE

PVCCSA_ENMAKE_BASE=TRUE

MAKE_BASE=TRUE

P1V8S0_EN

P1V5S0_ENMAKE_BASE=TRUE

PM_SLP_S3_R_LMAKE_BASE=TRUE

DDRREG_ENMAKE_BASE=TRUE

P3V3S3_ENMAKE_BASE=TRUE

VMON_3V3_DIV

ALL_SYS_PWRGD

PP3V3_S5

PM_SLP_S5_L P3V3_S4_EN

PM_SUS_ENPM_SUS_ENMAKE_BASE=TRUE

SMC_S4_WAKESRC_ENSMC_S4_WAKESRC_ENMAKE_BASE=TRUE

SMC_S4_WAKESRC_EN

MAKE_BASE=TRUE

P3V3_S4_EN

79 OF 10

73 OF 86

716171819202246717273

67817192022232426304656667273747685

7 16 17 18 19 20 22 4671 72 73

678182426303132334850545572

7073

678121617181920222326272933363740414246

484950515254576162

71727374757785

678121617181920222326272933363740414246

48495051525457616271

727374757785

6 771

6710121530727385

23 26 45 73

6722424752546568707277

6726

43

45

46

47

48

53

63

64

73

67817192022232426304656

67817192022232426304656667273747685

678121617

18

19202223

26

27293336

37

40414246

4849

50515254

57

61627172

7374

757785

6710121530727385

6791012141617202223364045687073

707173

6573

7173

7173

436773

7273

23264573

67817192022232426304656667273747685

7273

845467376

7273

2 1345678

D



SYM_VER-1

NC

NC

NC

FOUR GROUNDING VIAS SHOULD BE DISTRIBUTEDALONG THE GROUND SHAPE THAT BOUND THE CONNECTOR BO

GND THRM

ON

VIN_1

VIN_2

VOUT_1

VOUT_2

PAD






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

LVDS I/F

LVDS CONNECTOR:518S0650

(LVDS DDC POWER)

LED BKLT I/F

LCD CONNECTOR

20%6.3V

X5R603

10UF

C90121

2

402X5R16V

0.1UF10%

C90111

2

CRITICAL

0402-LF

120-OHM-0.3A-EMI

L9008

1 2

5%1/16W

402MF-LF

100KR90141

2

402X7R

10%

0.001UF

50V

C9015 1

2

402

50VX7R

10%

0.001UF

C9010 1

2

CRITICAL

AMC2012-SM

90-OHM-200MA

L9080

1

23

4

0.1UF

X5R

16V

402

10%

C90091

2

402X7R50V10%

0.001UF

C9020 1

2

20474-030E-11F-RT-SM

CRITICAL

J9000

31

32

33

34

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

4

5

6

7

8

9

MFET-2X2-8IN

CRITICAL

FPF1009U9000

6

1

7

2

3

4

5

5%

MF-LF1/16W

402

2.2K

R90091

2

1/16W5%

MF-LF402

2.2K

R90081

2

FERR-120-OHM-1.5A

0402-LF

L9004

1 2

S

LVDS CONNECTOR

SYNC_MASTER=K24_MLB

LVDS_DDC_CLK

LED_RETURN_5LED_RETURN_4

LED_RETURN_6

LED_RETURN_3

LED_RETURN_2

LED_RETURN_1

PP3V3_S0

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_P<0>

BKL_VSYNC

LVDS_IG_A_DATA_P<1>

LVDS_IG_A_DATA_N<0>

LVDS_IG_A_DATA_P<2>

LVDS_IG_A_DATA_N<2>

LVDS_IG_A_CLK_N

LVDS_IG_A_CLK_P

PPVOUT_SW_LCDBKLT

LVDS_CONN_A_CLK_F_P

LVDS_CONN_A_CLK_F_NLVDS_DDC_DATA

PP3V3_S5

LCD_IG_PWR_EN

PP3V3_LCDVDD_SW_F

VOLTAGE=3.3V MIN_LINE_WID TH=0.30 MMMIN_NECK_WIDTH=0.20 MM

PP3V3_S0_LCD_F

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WID TH=0.25 MM VOLTAGE=3.3V

MIN_LINE_WIDTH=0.30 MMVOLTAGE=3.3V

PP3V3_LCDVDD_SW


9

6818

677

677

677

677

677

677

678121617181920222326272933363740414246

48495051525457616271

7273757785

61880

61880

677

61880

61880

61880

61880

1880

1880

677

685

6856818

67817192022232426304656667273

7685

818

6

6

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

2 1345678

DT29 signals are

P/N-swapped after AC

caps to improve layout.

(Both L’s)

D9372/D9373:

T29: TX_0

(D9364.2)

(D9365.2)

(D9372/D93

(C9370/C9371)

(All 4 D’s)

T29 A High-Speed Sig

(C9372.2)

(C9373.2)

T29 PathBiasing

3483

3483

3483

3483

881

881

881

881

10% 16V0.1UF X5R-CERM0201

C9300 1 2881

881

TSLP-2-7GND_VOID=TRUE

BAR90-02LRH

CRITICAL

D9364 1 2

BAR90-02LRHGND_VOID=TRUE

TSLP-2-7

CRITICAL

SIGNAL_MODEL=T29PIN

D9373 1 2

GND_VOID=TRUE

TSLP-2-7

CRITICAL

SIGNAL_MODEL=T29PIN

BAR90-02LRHD9372 1 2

TSLP-2-7GND_VOID=TRUE

BAR90-02LRHCRITICAL

D9365 1 2

0.47UF20%

201

GND_VOID=TRUE

CERM-X5R-14V

C9370 1 2

1.5K MF1/20W201

5%GND_VOID=TRUE

R93721 2

1.5K

MF1/20W

GND_VOID=TRUE

5%201R9373

1 20.47UF CERM-X5R-14V20%

GND_VOID=TRUE 201

C9373 1 2

GND_VOID=TRUE

201

4V20%0.47UF CERM-X5R-1

C9372 1 2

0.47UF20%

201

GND_VOID=TRUE

4VCERM-X5R-1

C9371 1 2

GND_VOID=TRUEGND_VOID=TRUE 1.5KR9375 1 2

1.5K5M

GND_VOID=TRUE

R9374 1 2

10% 16V0.1UF X5R-CERM0201

C9301 1 2

10% 16V0.1UF X5R-CERM0201

C9302 1 2

10% 16V0.1UF X5R-CERM0201

C9303 1 2

10% 16V0.1UF X5R-CERM0201

C9304 1 2

0.1UF 10% 16VX5R-CERM0201

C9305 1 2

8

8

8

8

1.0NH+/-0.1NH 0201-1

OVERSIZE_PAD=0.875 mm^2

L9372 1 2


1.0NH+/-0.1NH 0201-1L9373 1 2

T29_A_BIAS_R2DN1

T29_D2R_C_P<0>

T29_R2D_N<0>

T29_D2R_N<0>

DP_EXTA_ML_P<0>

T29DPA_ML_C_N<

T29DPA_ML_C_P<

DP_EXTA_ML_P<2>

DP_EXTA_ML_N<2>DP_EXTA_ML_C_N<2>

DP_EXTA_ML_N<0>

DP_EXTA_ML_P<1>

DP_EXTA_ML_N<1>

T29_R2D_C_F_N<0>T29_R2D_C_N<0>

T29_R2D_C_P<0>DP_EXTA_ML_C_N<1>

DP_EXTA_ML_C_N<0>

DP_EXTA_ML_C_P<0>

DP_EXTA_ML_C_P<1>

DP_EXTA_ML_C_P<2>

T29_A_BIAS_R2DP0

T29_D2R_P<0>

T29_A_BIAS_R2DP1

T29_A_BIAS_R2DN0

T29_D2R_C_N<0>

T29_R2D_P<0>

T29_R2D_C_F_P<0> 83

75 81

75 81

75 81

75 81

75 81

75 81

83 83

83



OUT

IN

IN

OUT

OUT

IN

IN

IN

BI

BI

BI

NC

IN

BI

THMPADGND

VDD

OUT_D0P

OUT_D0N

OUT_D1P

OUT_D2P

OUT_D1N

OUT_D3P

OUT_D2N

OUT_D3N

AC_AUXP

AC_AUXN

OUT_HPD

CEXT

IN_D0P

IN_D0N

IN_D1N

IN_D2N

IN_D3P

IN_SDA

IN_AUXP

IN_AUXN

IN_HPD

I2C_CTL_EN

I2C_ADDR0

I2C_ADDR1

SCL_CTL

SDA_CTL

REXT

AUXDDC_OFF

PD

CA_DET

IN_SCL

IN_D3N

IN_D2P

IN_D1P

OUT_AUXN_SDA

OUT_AUXP_SCL

IN

OUT

OUT

OUT

VDD

PIO1_8/CT16B1_CAP0

PIO1_7/TXD

XTALIN

PIO1_4/AD5/WAKEUP

PIO1_6/RXD

SWDIO/PIO1_3/AD4

R/PIO1_2/AD3

R/PIO1_1/AD2

R/PIO1_0/AD1RESET#/PIO0_0

PIO0_1/CLKOUT

SWCLK/PIO0_10/SCK/CT16B0_MAT2

PIO0_9/MOSI/CT16B0_MAT1PIO0_8/MISO/CT16B0_MAT0

PIO0_2/SSEL/CT16B0_CAP0

R/PIO0_11/AD0

PIO0_7/CTS#

PIO0_6/SCK

PIO0_4/SCL

PIO0_5/SDA

VSSTHRMPAD

BI

OUT

OUT

IN

IN

IN

IN

IN

IN

AUX-

AUX+

DOUT_1+

DOUT_1-

NC

GNDTHMPAD

GPU_SEL

HPD_2

AUX2-

AUX2+

DIN2_1-

DIN2_1+

DIN2_0-

HPD_1

AUX1-

AUX1+

DIN1_1-

DOUT_0-

DIN1_0+

DIN1_0-

DIN1_1+

HPD_IN

DOUT_0+

DIN2_0+

VDD

AUX_SEL

OUT

IN






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

R9330 provides pads for programming/debug of MCU, please make accessible.

=T29_WAKE_L:

Desktops use PCIe WAKE#

Mobiles use S4 WAKE#

If project has space for 10-pin programming header it should be used.

PS8301 has internal

~150K pull-down on PD

pin. Okay to drive this

pin even when VCC=0V per

Parade (pin is 5V-tolerant).

(C9380/C9381)

DP Path Biasing

Both R’s must c

Note: Other Parade

0 1 0xB6/0xB7

If GPU uses common pins for AUX_CH

and DDC, alias nets together at GPU.

SWCLK

R9308/R9309 maintain bias on C9308/C9309

transitions from high to low.

(D9382/D9383)

Both R’s:

DP/T29 A Low-Speed MUXIC supports input

(DP_SDRVA_HPD)

(DP_SDRVA_AUXCH_N)

T29: TX_1

LO=Port A

(D9360.2)

(D9361.2)

AUXCH Snoop Port,

used by PS8301

during training.

(T29_A_LSX_R2P)

I2C Addr:

detection of DP Source.

R2P = Receptacle to Plug

0x26/0x27 (Wr/Rd)

Must be 3.3V DP A port power

(IPU)

(OD)

(OD)

(OD)

T29: LSX_A_R2P

T29: Unused

T29: RX_1 Bias

HI=Port B

10 for ML and HPD, Pericom uses

(IPD)

(IPD)

(IPU)

(IPD)

PS8301 I2C Addresses:

A1 A0 Addr (W/R)

1 0 0x94/0x95

0 0 0x96/0x97

used for this part.

devices use 96/B6,

so only 94/B4 are

1 1 0xB4/0xB5

(IPD) (T29_A_LSX_P2R)

(All 4 D’s)

Must be 3.3V DP A port power

P2R = Plug to Receptacle

pin 10 for ML and pin 11 for HPD.

Display can detect host T29 support usin

because 100-ohm pull-downs would defeat

pull-ups on ML<3>. U9390 AUX defaults

Note: U9390 ML/HPD defaults to T29 mode so th

PI3vEDP212 (353S3055) are

CBTL04DP081 (353S3151) and

similar pinouts. NXP uses pin

footprint-compatible parts with

(D9360/D9361)

(DP_SDRVA_AUXCH_P)

(OD)

(D9382/D93

to C in star to

(C9383.2)

(IPD)

Port A MCU

SWDIO

D9364/D9365:

DP A Super-Driver

(Both L’s)

(C9383.2)

to prevent spikes when U9310 AUXDDC_OFF

high while Vcc = 0V.

402MF-LF1/16W

1K5%

R93121

2

1/16W1%

402MF-LF

4.22KR93191

2

817

NO STUFF

MF-LF

5%

402

1/16W

1KR93111

2

5%

402MF-LF1/16W

1KR93101

2

10%

X5R-CERM0201

16V

0.1UFC93111

2

10%

0201

16V

0.1UF

X5R-CERM

C93121

2

20%6.3VCERM

402-LF

2.2UF

PLACE_NEAR=U9310.11:2 mmC9319 1

2

3483

3483

3483

3483

881

881

48

48

8178081

8178081

5%100K

MF1/20W

201

R93991

2

100K5%

MF1/20W

201

R93981

2

817

817

CRITICAL

QFN

PS8301TQFN40GTR-A2

U9310

19

20

39

32

11

6 3 3

36

35

26

15

16

2

1

5

4

8

7

10

9

3

14

13

17

18

29

30

27

28

24

25

22

23

31

34

12

38

37

4 1

2 1

4 02.2UF

6.3V

402-LFCERM

20%

C9310 1

2

02010.1UF X5R-CERM10% 16V

C9363 1 2

10% 16VX5R-CERM02010.1UF

C9362 1 2

0.1UF16V10%

X5R-CERM0201

C9367 1 2

10% 16VX5R-CERM02010.1UF

C9366 1 2

75

10% 16VX5R-CERM0.1UF 0201

C9369 1 2

10% 16VX5R-CERM02010.1UF

C9368 1 2

18

17

34

HVQFN25

CRITICAL OMIT_TABLE

LPC1112AU9330

2

7

8

9

10

11

12

13

20

23

24

6

15

16

17

18

1

14

19

2 5

5 2 2

3 2 1

4

344883

76

34

344883

34

402MF-LF

1K5%1/16W

R93351

2 402MF-LF1/16W

10K5%

R93361

2

CERM10V20%0.1UF

402

C93301

2

34

76

76

0.1UF20%10VCERM402

C93311

2

5%1/20W

1K

201MF

R9397 2

1

5%

MF1/20W

1K

201

R9396 2

1

1M

402

1/16WMF-LF

5%

R93391

2

10K

402

1/16WMF-LF

5%

R93381

2

76

5%

MF-LF1/16W

402

OMIT

0R93301

2

51

MF1/20W5%

201

R93931

2

5%51

MF1/20W

201

R93921

2

SIGNAL_MODEL=T29DP_MUX

CRITICAL

CBTL04DP081HVQFN

CKPLUS_WAIVE=NdifPr_badTerm

OMIT_TABLE

U9390

18

19

14

15

7

6

32

30

31

26

27

24

25

22

23

2

1

5

4

2 1

2 8

10

17

13

8

11

3 3

3 9 1 2

1 6

2 0

2 9

8 36 76

10K

402

5%1/16WMF-LF

R93341 2

1623

5%0

SDRV_PD

MF1/20W

201

R9318 2

1

2011/20W

MF1M 5%R9308 1 2

2011/20W1M 5%

MF

R9309 1 2

SIGNAL_MODEL=EMPTYSIGNAL_MODEL=EMPTY

GND_VOID=TRUEBAR90-02LRH

CRITICAL

TSLP-2-7

SIGNAL_MODEL=EMPTY

D9360 1 2

SIGNAL_MODEL=T29PIN

BAR90-02LRH

CRITICAL

TSLP-2-7

GND_VOID=TRUE

D9382 1 2

BAR90-02LRH

SIGNAL_MODEL=T29PIN

GND_VOID=TRUETSLP-2-7

CRITICAL

D9383 1 2

TSLP-2-7BAR90-02LRH

SIGNAL_MODEL=EMPTY

GND_VOID=TRUE

CRITICAL

D9361 1 2

1.5K MF

GND_VOID=TRUE

2011/20W5%R9382

1 2

1.5KGND_VOID=TRUE

1/20W5%201MFR9383

1 2

0.47UF20% 4VCERM-X5R-1

201

C9381 1 2201

20% 4VCERM-X5R-10.47UF

C9380 1 2

201

20%CERM-X5R-1

4V

GND_VOID=TRUE

0.47UF

C9382 1 2

201

4V20%0.47UF CERM-X5R-1GND_VOID=TRUE

C9383 1 2

0.22UF20% 6.3VX5R 201

C9364 1 2

0.22UF 20%X5R

6.3V201

C9365 1 2

0.22UF6.3V

X5R20%

201

C9361 1 2

0.22UF6.3V20%

X5R 201

C9360 1 2

1.5K

M

GND_VOID=TRUE

5R9385 1 2

1.5K

M

GND_VOID=TRUE

5R9384 1 2

5M

GND_VOID=TRUE

30

201MF5% 1/20W

R9355 1 2

30

201MF5% 1/20W

R9354 1 2

30

201MF5% 1/20W

R9350 1 2

30

MF5% 1/20W

201

R9351 1 2

0.1UF

CERM402

10V20%

C93901

2

1.5K5%

201MF1/20W

R9360 1 2

1.5K

2011/20W5%

MF

R9361 1 2

1.5K5% 1/20WMF 201

R9364 1 2

1.5K5%MF 201

1/20WR9365 1 2

CRITICAL

74LVC1G04DBDCK

SC70

U93592

3

5

4

10%0.1UF

X5R16V

402

C9359 1

2

10% 16V0.1UF X5R-CERM0201

C9306 1 2

0.1UF10% 16VX5R-CERM0201

C9307 1 2

0.1UF 10% 16VX5R-CERM0201

C9308 1 2

0201X5R-CERM16V10%

0.1UF

C9309 1 2

201MF

5%1/20W

270R93531

2201

1/20W

2705%

MF

R93521

2


515%

1/20WMF201

R93631

2PLACE_NEAR=C9361.1:2mm

1.0NH+/-0.1NH 0201-1


L9382 1 2

0201-1


1.0NH+/-0.1NHL9383 1 2


DisplayPort/T29 A M

PP3V3_SW_DPAPWR

DP_SDRVA_AUXCH_N

DP_SDRVA_ML_P<1>

DP_SDRVA_ML_N<3>

DP_A_PWRDWN

DP_SDRVA_ML_C_P<2>

DP_SDRVA_ML_R_P<0>

DP_SDRVA_ML_R_N<0>

T29_R2D_C_F_N<1>

T29_R2D_C_F_P<1>

DP_SDRVA_ML_R_N<2>

DP_SDRVA_ML_R_P<2>

DP_SDRVA_ML_N<0>

T29_D2R_P<1>

DP_EXTA_ML_N<1>

DP_EXTA_DDC_DATA

DPSDRVA_I2C_CTL_EN

DPSDRVA_REXT

T29_D2R_C_N<1>

T29_D2R_C_P<1>

DP_SDRVA_ML_N<2>

I2C_T29_SDA

T29_LSOE<1>

T29DPA_HPD

T29_A_BIAS_R

T29_MCU_INT_L

DP_SDRVA_ML_C_N<1>

PP3V3_S0

T29_LSOE<0>

I2C_DPSDRVA_SDA

DP_EXTA_ML_C_N<3>

DP_SDRVA_ML_N<1>

T29_A_LSX_P2R

T29_A_LSX_R2P

T29_A_RSVD_N

DP_A_PWRDWN

T29_A_BIAS

DP_SDRVA_AUXCH_P

T29_A_RSVD_P

DP_SDRVA_HPDI2C_DPSDRVA_SCL

PP3V3_SW_DPAPWR

T29_LSEO<0>

I2C_T29_SCL

DP_EXTA_ML_N<0>

DP_EXTA_DDC_CLK

DP_EXTA_ML_P<1>

DP_EXTA_ML_P<2>

DP_EXTA_ML_N<3>

DP_EXTA_ML_P<3>

DP_EXTA_ML_N<2>

DPSDRVA_CEXT

T29DPA_ML_N<3>

DP_A_EXT_HPD

T29DPA_ML_P<3>

T29DPA_ML_P<1>

T29DPA_ML_N<1>

DP_A_EXT_AUXCH

DP_A_EXT_AUXCH

DP_A_CA_DET T29DPA_CONFIG1_RC

T29DPA_CONFIG2_RC

T29_A_UC_ADDR

T29_LSEO<1>

T29_A_HV_EN

DP_A_EXT_HPD

T29_A_HV_EN_R

DP_SDRVA_ML_C_N<3>

T29DPA_ML_C_N<

DP_EXTA_AUXCH_P

T29_D2R1_BIASN

T29_D2R1_BIASP

DP_EXTA_ML_P<3>DP_EXTA_ML_C_P<3>

DP_EXTA_AUXCH_PDP_EXTA_AUXCH_C_P

DP_EXTA_AUXCH_NDP_EXTA_AUXCH_C_N

DP_EXTA_ML_N<3>

DP_A_CA_DET

DP_A_BIAS2VOLTAGE=3.3V

DP_EXTA_ML_P<0>

DP_AUXCH_ISOL

T29_R2D_C_N<1>

DP_EXTA_AUXCH_N

DP_EXTA_HPD

T29_A_UC_ADDR

DP_SDRVA_ML_C_P<0>

DP_SDRVA_ML_C_N<0>

DP_SDRVA_ML_C_N<2>

T29DPA_ML_C_P<T29_R2D_P<1>

DP_A_BIASDP_SDRVA_ML_C_P<1>

DP_SDRVA_ML_C_P<3>

DP_SDRVA_AUXCH_C_P

DP_SDRVA_AUXCH_C_N

T29_R2D_C_P<1>

T29_D2R_N<1>

VOLTAGE=3.3VDP_A_BIAS0

DP_SDRVA_ML_P<3>

DP_SDRVA_ML_P<0>

DP_SDRVA_ML_P<2>

T29_R2D_N<1>

PP3V3_S0

=T29_WAKE_L

DP_A_PWRDWN_R

DPSDRVA_I2C_ADDR1

DPSDRVA_I2C_ADDR0

PP3V3_S0

DP_A_PWRDWN

9

87576

83

83

83

75

83

83

83

83

83

83

83

83

7581

83

83

6 7 8 12 16 17 18 19 20 22 2326 27 29 33 36 37 40 41 42 46

48 49 50 51 52

54 57 61 62 71 72 73 74 75 77

85

83

880

75

876

83

880

87576

7581

7581

7581

7581

7581

7581

75

75

46 75

83

7581

75 81

75 81

75 81

75 81

8

7581

7581

75

83

83

83

83

83

83

83

83

8

83

83

83

83

67812161718192022

232627

293336374041

424648

495051525457

616271

727374757785

6781216171819202223

26272933

36374041

42464849

50515254

57616271

72737475

7785

75

IN

OC*

OUT

EN

GND

I

S D

2 1345678

D

3.3V/HV Power MUX

for 2.9V mode.

3.3V Always

B1100 chosen for high Vf

Vds(max): -30V

Vgs(max): +/-12V

Vgs(th): -1.4V

Rds(on): 65mOhm @ 2.5V Vgs

Id(max): 3.7A @ 70C

DP_PWR must be S4 t

wake from T29 devic

20V Max

TSD 470ms 235ms 724ms

IFLT 885mA 876mA 894mA (*)

Nominal Min Max

SI8409DB:

3.3V/HV MUXed(*) U9410 tolerance unknown

TFLT 18.3ms 13.4ms 26.7ms

ILIM 935mA 925mA 944mA (*)

Port A HV Power Switch

Port A 3.3V Power Switch

20%6.3VX5R

10UFC9486 1

2

CRITICAL

SOT23TPS2051BU9480

4

2

5

3

1

CERM

20%0.1UF10V

C94851

2

0.1UF20%10VCERM

C9481 1

2 X5R-CERM-1

22UF6.3V20%

CRITICAL

C94801

220%100UF

POLY-TANT6.3V

CRITICAL

C94871

2

BGASI8409DB

CRITICALQ9425

2

3

4

CRITICAL1

210

11CRITICAL

9410

DFLS1100

POWERDI-123

CRITICAL

D942512

SMC_S4_WAKESRC

PP3V3_S5


PP3V3_SW_DPAPWR

VOLTAGE=3.3V


PP15V_T29

T29_A_HV_EN

875

7836

8367576



OUT

OUT

OUT

OUT

BI

BI

BI

GND

GND

ML_LANE0N

ML_LANE0P

ML_LANE1P

GND

ML_LANE1N

GND

GND

DP_PWR

ML_LANE2PAUX_CHP

RETURN

HOT_PLUG_DETECT

AUX_CHN

ML_LANE3P

ML_LANE3N

ML_LANE2N

CONFIG1

CONFIG2

BOT ROW TOP ROWT H PIN S S M P IN S

SHIELD PINS

D

SG

D

S G

G

D

S

D

G S

OUT

OUT

OUT

BI

IN

GND PGND

OUT

FB

IN

S

G

D

GNDPGND

OUT

FB

IN

CT

EN*

RTRY*

VIN

THRMGND

IFLT

ILIM

FLT*

VOUT

PAD

IN

IN

IN

OUT






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

is LOW.

TFLT = CCT * 38900

on AC-coupled signals.

T29: TX_0

DP Dir

(Both C’s)

T29: LSX_R2P/P2R (P/N)

T29: TX_1

(3, 5, 17 & 19):

DP DirT29 Dir

<RLIM>

(IPU-Weak!)

IFLT = 200k / RFLT = 885mA

T29: Unused

Low: 0 - 0.8V

Sink HPD range:

DP Source must pull

greater than or equal

to 100K (DPv1.1a).

down HPD input with

High: 2.0 - 5.0V

<CT>

For J9400 T29 SMT pads

470k R’s for ESD protection

TSD = CCT * 100000

ILIM = 201k / RLIM = 935mA

(Both C’s)

T29 Dir

HIGH and T29_A_HV_EN

DPAPWRSW_HV_DET is

Note: Bleeder active when

<RFLT>

2.5V / 249 ohm = 10mA

Bleeder Resistor

P = ~27mW

(Both L’s)

or HV_EN high.

when Source >3.4V

Blocking FET, off

Circuit threshold range: 2.877-2.941V (2.903V nomi

DisplayPort/T29 A Connector

Circuit threshold range: 3.363-3.439V (3.395V nominal)

ZXRE060A REF range: 0.595-0.605V (0.600V nominal)

10%50VX7R402

0.01UFC9400 1

2

7583

7583

12GND_VOID=TRUE

5%

MF1/20W

201

R94071 2

5%

12

MF1/20W

201

GND_VOID=TRUER94031 2

12GND_VOID=TRUE

5%

MF1/20W

201

R94041 2

GND_VOID=TRUE

5%

12

MF1/20W

201

R94051 2

12

5%

GND_VOID=TRUE

MF1/20W

201

R94061 2

5%

12

MF1/20W

201

R94081 2

0.01UF10%50VX7R402

C9402 1

2

0603

FERR-120-OHM-3AL9408

1 2

12

5%

MF1/20W

201

R94021 2

12

5%

MF1/20W

201

R94011 2

50VX7R402

10%0.01UFC94011

2

201

1/20WMF

SIGNAL_MODEL=EMPTY

GND_VOID=TRUE

5%1K

R94941

2 201MF

5%1K

1/20W

GND_VOID=TRUE

SIGNAL_MODEL=EMPTY

R94951

2

CERM402

5%50V

30PFC9498 1

2

5%

CERM

30PF50V

402

C94991

2

402

1/16WMF-LF

5%100K

R94411

2

CRITICAL

0603

650NH-5%-0.430MA-0.052OHMGND_VOID=TRUE

SIGNAL_MODEL=EMPTY

L9498

12

CRITICAL

0603

650NH-5%-0.430MA-0.052OHM

GND_VOID=TRUE

SIGNAL_MODEL=EMPTY

L9499

12

7583

7583

7583

7583

7583

402

1/16WMF-LF

4.7K5%

R94251

2

GND_VOID=TRUEGND_VOID=TRUEGND_VOID=TRUEGND_VOID=TRUE

F-RT-THSM

CRITICAL

DSPLYPRT-M97-1J9400

18

16

4

6

20

1

78

1314

2

2122

5

3

11

9

17

15

12

10

19

6035 C

402C402 603

5 C POLY-TANTCASE-B2-SM

MMDT3946XGSOT363

Q9426

2 5

6 31 4

1/16WMF-LF402

5%4.7KR94301

2

5%

402

1/16WMF-LF

1KR94261

2

1/16WMF-LF

10K5%

402

R94321

2

MF-LF

5%1/16W

402

4.7KR94291

2

1/16W

100K

402MF-LF

1%

R94271

2

MF-LF1/16W

21.5K

402

1%

R94281

2

SOT563SSM6N37FEAPE

Q9430 3

54

SOT563SSM6N37FEAPEQ94306

21

5%

MF-LF402

1/16W

1MR94521

2 402

1/16W

1M

MF-LF

5%

R94511

2

330PF

402CERM

10%50V

C9494 1

2

10%

CERM

330PF50V

402

C94951

2

5%2.2K

1/20WMF201

GND_VOID=TRUE

R94981

2 201

1/20WMF

5%2.2K

GND_VOID=TRUE

R94991

2

402

470K5%

MF-LF1/16W

R94161

2

DMB53D0UVSOT-563

Q9419

5

3

41/16WMF-LF

5%

402

1KR94181 2

SOT-563

DMB53D0UVQ9419

6

2

1

SOD-VESM-HF

SSM3K15FVQ9415

3

12

402

249

1/16WMF-LF

1%

R94192 1

0603

FERR-120-OHM-3AL9400

1 2

75

75

75

7583

8367576

SOT353ZXRE060A

CRITICAL

U9426

4

2

3

5

1

2

1

4

CERM10V20%0.1UF

402

NO STUFF

C94291

2

20%

402CERM10V

0.1UFC9426 1

2

ZXRE060ASOT353

CRITICAL

U9435

4

2

3

5

1

MF-L

1001

40

1/16

R943

40MF-L1/16

124.9

R943

402

10V10%

X5R

1UFC9436 1

2

1/16W

402

5%

MF-LF

220R94331

2

6.3VCERM-X5R

0.47UF10%

402

C94121

2MF-LF402

1/16W1%

100KR94101

2

200K

MF-LF1/16W

402

1%

R94111

2

0.1UF50VX7R

603-1

10%

C9410 1

2 TPS2590QFN

U9410

9

16 15

5 1 3

1 4

8

76

1 7

3

4

11

12

0.1UF

603-1X7R

10%50V

C94111

2

TSLP-2-7BAR90-02LRHCRITICAL

SIGNAL_MODEL=T29PINGND_VOID=TRUE

D9499 1 2

TSLP-2-7

CRITICAL

SIGNAL_MODEL=T29PINGND_VOID=TRUE

BAR90-02LRHD9498 1 2

201

1/20WMF

GND_VOID=TRUE

5%470KR94701

2 201

1/20WMF

GND_VOID=TRUE

5%470KR94711

2

GND_VOID=TRUE

0.47UF201

20%CERM-X5R-1

4VC9471 1 2

201CERM-X5R-1

4V0.47UF

20%

GND_VOID=TRUE

C9470 1 2

201CERM-X5R-120% 4V

0.47UF

GND_VOID=TRUE

C9472 1 2

20%CERM-X5R-1

2010.47UF

4V

GND_VOID=TRUE

C9473 1 2

201

1/20WMF

GND_VOID=TRUE

5%470KR94731

2201

1/20WMF

GND_VOID=TRUE

5%470KR94721

2

0.1uF

402X5R16V10%

C9490

1 2

MF1/20W

201

5%51

R94911

2

75

8

8

8 75 76

5%

402MF-LF1/16W

82R94371

2

10%10V

402X5R

0.47UFC9424 1

2

MF-LF

5%

402

1/16W

22R94241

2

SM

STPS2L30AF

D94101 2


DisplayPort/T29 A Co

DPAPWRSW_P3V3_ONDPAPWRSW_P3V3_ON_L

DPAPWRSW_HV_DET_R_L

VOLTAGE=18V


PP3V3RHV_SW_DPAPWR

VOLTAGE=0VMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MMGND_DPACONN_1

DPAPWR_FB_DIV

DPAPWRSW_IFLT

DPAPWRSW_VREF

DPAPWRSW_HV_DET_L

T29DPA_CONFIG1_RC

T29DPA_HPD

T29DPA_CONFIG2_RC

DP_A_EXT_AUXCH_P

T29DPA_ML_N<3>

T29DPA_ML_P<3>

DPAPWRSW_ILIM

T29_D2R_C_N<0>

DPAPWRSW_HV_DET

T29_D2R_C_P<0>

DPAPWRSW_ON_L_C DPAPWRSW_ON_C

T29_A_HV_EN

T29DPA_ML_P<0>

T29DPA_ML_C_P<0>

DPAPWRSW_HVEN_L_R TP_DPAPWRSW_FLT_L

VOLTAGE=18VMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MM

PPHV_SW_DPAPWR

T29_A_HV_EN

DPAPWRSW_NPN_E

DPAPWRSW_CT

T29DPA_ML_P<1>

T29DPA_ML_N<2>

T29DPA_ML_C_N<2>

T29DPA_ML_C_P<2>

T29DPA_ML_N<0>

T29DPA_ML_N<1>

T29_A_BIAS

DPAPWR_BLDR_EMIN_LINE_WIDTH=0.20 MMMIN_NECK_WIDTH=0.20 MM

VOLTAGE=18V

DPACONN_20_RCMIN_LINE_WIDTH=0.38 MMMIN_NECK_WIDTH=0.20 MM

T29_D2R_C_N<1>

T29_D2R_C_P<1>

DP_A_EXT_AUXCH_N

T29DPA_D2R1_AUXCH_P

T29DPA_D2R1_AUXCH_N

VOLTAGE=0VMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MMGND_DPACONN_19

T29DPA_ML_P<2>

T29DPA_HPD_R

VOLTAGE=0V

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.38 MMGND_DPACONN_8

MIN_LINE_WIDTH=0.38 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=0V

GND_DPACONN_13

GND_DPACONN_7MIN_LINE_WIDTH=0.38 MM

VOLTAGE=0V


T29DPA_ML_C_N<0>

MIN_LINE_WIDTH=0.38 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=0V

GND_DPACONN_14

T29_A_BIAS_R

T29_A_BIAS_D2RP1

T29_A_BIAS

VOLTAGE=3.3V

T29_A_BIAS_D2RN1

DPAPWR_BLDR_B

VOLTAGE=18V

MIN_LINE_WIDTH=0.38 MMPP3V3RHV_SW_DPAPWR_UF


9

836

75

76

83

83

83

87576

83

83

83

2 1345678

D *C9797 AND C9799 SHOULD BE PLACED IN T-BONE FOR ACOUSTICS

*PPBUS_SW_LCDBKLT_PWR_SW SHOULD BE KEPT AS SHORT AS POSSIBLE.

*LCD_BKLT_PWM SHOULD BE AWAY FROM BOOST CIRCUIT

PPBUS S0 LCDBkLT FET

ON THE SENSOR PAGE

AND PPBUS_SW_BKL


THERE IS A SENSE RESISTOR BETWEEN

LOADING 0.65 A (EDP)

P-TYPE

MOSFET

CHANNEL

FDC638APZ

43 mOhm @4.5VRDS(ON)

3AMP-32V-467

603-HF

BOTTOM

F9700

1 2

R97881 C9782 1

CRITICAL

FDC638APZ_SBMS001

SSOT6-HF

Q9706

1

2

5

6

4

VOLTAGE=12.6V

PPBUS_SW_LCDBKLT_PWRMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.25 mm


PPBUS_S0_LCDBKLT_FUSEDPPBUS_G3H

8 77

678364049506364



INVDDIO VINVLDO

SW_0

SW_1

FB

OUT3

OUT2

OUT1

OUT4

OUT5

OUT6

G N D_ S W

G N D_

S

G N D_

L

G N D_ S W

VSYNC

ISET

FILTER

FSET

SCLK

PWM

SDA

FAULT

EN

IN

IN

D

SG

D

SG

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

BI






36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1


Addr: 0x58(Wr)/0x59(Rd)

(EEPROM should set EN_I_RES=1)

I_LED=369/Riset

I_LED=22.7mA

see spec for others

measurement on LED strings.

10.2 ohm resistors for current

Fpwm=9.62kHz

402MF-LF1/16W

10K5%

R97551

2

1/16W

10K

5%

MF-LF402

R97411 2

PLACE_NEAR=D9701.2:5mm

1210-1

50VX5R

CRITICAL

10%10UFC97991

21210-1

10UF10%50V

CRITICAL

X5R

PLACE_NEAR=D9701.2:3mm

C97971

2

10%

X5R

NO STUFF

1UF

402

6.3V

C9741

1 2

CRITICAL

33UH-1.8A-110MOHM

1217AS-2SM

L9701

1 2

20%

10UF

6.3VX5R603

NO STUFFC9740

1 2

1/16WMF-LF402

5%

33R97041 2

674

L P 8 5 5 0

25-BUMP-MICRO

CRITICAL

U9701

A3

C3

A5

C2

B4

E 4

B 5

A 1

A 2

B3

E5

D5

C5

E3

E2

E1

A4

D3

D4

B1

B2

C 4

C 1

D 1

D2

26

818

SOT563

SSM6N15FEAPE

Q9707 3

54

147K

402

MF-LF

1/16W1%

R97891

2

SOT563

SSM6N15FEAPE

Q9707 6

21

BOTTOM

402

MF-LF

301K

1/16W1%

R9788

2

10%16V

0.1UF

402

X5R

C9782

2

3

SM


XW97201 2

1/16W5%

0

MF-LF402

R97571 2

CRITICAL

10UF

805X5R

10%25V


C9712 1

2


25V10%

402

0.1UF

X5R

C97131

2 10%50V

402

PLACE_NEAR=U9701.A5:3mm

X7R-CERM

220PFC97961

2


SOD-123

CRITICAL

RB160M-60G

D9701

1 2

0

1/16WMF-LF

5%

402

BKLT:PROD


BOTTOM

R97221 2

0

1/16WMF-LF

5%

402

BKLT:PROD


BOTTOM

R97211 2

402

5%

MF-LF1/16W

BKLT:PROD

0

BOTTOM


R97201 2

6 7

6 7

0

MF-LF

5%1/16W

402

R97531 2

6 7

6 7

6 7

6 7

0

5%

MF-LF402

1/16W

BKLT:PROD

PLACE_NEAR=U9701.D5:10mm

BOTTOM

R97181 2

BKLT:PROD

1/16WMF-LF402

5%

0PLACE_NEAR=U9701.C5:10mm

BOTTOM

R97191 2

0

1/16W5%

402MF-LF

BKLT:PROD


BOTTOM

R97171 2

100K

402

1%

MF-LF1/16W

R97152

1

301K

402MF-LF1/16W1%

R9731

1 2

603-1

10%1UF

25VX5R


C9710 1

2

16V

402X5R

0.1UF10%

PLACE_NEAR=U9701.C4:4mm

C9711 1

2

SM

PLACEMENT_NOTE=Keep away from noise nodes(E4, A1, A2, B1, B2 pins)

XW9710

1 2

10%

402CERM16V

0.01UF


C97141

2

818

CERM

5%

402

50V

33PFC97041

2

MF-LF1/16W1%16.2K

402

R97141

2

162327293142486281

162327293142486281

MF-LF402

1/16W1%

NO STUFF

47.0KR97401 2

90.9K1%

1/16WMF-LF402

R97161

2

1/16WMF-LF

5%0

402

NO STUFF

R97541

2

BKLT:ENGRES,THIN FLIM,1/16W,10.2 OHM,0.1,0402,SM3 R9720,R9721,R9722103S0198

BKLT:ENG3 R9717,R9718,R9719RES,THIN FLIM,1/16W,10.2 OHM,0.1,0402,SM103S0198SYNC_DSYNC_MASTER=VEMURI_K90I

LCD Backlight Dri

BKL_FSETSMBUS_PCH_CLK

LCD_BKLT_PWM

SMBUS_PCH_DATA

BKL_VSYNC

LCDBKLT_EN_L

BKLT_PLT_RST_L

LCD_BKLT_EN


MIN_LINE_WIDTH=0.5 mmLED_RETURN_5


LED_RETURN_4MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mm

LED_RETURN_1


LED_RETURN_2



LED_RETURN_3MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mm


LED_RETURN_6

BKL_FLTR_R

BKL_SCL

VOLTAGE=50VMIN_NECK_WIDTH=0

PPVOUT_SW_LCMIN_LINE_WIDTH=0

PP5V_S0

PPBUS_SW_LCDBKLT_PWR_SW


VOLTAGE=50V


PP3V3_S0

BKL_EN

BKL_PWM

BKL_VSYNC_R

LCDBKLT_EN_DIV

TP_BKL_FAULTPLACE_SIDE=BOTTOM

BKL_ISET

GND_BKL_SGNDMIN_LINE_WIDTH=0.4 MM

VOLTAGE=0VMIN_NECK_WIDTH=0.2 MM



BKL_ISEN2


BKL_ISEN3


BKL_ISEN4


BKL_ISEN5BKL_ISEN6


BKL_ISEN1


PPVOUT_SW_LCDBKLT_FBVOLTAGE=50V


PPBUS_SW_BKL

BKL_SDA

BKL_FLTR

LCDBKLT_DISABLE

9

877

6722424752546568707273

678121617181920222326272933363740414246

48495051525457616271

7273747585

8

2 1345678

D TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE SPACING RULE ITEM



LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHT

TABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM



MINIMUM LINE WIDTHALLOW ROUTEON LAYER?LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD



SPACINGPHYSICAL

NET_TYPE

ELECTRICAL_CONSTRAINT_SET

CPU Net PropertiesCPU Signal Constraints

NOTE: 7 mil gap is for VCCSense pair, which Intel says to route with 7 mil spacing without specifying a target impedance.

=STANDARD =STANDARD=55_OHM_SE=55_OHM_SECPU_55S * =55_OHM_SE =55_OHM_SE

=50_OHM_SE =50_OHM_SE* =STANDARDCPU_50S =STANDARD=50_OHM_SE =50_OHM_SE

=27P4_OHM_SE 7 MIL=27P4_OHM_SE 7 MIL=27P4_OHM_SE*CPU_27P4S =27P4_OHM_SE

?* 20 MILCPU_COMP

CPU_AGTL ?* =STANDARD CPU_AGTL ?=2x_DIELECTRICTOP,BOTTOM

?CPU_8MIL * 8 MIL

PCIECPU_PECI CPU_PECICPU_50S

CPU_50S CPU_AGTL FDI_LSYNC<1..0>

CPU_50S CPU_AGTL FDI_FSYNC<1..0>

PCIE_85DFDI_DATA PCIE FDI_DATA_P<7:0>

DMI_S2N PCIE_85D PCIE DMI_S2N_N<3:0>

DMI_S2N_P<3:0>PCIEPCIE_85DDMI_S2N

DMI_N2S PCIE_85D PCIE DMI_N2S_N<3:0>

DMI_N2S PCIEPCIE_85D DMI_N2S_P<3:0>

PCIE_85DFDI_DATA PCIE FDI_DATA_N<7:0>

CPU_AGTLCPU_50S FDI_INT

10 19 45

9 17

9 17

9 17

9 17

9 17

9 17

9 17

9 17

9 17








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1





TABLE_SPACING_RULE_ITEM TABLE_SPACING_RULE_ITEM








Most CPU signals with impedance requirements are 50-ohm single-ended.

(FSB_CPURST_L)

SOURCE: Huron River SFF DG (DG-438297_v1.0), Section 4.18 and Huron River Platform Power Delivery DG v1.0 Section 2.7

PCI-Express

SOURCE: Huron River SFF DG (DG-438297_v1.0), Section 4.18 and Huron River Platform Power Delivery DG v1.0 Section 2.7

Some signals require 27.4-ohm single-ended impedance.

CPU_VCCSA_VID<0>CPU_VCCSA_VID<1>

I115

I116

I117

I118

I119

I120

I121

I122

I123

I124

I125

I126

I127

I128

=85_OHM_DIFFPCIE_85D =85_OHM_DIFF* =85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFF

*CLK_PCIE ?20 MIL

=90_OHM_DIFF=90_OHM_DIFFCLK_PCIE_90D * =90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF =90_OHM_DIFF

TOP,BOTTOM =4X_DIELECTRIC ?PCIE*PCIE ?=3X_DIELECTRIC

?25 MIL*CPU_VCCSENSE

?CPU_ITP * =2:1_SPACING


CPU Constraints

CPU_VCCAXG_SENSE CPU_VCCSENSE_PC PU _2 7P 4S C PU _V CC SE NS E

CPU_VCCAXG_SENSE CPU_VCCSENSE_NC PU _2 7P 4S C PU _V CC SE NS E

CPU_VALSENSE CPU_27P4S CPU_VDDQ_SENSE_NCPU_VCCSENSE

ITPCPU_CLK100M CLK_PCIE_90D CLK_PCIE XDP_CPU_CLK100M_P

CLK_PCIECLK_PCIE_90DITPCPU_CLK100M ITPCPU_CLK100M_P

CPU_AGTLCPU_50S CPU_VCCIO_SEL

CPU_AGTL PM_EXT_TS_L<1>CPU_50S

CPU_ITP XDP_CPU_PRDY_LCPU_50S

PM_MEM_PWRGD CPU_AGTLCPU_50S PM_MEM_PWRGD

CPU_AGTLCPU_50SPM_SYNC PM_SYNC

CPU_ITPXDP_BPM_L CPU_50S XDP_BPM_L<3..0>

CPU_VCCSENSE CPU_27P4S CPU_VCCSENSE CPU_VCCIOSENSE_P

CPU_VCCSENSE CPU_27P4S CPU_VCCSENSE CPU_VCCIOSENSE_N

CPU_VCCAXG_SENSE CPU_VCCSENSECPU_27P4S CPU_AXG_SENSE_P

CPU_VCCAXG_SENSE CPU_AXG_SENSE_NCPU_VCCSENSECPU_27P4S

CPU_VALSENSE CPU_VDDQ_SENSE_PC PU _2 7P 4S C PU _V CC SE NS E

CPU_27P4SCPU_VALSENSE CPU_VCC_VALSENSE_NCPU_VCCSENSE

CPU_50S CPU_ITPXDP_TDO XDP_CPU_TDO

CPU_50SXDP_TCK CPU_ITP XDP_CPU_TCK

CPU_50S CPU_ITPXDP_TRST_L XDP_CPU_TRST_L

CLK_PCIECLK_PCIE_90DITPCPU_CLK100M ITPXDP_CLK100M_P

CPU_AGTLCPU_CATERR_L CPU_50S CPU_CATERR_L

CPU_AGTL PM_EXT_TS_L<0>CPU_50S

CPU_ITP XDP_CPU_PREQ_LCPU_50S

CLK_PCIECLK_PCIE_90DITPCPU_CLK100M ITPXDP_CLK100M_N

CLK_PCIEI TP CP U_C LK 10 0M C LK_ PCI E_ 90 D XDP_CPU_CLK100M_N

C PU _2 7P 4S C PU _CO MP CPU_PEG_COMP

ITPCPU_CLK100M_NCLK_PCIECLK_PCIE_90DITPCPU_CLK100M

CPU_ITP XDP_CPURST_LCPU_50S

XDP_BPM_R_L CPU_ITPCPU_50S CPU_CFG<15..12>

CPU_50S CPU_ITPXDP_TMS XDP_CPU_TMS

CPU_ITPCPU_50S XDP_CPU_TDIXDP_TDI

CLK_PCIE_90D CLK_PCIEDMI_CLK100M DMI_CLK100M_CPU_N

DMI_CLK100M CLK_PCIE_90D CLK_PCIE DMI_CLK100M_CPU_P

CPU_PROCHOT_L CPU_AGTLCPU_50S CPU_PROCHOT_L

CPU_AGTLCPU_PWRGD CPU_50S CPU_PWRGD

PM_THRMTRIP_L CPU_8MILCPU_50S PM_THRMTRIP_L

CPU_ITPCPU_50S CPU_CFG<11..0>

CPU_COMPCPU_SM_RCOMP CPU_27P4S CPU_SM_RCOMP<2>

C PU _2 7P 4S C PU _CO MPCPU_SM_RCOMP CPU_SM_RCOMP<1>

CPU_SM_RCOMP CPU_COMPCPU_27P4S CPU_SM_RCOMP<0>

PCIEPCIE_85D PEG_D2R_C_N<15..0>

PCIEPCIE_85D PEG_D2R_C_P<15..0>

PCIEPCIE_85D PEG_R2D_P<15..0>

PEG_R2D_N<15..0>PCIE_85D PCIE

PCIEPCIE_85D PEG_R2D_C_N<15..0>

PEG_D2R PCIEPCIE_85D PEG_D2R_P<15..0>

PCIE PEG_D2R_N<15..0>PCIE_85D

CPU_COMPCPU_27P4S EDP_COMP

CPU_COMPCPU_50SCPU_VIDSOUT

CPU_SVIDSOUT

CPU_VIDSCLKCPU_COMPCPU_50SCPU_SVIDSCLK

XDP_DBRESET_LCPU_ITPCPU_50S

PEG_R2D PCIEPCIE_85D PEG_R2D_C_P<15..0>

CPU_VIDALERT_LCPU_COMPCPU_50SCPU_SVIDALERT_L

CPU_VALSENSE CPU_27P4S CPU_VCCSENSE CPU_VCC_VALSENSE_P

CPU_VALSENSE CPU_27P4S CPU_VCCSENSE CPU_AXG_VALSENSE_N

CPU_VALSENSE CPU_AXG_VALSENSE_PC PU _2 7P 4S C PU _V CC SE NS E

1

12 68

12 68

12

23

10 16

12

10 23

10 17 30

10 17

10 23

12 70

12 70

12 68

12 68

12

9

10 23

10 23

10 23

16 23

10

10 23

16 23

23

9

10 16

23

9 23

10 23

10 23

10 16

10 16

10 46 68

10 19 23

10 19

9 23

10

10

10

8

8

8

9

12 68

12 68

10 23 26

8

12 68

9

9

9

2 1345678

D












SPACING

Memory Net Properties

E LE CT RI CA L_ CO NS TR AI NT _S ET P HY SI CA L

NET_TYPE

Memory Bus Constraints

ISL10 N =85_OHM_DIFF =85_OHM_DIFFMEM_85D =85_OHM_DIFF = 85 _O HM _D IF F = 85 _O HM _D IF F

ISL3,ISL4,ISL9 Y =50_OHM_SE =50_OHM_SE =STANDARD =STANDARD=50_OHM_SEMEM_50S

=85_OHM_DIFFY =85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFFMEM_85D =85_OHM_DIFFTOP,BOTTOM

=STANDARD=37_OHM_SE=37_OHM_SE =37_OHM_SE =37_OHM_SEMEM_37S =STANDARD*

=40_OHM_SE=40_OHM_SE=40_OHM_SE =40_OHM_SE =STANDARD* =STANDARDMEM_40S

ISL10 N =50_OHM_SE =50_OHM_SE =STANDARD =STANDARD=50_OHM_SEMEM_50S

ISL3,ISL4,ISL9 =85_OHM_DIFF =85_OHM_DIFFMEM_85D =85_OHM_DIFF = 85 _O HM _D IF F = 85 _O HM _D IF FY

=72_OHM_DIFF=72_OHM_DIFFMEM_72D =72_OHM_DIFF* =72_OHM_DIFF = 72 _O HM _D IF F = 72 _O HM _D IF F

MEM_50S TOP,BOTTOM Y =50_OHM_SE =50_OHM_SE =STANDARD=STANDARD=50_OHM_SE

MEM_50S MEM_A_DQ<7..0>MEM_A_DQ_BYTE0 MEM_DATA

MEM_40S MEM_CMD MEM_A_WE_LMEM_A_CMD

MEM_A_CMD MEM_40S MEM_A_CAS_LMEM_CMD

MEM_A_CMD MEM_CMDMEM_40S MEM_A_BA<2..0>

MEM_CTRLMEM_37S MEM_A_ODT<3..0>MEM_A_CNTL

MEM_CTRLMEM_37S MEM_A_CS_L<3..0>MEM_A_CNTL

MEM_CTRL MEM_A_CKE<3..0>MEM_37SMEM_A_CNTL

MEM_A_CLK MEM_72D MEM_CLK MEM_A_CLK_P<5..0>

MEM_CLK MEM_A_CLK_N<5..0>MEM_72DMEM_A_CLK

MEM_A_CMD MEM_40S MEM_CMD MEM_A_A<15..0>

MEM_40S MEM_CMDMEM_A_CMD MEM_A_RAS_L

11 28

11 27

11 27

11 27

11 27

11 27

11 27

11 27

11 27

11 27

11 27








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1











AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2

TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM









































Memory Bus Spacing Group Assignments

Need to support MEM_*-style wildcards!

Sandybridge SFF 2C when routed on Type-3 (Through hole) should follow rPGA guidelines

DQS intra-pair matching should be within 0.127mm, no inter-pair matching requirement.

DQS to clock matching should be within [CLK-63.5mm] and [CLK+38.1mm].

CLK intra-pair matching should be within 0.127mm, inter-pair matching should be within 0.0508mm.

A/BA/CMD signals should be matched within [CLK-12.7mm] to [CLK+12.7mm] of CLK pairs A/BA/CMD signals to each other should match within 5.08mm.

DQ/DQS/A/BA/cmd signal spacing is 4x dielectric, CLK is 5x dielectric.

Maximum length of any signal from die pad to SODIMM pad is 119.83mm, from procesor ball to SODIMM pad is 88.9mm.

SOURCE: Huron River Platform DG, Rev 1.01 (#436735), Section 2.5

per Huron River SFF DG rev1.0 (#438297).

CONTROL signals should be matched within [CLK-2.54mm] to [CLK+0.0mm] of CLK pairs.

DQ to DQS matching per byte lane should be within 0.127mm.

DDR3:

MEM_CLK2MEMMEM_DATAMEM_CLK *

MEM_CTRL * MEM_CTRL2CTRLMEM_CTRL

MEM_CTRL MEM_CMD2MEM*MEM_CMD

MEM_CMD2MEM*M EM _C MD M EM _C LK

MEM_CMD2CMDMEM_CMD *MEM_CMD

* MEM_CMD2MEMM EM _C MD M EM _D QS

MEM_DATA MEM_CMD2MEM*MEM_CMD

MEM_DATA2MEMMEM_CMD *MEM_DATA

MEM_DATA2MEMMEM_CTRL *MEM_DATA

* MEM_DATA2MEMM EM _D AT A M EM _C LK

MEM_DATA * MEM_DATA2DATAMEM_DATA

MEM_DQS *MEM_DATA MEM_DATA2MEM

* *MEM_CLK MEM_2OTHER

MEM_CTRL ** MEM_2OTHER

MEM_CTRL *MEM_CLK MEM_CLK2MEM

MEM_CLK * MEM_CLK2MEMMEM_CLK

MEM_CMD *MEM_CLK MEM_CLK2MEM

*MEM_CLK MEM_CLK2MEMMEM_DQS

* MEM_CTRL2MEMM EM _C TR L M EM _C MD

* MEM_CTRL2MEMMEM_CTRL MEM_DATA

MEM_CTRL2MEM*M EM _C TR L M EM _D QS

ME M_ DA TA 2M EM = 3: 1_ SP AC IN G ?*

MEM_CTRL2MEMMEM_CLK *MEM_CTRL

* MEM_DQS2MEMM EM _D QS M EM _C LK

MEM_DQS2MEM*M EM _D QS M EM _C TR L

* *MEM_CMD MEM_2OTHER

* * MEM_2OTHERMEM_DQS

** MEM_2OTHERMEM_DATA

* MEM_DQS2MEMM EM _D QS M EM _D QS

*MEM_DATAMEM_DQS MEM_DQS2MEM

*MEM_CMD MEM_DQS2MEMMEM_DQS

, , _ _ _ __ _ _

MEM_2OTHER * ?25 MILS

M EM _D QS 2M EM = 3: 1_ SP AC IN G* ?

=1.5:1_SPACINGMEM_DATA2DATA * ?

M EM _C MD 2M EM = 3: 1_ SP AC IN G ?*

M EM _C MD 2C MD = 1. 5: 1_ SP AC IN G ?*

=2.5:1_SPACINGMEM_CTRL2MEM ?*

=3:1_SPACINGMEM_CTRL2CTRL * ?

=4:1_SPACINGMEM_CLK2MEM ?*

Memory Constraints


MEM_A_DQS6 MEM_DQS MEM_A_DQS_P<6>MEM_85D

MEM_DQS MEM_A_DQS_N<5>MEM_A_DQS5 MEM_85D



MEM_B_CLK MEM_72D MEM_CLK MEM_B_CLK_P<5..0>

MEM_DQS MEM_B_DQS_P<1>MEM_B_DQS1 MEM_85D


MEM_85D MEM_DQS MEM_B_DQS_N<3>MEM_B_DQS3

MEM_DQS MEM_B_DQS_N<2>MEM_B_DQS2 MEM_85D

MEM_85D MEM_DQS MEM_B_DQS_P<2>MEM_B_DQS2




MEM_DATA MEM_B_DQ<55..48>MEM_B_DQ_BYTE6 MEM_50S


MEM_B_DQ<31..24>MEM_DATAMEM_B_DQ_BYTE3 MEM_50S




MEM_40S MEM_CMD MEM_B_WE_LMEM_B_CMD

MEM_DQS MEM_A_DQS_P<7>MEM_A_DQS7 MEM_85D







MEM_DQSMEM_A_DQS1 MEM_A_DQS_P<1>MEM_85D

MEM_50S MEM_A_DQ<47..40>MEM_A_DQ_BYTE5 MEM_DATA

MEM_DATAMEM_A_DQ_BYTE3 MEM_A_DQ<31..24>MEM_50S

MEM_B_DQS5 MEM_DQS MEM_B_DQS_N<5>MEM_85D


MEM_B_DQS5 MEM_DQS MEM_B_DQS_P<5>MEM_85D



MEM_B_DQS6 MEM_DQS MEM_B_DQS_N<6>MEM_85D


MEM_DATA MEM_A_DQ<23..16>MEM_A_DQ_BYTE2 MEM_50S

MEM_DATA MEM_A_DQ<63..56>MEM_A_DQ_BYTE7 MEM_50S

MEM_40S MEM_CMD MEM_B_RAS_LMEM_B_CMD

MEM_DQSMEM_B_DQS7 MEM_B_DQS_N<7>MEM_85D


MEM_40S MEM_B_A<15..0>MEM_CMDMEM_B_CMD

MEM_37S MEM_CTRLMEM_B_CNTL MEM_B_CS_L<3..0>

MEM_B_DQ<47..40>MEM_DATAMEM_B_DQ_BYTE5 MEM_50S

MEM_40S MEM_CMD MEM_B_CAS_LMEM_B_CMD

MEM_CMDMEM_40S MEM_B_BA<2..0>MEM_B_CMD

MEM_37S MEM_CTRLMEM_B_CNTL MEM_B_ODT<3..0>

MEM_B_CNTL MEM_37S MEM_CTRL MEM_B_CKE<3..0>

MEM_B_CLK MEM_72D MEM_B_CLK_N<5..0>MEM_CLK

__ _ Q_ _

MEM_A_DQ_BYTE4 MEM_DATA MEM_A_DQ<39..32>MEM_50S

MEM_A_DQ_BYTE6 MEM_A_DQ<55..48>MEM_DATAMEM_50S




MEM_A_DQS_P<0>MEM_DQSMEM_A_DQS0 MEM_85D

MEM_A_DQ<15..8>MEM_A_DQ_BYTE1 MEM_DATAMEM_50S

1

11 28

11 28

11 28

11 28

11 29

11 28

11 28

11 28

11 28

11 28

11 28

11 28 29

11 28 29

11 28

11 28 29

11 28

11 28

11 28

11 28

11 29

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 28

11 29

11 28

11 28

11 29

11 29

11 28

11 29

11 29

11 29

11 29

11 29

11 27 28

11 28

11 28

11 28

11 27 28

11 27 28

11 28

2 1345678

D













LVDS intra-pair matching should be 5 mils. Pairs should be within 100 mils of clock length.

Digital Video Signal Constraints

DIsplayPort AUX CH intra-pair matching should be 5 ps. No relationship to other signals.


NET_TYPE

Max length of LVDS/DisplayPort/TMDS traces: 12 inches.

PCH Net Properties

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Sections 2.5.3 & 2.5.4.

DisplayPort/TMDS intra-pair matching should be 5 ps. Inter-pair matching should be within 150 ps.

SPACINGPHYSICAL

I213

I214

=85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFF=85_OHM_DIFFDP_85D * =85_OHM_DIFF=85_OHM_DIFF

LVDS * ?=3x_DIELECTRIC

DISPLAYPORT ?=4x_DIELECTRICTOP,BOTTOM

TOP,BOTTOM =4x_DIELECTRICLVDS ?

=3x_DIELECTRIC ?*DISPLAYPORT

LVDS_90D =90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF*

LVDS_IG_A_CLK_PLVDSLVDS_90DLVDS_IG_A_CLK

DP_85DDP_ML DP_IG_ML_P<3..0>DISPLAYPORT

DP_85D DISPLAYPORTDP_ML DP_IG_ML_N<3..0>

DISPLAYPORTDP_85D DP_EXTA_AUXCH_C_NDP_EXTA_AUXCH

LVDS_90D LVDS NC_LVDS_IG_A_DATAP<3>

LVDSLVDS_90D LVDS_IG_A_DATA_P<2..0>LVDS_IG_A_DATA

DP_EXTA_AUXCH DP_EXTA_AUXCH_C_PDISPLAYPORTDP_85D

LVDSLVDS_90D LVDS_IG_A_CLK_NLVDS_IG_A_CLK

LVDSLVDS_IG_A_DATA LVDS_90D LVDS_IG_A_DATA_N<2..0>

LVDS_90D LVDS NC_LVDS_IG_A_DATAN<3>

LVDS_90D LVDS_IG_B_DATA_P<3..0>LVDS

LVDS_90D LVDS_IG_B_DATA_N<3..0>LVDS

18 74

8

8

8 17 75 81

8 18

6 18 74

8 17 75 81

18 74

6 18 74

8 18

8

8








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1





















SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Section 2.7.1.

SATA Interface Constraints

SOURCE: Calpella Platform Design Guide for Ibex Peak M (DG-398905-398905_v1.5), Section 3.8

USB 2.0 Interface Constraints

I215

I216

I217

I218

=85_OHM_DIFF =85_OHM_DIFF=85_OHM_DIFF*USB_85D =85_OHM_DIFF =85_OHM_DIFF=85_OHM_DIFF

USB ?TOP,BOTTOM =4x_DIELECTRIC

=3x_DIELECTRICSATA TOP,BOTTOM ?

?* 8 MILSATA_ICOMP

* ?=2x_DIELECTRICUSB

=STANDARDPCH_USB_RBIAS =STANDARD* 8 M IL = ST AND AR D8 MIL =STANDARD

*SATA ?=4x_DIELECTRIC

* =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF=90_OHM_DIFFSATA_90D =90_OHM_DIFF

PCH Constraints 1


USB_85D USB USB_SDCARD_N

PCIE_CLK100M_PCH_NP CH _D IF FC LK _U NU SE D_ C LK _P CI E_ 90 D C LK _P CI E

NC_FSB_CLK133M_PCH_PCLK_PCIE_90D CLK_PCIE

PCH_CLK100M_SATA_PPCH_DIFFCLK_UNUSED_ CLK_PCIECLK_PCIE_90D

PCH_CLK100M_SATA_NP CH _D IF FC LK _U NU SE D_ C LK _P CI E_ 90 D C LK _P CI E

CLK_PCIE PCH_CLK14P3M_REFCLKCPU_50S

LPC_CLK33M PCH_CLK33M_PCIINCLK_PCIECPU_50S

GFX_CLK_DPLLSS GFX_CLK120M_DPLLSS_PCLK_PCIECLK_PCIE_90D

GFX_CLK_DPLLSS GFX_CLK120M_DPLLSS_NCLK_PCIECLK_PCIE_90D

PCH_DIFFCLK_UNUSED_ PCH_CLK96M_DOT_PCLK_PCIE_90D CLK_PCIE

PCH_SATAICOMPSATA_ICOMPPCH_SATA_ICOMP

USB_HUB1_UP USB_HUB1_UP_PUSBUSB_85D

USB_HUB1_UP_NUSB_85D USB

USB_85D USB_IR_PUSB_IR USB

USB_SDCARD_PUSB_85D USBUSB_SDCARD

PCH_CLK96M_DOT_NPCH_DIFFCLK_UNUSED_ CLK_PCIECLK_PCIE_90D

LVDS_90D LVDS TP_LVDS_IG_B_CLKP

LVDS_90D LVDS TP_LVDS_IG_B_CLKN

USB_IR_NUSB_85D USB

USB_EXTA_NUSB_85DUSB_EXTA USB

NC_FSB_CLK133M_PCH_NCLK_PCIE_90D CLK_PCIE

USB_85D USB_TPAD_NUSB

USB_EXTA USB_85D USB USB_EXTA_P

USB_HUB2_UP_PUSB_HUB2_UP USBUSB_85D

PCH_DIFFCLK_UNUSED_ PCIE_CLK100M_PCH_PCLK_PCIECLK_PCIE_90D

PCH_USB_RBIASP CH _U SB_ RBI AS P CH_ US B_ RBI AS

USB_85D USB_BRCRYPT_NUSB

USBUSB_BRCRYPT USB_85D USB_BRCRYPT_P

USB USB_TPAD_PUSB_85DUSB_TPAD

USB_BT_NUSBUSB_BT USB_85D

USB_BT_PUSB_BT USB_85D USB

USB_CAMERA_CONN_NUSB_85D USB

USB_CAMERA_CONN_PUSB_CAMERA USB_85D USB

USBUSB_85D T29_A_RSVD_N

USB USB_CAMERA_NUSB_85D

USB USB_CAMERA_PUSB_CAMERA USB_85D

T29_A_RSVD_PUSB_85D USB

USB_85D USB USB_EXTB_N

USB_85DUSB_EXTB USB USB_EXTB_P

USB_HUB2_UP_NUSBUSB_85D

USB_85D USB_EXTC_NUSB

USB_85D USB USB_EXTC_PUSB_EXTC

USB_T29A_NUSBUSB_85D

USB_EXTD USB_T29A_PUSBUSB_85D

SATA_HDD_R2D SATASATA_90D SATA_HDD_R2D_C_P

SATA_HDD_R2D SATASATA_90D SATA_HDD_R2D_C_N

SATASATA_90D SATA_HDD_R2D_PSATA_HDD_R2D_CONN

SATA_HDD_R2D_CONN SATASATA_90D SATA_HDD_R2D_N

SATA_HDD_D2R SATASATA_90D SATA_HDD_D2R_P

SATA_HDD_D2R SATASATA_90D SATA_HDD_D2R_N

SATA_HDD_D2R_CONN SATASATA_90D SATA_HDD_D2R_C_P

SATASATA_90D SATA_HDD_D2R_C_NSATA_HDD_D2R_CONN

SATA_ODD_R2D SATA_90D SATA SATA_ODD_R2D_C_P

SATASATA_90D SATA_ODD_R2D_C_NSATA_ODD_R2D

SATA_HDD_D2R_RC_NSATA_90D SATASATA_HDD_D2R_CONN

SATASATA_90D SATA_HDD_D2R_RC_PSATA_HDD_D2R_CONN

SATASATA_90D SATA_ODD_D2R_NSATA_ODD_D2R

SATASATA_90D SATA_HDD_R2D_RC_NSATA_HDD_R2D_CONN

SATASATA_90DSATA_HDD_R2D_CONN SATA_HDD_R2D_RC_P

SATA_ODD_D2R SATASATA_90D SATA_ODD_D2R_P

SATASATA_90D SATA_ODD_R2D_NSATA_ODD_R2D

SATASATA_90D SATA_ODD_R2D_PSATA_ODD_R2D

1

16 25

8

16 25

16 25

16 25

16 26

16 25

16

18 24

18 24

24 44

16 25

6 8 18

6 8 18

24 44

24 43

8

24 53

24 43

18 24

16 25

18

24 53

6 24 32

6 24 32

6 32

6 32

8 75

18 32

18 32

8 75

24 43

24 43

18 24

8 24

8 24

8 24

8 24

16 42

16 42

6 42

6 42

16 42

16 42

6 42

6 42

16 42

16 42

42

42

16 42

42

42

16 42

6 42

6 42

2 1345678

D












SPACING

Chipset Net Properties

SPACINGPHYSICAL

PCH Net Properties

PHYSICAL

NET_TYPE


NET_TYPE

SMBus Interface Constraints

LPC Bus Constraints



I251

I252

I253

I254

I255

I256

I257

I258

?6 MILLPC *

?* 8 MILCLK_LPC

=STANDARD=50_OHM_SE =STANDARD*LPC_50S =50_OHM_SE =50_OHM_SE =50_OHM_SE

=STANDARD=50_OHM_SE =STANDARD*CLK_LPC_50S =50_OHM_SE = 50_OHM_SE =50_OHM_SE

CLK_LPC LPC_CLK33M_SMC_RCLK_LPC_50SLPC_CLK33M

CLK_LPC LPC_CLK33M_SMCCLK_LPC_50SLPC_CLK33M

CLK_LPC LPC_CLK33M_LPCPLUSCLK_LPC_50SLPC_CLK33M

SMBSMBUS_PCH_CLK SMBUS_PCH_CLKSMB_50S

DP_85D DP_EXTA_AUXCH_C_NDISPLAYPORTDP_EXTA_AUXCH

DP_EXTA_AUXCH_C_PDISPLAYPORTDP_85DDP_EXTA_AUXCH

DP_85D DISPLAYPORT DP_EXTA_ML_C_P<3..0>DP_EXTA_ML

DP_85DDP_EXTA_ML DISPLAYPORT DP_EXTA_ML_C_N<3..0>

DP_85D DISPLAYPORT DP_EXTA_ML_P<3..0>

DP_85D DISPLAYPORT DP_EXTA_AUXCH_N

DP_EXTA_ML_N<3..0>DISPLAYPORTDP_85D

DP_85D DISPLAYPORT DP_EXTA_AUXCH_P

LPC_AD<3..0>LPCLPC_AD LPC_50S

LPC_FRAME_LLPCLPC_50SLPC_FRAME_L

LPC_RESET_L LPCPLUS_RESET_LLPCLPC_50S

SMBSMB_50S SMBUS_PCH_DATASMBUS_PCH_DATA

SMBSMB_50S SML_PCH_1_CLKSMBUS_PCH_1_CLK

SMBSMB_50S SML_PCH_1_DATASMBUS_PCH_1_DATA

SML_PCH_0_DATASMB_50S SMBSMBUS_PCH_0_DATA

SML_PCH_0_CLKSMBSMBUS_PCH_0_CLK SMB_50S

18 26

26 45

6 26 47

16 23 27 29 31 42 48 62 77

6 16 45 47

6 16 45 47

6 26 47

16 23 27 29 31 42 48 62 77

16 48

16 48

16 48

16 48








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1




MINIMUM LINE WIDTHALLOW ROUTEON LAYER?

LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET















































Clock Net Properties

NOTE: 25MHz system clocks very sensitive to noise.

PHYSICAL

NET_TYPE

SPACING

System Clock Signal Constraints

PCI-Express Signal Constraints

DisplayPort Signal Constraints

SIO Signal Constraints


SPI Interface Constraints

HD Audio Interface Constraints


I235

I236

I237

I238

I239

I240

I241

I242

I243

I244

I245

I246

I247

I248

I249

I250

I267

I268

I269

I270

I271

I272

I273

I274

I275

I276

I277

I278

I279

I280

I281

I282

I283

I284

I285

I286

I287

=50_OHM_SE =STANDARD =STANDARDHDA_50S =50_OHM_SE=50_OHM_SE=50_OHM_SE*

=50_OHM_SE =50_OHM_SE=50_OHM_SE =STANDARD* =STANDARD=50_OHM_SESMB_50S

=2x_DIELECTRICSMB ?*

*HDA =2x_DIELECTRIC ?

?CLK_SLOW * 8 MIL

=STANDARDCLK_SLOW_55S =55_OHM_SE* =STANDARD=55_OHM_SE=55_OHM_SE =55_OHM_SE

=55_OHM_SE =55_OHM_SE =55_OHM_SESPI_55S =55_OHM_SE =STANDARD=STANDARD*

*SPI ?8 MIL

TOP,BOTTOM =4x_DIELECTRIC ?DISPLAYPORT

=85_OHM_DIFF=85_OHM_DIFF =85_OHM_DIFF* =85_OHM_DIFF=85_OHM_DIFF =85_OHM_DIFFDP_85D

=85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF = 85 _O HM _D IF F = 85 _O HM _D IF F* =85_OHM_DIFFPCIE_85D

?* =3x_DIELECTRICDISPLAYPORT

=90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF*CLK_PCIE_90D =90_OHM_DIFF =90_OHM_DIFF

CLK_25M_55S * =55_OHM_SE=55_OHM_SE =55_OHM_SE =STANDARD =STANDARD=55_OHM_SE

PCIE ?* =3X_DIELECTRIC

*CLK_PCIE 20 MIL ?

CLK_SLOW_55S =STANDARD=STANDARD=55_OHM_SE =55_OHM_SE=55_OHM_SE =55_OHM_SE*

=2x_DIELECTRICCLK_SLOW ?*

=5x_DIELECTRICCLK_25M * ?

PCIE ?=4X_DIELECTRICTOP,BOTTOM

PCH Constraints 2


PCH_VSS_NCTF<2>C PU _2 7P 4S C PU _C OM P

PCH_VSS_NCTF<1>CPU_COMPCPU_27P4S

CPU_COMPCPU_27P4S PCH_VSS_NCTF<5>

PCIE_AP_R2D_C_PPCIEPCIE_85DPCIE_AP_R2D

HDA_SDOUT_RHDAHDA_50S

HDA HDA_SYNCHDA_50SHDA_SYNC

PCIE_CLK100M_T29 CLK_PCIECLK_PCIE_90D PCIE_CLK100M_T29_P

SYSCLK_CLK32K_RTC SYSCLK_CLK32K_RTCCLK_SLOW_55S CLK_SLOW

SYSCLK_CLK25M_SBCLK_25MS YS CL K_ CL K2 5M _S B C LK _2 5M _5 5S

SYSCLK_CLK25M_ENETC LK _2 5M _5 5S C LK _2 5M


DP_INT_ML_C_N<3..0>DP_INT_ML DISPLAYPORTDP_85D

PCIE_85D PCIEPCIE_T29_D2R PCIE_T29_D2R_N<3..0>

PCIE_CLK100M_T29 CLK_PCIECLK_PCIE_90D PCIE_CLK100M_T29_N

PCIE_85D PCIEPCIE_T29_D2R PCIE_T29_D2R_P<3..0>

PCIEPCIE_85D PCIE_T29_R2D_P<3..0>

PCIEPCIE_85D PCIE_T29_R2D_N<3..0>

PCIE_85D PCIEPCIE_T29_R2D PCIE_T29_R2D_C_N<3..

DP_INT_AUXCH_C_NDP_INT_AUXCH DP_85D DISPLAYPORT

HDA_BIT_CLKHDAHDA_50SHDA_BIT_CLK

HDA HDA_BIT_CLK_RHDA_50S

HDA_SYNC_RHDAHDA_50S

HDA_RST_L HDA HDA_RST_R_LHDA_50S

HDA_RST_LHDAHDA_50S

HDA_SDIN0HDAHDA_50SHDA_SDIN0

HDA_SDOUTHDAHDA_50SHDA_SDOUT

AUD_SDI_RHDAHDA_50S

PM_CLK32K_SUSCLKCLK_SLOW_55S CLK_SLOWPM_SUS_CLK

SPISPI_CLK SPI_55S SPI_CLK_R

SPISPI_55S SPI_CLK

SPI SPI_MOSI_RSPI_55SSPI_MOSI

SPI SPI_MOSISPI_55S

PCIEPCIE_85D PCIE_AP_D2R_N

PCIE_FW_R2D_PPCIEPCIE_85D

PCIEPCIE_85D PCIE_FW_R2D_N

PCIE_FW_R2D_C_NPCIE_85D PCIE

PCIE_FW_D2R_PPCIE_85D PCIEPCIE_FW_D2R

PCIE_FW_D2R_NPCIE_85D PCIE

PCIE_FW_D2R_C_PPCIE_85D PCIE

CLK_PCIE_90D NC_PEG_CLK100MPCLK_PCIE

CLK_PCIE PCIE_CLK100M_AP_PCLK_PCIE_90DMCP_PE1_REFCLK

PCIE_CLK100M_ENET_NCLK_PCIE_90D CLK_PCIE

CLK_PCIE PCIE_CLK100M_AP_NCLK_PCIE_90D

CLK_PCIE PCIE_CLK100M_FW_NCLK_PCIE_90D

CLK_PCIE PCIE_CLK100M_FW_PCLK_PCIE_90DMCP_PE2_REFCLK

NC_PCIE_CLK100M_EXCARDPCLK_PCIECLK_PCIE_90D


CPU_COMPCPU_27P4S TP_PCH_VSS_NCTF<7>


CPU_27P4S PCH_VSS_NCTF<17>CPU_COMP





CPU_COMP PCH_VSS_NCTF<29>CPU_27P4S



CLK_PCIE_90D CLK_PCIE PCIE_CLK100M_ENET_PPCIE_CLK100M_ENET

PCIE_85D PCIEPCIE_T29_R2D PCIE_T29_R2D_C_P<3..

DP_INT_AUXCH_C_PDP_INT_AUXCH DP_85D DISPLAYPORT

DP_INT_ML_C_P<3..0>DP_INT_ML DISPLAYPORTDP_85D

SPI_MISOSPISPI_55SSPI_MISO

PCIEPCIE_85D PCIE_T29_D2R_C_P<3..

CLK_25M_55S SYSCLK_CLK25M_SB_RCLK_25M

PCIE_ENET_D2R_PPCIE_85D PCIEPCIE_ENET_D2R

CLK_25MCLK_25M_55S SYSCLK_CLK25M_ENET_R

CLK_25MCLK_25M_55SSYSCLK_CLK25M_T29 SYSCLK_CLK25M_T29

CLK_25MCLK_25M_55S SYSCLK_CLK25M_T29_R

PCIEPCIE_85D PCIE_T29_D2R_C_N<3..

SPI_CS0_R_LSPI_55S SPISPI_CS0

SPI_CS0_LSPI_55S SPI

PCIE_ENET_R2D_PPCIEPCIE_85D

PCIE_85D PCIE PCIE_AP_R2D_PI_N

PCIE_85D PCIE PCIE_AP_R2D_PI_PPCIE_AP_R2D

PCIEPCIE_85D PCIE_AP_D2R_PI_N

PCIE_AP_D2R PCIEPCIE_85D PCIE_AP_D2R_PI_P

PCIE_FW_D2R_C_NPCIEPCIE_85D

PCIE_FW_R2D_C_PPCIE_85D PCIEPCIE_FW_R2D

PCIEPCIE_85D PCIE_AP_R2D_C_N

PCIE_AP_R2D_NPCIE_85D PCIE

PCIE_AP_R2D_PPCIE_85D PCIE

PCIE_ENET_D2R_C_NPCIE_85D PCIE

PCIE_ENET_D2R_C_PPCIE_85D PCIE

PCIE_ENET_D2R_NPCIE_85D PCIE

PCIE_ENET_R2D_C_NPCIE_85D PCIE

PCIE_ENET_R2D_C_PPCIE_ENET_R2D PCIE_85D PCIE

PCIE_ENET_R2D_NPCIE_85D PCIE

PCIE_AP_D2R_PPCIE_85D PCIEPCIE_AP_D2R

CLK_PCIE_90D CLK_PCIE NC_PEG_CLK100MN

CLK_PCIECLK_PCIE_90D NC_PCIE_CLK100M_EXCARDN


1

6

6

6

16 32

16

16 57

6

16 57

16

16

16

16 57

16 57

16 57

57

16 47

47

16 47

47

16 32

39

39

16 39

16 39

16 39

39

8 16

16 32

16 37

16 32

16 39

16 39

8 16

6 81

6 81

6

6

6

6

6

6

6

16 37

16 47

16 37

16 47

47

37

32

32

6 32

6 32

39

16 39

16 32

6 32

6 32

37

37

16 37

16 37

16 37

37

16 32

8 16

8 16

6

ALLOW ROUTETABLE_PHYSICAL_RULE_HEAD










2 1345678

D

NET_TYPE

ELECTRICAL_CONSTRAINT_SET SPACING

SOURCE: Broadcom 5764-DS04-RDS Page 38

CAESAR IV (Ethernet PHY) Constraints

CAESAR IV (Ethernet) Constraints

PHYSICAL

Ethernet Net Properties

I166

I167

I168

I169

I170

I171

I172

=50_OHM_SEENET_50S =50_OHM_SE =50_OHM_SE =50_OHM_SE =STANDARD =STANDARD*

* ?ENET_CR_DATA 8MIL

ENET_3X ?* =3:1_SPACING

SDCONN_CLK_LCR_CLK ENET_50S ENET_CR_DATA

ENET_3X BCM5764_CLK25M_XTALIENET_50S

ENET_MDIENET_100DENET_MDI ENET_MDI_P<3..0>

ENET_CR_DATA ENET_CR_CLKCR_CLK ENET_50S

CR_DATA SDCONN_CMDE NE T_ 50S EN ET _C R_D ATA

CR_CLK ENET_50S ENET_CR_DATA SDCONN_CLK

ENET_50S ENET_RESET_LENET_3X

ENET_CR_DATA<7..0>CR_DATA ENET_50S ENET_CR_DATA

ENET_CR_CMDCR_DATA ENET_50S ENET_CR_DATA

ENET_3XENET_50S BCM5764_CLK25M_XTALO

E NE T_ 10 0D E NE T_M DI ENET_MDI_N<3..0>

SDCONN_DATA<7..0>ENET_50SCR_DATA ENET_CR_DATA

33

37 38

33 37

33

33

33 37

33 37

33 37

37 38

33



















36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

FireWire Interface Constraints

SOURCE: Broadcom 5764-DS04-RDS Page 38

SPACING

NET_TYPE

PHYSICAL

Port 2 Not Used


FireWire Net Properties

I158

I159

I160

I161

I162

I163

I164

I165


Ethernet/FW Constrai

FW_TP * =3:1_SPACING ?

ENET_100D =100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF* =100_OHM_DIFF

ENET_MDI 0.6 MM* ?

FW_110D =110_OHM_DIFF=110_OHM_DIFF =110_OHM_DIFF=110_OHM_DIFF=110_OHM_DIFF* =110_OHM_DIFFNC_FW0_TPAPFW_110D FW_TPFW_P0_TPA

FW_P0_TPA NC_FW0_TPANFW_TPFW_110D

NC_FW0_TPBPFW_TPFW_110DFW_P0_TPB

FW_P1_TPA FW_TPFW_110D FW_PORT1_TPA_P

FW_P1_TPA FW_TPFW_110D FW_PORT1_TPA_N

FW_P1_TPB FW_TPFW_110D FW_PORT1_TPB_P

FW_P1_TPB FW_TPFW_110D FW_PORT1_TPB_N

NC_FW0_TPBNFW_TPFW_110DFW_P0_TPB

1

6 39 41

39 41

6 39 41

39 41

39 41

39 41

39 41

6 39 41

2 1345678

D










NOTE: DisplayPort Physical/Spacing Constraints provided by Chipset or GPU page.DisplayPort Signal Constraints

T29 I2C Signal Constraints

T29 SPI Signal Constraints


NET_TYPE

PHYSICAL

T29/DP Net Properties

SPACING

I1

I10

I11

I12

I13

I2

I3

I4

I5

I6

I7

I8

I9

T29_I2C_55S * =STANDARD=55_OHM_SE =55_OHM_SE =55_OHM_SE=55_OHM_SE =STANDARD

T29_I2C * ?=2x_DIELECTRIC

T29_SPI_55S =55_OHM_SE =55_OHM_SE=55_OHM_SE* =STANDARD =STANDARD=55_OHM_SE

T29DP_100D T29DP T29DPA_D2R1_AUXCH_NT29DP_100D T29DP T29DPA_D2R1_AUXCH_PT29DP_100D T29DPT29_D2R1 T29_D2R_C_N<1>T29DP_100D T29DPT29_D2R1 T29_D2R_C_P<1>T29DP_100D T29_D2R_C_N<0>T29_D2R0 T29DP

T29DP_100D T29_D2R_C_P<0>T29_D2R0 T29DP

DP_SDRVA_ML_C_P<3..0>T29DP_80D T29DP

T29DPT29DP_80D T29_R2D_C_F_N<1..0>T29DPT29DP_80D T29_R2D_C_F_P<1..0>

T29_R2D1 T29DPT29DP_80D T29_R2D_P<1>

T29_R2D1 T29DPT29DP_80D T29_R2D_N<1>

T29_R2D0 T29DPT29DP_80D T29_R2D_N<0>T29_R2D0 T29DPT29DP_80D T29_R2D_P<0>

76

76

75 76

75 76

75 76

75 76

75

75

75

75

75

75

75








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1















NET_TYPE

PHYSICAL SPACING

T29 IC Net Properties

SOURCE: Bill Cornelius’s T29 Routing Notes

T29/DP Connector Signal Constraints

Only used on hosts supporting T29 video-in

Only used on dual-port hosts.

I14

I15

I16

I17

I18

I19

I20

I21

I22

I23

I24

I25

I26

I27

I28

I29

I30

I31

I32

I33

I34

I35

I36

I37

I38

I39

I40

I41

I42

I43

I44

I45

I46

I47

I48

I49

I50

I51

I52

I53

I54

I55

I56

I57

I58

I59

I60

I61

I62

I63

I64

I65

I66

I67

I68

I69

I70

I71

I72

I73

I74

I75

I76

I77

I78

I79

I80

I81

I82

I83

I84

I85

I86

I87

I88

I89

I90

T29_SPI =2x_DIELECTRIC* ?

T29DP ?=7x_DIELECTRICTOP,BOTTOMT29DP ?* =5x_DIELECTRIC

T29DP_80D * =80_OHM_DIFF =80_OHM_DIFF =80_OHM_DIFF =80_OHM_DIFF =80_OHM_DIFF=80_OHM_DIFF

=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFFT29DP_100D *

SYNC_MASTER=Master

T29 Constraints

S

T29DP_80DDP_SDRVA_ML_ODD T29DP DP_SDRVA_ML_N<3..1:2>T29DP DP_SDRVA_ML_P<3..1:2>T29DP_80DDP_SDRVA_ML_ODD

DP_SDRVA_ML_EVEN T29DP DP_SDRVA_ML_N<2..0:2>T29DP_80D

T29DPT29DP_80D DP_SDRVA_ML_P<2..0:2>DP_SDRVA_ML_EVEN

DP_SDRVA_ML_C_N<3..0>T29DP_80D T29DP

DP_SDRVA_ML_R_P<3..0>T29DP_80D T29DP

T29DP_80D T29DP DP_SDRVA_ML_R_N<3..0>

T29DP_100D T29DPB_D2R3_AUXCH_NT29DP

T29DP_100D T29DPB_D2R3_AUXCH_PT29DP

T29DP_100D T29_D2R_C_N<3>T29_D2R3 T29DP

T29DP_100DT29_D2R3 T29DP T29_D2R_C_P<3>T29DP_100DT29_D2R2 T29DP T29_D2R_C_N<2>T29DP_100D T29_D2R_C_P<2>T29_D2R2 T29DP

T29DPT29DP_80D T29DPA_ML_C_P<3..0>T29DPT29DP_80D T29DPA_ML_C_N<3..0>

T29DP_80D T29DP DP_A_EXT_AUXCH_N

DP_SDRVA_AUXCH DP_SDRVA_AUXCH_PT29DPT29DP_80D

T29_R2D_N<3>T29DP_80D T29DPT29_R2D3

T29DP_80D T29DP T29DPB_ML_C_N<3..0>T29DP_80D T29DP T29DPB_ML_C_P<3..0>

DP_B_EXT_AUXCH_NT29DPT29DP_80D

DP_B_EXT_AUXCH_PT29DPT29DP_80D

T29DPA_ML_P<3..0>T29DP_80D T29DP

T29DP_80D T29DP T29DPA_ML_N<3..0>

T29DPB_ML_N<3..0>T29DP_80D T29DP

T29DPB_ML_P<3..0>T29DP_80D T29DP

T29DP_80D T29DP DP_SDRVB_AUXCH_C_N

T29DP_80D T29DPDP_SDRVB_AUXCH DP_SDRVB_AUXCH_N

T29DP_80D T29DP DP_SDRVB_AUXCH_C_P

T29DP_80D T29DPDP_SDRVB_AUXCH DP_SDRVB_AUXCH_P

DP_SDRVB_ML_N<3..1:2>T29DP_80D T29DPDP_SDRVB_ML_ODD

DP_SDRVB_ML_P<3..1:2>T29DP_80D T29DPDP_SDRVB_ML_ODD

DP_SDRVB_ML_P<2..0:2>T29DP_80D T29DPDP_SDRVB_ML_EVEN

DP_SDRVB_ML_N<2..0:2>T29DP_80D T29DPDP_SDRVB_ML_EVEN

T29DPT29DP_80D DP_SDRVB_ML_R_N<3..0>

DP_SDRVB_ML_C_N<3..0>T29DPT29DP_80D

T29DPT29DP_80D DP_SDRVB_ML_R_P<3..0>

DP_SDRVB_ML_C_P<3..0>T29DPT29DP_80D

T29_R2D_C_F_P<3..2>T29DP_80D T29DP

T29_R2D_C_F_N<3..2>T29DP_80D T29DP

T29_R2D_N<2>T29DP_80D T29DPT29_R2D2

T29DP_80D T29DPT29_R2D3 T29_R2D_P<3>

T29_R2D_P<2>T29DP_80D T29DPT29_R2D2

T29DP_80D T29DP DP_A_EXT_AUXCH_P

DP_SDRVA_AUXCH_C_PT29DPT29DP_80D

DP_SDRVA_AUXCH DP_SDRVA_AUXCH_NT29DPT29DP_80D

T29DP_80D DP_SDRVA_AUXCH_C_NT29DP

T29DP_100D T29DP T29_D2R_N<3..0>T29DP_100D T29DP T29_D2R_P<3..0>

DP_T29SRC_ML_C_P<3..0>DP_85D DISPLAYPORT

T29_SPI_CLKT29_SPI_CLK T29_SPI_55S T29_SPI

T29_SPI_MISO T29_SPI_MISOT29_SPI_55S T29_SPI

T29_R2D_C_P<3..0>T29DP_80D T29DP

I2C_T29_SDAT29_I2CT29_I2C_55S

I2C_T29_SCLT29_I2CT29_I2C_55S

DP_T29SRC_AUXCH_C_NDISPLAYPORTDP_85D

DP_T29SRC_ML_C_N<3..0>DISPLAYPORTDP_85D

DP_85D DISPLAYPORTDP_T29SNK1_AUXCH DP_T29SNK1_AUXCH_P

DISPLAYPORTDP_85D DP_T29SNK1_AUXCH_C_PDISPLAYPORTDP_85DDP_T29SNK1_ML DP_T29SNK1_ML_N<3..0>

DP_T29SNK1_ML_P<3..0>DISPLAYPORTDP_85DDP_T29SNK1_ML

DP_T29SNK1_ML_C_N<3..0>DISPLAYPORTDP_85D

DP_T29SNK1_ML_C_P<3..0>DISPLAYPORTDP_85D

DP_T29SNK0_AUXCH_NDISPLAYPORTDP_85DDP_T29SNK0_AUXCH

DISPLAYPORTDP_85DDP_T29SNK0_AUXCH DP_T29SNK0_AUXCH_PDISPLAYPORTDP_85D DP_T29SNK0_AUXCH_C_NDISPLAYPORTDP_85D DP_T29SNK0_AUXCH_C_PDISPLAYPORTDP_85DDP_T29SNK0_ML DP_T29SNK0_ML_N<3..0>DISPLAYPORTDP_85DDP_T29SNK0_ML DP_T29SNK0_ML_P<3..0>

DISPLAYPORTDP_85D DP_T29SNK0_ML_C_P<3..0>

DISPLAYPORTDP_85D DP_T29SNK0_ML_C_N<3..0>

T29_SPI_MOSIT29_SPI_55S T29_SPIT29_SPI_MOSI

T29_R2D_C_N<3..0>T29DP_80D T29DP

T29_SPI_CS_L T29_SPI_CS_LT29_SPI_55S T29_SPI

DP_T29SRC_AUXCH_C_PDISPLAYPORTDP_85D

DP_T29SNK1_AUXCH DISPLAYPORTDP_85D DP_T29SNK1_AUXCH_N

DISPLAYPORTDP_85D DP_T29SNK1_AUXCH_C_N

1

75

75

75 83

75 83

75

75

75

75 76

75 76

75 76

75

75 76

75 76

83

83

75 76

75

75

75

8 34 75

8 34 75

34

34

8 34 75

34 48 75

34 48 75

34

8 17 34

34

34

8 34

8 34

34

34

8 17 34

8 17 34

34

34

8 34

8 34

34

8 34 75

34

34

8 17 34




2 1345678

D

SMBus Charger Net PropertiesNET TYPE

SMC SMBus Net Properties

SPACINGPHYSICAL

NET_TYPE


1 TO 1_ DI FF PA IR = ST AN DA RD = ST AN DA RD* 0.1 MM0.1 MM=STANDARD=STANDARD

SMB_50S SMBUS_SMC_B_S0_SDASMBUS_SMC_B_S0_SDA SMB

SMB_50S SMB SMBUS_SMC_0_S0_SCLSMBUS_SMC_0_S0_SCL

SMB_50S SMBSMBUS_SMC_0_S0_SDA SMBUS_SMC_0_S0_SDA

SMB_50S SMBUS_SMC_BSA_SCLSMBUS_SMC_BSA_SCL SMB

SMB_50SSMBUS_SMC_MGMT_SCL SMBUS_SMC_MGMT_SCLSMB

SMB_50S SMBUS_SMC_MGMT_SDASMBUS_SMC_MGMT_SDA SMB

SMB_50S SMBSMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA

SMB_50S SMBUS_SMC_B_S0_SCLSMBUS_SMC_B_S0_SCL SMB

SMB_50S SMBSMBUS_SMC_A_S3_SDA SMBUS_SMC_A_S3_SDA

SMB_50SSMBUS_SMC_A_S3_SCL SMB SMBUS_SMC_A_S3_SCL

45 48 51

6 32 45 48 51

6 32 45 48 51

6 45 48 63 64

45 48

45 48

6 45 48 63 64

45 48 51

6 32 45 48 54 55

6 32 45 48 54 55








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1


NET_TYPE

PHYSICAL SPACING


SMC Constraints

1TO1_DIFFPAIR CHGR_CSI_N

CHGR_CSI 1TO1_DIFFPAIR CHGR_CSI_P

CHGR_CSO 1TO1_DIFFPAIR CHGR_CSO_P

1TO1_DIFFPAIR CHGR_CSO_N

1

64

64

64

64

2 1345678

DTABLE_SPACING_RULE_ITEM















(USB EXTA)

(USB_EXTA)

(USB_EXTA)

(USB_EXTA)

K90i Specific Net PropertiesK90i Specific Net Properties

PHYSICAL

NET_TYPE

SPACING SPACING

NET_TYPE

PHYSICALELECTRICAL_CONSTRAINT_SET

I295

I296

I297

I298

*THERM_1TO1_55S =55_OHM_SE=1:1_DIFFPAIR =1:1_DIFFPAIR=1:1_DIFFPAIR= 55 _O HM _S E = 55 _O HM _S E

DIFFPAIR * =1:1_DIFFPAIR =1:1_DIFFPAIR=1:1_DIFFPAIR=1:1_DIFFPAIR

GND_P2MMGND *CPU_VCCSENSE

* =1:1_DIFFPAIR =55_OHM_SE =1:1_DIFFPAIR=1:1_DIFFPAIR=55_OHM_SESENSE_1TO1_55S =55_OHM_SE

CPU_COMP *GND GND_P2MM

* ?AUDIO =2:1_SPACING

* ?THERM =2:1_SPACING

* ?SENSE =2:1_SPACING

THERMTHERM_1TO1_55S CPUTHMSNS_D2_PSENSE_DIFFPAIR

ENETCONN_N<3..0>ENETCONNENET_100D

ENETCONN_P<3..0>E NE T_ 10 0D E NE TC ON N

SATA_90D SATA_ODD_D2R_UF_PSATA

SATASATA_90D SATA_ODD_D2R_UF_N

SATASATA_90D SATA_HDD_R2D_RDRVR_IN_P

SATASATA_90D SATA_HDD_D2R_RDRVR_OUT_P

SATA_90D SATA SATA_HDD_R2D_RDRVR_OUT_N

SATA_90D SATA SATA_HDD_R2D_RDRVR_OUT_P

1TO1_DIFFPAIR CHGR_CSI_R_N

CHGR_CSO_R_P1TO1_DIFFPAIR

CLK_PCIE_90D PCIE_CLK100M_AP_CONN_NCLK_PCIE

THERM 1TO1 55S THERM CPUTHMSNS D2 N

SATA_90D SATA SATA_HDD_D2R_RDRVR_IN_N

SATA_90D SATA SATA_HDD_D2R_RDRVR_IN_P

SATASATA_90D SATA_HDD_R2D_RDRVR_IN_N

PCIE_CLK100M_AP PCIE_CLK100M_AP_CONN_PCLK_PCIECLK_PCIE_90D

CHGR_CSI_R_P1TO1_DIFFPAIR

USB USB2_EXTA_MUXED_NUSB_85D

USB2_LT1_PUSBUSB_85D

USB USB2 LT1 NUSB 85D

USB USB2_EXTA_MUXED_PUSB_85D

CHGR_CSO_R_N1TO1_DIFFPAIR

SATASATA_90D SATA_HDD_D2R_RDRVR_OUT_N

51

38

38

6 42

6 42

42

42

42

42

64

50 64

6 32

51

42

42

42

6 32

64

43

43

43

43

50 64

42








36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1

OV ERRIDE OVER RIDE OVER RIDE OVERRI DE OVERRI DE OV ERRIDE O VERRID E OV ERRIDE
























































(USB_EXTA)

Memory Constraint Relaxations

Allow 0.127 mm necks for >0.127 mm lines for ARD fanout.

I249

I250

I251

I252

I253

I254

I255

I256

I281

I282

I283

I284

I285

I286

I287

I288

I291

I292

I293

I294

I299

I300

I301

I302

I303

I304

I305

I306

I307

I308

I309

I310

I311

I312

I313

I314

I315

I316

*MEM_72D 400 MIL0.09 MM

* 0.09 MM 400 MILMEM_37S

*MEM_85D 0.09 MM 400 MIL

* 10 mm0.076 MMPCIE_85D

MEM_72D 6.35 MM0.127 MMBOTTOM

* GND_P2MMGNDENET_MDI

CLK_PCIE_90D 400 MILTOP 0.09 MM

400 MILTOP 0.09 MMCPU_27P4S

SB_POWER * PWR_P2MMSATA

GND_P2MMCLK_PCIE *GND

GND_P2MMPCIE *GND

GND GND_P2MM*SATA

MEM_85D 0.1 MMTOP 6.35 MM

ENETCONN * ?25 MILS

GND =STANDARD ?*

*SB_POWER PWR_P2MMCLK_PCIE

GND_P2MM*GNDUSB

1000* 0.20 MMGND_P2MM

0.20 MM 1000*PWR_P2MM

GND * GND_P2MMMEM_CLK

MEM_CTRL * GND_P2MMGND

MEM_DATA GND * GND_P2MM

MEM_DQS GND * GND_P2MM

GND_P2MMGND *LVDS

GND_P2MMGND *MEM_CMD

USB SB_POWER * PWR_P2MM

TOP 500 MIL0.1 MMUSB_85D

MEM_40S * 400 MIL0.09 MM

SSYNC_MASTER=ANNE_K90I

Project Specific Constr

SENSE_1TO1_55S SENSE ISNS_LCDBKLT_P

SENSE_1TO1_55S SENSESENSE_DIFFPAIR ISNS_LCDBKLT_N

ISNS_HDD_R_PSENSE_1TO1_55S SENSE

CPUIMVP_ISNS1G_NSENSESENSE_1TO1_55S

CPUIMVP_ISUM_R_PSENSESENSE_1TO1_55SSENSE_DIFFPAIR

CPUIMVP_ISUMG_R_PSENSESENSE_DIFFPAIR SENSE_1TO1_55S

SENSE CPUIMVP_ISNS_NSENSE_1TO1_55S

SENSE_1TO1_55S SENSE CPUIMVP_ISUMG_N

SENSE_1TO1_55S SENSESENSE_DIFFPAIR CPUIMVP_ISUMG_P

S EN SE _D IF FP AI R S EN SE _1 TO 1_ 55 S S EN SE ISNS_CPU_N

ISNS_CPU_PSENSE_1TO1_55S SENSE

ISNS_HDD_NS EN SE _D IF FP AI R S EN SE _1 TO 1_ 55 S S EN SE

ISNS_HDD_PSENSESENSE_1TO1_55S

SENSESENSE_1TO1_55SSENSE_DIFFPAIR VCCSAS0_CS_P

SENSESENSE_1TO1_55S VCCSAS0_CS_N

ISNS_HDD_R_NSENSE_1TO1_55SSENSE_DIFFPAIR SENSE

ISNS_ODD_NSENSE_1TO1_55S SENSESENSE_DIFFPAIR

ISNS_ODD_PSENSE_1TO1_55S SENSE

SENSE_1TO1_55S SENSE ISNS_ODD_R_P

ISNS_P1V8GPU_NSENSE_1TO1_55S SENSESENSE_DIFFPAIR

SENSE_1TO1_55S SENSE ISNS_P1V8GPU_P

SENSE_DIFFPAIR SENSESENSE_1TO1_55S ISNS_P1V8GPU_R_N

CPUIMVP_ISUM_R_NSENSESENSE_1TO1_55S

CPUIMVP_ISUMG_R_NSENSESENSE_1TO1_55S

SENSESENSE_1TO1_55SSENSE_DIFFPAIR CPUIMVP_ISNS_P

AUDIOAUD_DIFF SPKRAMP_INSUB_P1TO1_DIFFPAIR

AUDIOAUD_DIFF SPKRAMP_INSUB_N1TO1_DIFFPAIR

AUD_DIFF AUDIO SPKRAMP_INR_P1TO1_DIFFPAIR

SPKRAMP_INR_NAUD_DIFF AUDIO1TO1_DIFFPAIR

AUDIOAUD_DIFF SPKRAMP_INL_N1TO1_DIFFPAIR

AUD_LO2_P_LAUDIOAUD_DIFF 1TO1_DIFFPAIR

AUDIOAUD_DIFF SPKRAMP_INL_P1TO1_DIFFPAIR

AUD_LO2_N_LAUDIOAUD_DIFF 1TO1_DIFFPAIR

AUD_LO1_P_RAUDIOAUD_DIFF 1TO1_DIFFPAIR

AUD_LO1_N_RAUDIOAUD_DIFF 1TO1_DIFFPAIR

AUDIO AUD_LO2_N_RAUD_DIFF 1TO1_DIFFPAIR

AUD_LO2_P_RAUDIOAUD_DIFF 1TO1_DIFFPAIR

AUDIO SSM2315_R_PAUD_DIFF 1TO1_DIFFPAIR

AUDIO SSM2315_R_NAUD_DIFF 1TO1_DIFFPAIR

AUDIO SSM2315_L_PAUD_DIFF 1TO1_DIFFPAIR

SSM2315_L_NAUDIOAUD_DIFF 1TO1_DIFFPAIR

AUDIO SSM2315_SUB_PAUD_DIFF 1TO1_DIFFPAIR

AUDIO SSM2315_SUB_NAUD_DIFF 1TO1_DIFFPAIR

DIFFPAIR SPKRAMP_R_N_OUTAUDIOSPK_OUT

DIFFPAIRSPK_OUT AUDIO SPKRAMP_R_P_OUT

DIFFPAIRSPK_OUT AUDIO SPKRAMP_SUB_P_OUT

DIFFPAIRSPK_OUT AUDIO SPKRAMP_SUB_N_OUT

DIFFPAIRSPK_OUT AUDIO SPKRAMP_L_N_OUT

USB_TPAD_R_NUSBUSB_85D

USBUSB_85D USB_TPAD_R_P

LVDS LVDS_CONN_A_CLK_F_NLVDS_90D

LVDS LVDS_CONN_A_CLK_F_PLVDS_90D

ISNS_ODD_R_NSENSESENSE_DIFFPAIR SENSE_1TO1_55S

SENSESENSE_1TO1_55S CPUVCCIOS0_CS_P

CPUIMVP_ISNS1_PSENSE_1TO1_55S SENSESENSE_DIFFPAIR

CPUIMVP_ISNS2_PS EN SE _D IF FP AI R S EN SE _1 TO 1_ 55 S S EN SE

CPUIMVP_ISNS2_NSENSE_1TO1_55S SENSE

CPUIMVP_ISNS1G_PS EN SE _D IF FP AI R S EN SE _1 TO 1_ 55 S S EN SE

CPUIMVP_ISNS1_NSENSESENSE_1TO1_55S

SENSE_DIFFPAIR THERM_1TO1_55S CPU_THERMD_PTHERM

SENSESENSE_1TO1_55SSENSE_DIFFPAIR ISNS_HS_OTHER_N

SENSE ISNS_HS_OTHER_PSENSE_1TO1_55S

ISNS_P1V8GPU_R_PSENSE_1TO1_55S SENSE

SENSESENSE_DIFFPAIR SENSE_1TO1_55S CPUVCCIOS0_CS_N

PP3V3_S5SB_POWER

PP1V5_S3RS0SB_POWER

PP3V3_S0SB_POWER

THERM_1TO1_55S THERM CPUTHMSNS_D2_N

THERMSENSE_DIFFPAIR THERM_1TO1_55S T29THMSNS_D2_P

T29_THERMD_NTHERMTHERM_1TO1_55S

ISNS_HS_COMPUTING_NSENSESENSE_1TO1_55SSENSE_DIFFPAIR

SENSESENSE_1TO1_55S ISNS_HS_COMPUTING_P

USB USB2_LT1_NUSB_85D

THERMTHERM_1TO1_55S CPU_THERMD_N

T29_THERMD_PTHERMSENSE_DIFFPAIR THERM_1TO1_55S

T29THMSNS_D2_NTHERMTHERM_1TO1_55S

USB_LT2_PUSBUSB_85D

CONN_USB2_BT_NUSBUSB_85D

CONN_USB2_BT_PUSBUSB_85D

USB_LT2_NUSBUSB_85D

DISPLAYPORTDP_85D DP_IG_AUX_CH_C_P

DP_85DDISPLAYPORT DP_IG_AUX_CH_C_N

DIFFPAIR SPKRAMP_L_P_OUTSPK_OUT AUDIO

GNDGND

1

49 69

49

49

49

68 69

68 69

65

65

49

49

49

60

60

60

60

60

57

60

57

57

57

57

57

60

60

60

60

60

60

6 6

6 6

6 6

6 6

6 6

53

53

6 74

6 74

49 70

49 68 69

49 68 69

49 69

49 69

49 69

9 51

50

50

49 70

6 7 46 56

6 7 1

6 7 26 27

51

51

51

50

50

43

9 51

34 51

51

43

43

6 6



TABLE_SPACING_RULE_ITEM TABLE_SPACING_RULE_ITEM







2 1345678

D













TABLE_BOARD_INFO

VERSIONALLEGRO

(MIL or MM)BOARD UNITSBOARD LAYERS BOARD AREAS


TABLE_SPACING_RULE_ITEM TABLE_SPACING_ASSIGNMENT_ITEM






K90i Board-Specific Spacing & Physical Constraints

MEM_CLK * BGA BGA_P2MM

CLK_PCIE * BGA BGA_P2MM

* BGA* BGA_P1MM

BGACLK_SLOW BGA_P2MM*?=DEFAULT*BGA_P2MM

?=DEFAULT*STANDARD

15.5.1MMNO_TYPE,BGATOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,ISL10,ISL11,BOTTOM

0 MM0 MM10 MM=50_OHM_SE=50_OHM_SEY*DEFAULT

=DEFAULT =DEFAULT=DEFAULT10 MM=DEFAULTY*STANDARD

0.090 MMTOP,BOTTOM 0.110 MMY50_OHM_SE

0.080 MM =STANDARD=STANDARD=STANDARD0.080 MMY*50_OHM_SE

40_OHM_SE 0.165 MM0.165 MMYTOP,BOTTOM

?=DEFAULT*BGA_P1MM

DEFAULT ?0.1 MM*

*2X_DIELECTRIC ?0.140 MM1.5:1_SPACING ?0.15 MM*


















36

BRANC

REVIS

DRAWI

R


SHEET

PAGE TITLE

C

A


Apple Inc.

PAGE


B

8 7 5 4 2 1














































































NOTE: 85_DIFF_BGA is 85-ohms differential impedance on outer layers and 80-ohms on inner layers.

NOTE: These are Intel recommended impedances for PEG, unused on K90i.


NOTE: 110_DIFF is 110-ohms differential impedance on outer layers and 105-ohms on inner layers.


27P4_OHM_SE 0.2 MM = ST AN DA RD = ST AN DA RD=STANDARD0.235 MMY*

ISL9,ISL10 0.115 MMY 0.180 MM0.180 MM0.115 MM80_OHM_DIFF

ISL9,ISL10100_DIFF_BGA 0.075 MM 0.125 MMY 0.075 MM 0.125 MM

ISL3,ISL490_DIFF_BGA 0.125 MM0.125 MM0.075 MM0.075 MMY

ISL9,ISL1090_DIFF_BGA 0.125 MM0.125 MM0.075 MM0.075 MMY

100_DIFF_BGA =100_OHM_DIFF = 10 0_ OH M _D IF F = 10 0_ OH M_ DI FF = 10 0_ OH M_ DI FF =100_OHM_DIFF =100_OHM_DIFF*

ISL3,ISL4100_DIFF_BGA 0.075 MM 0.1 25 MM 0.12 5 MMY 0.075 MM

0.140 MM 0.190 MM0.190 MM0.140 MM80_OHM_DIFF TOP,BOTTOM Y

0.070 MMISL9,ISL10 Y110_OHM_DIFF 0.330 MM0.330 MM0.070 MM

ISL3,ISL4100_OHM_DIFF Y 0.076 MM 0.250 MM0.250 MM0.076 MM

TOP,BOTTOM 0.200 MM 0 .200 MM0.111 MM90_OHM_DIFF Y 0.111 MM

0.090 MM0.090 MM =STANDARD* =STANDARDY =STANDARD48_OHM_SE

ISL3,ISL4 0.115 MM 0.180 MM0.180 MM0.115 MM80_OHM_DIFF Y

0.085 MM 0.250 MMYTOP,BOTTOM110_OHM_DIFF 0.250 MM0.085 MM

ISL3,ISL4 0.330 MMY110_OHM_DIFF 0.330 MM0.070 MM 0.070 MM

ISL9,ISL10100_OHM_DIFF Y 0.076 MM 0.250 MM0.250 MM0.076 MM

0.490 MM7X_DIELECTRIC ?*

=STANDARD80_OHM_DIFF =STANDARD=STANDARDN =STANDARD* =STANDARD

48_OHM_SE 0.165 MMTOP,BOTTOM 0.165 MMY

=STANDARD =STANDARD* N =STANDARD =STANDARD=STANDARD110_OHM_DIFF

TOP,BOTTOM Y100_OHM_DIFF 0.085 MM 0.200 MM0.200 MM0.085 MM

=STANDARD=STANDARD100_OHM_DIFF =STANDARDN* =STANDARD =STANDARD

=STANDARD =STANDARD=STANDARD=STANDARD=STANDARDN*40_OHM_SE

=90_OHM_DIFF=90_OHM_DIFF*90_DIFF_BGA =90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF

0.075 MMYISL9,ISL1085_DIFF_BGA 0.075 MM 0.1 25 MM 0.12 5 MM

0.075 MMYISL3,ISL485_DIFF_BGA 0.075 MM 0.1 25 MM 0.12 5 MM

=STANDARDY1:1_DIFFPAIR * =STANDARD 0.1 MM 0.1 MM=STANDARD

=STANDARD=STANDARD=STANDARD=STANDARD=STANDARDN85_OHM_DIFF *

0.090 MM0.090 MMYTOP,BOTTOM55_OHM_SE

=85_OHM_DIFF* =85_OHM_DIFF85_DIFF_BGA =85_OHM_DIFF =85_OHM_DIFF = 85_O HM_DI FF =8 5_OH M_DIF F

TOP,BOTTOM 0.1 MM 0.190 MM 0 .190 MM0.125 MMY85_OHM_DIFF

0.1 MM 0.170 MM 0 .170 MM0.101 MMYISL9,ISL1085_OHM_DIFF

0.1 MMISL3,ISL4 0.170 MM 0.170 MM0.101 MMY85_OHM_DIFF

=STANDARD =STANDARD=STANDARD0.070 MM0.070 MMY*55_OHM_SE

ISL9,ISL10 Y 0.180 MM 0 .180 MM0.091 MM90_OHM_DIFF 0.091 MM

ISL3,ISL4 Y 0.180 MM 0 .180 MM0.091 MM90_OHM_DIFF 0.091 MM

=STANDARD=STANDARD=STANDARD=STANDARD=STANDARDN*90_OHM_DIFF

TOP,BOTTOM 0.200 MM0.200 MM0.175 MM0.175 MMY72_OHM_DIFF

0.2 MM0.310 MMYTOP,BOTTOM27P4_OHM_SE

0.1 MM0.145 MMISL10 =STANDARD=STANDARD=STANDARDN37_OHM_SE

40_OHM_SE =STANDARD0.126 MM =STANDARD=STANDARD0.126 MMNISL10

=STANDARD0.126 MM =STANDARD=STANDARD0.126 MMYISL3,ISL4,ISL940_OHM_SE

0.1 MM0.190 MMYTOP,BOTTOM37_OHM_SE

Y 0.1 MM =STANDARD=STANDARD=STANDARD0.145 MMISL3,ISL4,ISL937_OHM_SE

=STANDARD=STANDARD=STANDARD=STANDARD=STANDARDN*37_OHM_SE

72_OHM_DIFF 0.190 MMN 0.190 MM0.140 MM0.140MMISL10

72_OHM_DIFF 0.190 MM0.190 MM0.140 MM0.140 MMYISL3,ISL4,ISL9

72_OHM_DIFF = ST AN DA RD = ST AN DA RD=STANDARD=STANDARD=STANDARDN*


PCB Rule Definition

0.210 MM* ?3X_DIELECTRIC

4X_DIELECTRIC 0.280 MM* ?

5X_DIELECTRIC 0.350 MM ?*

4:1_SPACING ?0.4 MM*


2.5:1_SPACING * ?0.25 MM


1

apple macbook pro a1278 (k90i, 820-2936)

Documents