applied signal processing and implementation introduction to 9 & 10th semester fall 2005

APPLIED SIGNAL PROCESSING AND IMPLEMENTATION

Introduction to 9 & 10th semesterFall 2005

2ASPI Introduction

Outline

1. Basic ASPI Model (A3)2. Trends from S8 -> S9 -> S103. Course overview4. Project work5. Reading suggestions6. Formation of project groups7. Group Rooms, Schedule, Home Page etc

3ASPI Introduction

A3 Paradigm

Application: Non-Linear Signal Processing etc. 1. Algorithm selection2. Simulation3. Architecture selection and modelling4. Design Space Exploration5. HW/SW Co-Design

ApplicationsApplications

AlgorithmsAlgorithms

ArchitecturesArchitectures

1

2

345

4ASPI Introduction

Basic ASPI Model (A3)




For each application => many candidate algorithms

For each algorithm => many implementation architectures

=> Large no. of solutions => Large Design Space

5ASPI Introduction

Focus of S8ASPI




1. Application to Algorithm Transformation2. Simulation & Implementation Environments

1

2

3

6ASPI Introduction

Focus of S9 ASPI




1. App -> Alg: Non-Linear Signal Processsing and others2. Simulation4-5.Alg Arch: HW/SW Codesign and Architecture Exploration

1

245

7ASPI Introduction

Focus of S10 ASPI




1. Proving your potential for R&D2. Closing the loop

8ASPI Introduction

9th Semester Applied Signal Processing and

Implementation

THEME: Non-linear DSP Methods and Real-Time Architectures

PERIOD: 1 September – 31 January

PURPOSE:To enable the students to understand, analyze, and employ state-of-the-art DSP methods and algorithms, for example in the domain of non-linear techniques.

To enable the students to apply theories and methods to select, analyze and evaluate heterogeneous DSP-processor architectures given a DSP functionality under the constraint of some cost function.

9ASPI Introduction

Putting it all together

SW Platform analysis HW Platform analysis

SW compilers HW compilers

Design Methodology

Algorithm analysis

Design Space Expoloration

8.sem 9.Sem

10ASPI Introduction

9th Semester Courses

S9 Theme: Non-linear DSP Methods and Real-time Architectures

FP9-2 Discrete-Time Kalman Filtering 2 ECTS SE/KB

ASPI9-2AASPI9-2BASPI9-3ASPI9-4Mob9-2

HW/SW CoDesignHW Platform Analysis, Comp. & Optim.Non-linear Signal ProcessingNeural NetworksRadio Communication III

2 ECTS2 ECTS2 ECTS1 ECTS1.4 ECTS

PE/YM/PKPE/YM/PKPE/PREL/UHEL/FF

Project 22 ECTS

S10 Master Thesis in Applied Signal Processing and Implementation 30 ECTS

EL : ELective Course

11ASPI Introduction

Project Work Overview

Project Development Model

1. Application domain study2. Algorithm Development and Simulation3. Design Space Exploration4. Implementation5. Evaluation of results6. Next step

12ASPI Introduction

Project Work Overview

Project Development Model

1. Application domain study2. Algorithm Development and Simulation3. Design Space Exploration4. Implementation5. Evaluation of results6. Next step

13ASPI Introduction

HW/SW Co-Design: generic flow

14ASPI Introduction

Project Work Technology

Platform: Components: Lang.: Property:

PCFPGA

Pentium Proc.Sync. Logic PE’sSoft Proc.Hard Proc.

CHande

lCCC

Seq, Gips, 100 WPar, ??, ??Seq, Mips, ??Seq, Mips, ??

FPGA Supplier:

Components: Lang.: Property:

Xilinx

Altera

Xilinx, Altera

MicroBlaze Proc.PowerPCNIOSARMSync. Logic PE’s

CCCC

HandelC

32 bit RISC32 bit RISC16 bit RISC16/32 bit RISC”Anything”

15ASPI Introduction

Project Work Content

• 2 conventional processor platforms• 2 languages• Complex Design Software=> Keep projects simple(at first)

Generic project example:Design, implement and test a processor/coprocessor architecture, that speeds up the execution of a selected algorithm or eventually a family or a set of algorithms

16ASPI Introduction


An example can be found in:Accelerating C Software Applications Results:

Acceleration (@10K iterations)FPGA, 50MHz w/o I/O .71 3.03 4.69 16.48 144.71 147XFPGA, 50MHz with I/O 15.61 15.47 15.32 22.74 149.40 106XPentium, 3.6GHz 0.64 2.51 5.32 23.11 199.55 104XPPC405, 400MHz 24.20 242 484 2418 n/a 1Iterations 100 1000 2000 10000 100000

Notes:Figure 5. Test results for a range of maximum iteration values demonstrate substantial speedup of

the algorithm (167X when using two parallel processes) compared to an embedded processorimplementation.

17ASPI Introduction


Specific project examples:1. Vector Co-processor (next pages)2. Active Noise Cancellation in Headsets, Per Rubak3. Any suitable algorithm, that you/we may suggest

1. GSM Vocoder (Ch. 5 in SpecC book)2. H263 Video Decoder (prev. S10 project)3. RS codec for DVB-H (prev. S10 project)4. Digital Camera example (Ch. 7 in Vahid’s book)5. Video filtering6. 3GDSP algorithm examples7. A.s.o.

18ASPI Introduction

Vector Inner Product (1)

c = aTb (a transposed times b)c is a scalar, a and b are vectors (real

valued)

Ex. (3 elements) Pseudo codea = [a1, a2, a3]T acc = 0;

b = [b1, b2, b3]T for i=1:3,

c = a1*b1 + a2*b2 + a3*b3; acc = acc + a[i]*b[i];end;c = acc;

Parallelism, Control & CommunicationHow to combine with NIOS/MicroBlaze

When is it beneficialetc

19ASPI Introduction

Vector Inner Product (2)

Example algoritmsFIR filter

a represents the filter coefficientsb represents the buffer of the signal to be filteredc represents the filtered signal

Matrix multiplication may be described as a set of vector inner products.

Several matrix operations may be described as sets of vector operations.

20ASPI Introduction

(Partial) design m

ethodology

Application/Algorithm

Application/Algorithm Analysis

Implementation(s)SW (PC/AD/ARM) HW(Xilinx/Altera)

Implementation Analysis

Suggestions for HW/SW partitioning

ImplementationSW + HW

MicroBlaze/NiosII + Co-processor

Implementation Analysis

Project Work Details

21ASPI Introduction

Project Work Results

See also slide

22ASPI Introduction

Lab Resources

Available platforms: 1. 2 RC100 boards (“small” Xilinx FPGA), 2. 2 RC203 boards (“medium” Xilinx FPGA), 3. 2 Altera boards (“medium” Altera FPGA), 4. TI and AD DSP boards (model ? quantity ?),5. 1 Lyrtech Signal-Master board (FPGA+DSP, no support!!!)

Available development tools:1. Celoxica DK3 design tools2. Xilinx & Altera design tools

23ASPI Introduction

Reading suggestions/Articles

Closely Coupled Co-processors for Algorithmic Acceleration

Accelerating C Software Applications

Applications of Reprogrammability in Algorithm Acceleration

Algorithmic C Synthesis Fuels Functional Reuse

Using Hardware Acceleration Units in Software Defined Radio Modem Functions

Finding the best System Design Flow for a High-Speed JPEG Encoder

From C software to FPGA hardware

24ASPI Introduction

Reading suggestions/Books

1. SpecC: Specification Language and Design Methodology 2. System: Design: A Practical Guide with SpecC

See also SpecC System3. Embedded System Design:

A Unified Hardware/Software Introduction

25ASPI Introduction

Formation of project groups

1. Study project ideas carefully2. Discuss with teachers3. Prepare for Sept. 14th. a specific project proposal and a list

of participants4. Present your proposal at the next semester group meeting

to be held at ???

26ASPI Introduction

ASPI Group Rooms, Home Page etc

Group Rooms: 9ASPI 12 studerende i 1 grupperum

RUM: A6-108/ 36 m2

Home Page:http://kom.aau.dk/~dsp/aspi05-02/sites/default/

Secretary: Dorthe SparreFredrik Bajers Vej 12, A5-214 Phone: +45 9635 8616 E-mail: Dorthe Sparre <[email protected]>

27ASPI Introduction


ASPI9-2A Hardware/Software CodesignPurposes:1. Give the students the essential knowledge about problems related to

the design of modern digital systems for various applications, in particular mobile applications.

2. Make the students understand how to apply digital electronic components efficiently in such systems.

3. Make the students able to apply a systematic design methodology to arrive at near-optimal implementations, using design tools for evaluating a large number of alternatives (Design Space Exploration, DSE).

28ASPI Introduction


ASPI9-2B Hardware Platform Analysis, Compilation, and optimization

Purposes:1. To provide the students with:

knowledge about one particular state-of-the-art IC technology, and comprehension about its usage in modern integrated system design.

2. To make the students understand and apply methods for synthe-sizing from a functional description to an optimal heterogeneous architecture in terms of physical size, execution time, and power consumption.

3. To provide comprehension on syntax and semantics of a specific modern Hardware Description Language (HDL).

4. To make the students able to apply the above topics in terms of formal methods for structures HW/SW Codesign.

applied signal processing and implementation introduction to 9 & 10th semester fall 2005

Documents

aspi introduction outline

implementation introduction

implementation architectures

step slide

sem slide

loop slide

large design space slide

design space exploration