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Page 1: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital
Page 2: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA APR8

by

Sangil Park, Ph. D.

Strategic ApplicationsDigital Signal Processor Operation

Motorola Digital Signal Processors

Principles of Sigma-Delta Modulation for Analog-to-Digital Converters

Page 3: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Motorola reserves the right to make changes without further notice to any products here-in. Motorola makes no warranty, representation or guarantee regarding the suitability ofits products for any particular purpose, nor does Motorola assume any liability arising outof the application or use of any product or circuit, and specifically disclaims any and allliability, including without limitation consequential or incidental damages. “Typical” pa-rameters can and do vary in different applications. All operating parameters, including“Typicals” must be validated for each customer application by customer’s technical ex-perts. Motorola does not convey any license under its patent rights nor the rights of oth-ers. Motorola products are not designed, intended, or authorized for use as componentsin systems intended for surgical implant into the body, or other applications intended tosupport or sustain life, or for any other application in which the failure of the Motorolaproduct could create a situation where personal injury or death may occur. Should Buyerpurchase or use Motorola products for any such unintended or unauthorized application,Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affili-ates, and distributors harmless against all claims, costs, damages, and expenses, andreasonable attorney fees arising out of, directly or indirectly, any claim of personal injuryor death associated with such unintended or unauthorized use, even if such claim allegesthat Motorola was negligent regarding the design or manufacture of the part. Motorolaand are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportuni-ty/Affirmative Action Employer.

Page 4: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Table of Contents

MOTOROLA iii

I

ntroduction

Conventional Analog-to-Digital Converters

Quantization Error in A/D Conversion

Oversampling and Decimation Basics

Delta Modulation

Sigma-Delta modulation for A/D Converters (Noise Shaping)

6.1 Analysis of Sigma-Delta Modulation inZ-Transform Domain

Digital Decimation Filtering

7.1 Comb-Filter Design as a Decimator

7.2 Second Section Decimation FIR Filter

Mode Resolution by Filtering the Comb-Filter Out put with Half-Band Filters

Summary

SECTION 1

SECTION 2

SECTION 3

SECTION 4

SECTION 5

SECTION 6

SECTION 7

SECTION 8

SECTION 9

REFERENCES

1-1

2-1

3-1

4-1

5-1

6-1

6-6

7-1

7-5

7-10

8-1

9-1

References-1

Page 5: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

Illustrations

Generalized Analog-to-Digital Conversion Process

Conventional Analog-to-Digital Conversion Process

Spectra of Analog and Sampled Signals

Quantization Error

Noise Spectrum of Nyquist Samplers

Comparison Between Nyquist Samplers and 2X Oversamplers

Anti-Aliasing Filter Response and Noise Spectrum of Oversampling A/D Converters

Frequency Response of Analog Anti-Aliasing Filters

Simple Example of Decimation Process

Delta Modulation and Demodulation

Derivation of Sigma-Delta Modulation from Delta Modulation

Block Diagram of Sigma-Delta Modulation

S-Domain Analysis of Sigma-Delta Modulator

Block Diagram of First-Order Sigma-Delta A/D Converter

Input and Output of a First-Order Sigma-Delta Modulator

Z-Domain Analysis of First-Order Noise Shaper

Spectrum of a First-Order Sigma-Delta Noise Shaper

2-2

2-3

2-5

3-3

3-3

4-3

4-5

4-6

4-7

5-2

6-1

6-2

6-3

6-5

6-6

6-7

6-9

Figure 2-1

Figure 2-2

Figure 2-3

Figure 3-1

Figure 3-2

Figure 4-1

Figure 4-2

Figure 4-3

Figure 4-4

Figure 5-1

Figure 6-1

Figure 6-2

Figure 6-3

Figure 6-4

Figure 6-5

Figure 6-6

Figure 6-7

v

Page 6: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

vi

Illustrations

Second-Order and Third-Order Sigma-Delta Noise Shapers

Multi-Order Sigma-Delta Noise Shapers

Spectra of Three Sigma-Delta Noise Shapers

Digital Decimation Process

Block Diagram of One-Stage Comb Filtering Process

Transfer Function of a Comb-Filter

Cascaded Structure of a Comb-Filter

Aliased Noise in Comb-Filter Output

(a) Comb-Filter Magnitude Response inBaseband

(b) Compensation FIR Filter Magnitude Response

FIR Filter Magnitude Response

Aliased Noise Bands of FIR Filter Output

Spectrum of a Third-Order Noise Shaper (16384 FFT bins)

Spectrum of Typical Comb-Filter Output (4096 FFT bins)

Decimation Process using a Series of Half Band Filters

MO

6-10

6-13

6-13

7-4

7-6

7-7

7-8

7-9

7-11

7-11

7-12

7-13

8-2

8-3

8-5

Figure 6-8

Figure 6-9

Figure 6-10

Figure 7-1

Figure 7-2

Figure 7-3

Figure 7-4

Figure 7-5

Figure 7-6

Figure 7-7

Figure 7-8

Figure 8-1

Figure 8-2

Figure 8-3

TOROLA

Page 7: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA vii

Tables

Table 8-1

Parameters for Designing Half-Band Filters 8-4

Page 8: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

“Since the

Σ−∆

A/D convertersare based on

digital filteringtechniques,

almost 90% ofthe die is

implemented indigital circuitry

which enhancesthe prospect ofcompatibility.”

SECTION 1

Introduction

The performance of digital signal processing andcommunication systems is generally limited by theprecision of the digital input signal which is achievedat the interface between analog and digital informa-tion. Sigma-Delta (Σ−∆) modulation based analog-to-digital (A/D) conversion technology is a cost effectivealternative for high resolution (greater than 12 bits)converters which can be ultimately integrated on dig-ital signal processor ICs.

Although the sigma-delta modulator was first intro-duced in 1962 [1], it did not gain importance untilrecent developments in digital VLSI technologieswhich provide the practical means to implement thelarge digital signal processing circuitry. The increas-ing use of digital techniques in communication andaudio application has also contributed to the recent in-terest in cost effective high precision A/D converters.A requirement of analog-to-digital (A/D) interfaces iscompatibility with VLSI technology, in order to providefor monolithic integration of both the analog and digi-tal sections on a single die. Since the Σ−∆ A/Dconverters are based on digital filtering techniques,almost 90% of the die is implemented in digital circuit-ry which enhances the prospect of compatibility.

1-1

Page 9: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

1-2

Additional advantages of such an approach in-clude higher reliability, increased functionality, andreduced chip cost. Those characteristics are com-monly required in the digital signal processingenvironment of today. Consequently, the develop-ment of digital signal processing technology ingeneral has been an important force in the devel-opment of high precision A/D converters which canbe integrated on the same die as the digital signalprocessor itself. The objective of this applicationreport is to explain the Σ−∆ technology which is im-plemented in the DSP56ADC16, and show thesuperior performance of the converter comparedto the performance of more conventional imple-mentations. Particularly, this application notediscusses a third-order, noise-shaping oversam-pling structure.

Conventional high-resolution A/D converters, suchas successive approximation and flash type con-verters, operating at the Nyquist rate (samplingfrequency approximately equal to twice the maxi-mum frequency in the input signal), often do notmake use of exceptionally high speeds achievedwith a scaled VLSI technology. These Nyquist sam-plers require a complicated analog lowpass filter(often called an anti-aliasing filter) to limit the maxi-mum frequency input to the A/D, and sample-and-hold circuitry. On the other hand, Σ−∆ A/D convert-ers use a low resolution A/D converter (1-bitquantizer), noise shaping, and a very high oversam-pling rate (64 times for the DSP56ADC16). The highresolution can be achieved by the decimation (sam-ple-rate reduction) process. Moreover, since

MOTOROLA

Page 10: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

precise component matching or laser trimming isnot needed for the high-resolution Σ−∆ A/D convert-ers, they are very attractive for the implementationof complex monolithic systems that must incorpo-rate both digital and analog functions. Thesefeatures are somewhat opposite from the require-ments of conventional converter architectures,which generally require a number of high precisiondevices. This application note describes the con-cepts of noise shaping, oversampling, anddecimation in some detail. ■

MOTOROLA 1-3

Page 11: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital
Page 12: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

“Most A/Dconverters can

be classified intotwo groups

according to thesampling rate

criteria: Nyquistrate

converters...and

oversamplingconverters...”

Conventional Analog-to-Digital Converters

SECTION 2

Signals, in general, can be divided into two catego-ries; an analog signal, x(t), which can be defined in acontinuous-time domain and a digital signal, x(n),which can be represented as a sequence of numbersin a discrete-time domain as shown in Figure 2-1. Thetime index n of a discrete-time signal x(n) is an integernumber defined by sampling interval T. Thus, a dis-crete-time signal, x*(t), can be represented by asampled continuous-time signal x(t) as:

Eqn. 2-1

where:

A practical A/D converter transforms x(t) into a dis-crete-time digital signal, x*(t), where each sample isexpressed with finite precision. Each sample is ap-proximated by a digital code, i.e., x(t) is transformed

x∗ t( ) x t( )δ t nT–( )n ∞–=

∑=

δ(t) = 1, t = 0,

0, elsewhere

2-1

Page 13: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

2-2

Analog Signal

sample r

Sam

x (t)

Figure 2-1 Generalized

into a sequence of finite precision or quantized

samples x(n). This quantization process introduc-

es errors which are discussed in SECTION 3Quantization Error in A/D Converters .

Most A/D converters can be classified into two

groups according to the sampling rate criteria.

Nyquist rate converters, such as a successive ap-

proximation register (SAR), double integration,

and oversampling converters, sample analog sig-

nals which have maximum frequencies slightly

less than the Nyquist frequency, fN = fs/ 2, where

fs is the sampling frequency [2]. Meanwhile, over-

sampling converters perform the sampling

process at a much higher rate, fN << Fs (e.g., 64

times for the DSP56ADC16), where Fs denotes

the input sampling rate.

ate fs =

pling Quantization

Digital Signal

creates quantization error noise

1T---

x* (t) x (n)

Analog-to-Digital Conversion Process

MOTOROLA

Page 14: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Multi-levelQuantizer

DigitalSignal

x (n)

001

010

001

00

(n)

x (t)

n Process

snt

Figure 2-2 illustrates the conventional A/D con-version process that transforms an analog inputsignal x(t) into a sequence of digital codes x(n) ata sampling rate of fs = 1/T, where T denotes thesampling interval. Since in Eqn. 2-1 isa periodic function with period T, it can be repre-sented by a Fourier series given by [5]:

Eqn. 2-2

Combining Eqn. 2-1 and Eqn. 2-2, we get:

Eqn. 2-3

AnalogSignal

x (t)

0

111

110

101

x

Band-limiting

Successive ApproximationFlash ConversionDual Slope Method

e.g.:

Figure 2-2 Conventional Analog-to-Digital Conversio

Sample and HoldCircuit

Anti-AliasingFilter

δ t nT–( )

x t( )δ t nT–( )n ∞–=

∑ 1T--- x t( )e

j2nπt( ) T⁄

n ∞–=

∑=

x∗ t( ) 1T--- x t( )e

j2nπt( ) T⁄

n ∞–=

∑ 1T--- x t( )e

j2πf

n ∞–=

∑= =

MOTOROLA 2-3

Page 15: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

2-4

Eqn. 2-2 states that the act of sampling (i.e., the

sampling function):

is equivalent to modulating the input signal by carri-

er signals having frequencies at 0, fs, 2fs,. . .. In

other words, the sampled signal can be expressed

in the frequency domain as the summation of the

original signal component and signals frequency

modulated by integer multiples of the sampling fre-

quency as shown in Figure 2-3. Thus, input signals

above the Nyquist frequency, fn, cannot be properly

converted and they also create new signals in the

base-band, which were not present in the original

signal. This non-linear phenomenon is a signal dis-

tortion frequently referred to as aliasing [2]. The

distortion can only be prevented by properly low-

pass filtering the input signal up to the Nyquist

frequency. This lowpass filter, sometimes called the

anti-aliasing filter, must have flat response over the

frequency band of interest (baseband) and attenu-

ate the frequencies above the Nyquist frequency

enough to put them under the noise floor. Also, the

non-linear phase distortion caused by the anti-alias-

ing filter may create harmonic distortion and audible

degradation. Since the analog anti-aliasing filter is

the limiting factor in controlling the bandwidth and

phase distortion of the input signal, a high perfor-

mance anti-aliasing filter is required to obtain high

resolution and minimum distortion.

x t( )δ t nT–( )n ∞–=

MOTOROLA

Page 16: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

f

gnal

f4fs

ed signal

log signal

l signal

f

f4fs

| X (f) |

fN(a) Frequency response of unlimited si

fN fs 2fs 3fs(b) Frequency response of sampled unlimit

| X *(f) |

| X (f) |

| X *(f) |

aliased signal

fNsignal

(c) Frequency response of band-limited ana

(d) Frequency response of sampled digita

Anti-Aliasing Filter (Band-Limiting)

fN fs 2fs 3fs

Figure 2-3 Spectra of Analog and Sampled Signals

MOTOROLA 2-5

Page 17: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

2-6

In addition to an anti-aliasing filter, a sample-and-hold circuit is required. Although the analog signalis continuously changing, the output of the sample-and-hold circuitry must be constant between sam-ples so the signal can be quantized properly. Thisallows the converter enough time to compare thesampled analog signal to a set of reference levelsthat are usually generated internally [3]. If the out-put of the sample-and-hold circuit varies during T, itcan limit the performance of the A/D convertersubsystem.

Each of these reference levels is assigned a digitalcode. Based on the results of the comparison, a dig-ital encoder generates the code of the level theinput signal is closest to. The resolution of such aconverter is determined by the number and spacingof the reference levels that are predefined. Forhigh-resolution Nyquist samplers, establishing thereference voltages is a serious challenge.

For example, a 16-bit A/D converter, which is thestandard for high accuracy A/D converters, requires216 - 1 = 65535 different reference levels. If theconverter has a 2V input dynamic range, the spac-ing of these levels is only 30 mV apart. This isbeyond the limit of component matching tolerancesof VLSI technologies [4]. New techniques, such aslaser trimming or self-calibration can be employedto boost the resolution of a Nyquist rate converterbeyond normal component tolerances. However,these approaches result in additional fabricationcomplexity, increased circuit area, and higher cost. ■

MOTOROLA

Page 18: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

Quantization Error in A/D Conversion

SECTION 3

“For an inputsignal which is

large comparedto an LSB step,

the error terme(n) is a random

quantity in theinterval (-q/2,

q/2) with equalprobability.”

The process of converting an analog signal (whichhas infinite resolution by definition) into a finite rangenumber system (quantization) introduces an error sig-nal that depends on how the signal is beingapproximated. This quantization error is on the orderof one least-significant-bit (LSB) in amplitude, and it isquite small compared to full-amplitude signals. How-ever, as the input signal gets smaller, the quantizationerror becomes a larger portion of the total signal.

When the input signal is sampled to obtain the se-quence x(n), each value is encoded using finite word-lengths of B-bits including the sign bit. Assuming thesequence is scaled such that for fraction-al number representation, the pertinent dynamicrange is 2. Since the encoder employs B-bits, thenumber of levels available for quantizing x(n) is .The interval between successive levels, q, is there-fore given by:

Eqn. 3-1

which is called the quantization step size. The sam-pled input value is then rounded to the nearestlevel, as illustrated in Figure 3-1.

x n( ) 1≤

2B

q1

2B 1–

--------------=

x∗ t( )

3-1

Page 19: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

3-2

σe2

=

From Eqn. 3-2, it follows that the A/D converter out-put is the sum of the actual sampled signal and an error (quantization noise) component e(n);that is:

Eqn. 3-2

For an input signal which is large compared to anLSB step, the error term e(n) is a random quantityin the interval (-q/2, q/2) with equal probability. Thenthe noise power (variance), , can be found as[5]:

Eqn. 3-3

where: E denotes statistical expectation

We shall refer to in Eqn. 3-3 as being the steady-state input quantization noise power. Figure 3-2shows the spectrum of the quantization noise. Sincethe noise power is spread over the entire frequencyrange equally, the level of the noise power spectraldensity can be expressed as:

Eqn. 3-4

The concepts discussed in this section apply ingeneral to A/D converters. ■

x∗ t( )

x n( ) x∗ t( ) e n( )+=

σe2

E e2[ ] 1

q--- e

2de

q–( ) 2⁄

q 2⁄

∫ q2

12------ 2

2B–

3------------= = =

σe2

N f( ) q2

12fs----------- 2 2B–

3fs-----------= =

MOTOROLA

Page 20: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Digital Words

0001

0000

1111

fS = 2fN

........

........

Analog Levels

0.125

0.000

-0.125

q

Figure 3-1 Quantization Error

Figure 3-2 Noise Spectrum of Nyquist Samplers

N f( ) q2

12------=

1fs----

N (f)

-fN fN

Noise Level:

MOTOROLA 3-3

Page 21: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital
Page 22: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

SECTION 4

Oversampling and Decimation Basics

“The benefit ofoversampling is

more than aneconomical anti-

aliasing filter.The decimationprocess can beused to provide

increasedresolution.”

The quantization process in a Nyquist-rate A/D con-verter is generally different from that in anoversampling converter. While a Nyquist-rate A/Dconverter performs the quantization in a single sam-pling interval to the full precision of the converter, anoversampling converter generally uses a sequence ofcoarsely quantized data at the input oversampling rateof followed by a digital-domain decimationprocess to compute a more precise estimate for theanalog input at the lower output sampling rate, fs,which is the same as used by the Nyquist samplers.

Regardless of the quantization process oversamplinghas immediate benefits for the anti-aliasing filter. To il-lustrate this point, consider a typical digital audioapplication using a Nyquist sampler and then using atwo times oversampling approach. Note that in the fol-lowing discussion the full precision of a Nyquistsampler is assumed. Coarse quantizers will be con-sidered separately.

The data samples from Nyquist-rate converters aretaken at a rate of at least twice the highest signal fre-quency of interest. For example, a 48 kHz samplingrate allows signals up to 24 kHz to pass without

Fs Nfs=

4-1

Page 23: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

4-2

aliasing, but because of practical circuit limitation,

the highest frequency that passes is actually about

22 kHz. Also, the anti-aliasing filter in Nyquist A/D

converters requires a flat response with no phase

distortion over the frequency band of interest (e.g.,

20 kHz in digital audio applications). To prevent sig-

nal distortion due to aliasing, all signals above 24

kHz for a 48 kHz sampling rate must be attenuated

by at least 96 dB for 16 bits of dynamic resolution.

These requirements are tough to meet with an an-

alog low-pass filter. Figure 4-1(a) shows the

required analog anti-aliasing filter response, while

Figure 4-1(b) shows the digital domain frequency

spectrum of the signal being sampled at 48 kHz.

Now consider the same audio signal sampled at

2fs, 96 kHz. The anti-aliasing filter only needs to

eliminate signals above 74 kHz, while the filter has

flat response up to 22 kHz. This is a much easier fil-

ter to build because the transition band can be 52 kHz

(22k to 74 kHz) to reach the -96 dB point. However,

since the final sampling rate is 48 kHz, a sample

rate reduction filter, commonly called a decimation

filter, is required but it is implemented in the digital

domain, as opposed to anti-aliasing filters which

are implemented with analog circuitry. Figure 4-1(d)

and Figure 4-1(e) illustrate the analog anti-aliasing

filter requirement and the digital-domain frequency

response, respectively. The spectrum of a required

digital decimation filter is shown in Figure 4-1(f). De-

tails of the decimation process are discussed in

SECTION 7 Digital Decimation Filtering.

MOTOROLA

Page 24: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

f

ist samplers

f

48 kHz

96 kHz

er-samplers

f

f

f

ion process

f

hen fs = 96 kHz192 k

2X Oversamples

(a) Anti-aliasing filter response for Nyqu

(b) Spectrum of sampled data when fs =

(c) Spectrum of sampled data when fs =

(d) Anti-aliasing filter response for 2x ov

22 k

22 k.......

(f) Digital filter response for 2:1 decimat24 k

22 k

(e) Spectrum of 2x oversampled data w

24 k 48 k 72 k 96 k

22 k

24 k 48 k 72 k 96 k

24 k 48 k 72 k 96 k

24 k 48 k 72 k 96 k

24 k 48 k 72 k 96 k

H f( )

H* f( )

H* f( )

H f( )

H f( )

H f( )

.......

.......

Figure 4-1 Comparison Between Nyquist Samplers and

MOTOROLA 4-3

Page 25: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

4-4

This two-times oversampling structure can be extend-ed to N times oversampling converters. Figure 4-2(a)shows the frequency response of a general anti-alias-ing filter for N times oversamplers, while the spectraof overall quantization noise level and basebandnoise level after the digital decimation filter is illustrat-ed in Figure 4-2(b). Since a full precision quantizerwas assumed, the total noise power for oversamplingconverters and one times Nyquist samplers are thesame. However, the percentage of this noise that is inthe bandwidth of interest, the baseband noise powerNB is:

Eqn. 4-1

which is much smaller (especially when Fs is muchlarger than fB) than the noise power of Nyquist sam-plers described in Eqn. 3-4.

Figure 4-3 compares the requirements of the anti-aliasing filter of one times and N times oversampledNyquist rate A/D converters. Sampling at theNyquist rate mandates the use of an anti-aliasing fil-ter with very sharp transition in order to provideadequate aliasing protection without compromisingthe signal bandwidth .

NB f( )df

fB–

fB

∫2fBFs-------q

2

12-----= =

fB

MOTOROLA

Page 26: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Fs

aliasing filter

--- 2Fs------

Fs/2

nse

trum of Oversampling

Fs/2 fB

Overall Noise Level:

In-Band Noise Level:

Note: One R-C lowpass filter is sufficient for the anti-

N f( ) q2

12------=

1Fs------

NB N f( )df

f– B

fB

∫qfB

2

12------= =

- Fs/2 - fB fB

N(f)

anti-aliasing filter’s frequency respo

(a)

(b)

Figure 4-2 Anti-Aliasing Filter Response and Noise SpecA/D Converters

MOTOROLA 4-5

Page 27: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

4-6

(

(b

fB

fN fs

Figure 4-3 Frequency

The transition band of the anti-aliasing filter of anoversampled A/D converter, on the other hand, ismuch wider than its passband, because anti-aliasingprotection is required only for frequency bands be-tween and , when N = 1, 2, ...,as shown in Figure 4-2(b). Since the complexity ofthe filter is a strong function of the ratio of the widthof the transition band to the width of the passband,oversampled converters require considerably sim-pler anti-aliasing filters than Nyquist rate converterswith similar performance. For example, with N = 64,a simple RC lowpass filter at the converter analog in-put is often sufficient as illustrated in Figure 4-2(a).

a) Nyquist rate A/D converters

) Oversampling A/D converters

f

Fs/2 = fN FsFs - fB Fs + fB

Response of Analog Anti-Aliasing Filters

NFs fB– NFs fB+

MOTOROLA

Page 28: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

olution

4375 0111=

lti - bit output

The benefit of oversampling is more than an eco-nomical anti-aliasing filter. The decimation processcan be used to provide increased resolution. To seehow this is possible conceptually, refer to Figure 4-4,which shows an example of 16:1 decimation pro-cess with 1-bit input samples. Although the inputdata resolution is only 1-bit (0 or 1), the averagingmethod (decimation) yields more resolution (4 bits[24 = 16]) through reducing the sampling rate by16:1. Of course, the price to be paid is high speedsampling at the input — speed is exchanged forresolution.

Sample Rate Reduction == >> More Res

101001011000101

16 1-bit inputs

16 : 1 decimation

average

716------ 0.==================>>

1 mu

Figure 4-4 Simple Example of Decimation Process

MOTOROLA 4-7

Page 29: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital
Page 30: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

“Deltamodulators,furthermore,exhibit slopeoverload for

rapidly risinginput signals,

and theirperformance is

thus dependenton the frequency

of the inputsignal.”

SECTION 5

Delta Modulation

The work on sigma-delta modulation was developedas an extension to the well established delta modula-tion [6]. Let’s consider the delta modulation/demodulation structure for the A/D conversion pro-cess. Figure 5-1 shows the block diagram of the deltamodulator and demodulator. Delta modulation isbased on quantizing the change in the signal fromsample to sample rather than the absolute value ofthe signal at each sample.

Since the output of the integrator in the feedback loopof Figure 5-1(a) tries to predict the input x(t), the inte-grator works as a predictor. The prediction error term,

, in the current prediction is quantizedand used to make the next prediction. The quantizedprediction error (delta modulation output) is integratedin the receiver just as it is in the feed back loop [7].That is, the receiver predicts the input signals asshown in Figure 5-1.

The predicted signal is smoothed with a lowpass filter.Delta modulators, furthermore, exhibit slope overloadfor rapidly rising input signals, and their performanceis thus dependent on the frequency of the input signal.In theory, the spectrum of quantization noise of theprediction error is flat and the noise level is set by the1-bit comparator. Note that the signal-to-noise ratiocan be enhanced by decimation processes as shown

x t( ) x t( )–

5-1

Page 31: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

5-2

1-bit

1∫

x(t)-

y(t) x t( )

x t( )

x (t)

x t( )

Σ-

+AnalogSignal

(a) Mod

(b) De

Channelinput

Figure 5-1 Delta Modu

in Figure 4-2. The Motorola MC3417 ContinuouslyVariable Slope Delta Modulator operation is basedon delta modulation.

quantizer

Channeloutput

x(t)

y(t)

1∫ulation

modulation

x(t)

LowpassFilter

y(t)

AnalogSignal

lation and Demodulation

fS T

x(t)

x t( )

MOTOROLA

Page 32: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

Sigma-Delta Modulation and Noise Shaping

1-b

Σ-+

AnalogSignal

M

AnalogSignal

1∫

Note: Two Integrators

Figure 6-1 Derivat

SECTION 6

“The noiseshaping

property is wellsuited to signal

processing...”

Delta modulation requires two integrators for modu-lation and demodulation processes as shown inFigure 6-1(a). Since integration is a linear operation,the second integrator can be moved before the mod-ulator without altering the overall input/outputcharacteristics. Furthermore, the two integrators inFigure 6-1 can be combined into a single integrator bythe linear operation property.

it quantizer

Channel

odulation

1∫

1∫ LowpassFilter

AnalogSignal

Demodulation(a)

Σ-

+

1∫

1-bit quantizer

Channel LowpassFilter

AnalogSignal

(b) (matched components)

ion of Sigma-Delta Modulation from Delta Modulation

6-1

Page 33: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

6-2

Integr

Σ-+

Mod

Σ-+

AnalogSignal

1∫

1S---

X(s)

Figure 6-2 Block Diag

The arrangement shown in Figure 6-2 is called aSigma-Delta (Σ−∆) Modulator [1]. This structure,besides being simpler, can be considered as beinga “smoothed version” of a 1-bit delta modulator.

The name Sigma-Delta modulator comes from puttingthe integrator (sigma) in front of the delta modulator.Sometimes, the Σ−∆ modulator is referred to as an in-terpolative coder [14]. The quantization noisecharacteristic (noise performance) of such a coder isfrequency dependent in contrast to delta modulation.As will be discussed further, this noise-shaping prop-erty is well suited to signal processing applicationssuch as digital audio and communication. Like delta

ation

ulation

LowpassFilter

Demodulation

1-bit quantizer

Channel LowpassFilter

AnalogSignal

Note: Only one integrator

Y(s)ΣX(s)+ +

N(s)

ram of Signa-Delta Modulation

MOTOROLA

Page 34: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

LowpassFilter

X(s)

filter

s filter

r

modulators, the Σ−∆ modulators use a simple coarsequantizer (comparator). However, unlike delta modu-lators, these systems encode the integral of the signalitself and thus their performance is insensitive to therate of change of the signal.

The noise-shaping principle is illustrated by a simpli-fied “s-domain” model of a first-order Σ−∆ modulatorshown in Figure 6-3. The summing node to the rightof the integrator represents a comparator. It’s herethat sampling occurs and quantization noise is add-ed into the model. The signal-to-noise (S/N)

integration

Σ-+

1s---

X(s)Y(s)Σ

+ +

N(s) : quantization noise

Signal Transfer Function:

(when N(s) = 0)

Noise Transfer Function:

(when X(s) = 0)

Y(s) = [X(s) - Y(s)] 1s--

Y s( )X s( )-----------

1s--

11s--+

------------ 1s 1+------------= = : lowpass

Y s( ) Y s( )1s--– N s( )+=

Y s( )N s( )----------- 1

11s--+

------------ ss 1+------------= = : highpas

Figure 6-3 S-Domain Analysis of Sigma-Delta Modulato

MOTOROLA 6-3

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6-4

transfer function shown in Figure 6-3 illustrates themodulator’s main action. As the loop integrates theerror between the sampled signal and the input sig-nal, it lowpass-filters the signal and highpass filtersthe noise. In other words, the signal is left unchangedas long as its frequency content doesn’t exceed thefilter’s cutoff frequency, but the Σ−∆ loop pushes thenoise into a higher frequency band. Grossly over-sampling the input causes the quantization noise tospread over a wide bandwidth and the noise densityin the bandwidth of interest (baseband) to significant-ly decrease.

Figure 6-4 shows the block diagram of a first-orderoversampled Σ−∆ A/D converter. The 1-bit digitaloutput from the modulator is supplied to a digital dec-imation filter which yields a more accuraterepresentation of the input signal at the output sam-pling rate of fs. The shaded portion of Figure 6-4 is afirst-order Σ−∆ modulator. It consists of an analog dif-ference node, an integrator, a 1-bit quantizer (A/Dconverter), and a 1-bit D/A converter in a feed backstructure. The modulator output has only 1-bit (two-levels) of information, i.e., 1 or -1. The modulator out-put y(n) is converted to by a 1-bit D/Aconverter (see Figure 6-4).

The input to the integrator in the modulator is thedifference between the input signal x(t) and thequantized output value y(n) converted back to thepredicted analog signal, x(t). Provided that the D/Aconverter is perfect, and neglecting signal delays,

x t( )

MOTOROLA

Page 36: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Digitalecimation

Filter 16x(n)

100 kHz(16 bits)

/D converter

Fs : fs

this difference between the input signal x(t) and thefed back signal x(t) at the integrator input is equal tothe quantization error. This error is summed up inthe integrator and then quantized by the 1-bit A/Dconverter. Although the quantization error at everysampling instance is large due to the coarse natureof the two level quantizer, the action of the Σ−∆modulator loop is to generate a output whichcan be averaged over several input sample periodsto produce a very precise result. The averaging isperformed by the decimation filter which follows themodulator as shown in Figure 6-4.

The waveforms of x(t) and y(n) for a first-order Σ−∆modulator are illustrated in Figure 6-5 when the in-put signal is a sinusoid. The modulator performsboth the sampling and the quantization operation inthis example, as is typical for circuit implementa-tions of Σ−∆ modulators. In each clock cycle, thevalue of the output of the modulator is either plus orminus full scale, according to the results of the 1-bitA/D conversion. When the sinusoidal input to the

Σ-

+1∫ D

1-bitD/A

y(n)Fs

6.4 MHz(1 bit)

x(t)

y(t)

loopΣ∆First order

1

Figure 6-4 Block Diagram of First-Order Sigma-Delta A

MOTOROLA 6-5

Page 37: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

6-6

Figure 6-5 Input and

0.6

0.4

0.2

0.0

-0.2

-0.4

-0.6

0 50

modulator is close to a plus full scale, the output ispositive during most clock cycles. A similar state-ment holds for the case when the sinusoid is closeto minus full scale. In both cases, the local averageof the modulator output tracks the analog input.When the input is near zero, the value of the modu-lator output varies rapidly between a plus and aminus full scale with approximately zero mean.

Output of a First-Order Sigma-Delta Modulator

100 150 200 250 300

TIME [t/T]

MOTOROLA

Page 38: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

ion Noise)

Y(z)

Y(z)

z-1

-1= > X + Q(1 -z-1)

out-of-band

per

input withshaped noise

6.1 Analysis of Sigma-Delta Modulation in the Z-Transform Domain

Consider the first-order loop shown in Figure 6-6.The z-domain transfer function of an integrator is de-noted by I(z) and the 1-bit quantizer is modeled asan additive noise source. Standard discrete-timesignal analysis yields:

Eqn. 6-2

Y z( ) Q z( ) I z( ) X z( ) z1–

Y z( )–[ ]+=

X(z) Σ-

Q (Quantizat

z-1

I(z)

integrator

quantizer

ΣX(z) Σ

z-1

Q

-

+ X - Yz-1X - Yz-1

1 -z-1 ++ Y = Q +X - Y

1 -z

integrator

quantizer

1

1 z 1––----------------

Note: In-band quantization noise is moved

Figure 6-6 Z-Domain Analysis of First-Order Noise-Sha

(a)

(b)

MOTOROLA 6-7

Page 39: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

6-8

Y z( ) =

and can be solved for Y(z) as:

Eqn. 6-3

Since an ideal integrator is defined as:

Eqn. 6-4

the first-order Σ−∆ loop output can be simplified to:

Eqn. 6-5

Since the quantization noise is assumed to be ran-dom, the differentiator (1-z-1) shown in Eqn. 6-5doubles the power of quantized noise. However, theerror has been pushed towards high frequenciesdue to the differentiator, (1-z-1), factor. Therefore,provided that the analog input signal to the modula-tor, x(t), is oversampled, the high-frequencyquantization noise can be removed by digital low-pass filters without affecting the input signalcharacteristics residing in baseband. This lowpassfiltering is part of the decimation process.

That is, after the digital decimation filtering pro-cesses, the output signal has only the frequencycomponents from 0 Hz to fB. Thus, the perfor-mance of first-order Σ−∆ modulators can becompared to the conventional 1-bit Nyquist sam-plers and the delta-modulation type oversamplers.

X z( ) I z( )1 I z( )z

1–+------------------------- Q z( ) 1

1 I z( )z1–+

-------------------------+

I z( ) 1

1 z1––

---------------=

Y z( ) X z( ) 1 z1––( )Q z( )+=

MOTOROLA

Page 40: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

quist Samplers

samplers

ise-Shaped Oversamplers

ta Modulator

e Shaper

Figure 6-7 shows the spectrum of a first-order Σ−∆noise-shaper described in Figure 6-6. As shown inFigure 6-7, the baseband (up to fB) noise of the Σ−∆converters appears to be much smaller than Nyquistsamplers or delta modulators. However, for the firstorder modulator discussed, the baseband noisecan not reach below the -96 dB signal-to-noise ra-tio needed for 16-bit A/D converters.

The higher order cascaded (feed-forward) Σ−∆ mod-ulators have been introduced and implemented [8-10]. The block diagrams of second and third orderΣ−∆ modulators are shown in Figure 6-8. Sincethese cascaded structures use a noise feed-forwardscheme, the system is always stable and the analy-sis is simpler compared to the second-orderfeedback Σ−∆ modulators [11-13] and higher orderinterpolative coders with feedback loops [14,15].When multiple first-order Σ−∆ loops are cascaded toobtain higher order modulators, the signal that ispassed to the successive loop is the error term from

In-Band noise of Ny

In-Band noise Over

In-Band noise of No

First order Sigma-Del

Oversampler

Frequency

PowerDensity

NyquistSampler (1 bit)

fB FS/2

Figure 6-7 Spectrum of a First-Order Sigma-Delta Nois

MOTOROLA 6-9

Page 41: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

6-10

Figure 6-8 Second-O

First order Nois

First orde

F

(b) T

x(t)

Q1

Q2

First order N

First or

x(t)

Q1

the current loop. This error is the difference betweenthe integrator output and the quantization output.

If the input signals to the second and third stageΣ−∆ loops are Q1 and Q2, respectively, the quanti-zation output for the second order Σ−∆ modulator isgiven by:

Eqn. 6-6

which yields the second-order Σ−∆ modulator outputshown in Figure 6-8(a) as:

Eqn. 6-7

where: Y(z) is the z-transform of y(n) which is the sampled and quantized signal of x(t) at t = n

rder and Third-Order Sigma-Delta Noise Shapers

e Shaper

r Noise Shaper

(a) Second-Order Noise Shaper

Bit

manipulation

node

irst order Noise Shaper

hird-Order Sigma-Delta Noise Shaper

y(n)

y(n)

y1(n)

y2(n)

y1(n)

y2(n)

y3(n)

oise Shaper

der Noise Shaper

Bit

manipulation

node

Y2 z( ) Q1 z( ) 1 z1––( )Q2 z( )+=

Y z( ) X z( ) 1 z1––( )

2Q2 z( )+=

MOTOROLA

Page 42: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

Similarly, for the third order Σ−∆ modulator:

Eqn. 6-8

and, after combining the individual output terms weobtain:

Eqn. 6-9

where: Q3 is the quantization noise from the third Σ−∆ loop

Essentially, the noise shaping function in a Σ−∆modulator is the inverse of the transfer function ofthe filter [1-z-1]-1 in the forward path of the modula-tor. A filter with higher gain at low frequencies isexpected to provide better baseband attenuation forthe noise signal. Therefore, modulators with morethan one Σ−∆ loop such as the third-order systemshown in Figure 6-8(b), perform a higher order dif-ference operation of the error produced by thequantizer and thus stronger attenuation at low fre-quencies for the quantization noise signal. Thenoise shaping functions of second-order and third-order modulators are compared to that of a first-ordersystem in Figure 6-9. The baseband quantization er-ror power for the third-order system is clearly smallerthan for the first-order modulator.

The above analysis can be extended to yield quantita-tive results for the resolution of Σ−∆ modulators,provided that the spectral distribution of the quantiza-tion error q(n) is known. It has been shown that theerror generated by a scalar quantizer with quantization

Y3 z( ) Q2 z( ) 1 z1––( )Q3 z( )+=

Y z( ) X z( ) 1 z1––( )

3Q3 z( )+=

MOTOROLA 6-11

Page 43: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

6-12

levels equally spaced by q is uncorrelated, assum-ing that the number of quantization levels is largeand the quantized signal is active [16,17]. This resultis not rigorously applicable to Σ−∆ modulators, how-ever, because Σ−∆ quantizers only have two levels.Hence, the noise and signal are somewhat correlat-ed. Nevertheless, analysis based on thisuncorrelated assumption yields correct results inmany cases. Often these analytical results provide amore intuitive interpretation for the operation of themodulator than those obtained from computer simu-lations. The latter, however, will always bepresented to demonstrate the correctness of the an-alytical result in a particular case.

The performance of this triple cascaded structurecan also be compared by inputting a single sinusoi-dal signal to the structure and plotting the spectra.Figure 6-10 shows the frequency response of thethree modulator outputs. The frequency ranges ofthe x-axis is up to half of the input sampling frequen-cy (3.2 MHz for 6.4 MHz input sampling rate). Notethat the frequency of interest is up to 50 kHz whichis a very small portion of the plots.

MOTOROLA

Page 44: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

rder Σ∆ Modulator

FS/2

rder Σ∆ Modulator

rder Σ∆ Modulator

and noise

rs

) Third order sigma-delta

filters

First O

Oversampler

Frequency

Nyquist Sampler (1 bit)

fB

Second O

Third O

Figure 6-9 Multi-Order Sigma-Delta Noise Shapers

Note: Higher order Noise Shaper has less baseb

Figure 6-10 Spectra of Three Sigma-Delta Noise Shape

(a) First order sigma-delta (b) Second order sigma-delta (c

NOTE: Frequency band of interest (in-band): 0 - 5 kHzRest of frequency band will be removed by digital decimation

MOTOROLA 6-13

Page 45: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital
Page 46: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

MOTOROLA

SECTION 7

Digital Decimation Filtering

“The simplestand most

economicalfilter to reduce

the inputsampling rate isa ‘Comb-Filter’

because it doesnot require a

multiplier.”

Filtering noise which could be aliased back into thebaseband is the primary purpose of the digital filter-ing stage. Its secondary purpose is to take the 1-bitdata stream that has a high sample rate and trans-form it into a 16-bit data stream at a lower samplerate. This process is known as decimation. Essen-tially, decimation is both an averaging filter functionand a rate reduction function performed simulta-neously.

The output of the modulator is a coarse quantizationof the analog input. However, the modulator is over-sampled at a rate that is as much as 64 times higherthan the Nyquist rate for the DSP56ADC16. Highresolution is achieved by averaging over 64 datapoints to interpolate between the coarse quantiza-tion levels of the modulator. The process ofaveraging is equivalent to lowpass filtering in the fre-quency domain. With the high frequencycomponents of the quantization noise removed, theoutput sampling rate can be reduced to the Nyquistrate without aliasing noise into the baseband.

7-1

Page 47: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7-2

Three basic tasks are performed in the digital filtersections:

1. Remove shaped quantization noise: The Σ−∆modulator is designed to suppress quantizationnoise in the baseband. Thus, most of thequantization noise is at frequencies above thebaseband. The main objective of the digital filteris to remove this out-of-band quantization noise.This leaves a small amount of basebandquantization noise and the band-limited inputsignal component. Reducing the basebandquantization noise is equivalent to increasingthe effective resolution of the digital output.

2. Decimation (sample rate reduction): The outputof the Σ−∆ modulator is at a very high samplingrate. This is a fundamental characteristic of Σ−∆modulators because they use the highfrequency portion of the spectrum to place thebulk of the quantization noise. After the highfrequency quantization noise is filtered out, it ispossible to reduce the sampling rate. It isdesirable to bring the sampling rate down to theNyquist rate which minimizes the amount ofinformation for subsequent transmission,storage, or digital signal processing.

3. Anti-aliasing: In practice, the input signals areseldom completely band-limited. Since themodulator is sampling at a rate much higherthan the output Nyquist rate, the analog anti-aliasing filter before the modulator can roll offgradually. When the digital processor reducesthe sampling rate down to the Nyquist rate, itneeds to provide the necessary additionalaliasing rejection for the input signal as opposedto the internally generated quantization noise.

There are a number of factors that make it difficultto implement the digital decimation filter. The inputsampling rate of the modulator is very high and the

MOTOROLA

Page 48: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

digital decimation filter must perform computation-

ally intensive signal processing algorithms in real

time. Furthermore, higher order modulators pro-

duce highly shaped noise as indicated in the

spectrum shown in Figure 6-7 and Figure 6-8.

Thus, the decimation filter must perform very well

to remove the excess quantization noise. Applica-

tions like high quality audio conversion impose the

additional constraint that the digital signal pro-

cessing must perform its task without distorting the

magnitude and phase characteristics of the input

signal in the baseband. The goal is to implement

the digital filter in a minimum amount of logic and

make it feasible for monolithic implementation.

The simplest and most economical filter to reduce

the input sampling rate is a “Comb-Filter”, because

such a filter does not require a multiplier. A multipli-

er is not required because the filter coefficients are

all unity. This comb-filter operation is equivalent to

a rectangular window finite impulse response (FIR)

filter. However, the comb-filter is not very effective

at removing the large volume of out-of-band quanti-

zation noise generated by the Σ−∆ modulators and

is seldom used in practice without additional digital

filters. Also, the frequency response of the comb-fil-

ter can cause substantial magnitude drooping at the

upper region of baseband. For many applications

which cannot tolerate this distortion, the comb-filter

must be used in conjunction with one or more addi-

tional digital filter stages.

MOTOROLA 7-3

Page 49: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7-4

Σ−∆ loop

1-

AnalogInput

Figure 7-1 Digital Dec

In the DSP56ADC16 a total of two filter sections

were used as follows [10]:

1. The sampling rate from the Σ−∆ modulator isreduced by a factor of 16 with the comb-filtersection as shown in Figure 7-1. A four-stagecomb-filter was used to decimate the third ordermodulator on the DSP56ADC16 [17,18].

2. The second section is a FIR lowpass filter withsymmetric coefficient values to maintain alinear-phase response. It provides 4:1decimation and magnitude compensation for themagnitude change (droop) from the comb-filteroutput. The FIR filter coefficients are alsocomputed to equalize the baseband frequencyresponse to within dB of a flatresponse.

s16:1

Comb Filter4:1

FIR Filter

6.4 MHzbit Resolution

400 kHz12-bit Resolution

100 kHz16-bit Resolution

161 16Digital

Outputs

imation Process

0.001±

MOTOROLA

Page 50: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7.1 Comb-Filter Design as a Decimator

A comb-filter of length N is a FIR filter with all N co-efficients equal to one. The transfer function of acomb-filter is:

Eqn. 7-1

For N = 4 Eqn. 7-1 becomes:

Eqn. 7-2

Clearly the filter is a simple accumulator whichperforms a moving average. Using the formula fora geometric sum Eqn. 7-1 can be expressed inclosed form as:

Eqn. 7-3

or, in the discrete-time domain for N = 4:

Eqn. 7-4

Using this recursive form the number of additionshas been reduced to become independent of N.The closed form solution in Eqn. 7-3 can be fac-tored into two separate processes-integrationfollowed by differentiation as shown in Eqn. 7-5 :

Eqn. 7-5

H z( ) zn–

n 0=

N 1–

∑ Y z( )X z( )-----------= =

y n( ) x n( ) x n 1–( ) x n 2–( ) x n 3–( )+ + +=

H z( ) 1 zN–

1 z1–

–------------------ Y z( )

X z( )-----------= =

y n( ) x n( ) x n 4–( )– y n 1–( )+=

y z( ) 1

1 z1–

–----------------- 1 z

N––[ ] x z( )=

MOTOROLA 7-5

Page 51: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7-6

Figure 7-2 Block Dia

Fs

Inputsample rate

Integra

1

1 z–------------

Now, since the comb filter will be followed by an N:1decimator, the differentiation function can be done atthe lower rate. This discussion for a general N:1comb-filter decimator is shown in Figure 7-2. Notethat the accumulator can overflow however, as longas the final output does not overflow (i.e., the filter isscaled properly for unity gain) and two’s complementor “wrap around” arithmetic is used, the accumulatoroverflow will not cause an error [18,19].

The transfer function and magnitude response of acomb-filter with the filter window length N = 16 fol-lowed by a 16:1 decimation process are shown inFigure 7-3. In summary the comb-filter decimatorhas the following advantages:

• no multipliers are required

• no storage is required for filter coefficients

• intermediate storage is reduced by integratingat the high sampling rate and differentiating atthe low sampling rate, compared to theequivalent implementation using cascadeduniform FIR filters

• the structure of comb-filters is very “regular”consisting of two basic building blocks

• little external control or complicated local timingis required

gram of One-Stage Comb Filtering Process

Fs Fs/N Fs/N

Differentiator Outputsample rate

tor Decimation

1–------ N : 1 1 z 1––

MOTOROLA

Page 52: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

0k 1600k

Multiplications

efficient Storage

inear Phase

• the same filter design can easily be used for awide range of rate change factors, N, with theaddition of a scaling circuit and minimalchanges to the filter timing

A single comb-filter stage usually does not haveenough stop-band attenuation in the region of inter-est to prevent aliasing after decimation. However,cascaded comb-filters can be used to give enoughstop-band attenuation. Figure 7-4 shows a struc-ture of four cascaded comb filter sections and theresulting spectrum compared to lower order comb-fil-ter stages. This realization needs eight registers fordata and 4(N+1) additions per input for computation.

400k 800k 120

-10

-20

-30

-40

0dB

frequency

y n( ) x n i–( )i 0=

15

∑=

Y z( ) 1 z 16––

1 z 1––---------------------X z( )=

: Moving Average Process

Figure 7-3 Transfer Function of a Comb-Filter

No

No Co

L

MOTOROLA 7-7

Page 53: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7-8

Figure 7-4 Cascade

Fs

1

1 z 1––----------------1

1 z 1––----------------

Four Inte

There are considerable advantages in both storageand arithmetic for this kind of comb decimator realiza-tion. This approach is also attractive because thecomb decimation filter delivers not only a much fastersample rate with 12 bits of dynamic resolution, butalso an untruncated or arithmetically undistorted 16-bitoutput. SECTION 8 discusses an application whichtakes advantage of this comb-filter output.

d Structure of a Comb-Filter

Fs/N

N : 1 1 z 1––1

1 z 1––---------------- 1

1 z 1––----------------

1 z 1–– 1 z 1–– 1 z 1––

gers Decimation Four Differentiators

MOTOROLA

Page 54: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

2500 3200

2500 3200

2500 3200

Filter

r

Outputsolution)

Figure 7-5 Aliased Noise in Comb-Filter Output

0 500 1000 20001500frequency in kHz

0

-60

-100

-140

-20

0 500 1000 20001500

0

-60

-100

-140

-20

frequency in kHz

frequency in kHz0 500 1000 20001500

0

-60

-100

-140

-20

(a) Noise Spectrum of 1-Bit Input to comb

(b) Spectrum of 4-Stage Comb Filte

(c) Noise Spectrum of 16-bit Comb Filter (-72 dB Noise Power: 12-bit Dynamic Re

MOTOROLA 7-9

Page 55: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7-10

Figure 7-5(a) shows the third-order Σ−∆ noise shaperoutput spectrum; the four-stage comb-filter magnituderesponse is illustrated in Figure 7-5(b). Thus, the theo-retical quantized noise filtered by the four-stage comb-filter can be computed as shown in Figure 7-5(c). Aftera 16:1 decimation process, the noise in the frequencyband from 200 kHz to 1.6MHz will be aliased back tobaseband of up to 200 kHz. The numerical summationof total noise in Figure 7-5(c) is around -72 dB S/N ratiowhich yields a linear 12-bit dynamic resolution.

7.2 Second Section Decimation FIR Filter

The first comb-filter section decimates the Σ−∆modulator output to the intermediate rate of 400kHz (assuming a master clock at 12.8 MHz) andthe second filter section provides the sharp filter-ing necessary to reduce the frequency aliasingeffect when the sampling rate is decimated downto 100 kHz while the resolution becomes 16 bit.The second filter section has two different tasks toperform. The first task is 4:1 decimation lowpassfiltering with 0.001 dB ripple up to 45.5 kHz andmore than -96 dB cutoff attenuation above 50 kHz.The stop-band attenuation of -96 dB is sufficient be-cause the quantization noise level has not yetreached its full magnitude as shown in Figure 6-10(c).The second task is the passband response compen-sation for the droop introduced by the “comb-filter”section. Figure 7-6(a) shows the magnitude droop

MOTOROLA

Page 56: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

esponse

Baseband

by the fourth order cascaded comb filter section,while Figure 7-6(b) shows the compensation filter re-sponse up to cutout frequency.

(b) Compensation FIR Filter Magnitude R

(a) Comb-Filter Magnitude Response in

Figure 7-6 Magnitude Response

MOTOROLA 7-11

Page 57: APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital

7-12

Figure 7-7 FIR Filter

Although FIR filters take more time to perform thedecimation filtering process than infinite impulseresponse (IIR) filters for the same passband andout-of-band frequency characteristics, FIR filterscan be designed to have a linear-phase responsewhich is required for high-end audio and instru-mentation applications.

Design techniques for calculating the FIR filtercoefficients with linear-phase response are welldocumented [5,20]. Figure 7-7 shows the frequencyresponse of a low-pass FIR filter with 255 symmetriccoefficients using a computer optimized procedure.This filter provides a stop-band attenuation of -96 dBwith a maximum passband ripple of 0.001dB whichmeets the filter requirement as defined in theDSP56ADC16 datasheet [21]. However, the

Magnitude Response

0.0005 dB

passbandripple

MOTOROLA

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nds

1400 1600

actual second section FIR filter coefficients arecomputed by the combination of the compensationfilter and the lowpass filter.

Figure 7-8 shows the frequency bands and the fi-nal quantized noise level which would havealiased back to baseband after 64:1 decimationby the comb-filter section and the second 4:1decimation section. When the one-pole RC ana-log lowpass filter is implemented at the analoginput terminals as discussed in SECTION 4, thepower of the aliased frequency band shown inFigure 7-8 will be less than -96 dB. In fact, thetheoretical and numerical computations showthat total aliased power after the final decimationprocess is around -110 dB S/N ratio. ■

Figure 7-8 Aliased Noise Bands of FIR Filter Output

aliased frequency ba

: 4-Stage Comb + FIR Filter

0 200 400 600 800 1000 1200

0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

Mag

nitu

de (

dB)

Frequency (kHz)

MOTOROLA 7-13

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7-14

MOTOROLA
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MOTOROLA

Mode Resolution by Filtering the Comb-Filter Output with Half-Band Filters

SECTION 8

“The half-bandfilter is based on

a symmetricalFIR design andapproximately

half of the filtercoefficients are

exactly zero.Hence, thenumber of

multiplicationsin implementing

such filters isone-fourth of that

needed forarbitrary FIR

filter designs.”

This section explains how to obtain 18-20 bit resolu-tion from the comb-filter output. In particular, a serieshalf-band filter structure is suggested to take advan-tage of a third-order noise-shaper combined withoversampling. Figure 8-1 shows the spectrum of athird-order noise-shaper whose input-output equationis defined in Eqn. 6-8. The transfer function (1 - z-1)3

in Eqn. 6-8 for the quantization noise is essentially ahighpass filter so that the noise is shifted to higher,out-of-band, frequencies where it is then digitally fil-tered out.

At the final arithmetic operation for the FIR filter out-put, a 38-bit accumulator value is convergentlyrounded to fit into the 16-bit output data format. Thus,the shaped noise shown in Figure 8-1 becomes al-most flat at the 16-bit level due to the arithmeticrounding noise. Although the comb-filter output hasonly 12-bit resolution, the 16-bit output value is not yetarithmetically rounded or truncated. Thus, the input

8-1

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8-2

Figure 8-1 Spectrum

flat re

pow

er in

dB

signal and the baseband spectral shape of thethird-order noise shaper are unchanged, as shownin Figure 8-2. Since the comb-filter is designed toobtain maximum attenuation only on the higher fre-quency components which will be aliased into thefrequency band of interest after 16:1 decimation[18], the characteristic of the analog input signal ispreserved, while the out-of-band shaped noiseshown in Figure 8-1 has been attenuated.

The output from most conventional converters in-cluding the FIR filter output of the DSP56ADC16,has a flat background noise due to the quantizationnoise as well as arithmetic rounding noise. Thus,further decimation processes can only gain 3 dB or

of a Third-Order Noise Shaper (16384 FFT bins)

sponse due to the FIR filter arithmetic rounding

MOTOROLA

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6 FFT bins)

1/2 bit more resolution per octave. In other words,a further 16:1 or 256:1 decimation process of the16-bit resolution output signal is required to obtain18-bit resolution at 6.25 kHz sample rate or 20-bitresolution at 400 Hz sample rate, respectively,which is very impractical. By taking advantage ofthe fact that the noise is shaped in the comb-filteroutput, 9 dB or 1.5 bit more resolution per octavecan be theoretically achieved. Thus, a further 16:1or 64:1 decimation process can provide 18-bit res-olution at 25 kHz sample rate or 20-bit resolution at6.25 kHz sample rate, respectively. (This assumesquantization noise is dominant.)

Figure 8-2 Spectrum of Typical Comb-Filter Output (409

MOTOROLA 8-3

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8-4

Table 8-1 Parameters fo

StageOutputsample

ratePassban

1 200k 3k

2 100k 3k

3 50k 3k

4 25k 3k

5 12.5k 3k

6 6.25k 2.9k

Total number of instruc

Figure 8-3 illustrates the cascaded half-band filterdesign specification for a 64:1 decimation process.The number of instructions to run the filters on theDSP56001 and the memory requirements are tabu-lated in Table 8-1. A cascaded half-band filterstructure is used for computational simplicity [22].The half-band filter is based on a symmetrical FIRdesign and approximately half of the filter coeffi-cients are exactly zero. Hence, the number ofmultiplications in implementing such filters is one-fourth of that needed for arbitrary FIR filter designs.Since a half-band filter can only implement a 2:1decimation, a series of such filters may be cascad-ed to perform a higher decimation filter process.

r Designing Half-Band Filters

d Stopband # of taps# of coef in RAM

# of MAC

# of instructions per second

197k 19 6 11 11x200k=2.2M

97k 19 6 11 11x100k=1.1M

47k 19 6 11 11x50k=550K

22k 23 7 13 13x25k=325K

9.5k 31 9 17 17x12.5k=212.5K

3.55k 199 51 99 99x6.25k=618.75K

tions for 6 half-band filters per second : 5.007 MIPS

MOTOROLA

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400k

200k

100k

50k

25k

.5k

and Filters

To obtain more than a 16-bit resolution signal output,a processor with more than 16-bit coefficient word-width is required. Fortunately, the DSP56001 gener-al purpose DSP processor has a hardware multiply-accumulate unit that is able to multiply 24-bit dataand 24-bit coefficient, and accumulate 56 bits in justone instruction, which is useful for half-band filter op-erations. The DSP56001 architecture alsoprovides parallel data buses, circular buffers, andlarge on-chip memories along with a 75 ns instruc-tion cycle, which fits nicely for the proposed filterstructure [23]. Detailed discussion on this topiccan be found in [24].

200k

100k

50k

25k

6.25k

12.5k

Stage 1

Stage 2

Stage 3

Stage 4

Stage 5

Stage 6

3k

3.125k

3k

3k

3k

3k

12

Figure 8-3 Decimation Process using a Series of Half-B

MOTOROLA 8-5

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MOTOROLA 9-1

SECTION 9

Sigma-Delta conversion technology is based onoversampling, noise shaping, and decimation filtering.There are many inherent advantages in Σ−∆ basedanalog-to-digital converters. The major advantage be-ing that it is based predominantly on digital signalprocessing, hence the cost of implementation is lowand will continue to decrease. Also, due to its digitalnature Σ−∆ converters can be integrated onto otherdigital devices. Manufacturing technology notwith-standing, Σ−∆ technology offers system cost savingsbecause the analog anti-aliasing filter requirementsare considerably less complex and the sample-and-hold circuit is intrinsic to the technology due to the highinput sampling rate and the low precision A/D conver-sion. Since the digital filtering stages reside behind theA/D conversion, noise injected during the conversionprocess, such as power-supply ripple, voltage-refer-ence noise, or noise in the ADC itself, can becontrolled. Also, Σ−∆ converters are inherently linearand don’t suffer from appreciable differential non-lin-earity, and the background noise level which sets thesystem S/N ratio is independent of the input signal lev-el. The last, but certainly not least, consideration iscost. Attaining a high level of performance at a fractionof the cost of hybrid and modular designs is probablythe greatest advantage of all. ■

Summary

“. . . Σ−∆technology offers

system costsavings because

the analog anti-aliasing filterrequirements

are considerablyless complex . . .”

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MOTOROLA

REFERENCES

[1] H. Inose, Y. Yasuda and J. Marakami, “A teleme-tering system by code modulation, delta-sigmamodulation,” IRE Trans. on Space, Electronicsand Telemetry, SET-8, pp. 204-209, Sept. 1962.

[2] H. Nyquist, “Certain topics in telegraph transmis-sion theory,” AIEE Trans., pp. 617-644, 1928.

[3] M. Armstrong, et al, “A COMS programmableself-calibrating 13b eight-channel analog inter-face processor,” ISSCC Dig. Tech. Paper, pp.44-45, Feb. 1987.

[4] K. Lakshmikumar, R. Hadaway, and M. Cope-land, “Characterization and modeling ofmismatch in MOS transistors for precision ana-log design,” IEEE J. Solid-State Circuits, Vol.SC-21, pp. 1057-1066, Dec. 1986.

[5] N. Ahmed and T. Natarajan, Discrete-Time Sig-nals and Systems, Prentice-Hall, EnglewoodCliffs, NJ, 1983.

[6] R. Steele, Delta Modulation Systems, PentechPress, London, England, 1975.

[7] N. Scheinberg and D. Schilling, “Techniques forcorrecting transmission error in video adaptivedelta-modulation channels,” IEEE Trans. Com-mun., pp. 1064-1070, Sept. 1977.

[8] Y. Matsuya, et al, “A 16 bit oversampling A-to-Dconversion technology using triple-integrationnoise shaping,” IEEE J. of Solid-State Circuits,Vol. SC-22, No. 6, pp. 921-929, Dec. 1987.

References-1

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References-2

[9] M. Rebeschini et al, “A high-resolution CMOSSigma-Delta A/D converter with 320 kHz out-put rate,” Proc. ISCAS, pp. 246-249, 1989.

[10] C. D. Thompson, “A VLSI sigma delta A/D con-verter for audio and signal processingapplications,” Proc. Int. Conf. on Acoustic,Speech and Signal Processing, Vol. 4. pp. 2569-2572, Glasgow, Scotland, May 23-26, 1989.

[11] J. C. Candy, “A use of double integration inSigma-Delta modulation,” IEEE Trans. onCommunications, Vol. COM-33, No. 3, pp.249-258, March 1985.

[12] R. Koch, et al, “A 12-bit Sigma-Delta analog-to-digital converter with a 15-MHz clock rate,”IEEE J. of Solid-State Circuits, Vol. SC-21, No.6, pp. 1003-1010, Dec. 1986.

[13] B. Boser and B. Wooley, “Quantization errorspectrum of Sigma-Delta modulators,” Proc.International Symposium on Circuits and Sys-tems, pp. 2331-2334, June, 1988.

[14] W. L. Lee and C. G. Sodini, “A topology forhigher order interpolative coders,” Proc. Inter-national Symposium on Circuits and Systems,pp. 459-462, May 1987.

[15] D. R. Welland, et al, “A stereo 16-bit delta-sigmaA/D converter for digital audio,” Proc. the 85thconvention of Audio Engineering Society, Vol.2724 (H-12), Los Angeles, CA, Nov. 3-6, 1988.

[16] W. Bennett, “Spectra of quantized signals,”Bell Syst. Tech. J., Vol. BSTJ-27, pp. 446-472,July 1948.

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[17] B. Widrow, “A study of rough amplitude quan-tization by means of Nyquist sampling theory,”IRE Trans. Circuit Theory, Vol. CT-3, pp. 266-276, Dec. 1956.

[18] E. B. Hogenauer, “An economical class of dig-ital filters for decimation and interpolation,”,IEEE Trans, Acoust. Speech Signal Process.,Vol. ASSP-29, No. 2, pp. 155-162, April 1981.

[19] S. Chu and C. S. Burrus, “Multirate filter de-signs using comb filters,” IEEE Trans. onCircuits and Systems, Vol. CAS-31, No. 11,pp. 913-924, Nov. 1984.

[20] A. V. Oppenheim and R. W. Schafer, Discrete-time signal processing, Prentice-Hall, Engle-wood Cliffs, NJ, 1989.

[21] Motorola Inc., DSP56ADC16 Technical DataSheet (DSP56ADC16/D), 1989.

[22] R. E. Crochiere and L. R. Rabiner, MultirateDigital Signal Processing, Prentice-Hall, En-glewood Cliffs, NJ, 1983.

[23] Motorola Inc., DSP56000/DSP56001 DigitalSignal Processor User’s Manual, Rev. 2, 1990.

[24] S. Park, “A real-time implementation of half-band filters to obtain 18-20 bit resolution fromthe DSP56ADC16 Sigma-Delta A/D convert-er,” Proc. International Conference onAcoustics, Speech and Signal Processing,Vol. 2. pp. 989-992, Albuquerque, NM, April 3-6, 1990. ■

MOTOROLA References-3

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