arithmetic and logic chapter 5

AVR Microcontroller and Embedded System Using Assembly and CMazidi, Naimi, and Naimi

© 2011 Pearson Higher Education,Upper Saddle River, NJ 07458. • All Rights

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Arithmetic and LogicArithmetic and LogicChapter 5Chapter 5

The AVR microcontrollerand embedded

systemsusing assembly and c



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ObjectivesObjectives

• The concept of signed numbers and 2’complement

• Addition and subtraction instructions• Carry and overflow• Logical instruction and masking• Compare instruction and branching• Shift, Rotate and Data serialization• BCD, Packed BCD and ASCII conversion.



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Some ideasSome ideas

• 100 – 34 = ?• 99 – 34 = ?• 100 – 34 = (99-34) + 1

• 34 – 19 = ?• 34 +100 -19 – 100 = 34 + (99-19)+1 -100



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• 100000000 – 00101101 = ?• =011111111 – 00101101 + 1 =A

• 010110110 – 00101101 =• 010110110 + A – 100000000 =



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ADD instructionsADD instructions

ADD Rd,Rr ;Rd = Rd + Rr ( Direct or immediate are not supported)



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ADC instructionsADC instructions



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SUB instructionSUB instruction

SUB Rd,Rr ;Rd = Rd - Rr ( immediate are not supported)SUB Rd,Rr ; Rd = Rd – K



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SBC instructionSBC instruction

SBC Rd,Rr ;Rd = Rd – Rr-C ( immediate are not supported)SBIc Rd,Rr ;Rd = Rd – K-C

27 62 (H)- 11 96 (H) ----------- 11 CC (H)



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Multiplication and DivisionMultiplication and Division



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Logic InstructionsLogic Instructions

AND Rd,Rr ;Rd = Rd AND Rr

OR Rd,Rr ;Rd = Rd OR Rr

EOR Rd,Rr ;Rd = Rd XOR Rr ( immediate are not supported)

COM Rd,Rr ;Rd = 1’ Complement of Rd (11111111 – Rd)

NEG Rd,Rr ;Rd = 2’ Complement of Rd (100000000 – Rd)

• AND is used to clear an specific bit/s of a byte• OR is used to set an specific bit/s of a byte



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Setting and Clearing bitsSetting and Clearing bits

AND Rd,Rr ;Rd = Rd AND Rr

OR Rd,Rr ;Rd = Rd OR Rr

EOR Rd,Rr ;Rd = Rd XOR Rr ( immediate are not supported)

COM Rd,Rr ;Rd = 1’ Complement of Rd (11111111 – Rd)

NEG Rd,Rr ;Rd = 2’ Complement of Rd (100000000 – Rd)

• AND is used to clear an specific bit/s of a byte• OR is used to set an specific bit/s of a byte

ORAND



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Branch and CP InstructionsBranch and CP Instructions

CP Rd,Rr ;Rd – Rr (only flags are set)

• BRVC is used to branch when oVerflow is clear to zero• BRVS is used to branch when oVerflow is set to one



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ROR instructionROR instruction

In ROR, as bits are rotated from left to right, the carry flag enters the MSBand the LSB exits to the carry flag. In other words, in ROR the C is moved to the MSB, and the LSB is moved to the C.

CLC ;make C = 0 (carry is 0 )LDI R20 , 0x26 ;R20 = 0010 0110ROR R20 ;R20 = 0001 0011 C = 0ROR R20 ;R20 = 0000 1001 C = 1ROR R20 ;R20 = 1000 0100 C = 1

See what happens to 0010 0110 after running 3 ROR instructions:

ROR Rd ;Rd (only flags are set)



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ROL instructionROL instruction

ROL. In ROL, as bits are shifted from right to left, the carry flag enters the LSB and the MSB exits to the carry flag. In other words, in ROL the C is moved to the LSB, and the MSB is moved to the C.

SEC ;make C = 1 (carry is 0)LDI R20,0x15 ;R20 = 0001 0101ROL R20 ;R20 = 0010 1011 C = 0ROL R20 ;R20 = 0101 0110 C = 0ROL R20 ;R20 = 1010 1100 C = 0ROL R20 ;R20 = 0101 1000 C = 1




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LSL instructionLSL instruction

In LSL, as bits are shifted from right to left,0 enters the LSB and the MSB exits to the carry flag. In other words, in LSL 0 is moved to the LSB, and theMSB is moved to the C.

LSL Rd ;logical shift left

this instruction multiplies content of the register by 2 assuming that afterLSL the carry flag is not set.

In the next code you can see what happens to 00100110 after running 3 LSL instructions.CLC ;make C = 0 (carry is 0 )LDI R20 , 0x26 ;R20 = 0010 0110(38) c = 0LSL R20 ;R20 = 0100 1100(74) C = 0LSL R20 ;R20 = 1001 1000(148) C = 0LSL R20 ;R20 = 0011 0000(98) C = 1 as C=1 and content of R20

;is not multiplied by 2



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ROR instructionROR instruction

In LSR, as bits are shifted from left toright, 0 enters the MSB and the LSB exits to the carry flag. In other words, in LSR0 is moved to the MSB, andthe LSB is moved to the C.

this instruction divides content of the register by 2 and carry flag contains the remainder of division.

In the next code you can see what happens to 0010 0110 after running 3 LSL instructions.

LDI R20,0x26 ;R20 = 0010 0110 (38)LSR R20 ;R20 = 0001 0011 (19) C = 0LSR R20 ;R20 = 0000 1001 (9) C = 1LSR R20 ;R20 = 0000 0100 (4) C = 1




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ASR InstructionASR Instruction

ASR means arithmetic shift right. ASRinstruction can divide signed number by 2. In LSR, as bits are shifted from left toright, MSB is held constant and the LSB exits to the carry flag. In other wordsMSB is not changed but is copied to D6, D6 is moved to D5, D5 is moved to D4and so on.

In the next code you can see what happens to 0010 0110 after running 5 ASL instructions.LDI R20 , 0D60 ;R20 = 1101 0000(-48) c = 0LSL R20 ;R20 = 1110 1000(-24) C = 0LSL R20 ;R20 = 1111 0100(-12) C = 0LSL R20 ;R20 = 1111 1010(-6) C = 0LSL R20 ;R20 = 1111 1101(-3) C = 0LSL R20 ;R20 = 1111 1110(-1) C = 1




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BCD, Packed BCD and ASCII conversion.BCD, Packed BCD and ASCII conversion.

•BCD

BCD1 BCD0

Packed BCDBCD Codes

ASCII and BCD Codes for Digits 0–9

•ASCII Codes



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Packed BCD to ASCII conversionPacked BCD to ASCII conversion

To convert packed BCD to ASCII:• you must first convert it to unpacked BCD. • Then the unpacked BCD is tagged with 011 0000

(30H).

Packed BCD = 1001 0010

ACSII = 0011 1001 , 0011 0010

Un packed BCD = 0000 1001 , 0000 0010

arithmetic and logic chapter 5

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