Dr. Sikder Sunbeam Islam

Associate Professor

Dept. of EEE, IIUC

Arithmetic Instructions

Addition Instructions Addition (ADD) instruction may appears in microprocessor in following ways:

Register addition

Immediate addition

Memory to register addition

Increment addition

Addition-with-carry

Register Addition

Register addition instructions adds the contents of two registers

Example: ADD AL, BL ; AL=AL+BL;

ADD CX, DI ; CX=CX+DI

However, memory-to-memory and segment-to-segment register addition

are not allowed

Example: ADD CS, DS ; Not allowed;

ADD [AX], [BX] ; Not allowed .

Immediate Addition This addition is applied whenever constants or known data are added.

Example: ADD AL, 74H ; AL=AL+74H ;

ADD BX, 245FH ; BX=BX+245FH

Addition Instructions (continues).

Memory to Register Addition Whenever memory data is added with register content.

Example:

ADD CL, [BP] ; The byte Content of memory location addressed by

SS×10+BP will be added with content of CL.

ADD [BX], AL ; The byte Content of AL will be added with memory

location addressed by DS×10+BX.

N.B. * Data Segment (DS) is used by default when BX, DI or SI is used to

address memory.

* If the BP register addresses memory, the Stack Segment(SS) is used by

default.

If, CL=08 ; SS=1000;

BP=0002, [10002H]=04;

After ADD CL, [BP];

CL= (08+04)=12

Increment Addition Increment addition (INC) adds 1 to any register or memory location except a

segment register.

Addition Instructions (continues).

Addition with Carry (ADC)

Example: INC BL ;BL= BL+1

INC SP ; SP=SP+1 ; However, INC SS ,(Segment INC) Not Allowed

INC BYTE PTR[BX] ; Add 1 to the byte contents of the data

segment memory location addressed by DS×10+BX. N.B. Immediate increment

from a memory location requires BYTE PTR, WORD PTR directives.

An addition with carry (ADC) instruction adds the bit in the carry flag (CF) to

the operand data.

Example: ADC AL, AH ; AL=AL+AH+Carry

ADC DH, [BX] ; The byte content of the data segment memory

location addressed by DS×10+BP is added to DH with the bit in the carry flag.

Final result is stored in DH.

However, ADC CS, DS i.e. (Segment to Segment) Not Allowed.

Subtraction Instructions

Subtraction (SUB) instruction may appears in microprocessor in following ways:

Register Subtraction

Immediate Subtraction

Subtraction with Memory

Decrement Subtraction

Subtraction-with-Borrow

Comparison

Register Subtraction Subtraction takes place between registers using register subtraction

instructions.

Example: SUB AL, BL ; AL=AL-BL SUB CX, DI ;CX=CX-DI

N.B. However, memory-to-memory and segment-to-segment register

subtractions not allowed.

Like, SUB [AX], [BX] and SUB CS, DS

Immediate Subtraction Immediate subtraction is employed whenever constants or known data are

subtracted.

Example: SUB DH, 6FH ; DH=DH-6FH SUB BX, 2000H ; BX=BX-2000H

Subtraction Instructions (continues).

Memory to Register Addition Whenever subtraction takes place between memory and register .

Example:

SUB CL, [BP] ; The byte Content of memory location addressed by

SS×10+BP will be subtracted from the content of CL.

SUB [BX], AL ; The byte Content of AL will be subtracted from memory

location addressed by DS×10+BX.

N.B. * Data Segment (DS) is used by default when BX, DI or SI is used to

address memory.

* If the BP register addresses memory, the Stack Segment(SS) is used by

default.

If, CL=08 ;

SS=1000; BP=0002,

[10002H]=04; After

SUB CL, [BP]; CL= (08-04)=04

Increment Subtraction Decrement subtraction (DEC) subtracts1 from a register or memory location

except a segment register.

Subtraction Instructions (continues).

Subtraction with Borrow (SBB)

Example: DEC BL ;BL= BL-1; However, DEC SS ,(Segment INC) Not Allowed

DEC BYTE PTR[BX] ; Decrement by 1 to the byte contents of the

data segment memory location addressed by DS×10+BX.

Subtraction with Borrow(SBB) instruction subtracts the bit in the carry flag

(CF) from the difference.

Example: SBB AL, AH ; AL=AL-AH-Carry

SBB DH, [BX] ; The byte content of the data segment memory

location addressed by DS×10+BP subtracted from DH and the bit in the carry

flag is also subtracted from the difference. Final result is stored in DH.

However, SBB CS, DS i.e. (Segment to Segment) Not Allowed.

Comparison(CMP)

• The comparison instruction (CMP) is a subtraction that changes only the

flag bits, the destination operand never changes.

• A comparison is useful for checking the entire contents of a register or a

memory location against another value.

• A CMP is normally followed by a conditional jump instruction, which test

condition of the flag bits. • Example: CMP CL, BL ; CL-BL ,The result of comparison depends on CF, ZF and SF

Subtraction Instructions (continues).

Conditional jump instructions that often followed by CMP instruction are •

JA (jump above) • JB (jump below) • JAE (jump above or equal) • JBE (jump

below or equal)

Example: CMP AL, 10H; compare AL against 10H

JAE EEE ; if AL is 10H or above program jump to EEE

Multiplication Instructions

Division

• Division instruction is used to divide an unsigned/signed word(16 bits) by a

byte(8 bits) or to divide an unsigned/signed double-word(32 bits) by a

word(16 bits). So, dividend is always a double-width dividend that is divided

by the operand.

• Two Types: Unsigned division (DIV) instruction and signed division (IDIV)

instruction.

• There is no immediate division instruction available to any microprocessor.

• None of the flag bits change predictably for a division.

• For 8-bit division, Dividend (which is divided by a value) is always stored

in AX.

• For 8-bit division, The quotient moves into AL. Reminder is stored in AH

register.

Example: DIV CL ; AX is divided by CL, the unsigned quotient is in AL

and the unsigned reminder is in AH.

IDIV BL ; AX is divided by BL, the signed quotient is in AL and

the signed reminder is in AH.

[If, CL=03, AX=145, After DIV CL, (145/3)=48=30H=AL, AH=1=01H]

Division Instructions

• For 16 bit division, Dividend (which is divided by a value) always stored in DX-

AX and the dividing content is stored in any 16-bit register or memory location.

• The quotient appears in AX. Reminder appears in DX register.

Example: DIV CX ; DX-AX is divided by CX, the unsigned quotient is in AX and

the unsigned remainder is in DX.

IDIV SI ; DX-AX is divided by SI, the signed quotient is in AX and the

signed remainder is in DX .

Division Instructions (Continues)

CBW (Convert signed byte to signed word)

• This instruction copies the sign of a byte in AL to all the bits in AH. AH is

then said to be sign extension of AL.

• The CBW operation must be done before a signed byte in AL can be divided by

another signed byte with the IDIV instruction. CBW effects no flag.

Example: Suppose we want to divide -38 by +3. AL=11011010= -26H= -38

decimal CH=0000 0011=+3H = +3 decimal;

MOV AL, -26H

MOV CH, 03H

CBW ; Extended sign of AL through AH. So, AX=11111111 11011010

IDIV CH; Divide AX by CH AL=11110100 = -OCH=-12 decimal;

AH = 11111110 = -02H= -2 decimal

Division Instructions (Continues)

CWD (Convert signed Word to signed Double word)

• CWD copies the sign of a word in AX to all the bits of the DX register. In

other words, it extends the sign of AX into all of DX .

• The CWD operation must be done before a signed word in AX can be divided

by another signed word with the IDIV instruction. CWD affects no flag.

Example:

divide -3897 decimal by +250 decimal. AX=11110000 11000111 = -3897 decimal

CX = 00000000 1111 1010 = +250 decimal , DX = 0000000000000000

After, CWD ; DX= 1111111111111111, AX= 11110000 11000111

IDIV CX

BCD Arithmetic

The addition or subtraction of two BCD numbers result a binary number.

To adjust this number into BCD the following instructions are used:

• DAA (Decimal adjust AL after BCD addition)

• DAS (Decimal adjust AL after BCD subtraction)

DAA (Decimal adjust AL after BCD addition)

• This instruction is used to make sure the result of adding two packed BCD

numbers is adjusted to be a legal BCD number. The result must be in AL for

DAA to work correctly.

• If the lower nibble in AL after addition is greater than 9 or AF is set by

the addition, then the DAA instruction will add 6 to the lower nibble in AL.

• If the result in the upper nibble of AL is now greater than 9 or if the carry

flag was set by the addition or correction, then DAA instruction will add 60H

to AL.

• Example: (a) Let, AL=0101 1001 = 59 BCD and BL=0011 0101 = 35 BCD

ADD AL, BL ; AL= 1000 1110 = 8EH (It should be 59+35=94)

DAA ; Add 0110 because 1110>9 ; So, AL= 1001 0100 = 94 BCD 88+49=137

(b) Let, AL= 1000 1000 (88 BCD) and BL=0100 1001 (49 BCD)

ADD AL,BL ; AL= 1101 0001, AF=1 DAA ; Add 0110 because AF=1

; AL=1101 0111 (D7H) ; 1101>9 so add 0110 0000

; AL=0011 0111 (37 BCD), CF=1

BCD Arithmetic

DAS(Decimal adjust AL after BCD subtraction)

• This instruction is used after subtracting two packed BCD numbers to

make sure the result is correct packed BCD. The result of subtraction

must be in AL for DAS to work correctly.

• If the lower nibble in AL after subtraction is greater than 9 or the AF is

set by the subtraction then DAS instruction will subtract 6 from the

lower nibble of AL. If the result in the upper nibble is now greater than 9

or if the carry flag was set, the DAS instruction will subtract 60 from AL.

Example: Let, AL= 1000 0110 (86 BCD) and BH= 0101 0111 (57 BCD)

SUB AL, BH ; AL= 0010 1111 (2FH), CF=0

DAS ; Lower nibble of results is 1111>9, so DAS

automatically subtracts 0000 0110 ; AL= 0010 1001 (29 BCD)

Example Problems Decimal up counter-

MOV COUNT, 63H ; initialize count in memory location as 1.

MOV AL, COUNT ; Bring COUNT into AL to work on.

ADD AL, 01H ; increment the value by 1

DAA ; Decimal adjust the result MOV COUNT, AL ; Put

decimal result back in memory.

Exercise

a) What is wrong with the following instructions: ADD AL, AX ;

ADC CS, DS ; INC [BX] ; ADD [AX], [BX]; INC SS

b) Develop a short sequence of instructions that adds AL, BL, CL, DL

and AH. Save the sum in the DH register.

c) Write a short sequence of instructions that multiply 4 with 10 and

the result is stored in DX.

d) Perform, [{130-(300/50)+6}*9] by assembly instructions.

e) Write an instruction set to implement a decimal down counter using

DAS instruction

References Microprocessor and Interfacing Programming and Hardware;

Douglas V Hall, 2nd Edition.

Microprocessors and Microcomputer-Based System Design;

Mohammed Rafiquzzaman, revised edition.

The INTEL Microprocessors, B.B. Brey, 7th Edition.

Microprocessor & Interfacing Lecture Materials; Mohammed

Abdul Kader, IIUC.