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VLSI ARCHITECTURE FOR DEFORMABLE MOTION ESTIMATION USING ARPS TECHNIQUE

HARSH KAUSHIK12EC62R10

GUIDED BY :- DR. INDRAJIT CHAKRABARTI

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OUTLINE

INTRODUCTION

OBJECTIVE

MIDSEM WORK

ARPS METHOD

PROPOSED ARCHITECTURE

XILINX RESULTS

REFERENCES

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INTRODUCTION

Motion Estimation is one of the most important block Video

compression system. [5]

Block-Matching algorithm (BMA) used for motion estimation (ME) in

various video coding.

FS is highly computational so, we use fast BMA Techniques.

Adaptive Rood Pattern Search (ARPS) most efficient in terms of

the computational speed and achieves good PSNR.

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OBJECTIVE

• To design an efficient architecture for block-matching motion estimation

using ARPS search technique

• To enhance the architecture for mesh based motion estimation which will

help to incorporate the non-translational motions such as shear, rotation,

zoom etc. present in the video.

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MATLAB SIMULATION RESULTSAVERAGE PSNR (dB) PERFORMANCE OF FS, TSS, DS, ARPS AND FIXED MESH ARPS

Video (Kbps) FS TSS DS ARPS FIXED MESH ARPS

AKIYO(1024) 43.7737 43.6324 43.7575 43.7228 40.6678BRIDGE-CLOSE(1024) 35.0512 35.0512 35.0512 35.0512 34.2305CONTAINER (1024) 38.3828 38.3823 38.3822 38.3820 37.6384ELEPHANT DREAMS (1024) 38.4459 38.0282 38.2063 38.0708 38.1541FOREMAN (1024) 33.8942 33.1140 33.6211 33.4685 28.4741FOOTBALL (1024) 23.5653 22.8817 22.7465 22.8567 22.4860HALL (1024) 35.5239 35.4433 35.4129 35.3432 30.6391MOTHER AND DAUGHTER (1024) 42.2745 42.1989 42.2362 42.2024 39.2444NEWS (1024) 38.4927 38.4050 38.4446 38.4142 34.5488PARIS (1024) 31.3799 31.0338 31.2952 31.2478 28.2278SILENT (1024) 37.1517 36.9080 36.8728 36.8263 36.9954STEFAN (1024) 25.9698 24.7376 24.3586 25.5327 22.4696TABLE (1024) 31.3935 30.7814 30.6616 30.4916 27.0253TEMPETE (1024) 26.7330 26.5292 26.5532 26.5184 25.1976WATERFALL (1024) 35.3052 35.3051 35.3053 35.3047 32.5124

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AVERAGE NUMBER OF SEARCH POINTS PER MV GENERATION

Video (Kbps) FS TSS DS ARPS

AKIYO(1024) 262.1717 23.2121 12.2596 5.0378BRIDGE-CLOSE(1024) 262.1717 23.2432 14.2559 6.0570CONTAINER (1024) 262.1717 23.2256 12.3772 5.1253ELEPHANT DREAMS (1024) 262.1717 23.2935 16.343 8.1380FOREMAN (1024) 262.1717 23.2571 16.043 8.4591FOOTBALL (1024) 262.1717 23.3654 20.805 11.7219HALL (1024) 262.1717 23.2510 12.9231 5.8659MOTHER AND DAUGHTER (1024) 262.1717 23.2874 13.375 6.2562NEWS (1024) 262.1717 23.2128 12.5235 5.3822PARIS (1024) 262.1717 23.2217 12.827 5.7681SILENT (1024) 262.1717 23.2143 12.9878 5.8658STEFAN (1024) 262.1717 23.3177 17.2021 8.1941TABLE (1024) 262.1717 23.2853 13.7468 6.5654TEMPETE (1024) 262.1717 23.2356 12.867 5.9502WATERFALL (1024) 262.1717 23.2121 12.2942 5.2849

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FIXED MESH ARPS

REFERENCE FRAME

CURRENT FRAME

ERROR IMAGE

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BLOCK-MATCHING ALGORITHM USING ARPS

REFERENCE FRAME

CURRENT FRAME

RECONSTRUCTED FRAME

AKIYO SEQUENCE

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BLOCK-MATCHING ALGORITHM USING ARPS

REFERENCE FRAME

CURRENT FRAME

RECONSTRUCTED FRAME

MOTHER AND DAUGHTER SEQUENCE

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BLOCK-MATCHING ALGORITHM USING ARPS

REFERENCE FRAME

CURRENT FRAME

RECONSTRUCTED FRAME

TABLE TENNIS SEQUENCE

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BLOCK-MATCHING ALGORITHM USING ARPS

REFERENCE FRAME

CURRENT FRAME

RECONSTRUCTED FRAME

FOOTBALL SEQUENCE

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Adaptive Rood Pattern Search method

• Two main issues are:

  1) Pre-determining the motion behavior of current block ?

2) Size and shape of the search pattern ?

• For First issue,

Current block’s motion behavior can be predicted by its neighboring blocks’ MVs.  

• For Second issue, two types of search patterns are used:-

1. Adaptive rood pattern (ARP)

2. Small search pattern (URP)

• Prediction of the target motion vector is achieved with the help of ROS (region of search).

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Adaptive Rood Pattern

• Predicted MV along with four-armed rood pattern is added into ARP which is similar to target MV.

• ARP’s size,

L = Max {| MVpredicted(x)|,| MVpredicted(y)|}

• Leftmost blocks in each frame have a fixed arm length of 2 pixels.

• ARP has either 5 (non overlapping) or 4 (with overlapping) search points in the initial search stage.

Figure. 1. Adaptive Rood Pattern [1][2]

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Fixed Pattern – for refined search

• Initial search, leads to new search center.

• Small search pattern (URP) is used for local refined

search unrestrictedly and repeatedly .

• MME point of current step becomes center for next

iteration until MME point is at the center of the fixed

pattern.

Figure. 2. Two type of fixed Search Patterns [1][2]

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Block Address

Generator

Current Frame RAM

Reference Frame RAM

Absolute Difference SADA

dder

Reference Frame Base

Address Generator

Current Frame Base

Address Generator

MemoryOffset

Sequence andPosition

Generator

Offset &

Position of Minimum

SAD

Comparator

Motion Vector

En _ block Search

PROPOSED ARCHITECTUREclock

over

search

complete

finish

finishcompare

SAD

SADmin

check

Curr Value

RefValue

----- Control path Signals Data path Signals

offset

pos

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XILINX RESULTS

Figure. 4 Behavioral simulation (Virtex - 6) for 50us. (all values in Binary)

17Figure. 5 Behavioral simulation for 50us. (all values in Unsigned Decimal)

18Figure. 6 Behavioral simulation showing SAD computation and Position Generation

19Figure. 7 Behavioral simulation showing SAD computation

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Timing Report of Xilinx

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Power Report of Xilinx

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RTL SCHEMATIC

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MASTER UNIT

POSITION GENERATOR UNIT

BLOCK SEARCH UNIT

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FUTURE WORK

Optimization of the proposed Architecture in terms of speed, power

and area. Use of CIF frames as test sequence.

Developing an Architecture for Fixed Mesh based motion estimation

using ARPS technique.

Enhancing the Fixed Mesh into Adaptive Mesh (Hierarchical) for

accurate motion estimation.

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REFERENCES

[1] Yao Nie and Kai-Kuang Ma “Adaptive Rood Pattern Search for Fast Block-Matching Motion Estimation” IEEE Transactions, Image Processing, Vol. 11, No. 12, pp. 1442-1448, December 2002.

[2] Kai-Kuang Ma and Gang Qiu “An Adaptive Rood Pattern Search For Fast Block-Matching Motion Estimation in JVT/H.26L” IEEE Conference, Circuits and Systems, Vol. 2, pp. II – 708 – II – 711, 2003.

[3] Mohammed Sayed and Wael Badawy “An Affine-Based Algorithm and SIMD Architecture for Video Compression with Low Bit-Rate Applications” IEEE Transactions, Circuits and Systems for Video Technology, Vol. 16, No. 4, April 2006.

[4] Wael Badawy, Guoqing Zhang and Magdy Bayoumi “VLSI Architecture for Hierarchical Mesh Based Motion Estimation”, IEEE conference, Signal processing systems, pp. 110-119, October 1999.

[5] Iain E.G. Richardson, “H.264 and MPEG-4 Video Compression Video Coding for Next generation Multimedia”, 2003.

[6] S. Palnitkar, “Verilog HDL: A Guide to Digital Design and Synthesis,” second edition, Prentice Hall publication, February 2003.

 

 

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