ase/deca m-series fan-out process€¦ · qualcomm pm1850 pmic with advanced wafer level packaging...

©2019 by System Plus Consulting | ASE/Deca M-Series Fan-Out Process | Sample 1

22 bd Benoni Goullin44200 NANTES - FRANCE +33 2 40 18 09 16 [email protected] www.systemplus.fr

ASE/Deca M-Series Fan-Out ProcessQualcomm PM1850 PMIC with advanced Wafer Level Packaging

SP19486 - PACKAGING report by Stéphane ELISABETHLaboratory Analysis by Nicolas RADUFFE

September 2019 – Sample

REVERSE COSTING® – STRUCTURAL, PROCESS & COST REPORT

http://www.systemplus.fr/



Table of Contents

Overview / Introduction 4

o Executive Summary

o Reverse Costing Methodology

Company Profile 8

o Qualcomm

o ASE/Deca technologies Roadmap

o Samsung Galaxy S10 5G US Teardown

Physical Analysis 23

o Summary of the Physical Analysis 24

o M-Series Package Assembly 26

Package Views & Dimensions

Board & Package Cross-Section

o PMIC Die 55

Die View & Dimensions

Delayering & main Blocs

Die Process

Die Cross-Section

Die Process Characteristic

Physical Comparison: eWLB vs. M-Series 69

Manufacturing Process 72

o PMIC Die Front-End Process & Fabrication Unit

o M-Series Packaging Process & Fabrication Unit

Cost Analysis 84

o Summary of the cost analysis 89

o Yields Explanation & Hypotheses 91

o PMIC die 93

Die Front-End Cost

Die Probe Test, Thinning & Dicing

Die Wafer Cost

Die Cost

o M-Series Packging 97

Wafer Cost

Packaging steps cost

Component Cost

Selling price 99

Cost Comparison: eWLB vs. M-Series 103

Feedbacks 104

SystemPlus Consulting services 106




Overview / Introductiono Executive Summaryo Reverse Costing Methodologyo Glossary

Company Profile & Supply Chain

Market Analysis

Physical Analysis

Physical Comparison

Manufacturing Process Flow

Cost Analysis

Selling Price Analysis

Cost Comparison

Related Reports

About System Plus

Executive Summary

This full reverse costing study has been conducted to provide insight on technology data, manufacturing cost and selling priceof the Qualcomm PM8150 PMIC with Deca M-Series.

Back in 2015, Outsourced Semiconductor Assembly and Test (OSATs) were the only players who were involved in Fan-Out (FO)packaging. But in 2016, TSMC has led the entry of foundries on this market. By proposing its integrated FO (inFO) packagingtechnology, TSMC and Apple introduced the first high Density Fan-Out packaging in mobile segment.

Now, Integrated Device Manufacturers (IDM) like Samsung have joined the race with a new in-house technology at panel level.The result is that in 2019, OSATs gained only a third part of the market. Even with this reduce share, they still develop andenhanced their portfolio on this segment. ASE in partnership with Deca technologies has developed a FO technology targetingthe core market. Formerly user of eWLB, ASE has decided to move to M-series packaging technology for its advanced Waferlevel packaging (aWLP).

With production maturity, fabless company like Qualcomm are seeking for yield loss improvement in dicing. In the past,Qualcomm has used enhanced Wafer Level Ball grid array (eWLB) for side wall protection for this purpose.

But now with the maturity of the M-series technology from Deca Technologies , ASE, who is the current OSAT supplier forQualcomm, switch the packaging production.

One of the main advantages of the technology is that at a similar price to the eWLB technology, the M-series offers betterquality and board level reliability (BLR). Indeed, one of the key enablers is the use of epoxy molding compound (EMC) betweenthe die and the redistribution layers (RDLs).

This report includes a full investigation of the component, featuring a detailed study of the PMIC including packaging, diedesign and cross-sections. It contains a complete cost analysis and a selling price estimation of the component. Finally, itfeatures a comparison with the Qualcomm WCD9335 Audio Codec, featuring eWLB packaging.




Overview / Introduction

Company Profile & Supply Chain o Qualcommo ASE/Deca technologieso Samsung Galaxy S10 Teardown

Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

Samsung Galaxy S10 5G US Teardown

Samsung Galaxy S10 5G USA Opening©2019 by System Plus Consulting

Main Board – Top PCB Substrate – Top and Bottom View©2019 by System Plus Consulting

Main Board – Bottom PCB Substrate – Top View©2019 by System Plus Consulting

Main Board – Bottom PCB Substrate – Bottom View©2019 by System Plus Consulting

IDT’s Wireless Power Receiver

Qualcomm’s Main PMIC

Maxim’s Interface PMIC

Qualcomm’s 5G PMIC

• All the power IC are sandwiched between the twoPCB substrate.

• Both main PMIC from Qualcomm are using M-series packaging technology for Side WallProtection.






Market Analysis

Physical Analysis o Synthesiso Package Assembly

o Views & Dimensionso Cross-Sectiono Synthesis

o PMIC Dieo Views & Dimensionso Delayeringo Die Processo Die Cross-section

Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

Summary of the Physical Analysis






Market Analysis




Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

Package View & Dimensions






Market Analysis




Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

M-series Package Overview






Market Analysis




Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

Board Cross-Section






Market Analysis




Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

M-Series Cross-Section






Market Analysis




Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

M-Series Cross-Section – RDLs






Market Analysis




Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Plus

Die Dimensions






Market Analysis

Physical Analysis

Physical Comparisono eWLB vs. M-Series


Cost Analysis


Cost Comparison

Related Reports

About System Plus

Side-Wall Protection – eWLB vs. M-series – Process






Market Analysis

Physical Analysis

Physical Comparison

Manufacturing Process Flowo PMIC Die Front-End Processo PMIC Fabrication Unito M-Series Process Flowo M-Series Assembly Unit

Cost Analysis


Cost Comparison

Related Reports

About System Plus

Packaging Process Flow (3/6)






Market Analysis

Physical Analysis

Physical Comparison


Cost Analysiso Cost Analysis Summaryo Yields Explanation &

Hypotheseso PMIC Wafer & Die Costo M-Series Package Costo Component Cost


Cost Comparison

Related Reports

About System Plus

M-Series Packaging Cost






Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis

Selling Price Analysiso Definition of Priceso Manufacturer Financialso Component Price

Cost Comparison

Related Reports

About System Plus

Estimated Selling Price






Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis


Cost Comparisono eWLB vs. M-Series

Related Reports

About System Plus

Fan-Out technology – eWLB vs. M-series – Cost






Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis


Cost Comparison

Related Reports

About System Pluso Company serviceso Contact

REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING

Related Reports

MARKET AND TECHNOLOGY REPORTS - YOLE DÉVELOPPEMENT

ADVANCED PACKAGING• Fan-Out Packaging: Technologies and Market Trends 2019• Equipment and Materials for Fan-Out Packaging 2019• Status of Advanced Substrates 2019

REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING

PACKAGING• Advanced packaging technology in the Apple Watch

Series 4’s SiP• Samsung Exynos 9110 with ePLP: First Generation of

Samsung’s FO-PLP• Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)



https://www.i-micronews.com/products/status-of-advanced-substrates-2019/


https://www.i-micronews.com/products/equipment-and-materials-for-fan-out-packaging-2019/


https://www.systemplus.fr/reverse-costing-reports/intels-embedded-multi-die-interconnect-bridge-emib/


https://www.systemplus.fr/reverse-costing-reports/exynos-9110-first-generation-of-samsung-fo-plp/


https://www.i-micronews.com/products/fan-out-packaging-technologies-and-market-trends-2019/



https://www.systemplus.fr/reverse-costing-reports/advanced-packaging-technology-in-the-apple-watch-series-4s-system-in-package/







Back in 2015, only Outsourced Semi-conductor Assembly and Test (OSAT)players were involved in Fan-Out (FO)packaging. But in 2016, TSMC led theentry of foundries into this market. Withits integrated FO (inFO) packagingtechnology, TSMC and Apple introducedthe first high density FO package in themobile segment. Now, Integrated DeviceManufacturers (IDMs) like Samsung havejoined the race with new in-housetechnology at the panel level. The result isthat in 2019 OSATs have only a third ofthe market. Even with this reduced share,they are still developing and enhancingtheir portfolio in this segment. ASE, inpartnership with Deca Technologies, hasdeveloped FO technology targeting thecore market. Formerly a user ofEmbedded Wafer Level Ball Grid Array(eWLB) packaging, ASE has moved to M-series packaging technology for itsadvanced Wafer Level Packaging (aWLP).

With production maturity, fablesscompanies like Qualcomm are seekingyield loss improvements, reducing thenumber of chipped dies following dicing.FOWLP was eventually adopted as side-wall protection to help manage incomingdies regardless of whether they’re on200mm or 300mm wafers, which resolvedthe yield issue. In the past, Qualcomm hasused eWLB for side-wall protection forthis purpose. But now the M-seriestechnology from Deca Technologies ismature. ASE, the current OSAT supplierfor Qualcomm, has switched packagingproduction.

One of the main advantages of thetechnology is that at a similar price to theeWLB technology, the M-series offersbetter quality and board level reliability(BLR). Indeed, one of the key enablers isthe use of epoxy molding compound(EMC) between the die and theredistribution layers (RDLs).

This report includes a full investigation ofthe component, featuring a detailed studyof the PMIC including packaging, diedesign and cross-sections. It contains acomplete cost analysis and a selling priceestimation of the component. Finally, itfeatures a comparison with theQualcomm WCD9335 Audio Codec,featuring eWLB packaging.

COMPLETE TEARDOWN WITH

• Detailed photos and cross-sections

• Precise measurements

• Material analysis

• Manufacturing process flow

• Supply chain evaluation

• Manufacturing cost analysis

• Comparison with WCD9335 using eWLB for Side Wall Protection

• Estimated sales price

ASE/Deca’s patented fan-out technology has penetrated a new commerciallyavailable device, the Qualcomm PM8150 PMIC.

REVERSE COSTING® – STRUCTURE, PROCESS & COST REPORT

Title: ASE/Deca M-Series Fan-Out Process

Pages: 111

Date: September 2019

Format: PDF & Excel file

Price: EUR 3,990

ASE/Deca M-Series Fan-Out Process

IC – LED – RF – MEMS – IMAGING – PACKAGING – SYSTEM – POWER - DISPLAY

TABLE OF CONTENTS

Overview/Introduction

Qualcomm Company profile and ASE/DecaRoadmap

Samsung Galaxy S10 5G USA Teardown

Market Analysis

Physical Analysis

• Physical Analysis Methodology

• M-Series Packaging Analysis

o Package view and dimensions

o Package cross-section: RDLs, UBM, copper studs

o Package process analysis

• PMIC Die Analysis

o Die view and dimensions

o Die delayering and main block IDs

o Die cross-section

o Die process


• PMIC Die Process and Fabrication Unit

• M-Series Packaging Process Flow and Fabrication Unit

Cost analysis

• Overview of the Cost Analysis

• Supply Chain Description

• Yield Hypotheses

• PMIC Die cost Analyses

o Front-end cost

o Wafer and die cost

• M-Series Package Cost Analysis

o Packaging front-end cost

o Packaging cost by process step

• Final Test Cost

• Component Cost

Estimated Price Analysis

Comparison between eWLB and M-Series for Side Wall Protection

ASE/DECA M-SERIES FAN-OUT PROCESS

RELATED REPORTS

AUTHORS

Dr. Stéphane Elisabeth has joinedSystem Plus Consulting's team in 2016.He has a deep knowledge of Materialscharacterizations and Electronicssystems. He holds an EngineeringDegree in Electronics and NumericalTechnology, and a PhD in Materials forMicroelectronics.

Nicolas Radufe is in charge of physicalanalysis at System Plus Consulting. Hehas a deep knowledge in chemical andphysical analyses. He previouslyworked in microelectronics R&D forCEA/LETI in Grenoble and forSTMicroelectronics in Crolles.

Advanced packaging technology in the Apple Watch Series 4’s SiPFour major packaging technologies: ASE’s SiP & modified SESUB, TSMC’s inFO-ePoP, Skyworks’ Double Side BGA.January 2019 - EUR 3,990*

Samsung Exynos 9110 with ePLP: First Generation of Samsung’s FO-PLPThe first ultra-small multi-chip High Volume Manufacturing (HVM) FO-PLP device for consumer applications found in the Samsung Galaxy Watch.November 2018 - EUR 3,990*

Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)First consumer application in the Intel Core 8th Generation i7-8809G, the world’s first On-Package CPU and GPU with High Bandwidth Memory.October 2018 - EUR 3,490*

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ase/deca m-series fan-out process€¦ · qualcomm pm1850 pmic with advanced wafer level packaging...

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