b-stad_ch_07

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FET Biasing FET Biasing Chapter 7 Boylestad Electronic Devices and Circuit Electronic Devices and Circuit Theory Theory

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Page 1: B-stad_CH_07

FET BiasingFET Biasing

Chapter 7

Boylestad

Electronic Devices and Circuit TheoryElectronic Devices and Circuit Theory

Page 2: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Common FET Biasing Circuits

JFET Biasing Circuits Fixed-Bias Self-Bias Voltage-Divider Bias

D-Type MOSFET Biasing CircuitsSelf-BiasVoltage-Divider Bias

E-Type MOSFET Biasing CircuitsFeedback ConfigurationVoltage-Divider Bias

Page 3: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

2

1

P

GSDSSD V

VII

Ch.7 Summary

Basic Current Relationships

For all FETs:A0 IG SD II

For JFETS and D-Type MOSFETs:

For E-Type MOSFETs:2)( TGSD VVkI

Page 4: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Fixed-Bias Configuration

GGGS

GS

DSC

S

DDDDDS

VV

VV

VV

V

RIVV

V 0

Page 5: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Self-Bias Configuration

Page 6: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

)( DSDDDDS RRIVV

Ch.7 Summary

Self-Bias Calculations

SDS RIV

SDGS RIV

2. Plot the transfer curve using IDSS and VP (VP = |VGSoff| on spec sheets) and a few points such as VGS = VP / 4 and VGS = VP / 2 etc. The Q-point is located where the first line intersects the transfer curve. Using the value of ID at the Q-point (IDQ):

1. Select a value of ID < IDSS and use the component value of RS to calculate VGS. Plot the point identified by ID and VGS and draw a line from the origin of the axis to this point.

RDDDSDSD VVVVV

Page 7: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Bias

IG = 0 A

ID responds to changes in VGS.

Page 8: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Bias Calculations

The Q-point is established by plotting a line that intersects the transfer curve.

21

2

RR

VRV DD

G

VG is equal to the voltage across divider resistor R2:

Using Kirchhoff’s Law:

SDGGS RIVV

Page 9: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Q-Point

Plot the transfer curve by plotting IDSS, VP and the calculated values of ID

Plot the line that is defined by these two points:

VGS = VG, ID = 0 A

VGS = 0 V, ID = VG / RS

The Q-point is located where the line intersects the transfer curve

Page 10: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Bias Calculations

Using the value of ID at the Q-point, solve for the other values in the voltage-divider bias circuit:

SDS

DDDDD

SDDDDDS

RIV

RIVV

RRIVV

)(

Page 11: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

D-Type MOSFET Bias Circuits

Depletion-type MOSFET bias circuits are similar to those used to bias JFETs. The only difference is that D-type MOSFETs can operate with positive values of VGS and with ID values that exceed IDSS.

Page 12: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Self-Bias Q-Point (D-MOSFET)

Plot the line that is defined by these two points: VGS = VG, ID = 0 A

ID = VG /RS, VGS = 0 V

Plot the transfer curve using IDSS, VP and calculated values of ID.

The Q-point is located where the line intersects the transfer curve. Use the value of ID at the Q-point to solve for the other circuit values. These are the same steps used to analyze JFET self-bias circuits.

Page 13: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Bias (D-MOSFET)

Plot the line that is defined by these two points:

VGS = VG, ID = 0 A

ID = VG/RS, VGS = 0 V

Plot the transfer curve using IDSS, VP and calculated values of ID.

The Q-point is located where the line intersects the transfer curve. Use the value of ID at the Q-point to solve for the other variables in the circuit.These are the same steps used to analyze JFET voltage-divider bias circuits.

Page 14: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

E-Type MOSFET Bias Circuits

The transfer curve for the E-MOSFET is very different from that of a simple JFET or D-MOSFET.

Page 15: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Feedback Bias Circuit (E-MOSFET)

DDDDGS

GSDS

RG

G

RIVV

VV

V

I

V0

A0

Page 16: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Feedback Bias Q-Point (E-MOSFET)

Using these values from the spec sheet, plot the transfer curve:VGSTh , ID = 0 A VGS(on), ID(on)

Plot the line that is defined by these two points:

VGS = VDD, ID = 0 A

ID = VDD / RD , VGS = 0 V

Using the value of ID at the Q-point, solve for the other variables in the circuit

The Q-point is located where the line and the transfer curve intersect

Page 17: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Biasing

Plot the line and the transfer curve to find the Q-point using these equations:

21

2

RR

VRV DD

G

)( DSDDDDS

SDGGS

RRIVV

RIVV

Page 18: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Voltage-Divider Bias Q-Point (E-MOSFET)

Plot the line using

VGS = VG , ID = 0 A

ID = VG / RS , VGS = 0 V

Using these values from the spec sheet, plot the transfer curve:

VGSTh, ID = 0 A

VGS(on) , ID(on)

The point where the line and the transfer curve intersect is the Q-point.

Using the value of ID at the Q-point, solve for the other circuit values.

Page 19: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

p-Channel FETs

For p-channel FETs the same calculations and graphs are used, except that the voltage polarities and current directions are reversed.

The graphs are mirror images of the n-channel graphs.

Page 20: B-stad_CH_07

Electronic Devices and Circuit TheoryBoylestad

© 2013 by Pearson Higher Education, IncUpper Saddle River, New Jersey 07458 • All Rights Reserved

Ch.7 Summary

Applications

Voltage-controlled resistor

JFET voltmeter

Timer network

Fiber optic circuitry

MOSFET relay driver