basic building blocks voltage-controlled oscillators
TRANSCRIPT
Short Course On Phase-Locked Loops and Their Applications Day 2, AM Lecture Basic Building Blocks Voltage-Controlled OscillatorsMichael Perrott August 12, 2008 Copyright 2008 by Michael H. Perrott All rights reserved
VCO Design for Wireless SystemsZin
From Antenna and Bandpass Filter
PC board trace
Mixer Package Interface RF in LNA LO signal VCO IF out To Filter
Zo
Reference Frequency
Frequency Synthesizer
Design Issues
- Tuning Range need to cover all frequency channels - Noise impacts receiver blocking and sensitivity performance - Power want low power dissipation - Isolation want to minimize noise pathways into VCO - Sensitivity to process/temp variations need to make itmanufacturable in high volume2
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VCO Design For High Speed Data LinksZin
From Broadband Transmitter
PC board trace
Data
Zo
Package Interface
In Amp
Clock and Data Recovery
Clk
Data Out
Data In
Phase Detector
Loop Filter VCO
Clk Out
Design Issues
- Same as wireless, but:Required noise performance is often less stringent Tuning range is often narrower3
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Outline of TalkCommon oscillator implementations Barkhausens criterion of oscillation One-port view of resonance based oscillators
- Impedance transformation - Negative feedback topologies
Voltage controlled oscillators
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Popular VCO StructuresLC oscillator VCO AmpVout C L Rp
-Ramp
Vin
Ring oscillatorVout Vin
-1
LC Oscillator: low phase noise, large area Ring Oscillator: easy to integrate, higher phase noiseM.H. Perrott 5
Barkhausens Criteria for Oscillationx=0 e H(jw) y Barkhausen Criteria e(t)
Closed loop transfer function
Asin(wot) H(jwo) = 1
Self-sustaining oscillation at frequency wo if
Asin(wot) y(t)
- Amounts to two conditions:Gain = 1 at frequency wo Phase = n360 degrees (n = 0,1,2,) at frequency woM.H. Perrott 6
Example 1: Ring Oscillatort (or ) A B C A A B C
Gain is set to 1 by saturating characteristic of inverters Phase equals 360 degrees at frequency of oscillation
A T
- Assume N stages each with phase shift - Alternately, N stages with delay t
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Further Info on Ring OscillatorsDue to their relatively poor phase noise performance, ring oscillators are rarely used in RF systems
- They are used quite often in high speed data links,though
We will focus on LC oscillators in this lecture Some useful info on CMOS ring oscillators
- Maneatis et. al., Precise Delay Generation Using Coupled Oscillators, JSSC, Dec 1993 (look at pp 127128 for delay cell description) Todd Weigandts PhD thesis http://kabuki.eecs.berkeley.edu/~weigandt/
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Example 2: Resonator-Based OscillatorZ(jw) -1 Vx GmVx Rp Cp Lp
Vout
0
Vx
-1
-Gm
Z(jw)
Vout
Barkhausen Criteria for oscillation at frequency wo:
- Assuming GM.H. Perrott
m
is purely real, Z(jwo) must also be purely real9
A Closer Look At Resonator-Based OscillatorRp
0
Gm
Z(jw)
Vout
|Z(jw)|
0 90o 0o -90o wo 10 wo 10wo Z(jw)
w
For parallel resonator at resonance
- Looks like resistor (i.e., purely real) at resonancePhase condition is satisfied Magnitude condition achieved by setting GmRp = 110
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Impact of Different Gm Valuesjw
S-planeIncreasing GmRp
Open Loop Resonator Poles and Zero Locus of Closed Loop Pole Locations
Root locus plot allows us to view closed loop pole locations as a function of open loop poles/zero and open loop gain (GmRp)m p
- As gain (G R ) increases, closed loop poles move intoright half S-plane11
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Impact of Setting Gm too lowGmRp < 1 jw
S-plane
Closed Loop Step Response
Open Loop Resonator Poles and Zero Locus of Closed Loop Pole Locations
Closed loop poles end up in the left half S-plane
- Underdamped response occursOscillation dies out
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Impact of Setting Gm too Highjw
S-planeGmRp > 1
Closed Loop Step Response
Open Loop Resonator Poles and Zero Locus of Closed Loop Pole Locations
Closed loop poles end up in the right half S-plane
- Unstable response occursWaveform blows up!
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Setting Gm To Just the Right Valuejw GmRp = 1 Open Loop Resonator Poles and Zero Locus of Closed Loop Pole Locations
S-plane
Closed Loop Step Response
Closed loop poles end up on jw axis
- Oscillation maintained
Issue GmRp needs to exactly equal 1
- How do we achieve this in practice?
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Amplitude Feedback LoopOutput Oscillator
Adjustment of Gm
Peak Detector
Desired Peak Value
One thought is to detect oscillator amplitude, and then adjust Gm so that it equals a desired value
- By using feedback, we can precisely achieve G Rm
p
=1
Issues
- Complex, requires power, and adds noise15
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Leveraging Amplifier Nonlinearity as Feedback
-Gm
0
-1
Vx
Ix
Z(jw)
Vout
|Vx(w)|
A wo GmAW
0 |Ix(w)|
0
wo
2wo
3wo
W
Practical transconductance amplifiers have saturating characteristics
- Harmonics created, but filtered out by resonator - Our interest is in the relationship between the input andthe fundamental of the output
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Leveraging Amplifier Nonlinearity as Feedback
-Gm
0
-1
Vx
Ix
Z(jw)
Vout
|Vx(w)|
GmA A wo GmAW
0 |Ix(w)|
A GmW
0
wo
2wo
3wo
GmRp=1 A
As input amplitude is increased
- Effective gain from input to fundamental of output drops - Amplitude feedback occurs! (G R = 1 in steady-state)m p
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One-Port View of Resonator-Based OscillatorsZactive Active Negative Resistance Generator Zres
Vout
Resonator
Active Negative Resistance Zactive 1 = -Rp -Gm
Zres
Resonator
Vout
Rp
Cp
Lp
Convenient for intuitive analysis Here we seek to cancel out loss in tank with a negative resistance element
- To achieve sustained oscillation, we must have18
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One-Port Modeling Requires Parallel RLC NetworkSince VCO operates over a very narrow band of frequencies, we can always do series to parallel transformations to achieve a parallel network for analysis
Cs RsC
Ls Rp RsL Cp Lp
- Warning in practice, RLC networks can havesecondary (or more) resonant frequencies, which cause undesirable behavior Equivalent parallel network masks this problem in hand analysis Simulation will reveal the problemM.H. Perrott 19
Understanding Narrowband Impedance TransformationSeries Resonant Circuit Cs Zin Ls Zin Parallel Resonant Circuit
Rs
Cp
Lp
Rp
Note: resonance allows Zin to be purely real despite the presence of reactive elementsM.H. Perrott 20
Comparison of Series and Parallel RL CircuitsSeries RL Circuit Ls Zin Rs Zin Lp Rp Parallel RL Circuit
Equate real and imaginary parts of the left and right expressions (so that Zin is the same for both)
- Also equate Q values
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Comparison of Series and Parallel RC CircuitsSeries RC Circuit Cs Zin Parallel RC Circuit
Rs
Zin
Cp
Rp
Equate real and imaginary parts of the left and right expressions (so that Zin is the same for both)
- Also equate Q values
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Example Transformation to Parallel RLCAssume Q >> 1Ls Zin
Series to Parallel TransformationRs Zin C Lp Rp
C
Note at resonance:
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Tapped Capacitor as a Transformer
C1 Zin L C2 RL
To first order:
We will see this used in Colpitts oscillator
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Negative Resistance OscillatorInclude loss in inductors and capacitors Vout Vout C1 M1 Vs M2 C2 C1 M1 Vs M2 Vout C2
RL1L1
RL2L2
L1 Vout
L2
RC1 Ibias Ibias
RC2
This type of oscillator structure is quite popular in current CMOS implementations
- Advantages
Simple topology Differential implementation (good for feeding differential circuits) Good phase noise performance can be achievedM.H. Perrott 25
Analysis of Negative Resistance Oscillator (Step 1)RL1L1 Vout C1 M1 Vs M2
RL2L2
Rp1
Cp1Vout
Lp1
Lp2
Cp2Vout M2
Rp2
Vout C2
RC1 Ibias
Narrowband parallel RLC model for tank
M1 Vs
RC2
Ibias
Derive a parallel RLC network that includes the loss of the tank inductor and capacitor
- Typically, such loss is dominated by series resistance inthe inductor
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Analysis of Negative Resistance Oscillator (Step 2)Rp1 Cp1Vout M1 Vs
Lp1Vout M2
Rp1
Cp1Vout M1
Lp1-1
Rp1
Cp1Vout
Lp1 1 -Gm1
Ibias
Split oscillator circuit into half circuits to simplify analysis
- Leverages the fact that we can approximate V - Replace with negative resistor
as being incremental ground (this is not quite true, but close enough)s
Recognize that we have a diode connected device with a negative transconductance valueNote: Gm is large signal transconductance valueM.H. Perrott 27
Design of Negative Resistance OscillatorRp1 Cp1Vout M1 Vs
Lp1
Lp2
Cp2Vout M2
Rp2
Rp1
Cp1Vout
Lp1 1 -Gm1
A
AGm1 gm1 Gm1Rp1=1
Ibias
A
Design tank components to achieve high Q
- Resulting R
p
value is as large as possible
Choose bias current (Ibias) for large swing (without going far into saturation)
- Well estimate swing as a function of I shortly Choose transistor size to achieve adequately large g - Usually twice as large as 1/R to guarantee startupbias p1
m128
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Calculation of Oscillator SwingRp1 Cp1Vout M1
Lp1
Lp2
Cp2Vout M2
Rp2
A
I1(t)Vs
I2(t)
A
Ibias
Design tank components to achieve high Q
- Resulting R
p
value is as large as possible
Choose bias current (Ibias) for large swing (without going far into saturation)
- Well estimate swing as a function of I in next slide Choose transistor size to achieve adequately large g - Usually twice as large as 1/R to guarantee startupbias p1
m129
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Calculation of Oscillator Swing as a Function of IbiasBy symmetry, assume I1(t) is a square wave(DC and harmonics filtered by tank)I1(t) |I1(f)| Ibias/2W=T/2 1 I bias 1 I 3 bias t 1 1 T W f
- We are interested in determining fundamental component
Ibias Ibias/2T T
- Fundamental component is - Resulting oscillator amplitudeM.H. Perrott
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Variations on a ThemeBottom-biased NMOS Top-biased NMOS Top-biased NMOS and PMOS
IbiasL1 Vout C1 M1 Vs M2 L2 Vout C2 Vout C1 M1 M2 L1 L2 Vout C2 C1 Vout M1 M2
IbiasM3 Ld Vout C2 M4
Ibias
Biasing can come from top or bottom Can use either NMOS, PMOS, or both for transconductorachieve better phase noise at a given power dissipation See Hajimiri et. al, Design Issues in CMOS Differential LC Oscillators, JSSC, May 1999 and Feb, 2000 (pp 286-287)M.H. Perrott
- Use of both NMOS and PMOS for coupled pair would appear to31
Colpitts OscillatorL Vout
Vbias
M1
C1 V1
Ibias
C2
Carryover from discrete designs in which single-ended approaches were preferred for simplicity
- Achieves negative resistance with only one transistor - Differential structure can also be implemented
Good phase noise can be achieved, but not apparent there is an advantage of this design over negative resistance design for CMOS applicationsM.H. Perrott 32
Analysis of Cap Transformer used in ColpittsRin= 1 N2
RL
C1 Vout L C2 V1 RL Vout L
C1||C2 1:N RL V1=NVout
Vout
L
C1||C2
1 N2
RL
C 1C 2 C1||C2 = C1+C2
N=
C1 C1+C2
Voltage drop across RL is reduced by capacitive voltage divider
- Assume that impedances of caps are less than Rresonant frequency of tank (simplifies analysis) Ratio of V1 to Vout set by caps and not RL
L
at
Power conservation leads to transformer relationship shownM.H. Perrott 33
Simplified Model of ColpittsL LVout
Rp
Include loss in tank vout
C1||C2
Lvout
Rp||
1/Gm N2
Vbias
M1 1/Gm
id1
C1V1
M1 v1
C1||C2
1/Gm N2 -GmNvout
Ibias
C2 C1||C2 =
Nvout C 1C 2 C1 N= C1+C2 C1+C2 C1||C2 Lvout
Purpose of cap transformer
Rp||
1/Gm N2
- Reduces loading on tank - Reduces swing at source node(important for bipolar version)
-1/Gm N
Transformer ratio set to achieve best noise performanceM.H. Perrott 34
Design of Colpitts OscillatorL I1(t) VbiasM1 1/Gm Vout
A
C1||C2
Lvout
Req= Rp||
1/Gm N2
C1V1 Gm1
-1/Gm N
Ibias
C2
gm1 NGm1Req=1 A
Design tank for high Q Choose bias current (Ibias) for large swing (without going far into saturation) Choose transformer ratio for best noise
- Rule of thumb: choose N = 1/5 according to Tom Lee
Choose transistor size to achieve adequately large gm1M.H. Perrott 35
Calculation of Oscillator Swing as a Function of IbiasI1(t) consists of pulses whose shape and width are a function of the transistor behavior and transformer ratio
- Approximate as narrow square wave pulses with width WI1(t) IbiasW
|I1(f)| Ibias
average = IbiasT T
t
1 T
1 W
f
- Fundamental component is - Resulting oscillator amplitudeM.H. Perrott 36
Clapp Oscillator
L C3
LlargeVout
Vbias
M1 1/Gm
C1V1
Ibias
C2
Same as Colpitts except that inductor portion of tank is isolated from the drain of the device
- Allows inductor voltage to achieve a larger amplitude
without exceeded the max allowable voltage at the drain Good for achieving lower phase noiseM.H. Perrott 37
Hartley OscillatorC Vout VbiasM1
L2 L1 V1 Cbig
Ibias
Same as Colpitts, but uses a tapped inductor rather than series capacitors to implement the transformer portion of the circuitcapacitors are easier to realize than inductors
- Not popular for IC implementations due to the fact that
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Integrated Resonator StructuresInductor and capacitor tank
- Lateral caps have high Q (> 50) - Spiral inductors have moderate Q (5 to 10), but completely integrated and have tight tolerance (< 10%) - Bondwire inductors have high Q (> 40), but not asintegrated and have poor tolerance (> 20%)Lateral CapacitorAA
Spiral Inductor
Bondwire Inductor
package die
A
A B
C1B B
Lm
B
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Integrated Resonator StructuresIntegrated transformer
- Leverages self and mutual inductance for resonance to achieve higher Q - See Straayer et. al., A low-noise transformer-based 1.7GHz CMOS VCO, ISSCC 2002, pp 286-287A B
Cpar1k C D
L1
L2
C
Cpar2
D
A
B
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Quarter Wave Resonator0/4 ZL
x y
Z(0/4)
z
z L 0
Impedance calculation (from Lecture 4)
- Looks like parallel LC tank!Benefit very high Q can be achieved with fancy dielectric Negative relatively large area (external implementation in the past), but getting smaller with higher frequencies!M.H. Perrott 41
Other Types of ResonatorsQuartz crystal
- Very high Q, and very accurate and stable resonant frequency Confined to low frequencies (< 200 MHz) Non-integrated Used to create low noise, accurate, reference oscillators
SAW devices
- High frequency, but poor accuracy (for resonant frequency) - Cantilever beams promise high Q, but non-tunable and havent made it to the GHz range, yet, for resonant frequency - FBAR Q > 1000, but non-tunable and poor accuracy - More on this topic in the last lecture this week42
MEMS devices
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Voltage Controlled Oscillators (VCOs)L Vout M1 Vs M2 Vout
L1 Vout Cvar Vcont
L2
VbiasCvar
M1
C1 V1
IbiasVcont
Ibias
Cvar
Include a tuning element to adjust oscillation frequency
- Typically use a variable capacitor (varactor)(transistor junctions, interconnect, etc.) Fixed cap lowers frequency tuning range
Varactor incorporated by replacing fixed capacitance
- Note that much fixed capacitance cannot be removed
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Model for Voltage to Frequency Mapping of VCOT=1/Fvco L1 Vout Cvar Vcont Vin Vbias M1 Vs L2 Vout M2 Cvar
VCO frequency versus Vcont Fvco Fout slope=Kv Vin Vbias Vcont
fo
Ibias
Model VCO in a small signal manner by looking at deviations in frequency about the bias pointoutput frequency
- Assume linear relationship between input voltage and44
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Model for Voltage to Phase Mapping of VCO
Phase is more convenient than frequency for analysis
- The two are related through an integral relationship
Intuition of integral relationship between frequency and phase1/Fvco= out(t) out(t) 1/Fvco= +M.H. Perrott 45
Frequency Domain Model of VCOTake Laplace Transform of phase relationship
- Note that KT=1/Fvco L1 Vout Cvar Vcont Vin VbiasM.H. Perrott
v
is in units of Hz/V
L2 Vout M2 Vs Cvar
Frequency Domain VCO Model
M1
vin
2Kv s
out
Ibias
46
Varactor Implementation Diode VersionConsists of a reverse biased diode junction
- Variable capacitor formed by depletion capacitance - Capacitance drops as roughly the square root of thebias voltage
Advantage can be fully integrated in CMOS Disadvantages low Q (often < 20), and low tuning range ( 20%)V+ V+ VP+ N+ N- n-well P- substrate
Cvar
V-
Depletion Region
V+-V-
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A Recently Popular Approach The MOS VaractorConsists of a MOS transistor (NMOS or PMOS) with drain and source connected together Advantage easily integrated in CMOS Disadvantage Q is relatively low in the transition regionregion will be swept across each VCO cycleV+ V+ W/L VVCoxN+ PDepletion Region N+
- Abrupt shift in capacitance as inversion channel forms - Note that large signal is applied to varactor transitionCvar
Cdep VT V+-V-
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A Method To Increase Q of MOS Varactorto VCO
Cvar
C W/L LSB
2C 2W/L
4C W/L 4W/L
MSB
Vcontrol
Overall Capacitance
000 001 010 011 Coarse 100 Control 101 110 111
Vcontrol Fine Control
Coarse Control
Fine Control
High Q metal caps are switched in to provide coarse tuning Low Q MOS varactor used to obtain fine tuning See Hegazi et. al., A Filtering Technique to Lower LC Oscillator Phase Noise, JSSC, Dec 2001, pp 1921-1930M.H. Perrott 49
Supply Pulling and PushingL1 Vout Cvar Vcont M1 Vs M2 L2 Vout L Vout
VbiasCvar
M1
C1 V1
IbiasVcont
Ibias
Cvar
Supply voltage has an impact on the VCO frequency
- Voltage across varactor will vary, thereby causing a shift in its capacitance - Voltage across transistor drain junctions will vary,thereby causing a shift in its depletion capacitance
This problem is addressed by building a supply regulator specifically for the VCOM.H. Perrott 50
Injection LockingVnoise Vin
VCOVout
|Vnoise(w)|W
|Vout(w)|W
wo w
wo -w w |Vout(w)|
Noise close in frequency to VCO resonant frequency can cause VCO frequency to shift when its amplitude becomes high enough
|Vnoise(w)|W
wo w |Vnoise(w)|
wo -w w |Vout(w)|
W
wo w |Vnoise(w)|
W
wo -w w |Vout(w)|
W
wo w
W
wo -w w
W
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Example of Injection LockingFor homodyne systems, VCO frequency can be very close to that of interferersRF in(w)Interferer Desired Narrowband SignalW
LNARF in
Mixer
0
wint wo LO frequency
LO signal Vin
- Injection locking can happen if inadequate isolationfrom mixer RF input to LO port
Follow VCO with a buffer stage with high reverse isolation to alleviate this problem
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SummarySeveral concepts are useful for understanding LC oscillators
- Barkhausen criterion - Impedance transformations
Voltage-controlled oscillators incorporate a tunable element such as varactornetwork for coarse tuning Improves varactor Q, as well
- Increased range achieved by using switched capacitor - Supply pulling, injection locking, coupling
Several things to watch out for
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Noise in Voltage Controlled Oscillators
VCO Noise in Wireless SystemsZin
From Antenna and Bandpass Filter
PC board trace
Mixer Package Interface RF in LNA LO signal VCO IF out To Filter
Zo
Reference Frequency
Frequency Synthesizer
Phase Noise f
fo
VCO noise has a negative impact on system performance
- Receiver lower sensitivity, poorer blocking performance - Transmitter increased spectral emissions (output spectrummust meet a mask requirement)55
Noise is characterized in frequency domainM.H. Perrott
VCO Noise in High Speed Data LinksZin
From Broadband Transmitter
PC board trace
Data
Zo
Package Interface
In Amp
Clock and Data Recovery
Clk
Data Out
Data In
Phase Detector
Loop Filter VCO
Clk Out
Jitter
VCO noise also has a negative impact on data links
- Receiver increases bit error rate (BER) - Transmitter increases jitter on data stream (transmittermust have jitter below a specified level)56
Noise is characterized in the time domainM.H. Perrott
Outline of TalkSystem level view of VCO and PLL noise Linearized model of VCO noise
- Noise figure - Equipartition theorem - Leesons formula - Hajimiri model
Cyclo-stationary view of VCO noise Back to Leesons formula
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Noise Sources Impacting VCOTime-domain view Jitter out(t)
tFrequency-domain view Sout(f) PLL dynamics set VCO carrier frequency (assume noiseless for now) vc(t) Extrinsic noise vn(t) vin(t) Intrinsic noise out(t) Phase Noise
fo
f
Extrinsic noise Intrinsic noiseM.H. Perrott
- Noise from other circuits (including PLL) - Noise due to the VCO circuitry58
VCO Model for Noise AnalysisTime-domain view Jitter out(t)
t
Note: Kv units are Hz/VPLL dynamics set VCO carrier frequency (assume noiseless for now) vc(t) Extrinsic noise vn(t) vin(t) Intrinsic noise 2Kv s vn(t) out
Frequency-domain view Sout(f) Phase Noise
fo2cos(2fot+out(t)) out(t)
f
We will focus on phase noise (and its associated jitter)
- Model as phase signal in output sine waveform
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Simplified Relationship Between out and OutputPLL dynamics set VCO carrier frequency (assume noiseless for now) vc(t) Extrinsic noise vn(t) vin(t) Intrinsic noise 2Kv s vn(t) out 2cos(2fot+out(t)) out(t)
Using a familiar trigonometric identity
Given that the phase noise is small
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Calculation of Output Spectral Density
Calculate autocorrelation
Take Fourier transform to get spectrum
- Note that * symbol corresponds to convolutionIn general, phase spectral density can be placed into one of two categories
- Phase noise (t) is non-periodic - Spurious noise - (t) is periodicout out
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Output Spectrum with Phase NoiseSuppose input noise to VCO (vn(t)) is bandlimited, non-periodic noise with spectrum Svn(f)
- In practice, derive phase spectrum as
Resulting output spectrum
Ssin(f) 1 f
Sout(f)
-fo
fo
*Sout(f) 1 dBc/Hz Sout(f) f fo
f
-foM.H. Perrott
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Measurement of Phase Noise in dBc/HzSout(f) 1 dBc/Hz -fo fo Sout(f) f
Definition of L(f)
- Units are dBc/HzFor this case
- Valid when M.H. Perrott
is small in deviation (i.e., when carrier is not modulated, as currently assumed)63
out(t)
Single-Sided VersionSout(f) 1 dBc/Hz fo Sout(f) f
Definition of L(f) remains the same
- Units are dBc/HzFor this case
- So, we can work with either one-sided or two-sidedspectral densities since L(f) is set by ratio of noise density to carrier powerM.H. Perrott 64
Output Spectrum with Spurious NoiseSuppose input noise to VCO is
Resulting output spectrum
Ssin(f) 1 f
Sout(f)
-fo
fo
*Sout(f) 1 dBc fo
1 dspur 2 2 fspur f
-fspur
fspur
1 dspur 2 2 fspur f
-foM.H. Perrott
fspur
65
Measurement of Spurious Noise in dBcSout(f) 1 dBc -fo fo fspur f 1 dspur 2 2 fspur
Definition of dBc
- We are assuming double sided spectra, so integrate overpositive and negative frequencies to get power Either single or double-sided spectra can be used in practice
For this case
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Calculation of Intrinsic Phase Noise in OscillatorsZactive Active Negative Resistance Generator Zres
Vout
Resonator
Active Negative Resistance Zactive 1 = -Rp -Gm
Zres
Resonator
inRn
Vout
Rp inRp
Cp
Lp
Noise sources in oscillators are put in two categories
- Noise due to tank loss - Noise due to active negative resistance
We want to determine how these noise sources influence the phase noise of the oscillatorM.H. Perrott 67
Equivalent Model for Noise CalculationsActive Negative Resistance 1 = -Rp -Gm Zactive Zres Resonator
inRn
Vout
Rp inRp
Cp
Lp
Noise Due to Active Negative Resistance
Compensated Resonator with Noise from Tank 1 = -Rp -Gm
inRn
Vout
Rp inRp
Cp
Lp
Noise Due to Active Negative Resistance Noise from Tank
Ztank
Ideal Tank
inRn
inRp
Vout
Cp
Lp
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Calculate Impedance Across Ideal LC Tank CircuitZtank Cp Lp
Calculate input impedance about resonance
=0
negligible
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A Convenient Parameterization of LC Tank ImpedanceZtank Cp Lp
Actual tank has loss that is modeled with Rp
- Define Q according to actual tank
Parameterize ideal tank impedance in terms of Q of actual tank
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Overall Noise Output Spectral DensityNoise Due to Active Negative Resistance Noise from Tank Ztank Ideal Tank
inRn
inRp
Vout
Cp
Lp
Assume noise from active negative resistance element and tank are uncorrelated
- Note that the above expression represents total noise thatimpacts both amplitude and phase of oscillator outputM.H. Perrott 71
Parameterize Noise Output Spectral DensityNoise Due to Active Negative Resistance Noise from Tank Ztank Ideal Tank
inRn
inRp
Vout
Cp
Lp
From previous slide
F(f)F(f) is defined as
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Fill in ExpressionsNoise Due to Active Negative Resistance Noise from Tank Ztank Ideal Tank
inRn
inRp
Vout
Cp
Lp
Noise from tank is due to resistor Rp
Ztank(f) found previously
Output noise spectral density expression (single-sided)
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Separation into Amplitude and Phase NoiseNoise Due to Active Negative Resistance Noise from Tank Ztank Ideal Tank
inRn
inRp
Vout
Cp
Lp
Amplitude Noise
Vsig
At
vout t
Vout
APhase Noise
t
Equipartition theorem states that noise impact splits evenly between amplitude and phase for Vsig being a sine wave
- Amplitude variations suppressed by feedback in oscillator74
M.H. Perrott
Output Phase Noise Spectrum (Leesons Formula)Output SpectrumNoise Due to Active Negative Resistance Noise from Tank Ztank Ideal Tank
SVsig(f)
Carrier impulse area normalized to a value of one
inRn
inRp
Vout
Cp
Lp
L(f) fo f f
All power calculations are referenced to the tank loss resistance, Rp
M.H. Perrott
75
Example: Active Noise Same as Tank NoiseActive Negative Resistance 1 = -Rp Vout -Gm Resonator
inRn
Rp inRp
Cp
Lp
Noise factor for oscillator in this case isL(f)
Resulting phase noise
-20 dB/decade
log(f)
M.H. Perrott
76
The Actual Situation is Much More ComplicatedinRp1 Tank generated noise Rp1 Cp1Vout
Lp1
Lp2
Cp2Vout
Rp2
inRp2 Tank generated noise
A
A
inM1 Transistor generated noise
M1 Vs
M2
inM2 Transistor generated noise
Ibias VbiasM3
inM3
Impact of tank generated noise easy to assess Impact of transistor generated noise is complicated
- Noise from M and M is modulated on and off - Noise from M is modulated before influencing V - Transistors have 1/f noise1 3 2
out
Also, transistors can degrade Q of tankM.H. Perrott 77
Phase Noise of A Practical OscillatorL(f) -30 dB/decade
-20 dB/decade 10log ( f1/f 3 fo 2Q2FkT Psig
(log(f)
Phase noise drops at -20 dB/decade over a wide frequency range, but deviates from this at:
- Low frequencies slope increases (often -30 dB/decade) - High frequencies slope flattens out (oscillator tank doesnot filter all noise sources)78
Frequency breakpoints and magnitude scaling are not readily predicted by the analysis approach taken so farM.H. Perrott
Phase Noise of A Practical OscillatorL(f) -30 dB/decade
-20 dB/decade 10log ( f1/f 3 fo 2Q2FkT Psig
(log(f)
Leeson proposed an ad hoc modification of the phase noise expression to capture the above noise profile
- Note: he assumed that F(f) was constant over frequencyM.H. Perrott 79
A More Sophisticated Analysis MethodIdeal TankAmplitude Noise
Vout iin Vout Cp LpPhase Noise
A
t
Our concern is what happens when noise current produces a voltage across the tank
- Such voltage deviations give rise to both amplitude and phase noise - Amplitude noise is suppressed through feedback (or byamplitude limiting in following buffer stages) Our main concern is phase noise
We argued that impact of noise divides equally between amplitude and phase for sine wave outputsM.H. Perrott
- What happens when we have a non-sine wave output?80
Modeling of Phase and Amplitude PerturbationsIdeal TankAmplitude Noise
Vout iin Vout Cp LpPhase Noise iin(t)
A
t
Phase iin(t) o t h(t,) Amplitude iin(t) o t A(t) hA(t,) out(t)
out(t) o A(t) o t t
iin(t)
Characterize impact of current noise on amplitude and phase through their associated impulse responses
- Phase deviations are accumulated - Amplitude deviations are suppressed
M.H. Perrott
81
Impact of Noise Current is Time-VaryingIdeal TankAmplitude Noise
Vout iin Vout Cp LpPhase Noise iin(t)
A
t
Phase iin(t) o 1 t out(t) h(t,)
out(t) o 1 A(t) t
iin(t)
Amplitude iin(t) o 1 t A(t) hA(t,)
o 1
t
If we vary the time at which the current impulse is injected, its impact on phase and amplitude changes
- Need a time-varying model
M.H. Perrott
82
Illustration of Time-Varying Impact of Noise on PhaseT iin(t) qmax t0 iin(t) qmax t1 iin(t) qmax t2 iin(t) qmax t3 iin(t) qmax t4 Vout(t)
tVout(t)
t
tVout(t) =0
t
tVout(t)
t
tVout(t)
t
t
t
High impact on phase when impulse occurs close to the zero crossing of the VCO output Low impact on phase when impulse occurs at peak of outputM.H. Perrott 83
Define Impulse Sensitivity Function (ISF) (2fot)T iin(t) qmax t0 iin(t) qmax t1 iin(t) qmax t2 iin(t) qmax t3 iin(t) qmax t4 Vout(t)
tVout(t)
t
tVout(t) =0
t(2fot)
T
tVout(t)
t
t
tVout(t)
t
t
t
ISF constructed by calculating phase deviations as impulse position is variedM.H. Perrott
- Observe that it is periodic with same period as VCO output84
Parameterize Phase Impulse Response in Terms of ISFT iin(t) qmax t0 iin(t) qmax t1 iin(t) qmax t2 iin(t) qmax t3 iin(t) qmax t4 Vout(t)
tVout(t)
t
tVout(t) =0
t(2fot)
T
tVout(t)
t
t
tVout(t)
t
t
t
iin(t) oM.H. Perrott
t
h(t,)
out(t) o t85
Examples of ISF for Different VCO Output WaveformsExample 1Vout(t) Vout(t)
Example 2 t t(2fot)
(2fot)
t
t
ISF (i.e., ) is approximately proportional to derivative of VCO output waveform
- Its magnitude indicates where VCO waveform is mostsensitive to noise current into tank with respect to creating phase noise
ISF is periodic In practice, derive it from simulation of the VCOM.H. Perrott 86
Phase Noise Analysis Using LTV Frameworkin(t) h(t,) out(t)
Computation of phase deviation for an arbitrary noise current input
Analysis simplified if we describe ISF in terms of its Fourier series (note: co here is different than book)
M.H. Perrott
87
Block Diagram of LTV Phase Noise ExpressionInput Current Normalization in(t) 1 qmax ISF Fourier Series Coefficients 2 co 2 Integrator out(t) 1 j2f Phase to Output Voltage out(t) 2cos(2fot+out(t))
2cos(2fot + 1) c1 2 2cos(2(2fo)t + 2) c2 2
2cos(n2fot + n) cn 2
Noise from current source is mixed down from different frequency bands and scaled according to ISF coefficientsM.H. Perrott 88
Phase Noise Calculation for White Noise Input (Part 1)Note that2 in
is the single-sided noise spectral density of in(t)
f
(q ( 2fn
1
2 i2
SX(f) -3fo -2fo -fo 0 fo2 i2
max
2fo SA(f)
3fo
f
in(t)
1 qmax
X2
A
1 f0
n 2 q max 2f
(1(1
-fon 2 q max 2f
2cos(2fot + 1)
B2cos(2(2fo)t + 2)
1-fo
1 ffo
( (1
2 i2
0 SB(f)
fo
f
-fon 2 q max 2f
C2cos(3(2)fot + n)
1-2fo
1 f2fo
( (1
2 i2
0 SC(f)
fo
f
-fon 2 q max 2f
DM.H. Perrott
1-3fo
1 f3fo
( (
2 i2
0 SD(f)
fo
f
-fo
0
fo
f89
Phase Noise Calculation for White Noise Input (Part 2)2 i2
n 2 q max 2f
(1(1
SA(f) f
ISF Fourier Series Coefficients
A 0 SB(f) fo
co 2
Integrator out(t) 1 j2f
Phase to Output Voltage out(t) 2cos(2fot+out(t))
-fon 2 q max 2f
( (1
2 i2
B 0 SC(f) fo f
c1 2
-fon 2 q max 2f
( (1
2 i2
C 0 SD(f) fo f
c2 2
-fon 2 q max 2f
( (
2 i2
D 0 fo f
-fo
c3 2
M.H. Perrott
90
Spectral Density of Phase SignalFrom the previous slide
Substitute in for SA(f), SB(f), etc.
Resulting expression
M.H. Perrott
91
Output Phase NoiseSout(f) Sout(f) 1 dBc/Hz f 0 -fo 0 fo f Sout(f) f
We now know
Resulting phase noise
M.H. Perrott
92
The Impact of 1/f Noise in Input Current (Part 1)Note that2 in
is the single-sided noise spectral density of in(t)
f
(q ( 2fn
1
2 i2
SX(f) 1/f noise -3fo -2fo -fo 0 fo2 i2
max
2fo SA(f)
3fo
f
in(t)
1 qmax
X2
A
1 f0
n 2 q max 2f
(1(1
-fon 2 q max 2f
2cos(2fot + 1)
B2cos(2(2fo)t + 2)
1-fo
1 ffo
( (1
2 i2
0 SB(f)
fo
f
-fon 2 q max 2f
C2cos(3(2)fot + n)
1-2fo
1 f2fo
( (1
2 i2
0 SC(f)
fo
f
-fon 2 q max 2f
D
1-3fo
1 f3fo
( (
2 i2
0 SD(f)
fo
f
-fo
0
fo
f93
M.H. Perrott
The Impact of 1/f Noise in Input Current (Part 2)SA(f)ISF Fourier Series Coefficients Integrator out(t) 1 j2f Phase to Output Voltage out(t) 2cos(2fot+out(t))
n 2 q max 2f
(1(1
2 i2
A fo f B fo f C
co 2
-fon 2 q max 2f
( (1
2 i2
0 SB(f)
c1 2
-fon 2 q max 2f
( (1
2 i2
0 SC(f)
-fon 2 q max 2f
( (
2 i2
0 SD(f)
fo
f D
c2 2
-fo
0
fo
f
c3 2
M.H. Perrott
94
Calculation of Output Phase Noise in 1/f3 regionFrom the previous slide
Assume that input current has 1/f noise with corner frequency f1/f
Corresponding output phase noise
M.H. Perrott
95
Calculation of 1/f3 Corner FrequencyL(f) -30 dB/decade
(A)-20 dB/decade
(B)f1/f3
10log ( fo 2Q
2FkT Psig
(log(f)
(A) (B)
(A) = (B) at:M.H. Perrott 96
Impact of Oscillator Waveform on 1/f3 Phase NoiseISF for Symmetric WaveformVout(t)
ISF for Asymmetric WaveformVout(t)
t(2fot) (2fot)
t
t
t
Key Fourier series coefficient of ISF for 1/f3 noise is co
- If DC value of ISF is zero, c
o
is also zero
For symmetric oscillator output waveform
- DC value of ISF is zero no upconversion of flicker noise!(i.e. output phase noise does not have 1/f3 region)
For asymmetric oscillator output waveformM.H. Perrott
- DC value of ISF is nonzero flicker noise has impact97
Issue We Have Ignored Modulation of Current NoiseinRp1 Tank generated noise Rp1 Cp1Vout
Lp1
Lp2
Cp2Vout
Rp2
inRp2 Tank generated noise
A
A
inM1 Transistor generated noise
M1 Vs
M2
inM2 Transistor generated noise
Ibias VbiasM3
inM3
In practice, transistor generated noise is modulated by the varying bias conditions of its associated transistor
- As transistor goes from saturation to triode to cutoff, itsassociated noise changes dramatically
Can we include this issue in the LTV framework?M.H. Perrott 98
Inclusion of Current Noise Modulationiin(t) in(t) h(t,)T = 1/fo
out(t)
(2fot) (2fot)
Recall
0
t
By inspection of figure
We therefore apply previous framework with ISF as
M.H. Perrott
99
Placement of Current Modulation for Best Phase NoiseBest Placement of Current Modulation for Phase Noise T = 1/fo (2fot) 0 (2fot) (2fot) Worst Placement of Current Modulation for Phase Noise T = 1/fo
t
0 (2fot)
t
t
t
Phase noise expression (ignoring 1/f noise)
Minimum phase noise achieved by minimizing sum of square of Fourier series coefficients (i.e. rms value of eff)M.H. Perrott 100
Colpitts Oscillator Provides Optimal Placement of T = 1/fo Vout(t)
L I1(t) VbiasM1 Vout(t) (2fot)
t I1(t)0 (2fot)
C1
t
Ibias
C2
t
Current is injected into tank at bottom portion of VCO swing
- Current noise accompanying current has minimalimpact on VCO output phase
M.H. Perrott
101
Summary of LTV Phase Noise Analysis MethodStep 1: calculate the impulse sensitivity function of each oscillator noise source using a simulator Step 2: calculate the noise current modulation waveform for each oscillator noise source using a simulator Step 3: combine above results to obtain eff(2fot) for each oscillator noise source Step 4: calculate Fourier series coefficients for each eff(2fot) Step 5: calculate spectral density of each oscillator noise source (before modulation) Step 6: calculate overall output phase noise using the results from Step 4 and 5 and the phase noise expressions derived in this lecture (or the book)M.H. Perrott 102
Alternate Approach for Negative Resistance OscillatorRp1 Cp1Vout M1 Vs
Lp1
Lp2
Cp2Vout M2
Rp2
A
A
Ibias VbiasM3
Recall Leesons formula
- Key question: how do you determine F(f)?M.H. Perrott 103
F(f) Has Been Determined for This TopologyRp1 Cp1Vout M1 Vs
Lp1
Lp2
Cp2Vout M2
Rp2
A
A
Ibias VbiasM3
Rael et. al. have come up with a closed form expression for F(f) for the above topology In the region where phase noise falls at -20 dB/dec:
M.H. Perrott
104
References to Rael WorkPhase noise analysis
- J.J. Rael and A.A. Abidi, Physical Processes of PhaseNoise in Differential LC Oscillators, Custom Integrated Circuits Conference, 2000, pp 569-572
Implementation
- Emad Hegazi et. al., A Filtering Technique to Lower LCOscillator Phase Noise, JSSC, Dec 2001, pp 1921-1930
M.H. Perrott
105
Designing for Minimum Phase NoiseRp1 Cp1Vout M1 Vs
Lp1Vout M2
A
(A)
(B)
(C)
(A) Noise from tank resistance (B) Noise from M1 and M2
Ibias VbiasM3
(C) Noise from M3
To achieve minimum phase noise, wed like to minimize F(f) The above formulation provides insight of how to do this
- Key observation: (C) is often quite significant
M.H. Perrott
106
Elimination of Component (C) in F(f)Capacitor Cf shunts noise from M3 away from tankVout M2 Vs
Rp1
Cp1Vout M1
Lp1
A
- Component (C) iseliminated!
Issue impedance at node Vs is very low
- Causes M
Ibias VbiasM3
inM3
Cf
and M2 to present a low impedance to tank during portions of the VCO cycle Q of tank is degraded1
M.H. Perrott
107
Use Inductor to Increase Impedance at Node VsVoltage at node Vs is a rectified version of oscillator outputVout M2 Vs
Rp1
Cp1Vout M1
Lp1
- Fundamental componentis at twice the oscillation frequency
A
T = 1/fo
Lf Ibias
High impedance at frequency 2fo
Place inductor between Vs and current source
- Choose value to resonatewith Cf and parasitic source capacitance at frequency 2fo
Vbias
M3
inM3
Cf
Impedance of tank not degraded by M1 and M2
- Q preserved!
M.H. Perrott
108
Designing for Minimum Phase Noise Next Part
Rp1
Cp1Vout M1
Lp1Vout M2 Vs
(A)
(B)
(C)
A
(A) Noise from tank resistance (B) Noise from M1 and M2
T = 1/fo
Lf Ibias
High impedance at frequency 2fo
(C) Noise from M3
Vbias
M3
inM3
Cf
Lets now focus on component (B)M.H. Perrott
- Depends on bias current and oscillation amplitude109
Minimization of Component (B) in F(f)
Rp1
Cp1Vout M1
Lp1Vout M2 Vs
(B) Recall from Lecture 11
A
Ibias
So, it would seem that Ibias has no effect!
- Not true want to maximize A (i.e. Pnoise, as seen by:
sig)
to get best phase
M.H. Perrott
110
Current-Limited Versus Voltage-Limited Regimes
Rp1
Cp1Vout M1
Lp1Vout M2 Vs
(B) Oscillation amplitude, A, cannot be increased above supply imposed limits If Ibias is increased above the point that A saturates, then (B) increases
A
Ibias
Current-limited regime: amplitude given by Voltage-limited regime: amplitude saturatedBest phase noise achieved at boundary between these regimes!M.H. Perrott 111
SummaryLeesons model is outcome of linearized VCO noise analysis Hajimiri method provides insights into cyclostationary behavior, 1/f noise upconversion and impact of noise current modulation Rael method useful for CMOS negative-resistance topology
- Closed form solution of phase noise! - Provides a great deal of design insight
Practical VCO phase noise analysis is done through simulation these days
- Spectre RF from Cadence, FastSpice from Berkeley
Design Automation is often utilized to estimate phase noise for integrated oscillatorsM.H. Perrott 112