beneath a stacked-spiral inductor - 東京工業大学...2010/09/28 matsuzawa & okada lab. a...
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2010/09/28Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
A 484µm2, 21GHz LC-VCO Beneath a Stacked-Spiral Inductor
Tokyo Institute of Technology, Japan
Rui Murakami, Kenichi Okada, and Akira Matsuzawa
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Contents
Background
Downsizing of LC-VCO
Circuit Stacking Beneath the Inductor
Measurement Result
Summary
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
0
0.5
1
1.5
2
1999 2004 2009 2014 2019
Scaling of Supply Voltage
ITRS2000
ITRS2009
YearAs supply voltage is scaled down, low voltage circuits are needed.
Supp
ly V
olta
ge [V
]
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Jitter (Phase noise) of Oscillators
• Ring oscillators are more susceptible to the effect of downscaling the supply voltage.
k:Boltzmann’s constantT: Absolute temperatureω0:freq.ωoffset: Offset freq.VTH:Threshold voltageM:Number of stagesQ:Quality factor of LC-tankIbias:Bias currentγn,γp:Noise factor
• LC-VCO
• Ring-VCO
[1]
[2]
[1]A. Mazzanti, et al., JSSC 2008 [2]A. Abidi, JSSC 2006
2n
biasDD2
offset
20
LCγ1k
QIVT
ωω +
⋅⋅=L
⎭⎬⎫
⎩⎨⎧
++−
⋅⋅= 1)γ(γ2kpn
THDD
DD
biasDD2
offset
20
Ring VVVM
IVT
ωω
L
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Problem of Clock Generator
2007 2010 2013 2016 2019 2022Year
Ring-VCO
LC-VCO31.6x
15
10
5
0
Clock
6σJi
tter/C
lock
[%]
Clo
ck [G
Hz]
15
10
5
0
Ring-VCOs must be replaced with LC-VCOs
[3]
[3] K.Okada, et al., VLSIC 2009
VDD↓
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Comparison of Oscillators
LargeAreaVery small
SmallPower cons.@high freq.
LargeGoodNoiseBadLCRing
To replace Ring-VCO by LC-VCO
inductor
core
A very small LC-VCO is desired.
The inductor occupies the dominant area in a LC-VCO.It is needed to miniaturize the Inductor
Increasing chip area will become a problem.
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Oscillation Frequency
A 20GHz LC-VCO results in a good balance between area and phase noise
frequencyLCπ2
1=
Poor phase noise and high power consumption.
At a higher frequency, smaller inductance is needed.VCO can be designed using a small inductor.
Over 20GHz, quality factor degradation is caused by the skin effect.
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Stacked-spiral Inductor
Stacked-spiral inductor
Mono-layer inductor
• Single layer• Wide line width• Large diameter• Low R, High Q• Large area
• Multi layer• Narrow line width• Small diameter• High R, Low Q• Ultra low space
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Comparison the Inductors
15µm 100µmStacked-spiral Mono-layer
15.518.64.190.51Mono-layer2.829.7651.71.16Stacked-spiral
QCL
[fF]RS
[Ohm]LS
[nH]@20GHz
RS LS
CL
Area
1/44
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Placement of Core-circuit
Insert core-circuit under the inductor.
When the Inductor is miniaturized, the core-circuit size becomes close to the area of the inductor.
Inductive coupling is a problem.
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Inductive Coupling
parallel line eddy current
Inductance and quality factor will be degraded by inductive coupling
⎟⎟
⎠
⎞
⎜⎜
⎝
⎛+−+⎟
⎟⎠
⎞⎜⎜⎝
⎛++= 2
2
2
2
11ln2md
md
dm
dmmM
[4] H.M.Greenhouse, TOPHAP 1974
m
d
⎟⎟⎠
⎞⎜⎜⎝
⎛
+−=⎟
⎟⎠
⎞⎜⎜⎝
⎛
+−= 2
2
22
2
122
22
22
22
1 111
QQkL
LRLkLL
ωω
[4]
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Reducing coupling
To reduce coupling, some layout techniques are applied.
• Slit shaping interconnections• Placing inductor trace and
interconnections orthogonally
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Analysis of Interconnection Effects
LS 3%, Q 5%down
The model of the interconnections is created and simulated the influence on LS and Q by HFSS.
2.671.14Beneath2.821.16Normal
QLS [nH]@20GHz
BeneathNormal
It corresponds 0.4dB in FoM.
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Chip Micrograph(1)
OutputBuffer
VCO core22µm
22µm
CMOS 65nm
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Chip Micrograph(2)
VCO core
100µm
100µm
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Measurement Result
21GHzFreq.
0.6VVDD
206FoMA[dBc/Hz]
65nmTech.
-89.4@1MHz-110@10MHz
PN[dBc/Hz]
1.92mWpower
consumption
⎟⎠⎞
⎜⎝⎛−⎟⎟
⎠
⎞⎜⎜⎝
⎛⎟⎠⎞
⎜⎝⎛+⎟⎟
⎠
⎞⎜⎜⎝
⎛∆
−∆−= 2DC
1mmArealog10
mW1log10log20}{ P
fffFoMA o [5]
[5]Shih-An Yu, et al., IEEE TCAS-II 2009
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Performance Summary
[6]A.Tanabe, et al., RFIC 2009 [7]I.Hwang, et al., JSSC 2004[3]K.Okada, et al., VLSIC 2009
190154173173FoM
LC
195
180
0.3
4.5GHz
-109@1MHz
0.16
290000
[3]
RingLC(3D-inductor)
+Div.LC(3D-inductor)Type
182199206FoMA
3509065Tech. [nm]
3.310.6VDD [V]
0.9GHz5GHz(20GHz/4)
21GHzFreq.
-101@600kHz-103@1MHz-110@10MHzPN
9.82.81.92Power [mW]
24002597484Area [µm2]
[7][6]This Work
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Summary
• A very compact LC-VCO with a stacked-spiral inductor and the core-circuit being placed beneath the inductor is proposed.
• To reduce coupling, interconnections are slit shaped and orthogonalized with the coil trace.
• This VCO achieves a chip area of 484µm2
equaling ring-oscillator and FoMA of 206dBc/Hz.
2010/09/28 R.Murakami, Tokyo Tech
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Matsuzawa& Okada Lab.Matsuzawa& Okada Lab.
Thank you!!