bi-directional isolated dc-dc converter for next … isolated dc-dcconverter for next-generation...

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„This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of ETH Zürich’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promo- tional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document you agree to all provisions of the copyright laws protecting it.” Bi-Directional Isolated DC-DC Converter for Next-Generation Power Distribution - Comparison of Converters using Si and SiC Devices D. Aggeler*, J. Biela*, S. Inoue**, H. Akagi**, J. W. Kolar* * ETH Zurich, Power Electronic Systems Laboratory, Switzerland ** Tokyo Institute of Technology, Department of Electrical and Electronic Engineering, Japan

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„This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of ETH Zürich’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promo-tional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document you agree to all provisions of the copyright laws protecting it.”

Bi-Directional Isolated DC-DC Converter for Next-Generation Power Distribution - Comparison of Converters using

Si and SiC Devices

D. Aggeler*, J. Biela*, S. Inoue**, H. Akagi**, J. W. Kolar* * ETH Zurich, Power Electronic Systems Laboratory, Switzerland

** Tokyo Institute of Technology, Department of Electrical and Electronic Engineering, Japan

Bi-Directional Isolated DC-DC Converter for Next-GenerationPower Distribution - Comparison of Converters using

Si and SiC Devices

D. Aggeler*, J. Biela*, S. Inoue**, H. Akagi**, J. W. Kolar** ETH Zurich, Power Electronic Systems Laboratory, Switzerland

** Tokyo Institute of Technology, Department of Electrical and Electronic Engineering, Japan

Abstract- In this paper two bi-directional DC-DC convertersfor a 1MW next-generation BTB system of a distribution system,as it is applied in Japan, are presented and compared withrespect to design, efficiency and power density. One DC-DCconverter applies commercially available Si-devices and the otherone high voltage SiC switch, which consists of a SiC JFET cascode(MOSFET+1 JFET) in series with five SiC JFETs.

In the comparison also the high frequency, high voltagetransformer, which ensures galvanic isolation and which is acore element of the DC-DC converter, is examined in detail byanalytic calculations and FEM simulations.

For validating the analytical considerations a 20kW SiC DC-DC converter has been designed in detail. Measurement resultsfor the switching and conduction losses have been acquired fromthe SiC and also for a Si system for calculating the losses of thescaled 1MW system.

Keywords - Next-generation BTB system, High voltageHF DC-DC converter, SiC JFET cascode, High voltage HFtransformer

I. INTRODUCTION

Generally, the power generation with renewable energysources is a discontinuous process and in most of the casesdepending on the environment. Feeding in the producedenergy into a distribution system influences the overall energyflow. Therefore, it is a challenge to control and keep theenergy stabilized. Figure 1 shows a Japanese 6.6kV powerdistribution system having two feeders from a transformer.

Today, each distribution system in Japan has radial feeders,forming no loop. If the distributed power generators areinstalled concentrated on one of the feeders (feeder 2 in figure1), regulating voltage on both feeders within an acceptablerange becomes difficult.

Back-to-Back (BTB) systems, also known as loop con-trollers, have been investigated to solve the problem of powerflow balancing. The dotted lines in figure 1 show wherethe BTB system would be installed and in figure 2 a circuitconfiguration is shown which is presented in [1]. The line-frequency (50Hz or 60Hz) transformers in figure 2 play animportant role in stepping down/up the voltage and in ensuring

6.6kV Feeder 1Distribution -------

TransformerBTB

System:6.6kV Feeder 2

. .I.*--DistributedPower

Fig. l V tGenerators

Fig. 1: A 6.6kV distribution system in Japan having two feeders.

Two- or Three-Level Converter

Transformer Transformer6.6kV 6.6kV

Feeder 1 Feeder 2

Fig. 2: The present BTB system for the 6.6kV power distributionsystem.

galvanic isolation between the two feeders. Especially, gal-vanic isolation is desirable to prevent a zero-sequence currentcirculating between the two feeders. However, one 6.6kV,1MW transformer weighs approximately 3,000kg to 4,000kg,and may be too heavy to be mounted on an electric pole.Actually, the solution with the transformers results in a largevolume and occupy a big part of the conversion system.Furthermore, the costs are quite high due to rising prices forraw materials. As a consequence, a new topology is underinvestigation substituting the two line-frequency transformers.The present BTB system with two three-phase, line frequencytransformers will be replaced by the next-generation BTBsystem given in figure 3. There it is shown, that a BTB systemin the next-generation consists of a number of converter cellswhich in each case consists of a rectifier/inverter stage and a

DC-DC converter. The galvanic isolation of the proposed BTBsystem is guaranteed by a high frequency (HF) transformer.Due to the high operating frequency the volume and the weightof the passive components is reduced very much compared tothe line-frequency transformers.

For the design of the full bridge converter different devicetechnologies can be used: on the one hand a realizationwith Si IGBT devices [2] and on the other hand with SiCJFET components provided by SiCED [3]. In the followinga galvanic isolated BTB system with SiC will be designed,according the specification parameters given in table I andcompared with the Si system of [2].

In section II the operation principle of the next-generationBTB system solution is summarized shortly. The followingsection III focuses on the DC-DC converter with SiC JFETcascodes. There, the converter specifications, the dual activebridge (DAB) as well as the high voltage (HV) SiC switchare explained. In section IV experimental results of the SiC

Input voltageOutput voltageRated PowerCurrent THDEach harmonicEMI-Norm

6.6kV6.6kV1MW5%<3%

TABLE I: Design requirements of the BTB system.

1-4244-0844-X/07/$20.00 ©2007 IEEE. 510

Fig. 3: A 6.6kV BTB system in the next generation.

JFET cascode and the design of the HV-HF transformer basedon analytic calculations and FEM simulations are presented.Furthermore, a 3D-model of the proposed DC-DC converter isshown. Section V summarizes the performance of the Si IGBTsystem presented in [2]. Thereafter, the possible solutions for a

next-generation BTB system- Si IGBT and SiC JFET cascode- are compared for a 1MW system in section VI. In sectionVII another application of the high voltage SiC cascode - a

medium voltage motor drive - is shortly presented and finallyconclusions are drawn in section VIII.

II. NExT-GENERATION MEDIUM VOLTAGE BTB SYSTEM

The next-generation BTB system (figure 3) consists of a

rectifier/inverter stage and as the core circuit a bi-directional,galvanic isolated DC-DC converter, as shown in figure 4 (SiIGBT) or figure 5 (SiC JFET cascode), is applied.The cascaded converter cells form a single-phase part of the

BTB system where each converter cell consists of a DC-DCconverter. The DC-link voltage in each converter cell dependson the number of cascade connections N. Hence, waveformlevels, AC input voltages and DC-link voltages per convertercell are calculated, for a different number N of converter cells,and summarized in table II.

The analyzed Si IGBT system consists of six converter cellsin each phase (N=6), what results in a DC-link voltage of1.02kV in each cell, allowing to use 1.7kV IGBTs availableat a lower cost than higher voltage Si devices. The applicationof several converter cells and phase shifted unipolar sinusoidalPWM of the rectifier/inverter stage, where the triangularcarrier signal in one converter cell is phase shifted by 7/Nfrom each other, results in a multilevel waveform of theline-to-neutral voltage. Therefore, the equivalent switchingfrequency is 2Nf,, where fc is the carrier frequency. As

N Waveform AC Input DC Link1 3 Level 3,811V 6.10kV2 5 Level 1,905V 3.48kV3 7 Level 1,270V 2.03kV4 9 Level 952V 1.52kV5 11 Level 752V 1.22kV6 13 Level 635V 1.02kV7 15 Level 544V 870V8 17 Level 476V 762V9 19 Level 423V 677V

TABLE II: Voltage and waveform levels depending on the numberN of converter cells of a next-generation BTB system.

IVD2

Fig. 4: A bi-directional isolated DC-DC converter.

- LJC. I I1 I,-'HL L =6.1kV 6.1kV

5OkHzT_ 4 TI3k .

244 1 l

cf. Figure 6

Fig. 5: SiC high voltage DC-DC converter.

a result, the voltage waveform has (2N+1) levels with theswitching frequency of 2Nf,. Thus, the carrier frequency ofthe PWM converters can be as low as 4kHz by six convertercells in each phase.The application of SiC JFET cascode devices for the DC-

DC converter offer a HV blocking capability and thus onlyone converter cell (N=1) is required. Accordingly, a smallernumber of power devices is utilized. While in the Si IGBTbased design (N=6) the number of power devices is 288, forthe SiC JFET cascode system 48 semiconductor devices are

used. Due to the lower number of converter cells, in the SiCsystem a higher carrier frequency is needed.

III. OPERATION PRINCIPLE SIC HV-HF-CONVERTER

The proposed HV and HF DAB converter with SiC JFETcascode, replacing the conventional BTB system with the twoline-frequency transformers, is shown in figure 5.The specification of the SiC DAB converter is given in

table III. The design requirements for the distribution systemgiven at a line-to-line voltage VAC of 6.6kV (table I), a

DC-link voltage VDC of 6.1kV (with 13% safety margin,table II) is resulting. One goal of the next-generation BTBsystem is reduction in terms of size, especially of the passivecomponents. A high switching frequency will result in smallermagnetic components/transformer but the HF losses increaseconsiderable. For that reason the switching frequency of5OkHz is chosen to limit HF losses. Consideration of power

controllability and a dynamical margin of continuous currentflowing a rated power of 20kW is designed for the DAB. Fortransferring a bigger amount of power, devices must be con-

nected in parallel to increase the continuous current capability.Furthermore, the transformer turns ratio is fixed because of theequal voltage level on both side of the distribution system.

DC-link VoltageSwitching frequencyRated PowerTransformer turns ratioPeak inductance currentDC-link voltage ripple

6.1kV50kHz20kW1:17A< 5%

TABLE III: Specification of DC-DC converter.

511

First Converter Cell

6.6kV *15'$ ici 15'45 6.6kV| ~~~~~~~intl| econd Converter Cell

,0 N-th Converter Cell

-f-y'ry-l-

-ry-ry-\- -,-'

A. Dual Active Bridge

As modulation method the common phase shift operationis chosen for the DAB. The low computation complexity ofthe phase shift method, the simplicity of the circuit and thereduced power losses due to zero voltage switching (ZVS)are the main reasons for the wide application of this method.Characteristic of the DAB principle is the power transfer fromthe active bridge on the input side via the galvanic isolation(transformer) to the active bridge on the output side. There,the amount of transferred power is controlled by the phaseshift angle X [4],

p ViV2/n X5 (w - )

272fsL(1)

and the leakage inductance is used as energy storing element.The transferred power depends nonlinearly on the phase shiftangle and is limited by the switching frequency and theleakage inductance. The minimal phase shift angle and withthis the minimal controllable power step is given by the clockfrequency of the control board. Depending on the nonlinearrelation of power and phase shift angle, the biggest gradientis with a phase shift angle of zero degree. There the maximalpower step will appear respective the minimal controllablepower at this point. With an increased phase shift angle, thepower step will decrease and the controllable power will besmaller.

In [5] the active and reactive power are shown as a functionof the phase shift angle. A high phase shift value will increasesignificantly the reactive part of the power and only a little bitthe active power. Consequently, the efficiency of the converteris reduced. A small phase shift angle the control signalconstrain the controllability of the power steps. Therefore,an operation in the phase shift interval of [4, -] is favorableand chosen for the considered DAB.

In order to verify the operation of the DAB topology a

simulation model was built for the specification given in tableIII. There, only a simplified equivalent circuit of the HV SiCswitch was used. An exact model, which describes staticand dynamic behavior of the HV switch in more detail isunder investigation. Figure 6 shows the simulated transformervoltages VTi and VT2 with the inductor current iL, whereasthe stray capacitance of the transformer is considered.

B. High voltage SiC switch

As a result of the operation voltage, switches with a HVblocking capability are required. Thus, SiC JFET cascode are

chosen because of the good material characteristics of SiC,as the low on-state losses and high frequency operation. Twodifferent modules are applied: one contains four SiC JFETs,two connected in series and two in parallel. For controlling theswitch additionally a low-voltage Si MOSFET is connected tothe lower JFETs (A, figure 7). In the other module just twoSiC JFETs are connected in series and two in parallel (B,figure 7).The structure of the SiC JFET die is designed with a internal

pn-junction from source to drain [6], which is working as

the freewheeling diode of the SiC JFET. Thus, no externalfreewheeling diodes are required.The gates of the JFETs are connected to additional diodes

for passive controlling the turn-on and turn-off mechanism of

-/IL ,TT2----z4

(4

0 10 20Time L us ]

4

30 40

Fig. 6: Simulated waveforms for the phase shift mode atVi=V2=6.1kV and Pou,t = 20kW (f5=50kHz, = 7w/3).

each JFET. This diode is a low leakage fast recovery epitaxialdiode (FRED) and is included in the SEMITOP package.

In order to achieve the required blocking voltage for theDC-link input voltage, multiple modules must be connectedin series. The conventional JFET is a normally-on device.For this reason a low-voltage Si MOSFET is connected inseries which is a normally-off device and controllable with a

standard gate drive circuit. Both modules are mounted in a

SEMITOP package (figure 7) by Semikron International [7].The ratings of the JFET are a blocking voltage VCES of 1500Vand a continuous drain current ID of 8A.The basic concept of the SiC JFET cascode switch is

described in [8]. There, also the static blocking characteristicsand the dynamic switching behavior are discussed. In theon-state of the SiC JFET cascode, a positive gate voltage isapplied to the MOSFET. Then, the gate of the lower JFET inthe A module is connected to the source of the MOSFET andthe JFET is conducting. Also the other in series connectedJFETs are conducting due to its already mentioned normally-on characteristics. For this case the JFETs work as a resistorconnected in series to the on-resistance of the MOSFET.

In the blocking state the MOSFET gate is shorted to theground and the drain-source voltage of the MOSFET increasesuntil the pinch-off voltage of the first JFET is reached. Furtherincreasing of the MOSFET's drain-source voltage is now

blocked by the first JFET, which is blocking the excess voltage,until the belonging Diode between the gate of the upper andthe lower JFET reaches its avalanche blocking voltage. Atthis point the avalanche current is flowing and the gate of thesecond JFET drops down below its source potential. The gate-source voltage of the second JFET is negative and thereforein blocking state. For the next stages this process is iterative

D)

BB

AA

Fig. 7: SiC JFET cascode mounted in a SEMITOP package.

512

-6 c

8 8

Q fl

MP,

until the DC-link voltage is blocked.

IV. DESIGN OF DC-DC CONVERTER

In the following the design of the SiC DC-DC converterfor an output power of 20kW is presented. For calculatingthe switching and conduction losses measurement results forthe SiC JFET are presented. Moreover, the design of the highvoltage transformer will be discussed in detail and a 3D modelof the converter is presented.

A. Experimental Results

For an application in the distribution system with thespecifications given in table I the HV switch consists of twomodules B and one module A, resulting in a total blockingvoltage of 9kV. There, a safety voltage margin is included fordynamic voltage balancing. In the following these three seriesconnected modules are denoted as one HV switch.

For determining the switching and conducting losses an

experimental setup as shown in figure 8 was built. There,also a simplified schematic is given. On the high voltage sidethe gate of the HV switch is connected to the source so thatit works as freewheeling diode. The HV switch on the lowvoltage side is actively controlled by a gate driver.

In a first step single pulses for testing the turn-off behaviorwith an inductive load at different current amplitudes havebeen acquired. With the measured current and voltage wave-

forms the ZVS turn-off losses of the DAB converter can becalculated. In a next step double pulse measurements will beperformed in order to test also the turn-on behavior of the SiCJFET devices.The gate drive circuit is designed with a small transformer,

which could withstand the 6.1kV DC-link voltage, for thegate drive power supply. Furthermore, the gate drive signal istransferred via fiber optic to the gate driver, where the standardMOSFET driver IXD1409SI from IXYS is used. The gate-source voltage to turn the HV switch on is +12V. For turningthe MOSFET off a negative gate-source voltage of -5V is usedin order to reduced the influence of induced noise.

In the test circuit (figure 8) the HV switch is on the bottomside of the PCB between the film capacitors mounted on a heatsink behind the fan. Additionally, to the film capacitancesceramic capacitors are placed on the top side close to theswitches in order to minimize the stray inductance and reducevoltage overshoot.

In figure 9 and figure 10 experimental results for theswitching behavior with a DC-link voltage of 1.6kV and a

gate resistance of 1OQ are presented. The measurements are

made with high voltage differential probes from Tektronix andtrimmed high voltage current transformers.The turn-on current waveform in figure 9 of the HV switch

shows a significant peak of capacitive current during thefalling edge of the voltage. This usually would result insignificant turn-on losses of the SiC JFET. In the DAB,however, the switch is operated under ZVS conditions whatleads to negligible turn-on losses.

In figure 10 the turn-off characteristic is shown. There,the current first decreases rapidly to half of the original draincurrent, stays constant and then falls down to zero. The totalfall time of the current is approximately 80ns. The drain-source voltage VDC rises within 60ns. This current shapereflects a capacitive turn-off behavior as shown by the dashedline in figure 10.The equivalent circuit during the capacitive turn of is shown

in figure 11. During the period (A) the load current flowsthrough the low side HV switch. At turn-off, the currentsplits up into two capacitive currents (B). One is chargingthe lower capacitance which has a high value at low drain-source voltage. With increasing voltage the capacitance isdecreasing due to the spreading space charge region. Thesecond current is discharging the capacitance of the upper

switch, which is increasing with increasing voltage. Finally,the load current flows through the freewheeling diode of theupper HV switch (C) and then in reverse direction throughthe n-channel as soon as the upper switch is turned-on. Dueto this approximately capacitive turn-off behavior (ZVS) theturn-off switching losses are negligible.

There, the interlocking delay time must be larger than therise time of the drain-source voltage in order to guarantee soft

1800

1200

!

U 600

0

)0 12

Time [ns]

.9

6

3

0

Fig. 9: Turn-on characteristic of the SiC HV switch: drain-sourcevoltage and drain-source current.

+Vdc

_

46GateSignalF

cf Figure 6Fan , -tWm

10 my 215mm

Fig. 8: Power loss measurement setup for the HV switch with thecorresponding simplified schematic.

1800

1200

to

ct 600

0

0 40 80 120 160Time [ns]

. 9

6

3 ;

0

200

Fig. 10: Turn-off characteristic of the SiC HV switch: drain-sourcevoltage and drain-source current with approximated capaci-

tive current flow (dashed).

513

_---- --------- ----------VVoltage

Approximatedcapacitivecuirent ----------------

Cu-ie--nt------- - ---------- ---------

Current \/

T

+VdcT

cf. Figure 60-~

Current L

measur ment

Figure 6

OH

A B C

Fig. 11: Current flow during turn-off: A) HV switch is in on-state.B) Charge/discharge of capacitors. C) High side diode is

conducting.

switching. In the considered case with a voltage of 1.6kV a

interlocking time of minimal 80ns results. For a constant loadcurrent this time will increase with higher DC-link voltages.

In figure 12 the drain-source voltages for different DC-link voltages are shown at turn-off. There, the on time ofthe HV switch and the load was the same for all DC-linkvoltages. This results in different turn-off current amplitudesand decreasing rise times of the HV switch voltage. At a DC-link voltage of 1.6kV the du/dt is approximately 24kV/,us.

During the switching tests several external diodes (FRED)have been destroyed. This probably results from excessiveavalanche energies during the turn-off of the JFETs at risingvoltages. Due to these effects it was not possible to measure

the switching behavior at higher voltages than 1.6kV. In a nextstep the external diodes will be replaced by higher avalancheenergy rated ones and the HV SiC switch will be built up

with discrete components in order to be able to measure allrelevant signals. With the discrete SiC JFET cascode as shownin figure 13 the switching behavior at higher voltages will beinvestigated and presented in a future paper.

Besides the switching losses also the conduction losses are

required for calculating the overall system losses. Therefore,the on-resistance RDS,O, of the HV switch has been measured.The value is approximately 1.35Q at 25°C, which results in18.7W conduction losses in forward direction per HV switchat 50kHz and a continuous load current of 4A. For highertemperatures this value must be multiplied by (Tj/298)16,where Tj is the absolute junction temperature.

In the reverse direction the current first flows through theantiparallel diodes of the MOSFET and of the JFETs. The

1800

1200 -1

600

ell

(Dbi).t1-0

0 ]

40 80 120Time [ns]

160

Fig. 12: HV SiC switch turn-off behavior of different DC-link volt-ages, RGate = 1OQ.

Fig. 13: HV SiC switch built with discrete components.

forward voltage of the intrinsic antiparallel JFET diodes isin the range of 4V at a current of 4A. This would leadto relatively large conduction losses during the freewheelingperiod. However, as soon as the MOSFET and the JFETsare turned on the current could also flow in reverse directionthrough the n-channel of the MOSFET/JFETs which has a

resistance in the range of 1.35Q what results in much lowerreverse conduction losses. These are 3.7W per HV switch forconducting MOSFET/JFETs and 0.39W for the short periodwhere the freewheeling diodes are conducting.

B. High Voltage - High Frequency Transformer

In the next-generation BTB system the line-frequency trans-former should be replaced by a HV transformer operatingat HF. Each DC-DC converter in the BTB system uses one

transformer which also ensures the galvanic isolation betweenthe input and output stage. The HV-HF transformer is one ofthe core elements in DAB operation considering power transferand efficiency of the whole DC-DC converter. The phase shiftoperation mode of the DAB defines the requirements of thetransformer, which will be designed in the following for an

output power of 20kW and a phase shift angle between and4

7F Due to the HF operation ferrite material must be used forthe core and the HF losses in the windings must be considered.

For calculating the core losses Van den Bossche's [9] lossmodel of ferrites cores, considering non-sinusoidal waveforms,is used and compared to the losses resulting with the conven-

tional Steinmetz equation and with also the modified Steinmetzequation [10]. The values of the loss models do not differsignificantly and for the considered design the worst case valueis used.

Based on these equations different ferrite materials havebeen examined. There, it turned out that the N87 material fromEpcos has the lowest core losses at the specified switchingfrequency of 50kHz and a maximal flux density of 150mT.The core selection results in four UU93/152/30 cores, wherethe primary and secondary winding are wounded around themiddle leg as shown in the 3D-Model (figure 16) of the 20kWDC-DC converter system. For choosing the number of turnsand also the flux density in the core different designs havebeen compared. There, it turned out that with 120 turns on

the primary and on the secondary winding the lowest overalllosses occur. In this operating point also the core and the HFlosses in the windings are approximately balanced.

For guaranteeing a high isolation voltage the distance be-tween the windings and also between the winding and thecore must be large enough and some high voltage isolatingmaterial must be used for the bobbin. Furthermore, thewinding should be covered by an isolating material at theouter side between the winding and the core. The insulation

514

+VdcT

+VdcT

Fan

1.6kV, 1.5kV

-- --- --- -- ---

11kV -----------.-----------

lIllN

/ Lt- ,_.

of the wire itself must be capable of withstanding at leastvoltage between the different layers of the winding. Theserequirements significantly influence the winding arrangementof the transformer. In figure 14 a possible arrangement, whichfulfils the above mentioned requirements, is shown.

There, each winding is distributed into three chambers inorder to reduce the layer voltage and the parasitic capacitanceof the transformer [11]. This results in a relatively low layervoltage, what is important for the high frequency operationwith high du/dt-values. The fast edges of the voltage leadsto a non uniform voltage distribution between the single turnsof one winding and to higher turn voltages at the ends ofthe winding during high du/dt. This is like charging atransmission line with a voltage pulse where a wave travelsalong the line until a uniform distribution is reached. Thiseffect will be examined in detail in a future paper.

Another advantage of the higher number of chambers is aninterleaving of the windings which could be used for reducingthe HF losses in the windings or to control the leakageinductance of the transformer. In the considered case the twoinner chambers are interleaved, i.e. primary and secondarychamber are exchanged and a sequence: primary - primary -secondary - primary - secondary - secondary chamber results(cf. figure 14). The two chambers in the middle of the windingwindow have less turns than the outer ones. Instead of 9 layersand 5 turns per layer, only 6 layers and 5 turns. With thisarrangement a leakage inductance of approximately 4mH -

calculated by 3D FEM simulations with MAXWELLTM (cf.figure 15)- results. This inductance is required for transferringthe rated power of 20kW at the optimal phase shift angle of7/3. Thus, no additional external inductor is needed and thepower density of the system increases.

In conventional windings the layers are wound from the leftto the right and then back in the next layer (S- or U-winding).There, the maximum voltage between two consecutive layersis twice the layer voltage - in the considered case maximal500V. This relatively high layer-to-layer voltage could bedivided by two with a Z-winding, where each layer is woundin the same direction, i.e. for example all layers are woundfrom left to right. In this case the wire must be returned tothe beginning of the layer outside the chamber in order toavoid a crossing of all wires of the considered layer. In orderto guarantee a high isolating voltage also for the returningwire also the middle leg of the core is surrounded by aninsulation. In table IV the transformer design characteristicsare summarized.

For reducing the influence of skin- and proximity effectslitz wire with 315 strands / strand diameter of 0.071mm, atotal external diameter of 2.01mm and 1.27mm2 cross sectionis used.

Fig. 14: Arrangement of the transformer windings.

2.8074e+0002. 6319e+000

2q5646, 0002.2809e+0002. 10541 +000

Win ng I~~~.92990+0001.70544e+0001.57899e 001701O50e 0011.2280ie0001.50525e 001

7.050a e -001

Fig. 15: Energy density in a cut plane through the core determinedby a 3D FEM simulation with MaxwellT N of the specified

transformer as shown in figure 14.

Material N87Turn number 120Turn ratio 1:1

Transferred power 20kWCore losses (25°C) 35W

(100 C) 15WHF losses (25°C) 24W

(100 C) 30WLeakage inductance 3.4mHMain inductance 215mH

Magnetizing current 283mASpecified max. flux density 150mT

Effective cross section 3360mm2Effective volume 1188cm3

TABLE IV: Characterization of the HV-HF transformer.

C. Rectifier/InverterBesides the DC-DC converter also single phase PWM

converters in the input (rectifier) and output (inverter) stageof the BTB system are required. There, also the HV SiCcascodes is applied as switching device in order to reduce theswitching losses and the number of series connected stages.The selection of the switching frequency is a trade-off betweenswitching/HF-/capacitor losses and the size of the input/outputinductance. With the relatively low switching losses of the SiCcascode a switching frequency of 50kHz is achievable whatresults in small passive components.The required capacitance for a voltage ripple VDC,link,pp of

less than 5% of the DC-link voltage VDc,link can be calculated[12] by

PCDC,min (2)

VDC,link WO * VDC,link,pp

where P is the nominal power and w is the line-frequency. Fordimensioning the input/output inductor a maximal admissiblecurrent ripple of 5% of the nominal current amplitude IN,i isassumed. Therefore, a minimal inductance of

L ,link T (3)is required.

With the specifications for the 20kW system in table III aa capacitance value of 34.2,F and an input/output inductancevalue of 41mH (cf. figure 3) results.

D. 3D-Model of DAB converter

In order to achieve a small volume of the system a compactlayout of the DAB converter is required. Accordingly, an

515

n>AI ~~~~~240mm

!{

HVSiC 364mmswitches Control Gate drivers

Board

Fig. 16: 3D-model of the high voltage, high frequency DC-DCconverter featuring SiC JFET cascode (removed isolating

cover of transformer winding).

optimal placement of the components is essential. A 3D-model of the DC-DC converter is shown in figure 16 withan approximated power density of 1.9kW/dmi3 and the powerper kilogram is 1.39kW/kg.The DC-link capacitor is realized with electrolytic capacitor

banks which consist of Epcos 450V/33,uF capacitors. Betweenthe two capacitor banks on the input and output side ofthe DC-DC converter the full bridge with four HV switchesmounted on two heat sinks with fans is located. The gatedrive circuits of the SiC JFET cascodes including auxiliarysupply are mounted in between the upper and the lower heatsink. There, additionally high voltage ceramic capacitors areplaced close to the modules for reducing the stray inductance.The control circuit for the DC-DC converter and its supplycould be mounted below the transformer in a EMI protectivehousing.

V. LOSSES OF SI SYSTEM

The comparative system with latest trench-gate Si IGBTs,evaluated in [2], operates with a switching frequency of20kHz, at a rated power of lOkW and with a DC-link voltageof 350V. An experimental setup was built and measurementsresults were presented. Based on this the overall loss havebeen determined and a loss analysis was performed.The specified application is the same as for the SiC system

and is also based on the specification parameters of table I.A summary of the determined power component losses andmagnetic losses of the Si System and also of the SiC systemare given in table V.

Si-IGBT (10kW) SiC-JFET (20kW)Core loss HF loss Core loss HF loss

Transformer 20W 18W 35W 24WInductor 9W lOW

Switching Conduction Switching ConductionSwitch losses 90W 189W OW 90WTotal losses 336W 149W

TABLE V: Power losses based on measurements and simulations ofthe Si IGBT system and the SiC JFET system.

VI. COMPARISON SI IGBT SYSTEM - SIC JFET SYSTEM

In the previous section the losses for the Si and the SiCsystem have been evaluated based on measurement results.There, it could be seen that the SiC material shows a betterperformance in comparison to the conventional Si material. Ingeneral, the achievable current density, the operating temper-ature and the breakdown voltage are higher and the switching

and conduction losses are lower. The drawback of the SiCmaterial are the limited current carrying capability (limiteddie size) and the high price due to higher manufacturing costsfor the SiC wafers/processing costs at the moment.With the results for the lOkW/2OkW system, a system with

the specifications given in table I for a BTB system of thedistribution system in Japan at a rated power of 1MW couldbe designed. Therefore, the Si IGBT system [2] and the SiCJFET cascode system are scaled up to this power level andare compared with respect to power losses, the performanceand the efficiency in the following. The differences betweenthe two converter systems are on the one hand the appliedcore materials and on the other hand the semiconductordevices. Due to the different semiconductor materials differentswitching frequencies and voltage levels result. In table VIthe parameters of the scaled systems, referred to a transferredpower of 1MW, are summarized.A significant advantage of the SiC JFET switch is the high

blocking voltage what results in only one converter cell perphase for a distribution system operating with a AC line-to-linevoltage of 6.6kV. In the Si system, applying commercial 1.7kVIGBTs, six in series connected converter cells in each phaseare required to adapt the voltage to the blocking capability ofthe Si DC-DC converter. The benefit of the larger amount ofseries connected stages is, that the number of switching levelsis higher and therefore a smaller input/output inductance ofthe inverter/rectifier stage is required.

To transfer a rated power of 1MW fifty 20kW SiC DC-DC converters, as presented in this paper, must be connectedin parallel and none of them in series. Due to the lowerpower rating of the Si DC-DC converters this number must bedoubled for a 1MW Si system and because of the lower DC-link voltage (1.02kV) six Si DC-DC converters are connectedin series and also in parallel per phase. Resulting is a largenumber of power component devices in the Si system.The conduction losses of the Si IGBT system are dominated

by the current flowing through the switch at the nominaloperating point of lOkW. With a voltage drop of 5.9V anda RMS current of 32A, across two IGBTs and two diodes,conduction losses of 189W, respectively 18.9kW for the scaled1MW system result. A single HV SiC switch is operatingat a rated current of 4A (corresponding to 200A in the1MW system) what leads to smaller conduction losses. Witha measured on-resistance of 1.4 Q per HV switch 4.5kWconduction losses results for the 1MW system.Due to ZVS conditions in both systems the switching losses

could be reduced. The measured switching losses in the Sisystem are 9kW, whereas the losses in the SiC system can

Si-IGBT SiC-JFETNumber of converters 100 50Switching frequency 20kHz 50kHzConducting losses 18.9kW 4.5kWSwitching losses 9kW OW

Transformer core losses 2kW 1.42kW (50°C)Transformer HF losses 1.8kW 1.3kW (50°C)Inductor core losses 900W Integrated in LaInductor HF losses 1kW Integrated in La

Efficiency 97% 99%

TABLE VI: Performance of the Si and SiC DC-DC converters linearscaled for the 1MW systems.

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be neglected due to the fast switching of the JFET and therelatively large output capacitance.

In the Si system Finemet FT-3M magnetic material isused for the transformer and the ferrite material PC44 forthe inductor. Especially, Finemet allows a high saturationmagnetic flux density of 1.2T at a temperature of 100°C andshows a small temperature dependence at a range from 250Cto 150°C. In the SiC converter system the material N87from Epcos was applied. There, an external inductor is notneeded any more, because the transformer was designed withthe necessary leakage inductance to transfer the rated power.This solution allows a further reduction of the system volumeand weight and also the magnetic losses.

VII. HV-HF DC-DC CONVERTER IN MEDIUM VOLTAGEMOTOR DRIVE APPLICATIONS

In the previous sections the SiC JFET has been applied forhigh power distribution systems. Another application area aremotor drives fed from high voltages as depicted in figure 17.There, a HV-HF DC-DC converter is shown with a 5kV inputvoltage and a HV full bridge converter realized with SiC JFET.As in the presented distribution system a HV-HF transformeris used for the galvanic isolation. Furthermore, the turn rationis adapted so that the secondary side voltage is approximately700V what results with a turns ratio of 8:1.The full bridge on the low voltage side could be built with

a standard full bridge of four switches. Due to the high DC-link voltage 1.2kV IGBTs would be required what wouldlead to relatively high switching losses on the low voltageside. Therefore, in the proposed converter system (figure17) a three level structure is used at the low voltage side.There, the required blocking voltage capability of the switchis divided by two due to the three levels and therefore standard600V MOSFET transistors could be used. This reduces theswitching losses significantly.

For converting the low DC voltage in a 3-phase system todrive the AC machine a standard DC-AC converter is added. Apossible application of such a system is a drilling robot whichcould replace the conventional drill pipe by a high voltagecable, the presented DC-DC converter and a controlled drillrobot.

Fig. 17: High voltage and high frequency DC-DC converter for driveapplications.

VIII. CONCLUSION

In this paper a bidirectional DC-DC converter based on highvoltage SiC JFETs for a 1MW next-generation back-to-backsystem of a distribution system is presented and compared toa conventional Si system. For validating the considerationsa 20kW system operating at a switching frequency of 50kHzwith a DC-link voltage of 6.1kV has been examined in detailand scaled up to 1MW. Based on a 3D CAD constructiona power density of 1.9kW/dm3 - 1.39kW/kg for the DC-DCconverter has been determined.As integral part of the converter system also a 20kW/50kHz

high voltage HF transformer with increased leakage inductancefor the dual active bridge has been designed by analyticalcalculations and 3D FEM simulations. The power density ofthe transformer is 5.9kW/dm3 and 2.7kW/kg.

For measuring the switching waveforms and the switchinglosses a high voltage test system has been constructed. Dueto the fast switching of the JFETs, the relatively large outputcapacitance and the ZVS operation of the DAB the switchinglosses are approximately negligible. With an on-resistanceof 1.4Q 90W conduction losses per 20kW DC-DC converterresult. Due to stability problems with the internal diodes ofthe SiC cascodes the switching losses have been measuredonly up to 1.7kV. Measurements at higher voltages will bepresented in a future paper.

In the comparison of the scaled 1MW Si and SiC systemsthe good material characteristic of SiC and the resulting highoperating frequency lead to a compact and low loss systemwith an efficiency of approximately 99% in contrast to 97%of the Si system.

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