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Bipolar Junction Transistor (BJT)
Lecture notes: Sec. 3
Sedra & Smith (6th Ed): Sec. 6.1-6.4* Sedra & Smith (5th Ed): Sec. 5.1-5.4*
* Includes details of BJT device operation which is not covered in this course
F. Najmabadi, ECE65, Winter 2012
A BJT consists of three regions
F. Najmabadi, ECE65, Winter 2012
Simplified physical structure
NPN transistor An implementation on an IC
Device construction is NOT symmetric o “Thin” base region (between E & C) o Heavily doped emitter o Large area collector
Device is constructed such that BJT does NOT act as two diodes back to back (when voltages are applied to all three terminals).
Six circuit variables: (3 i and 3 v) Two can be written in terms of the
other four:
BJT iv characteristics includes four parameters
F. Najmabadi, ECE65, Winter 2012
NPN transistor
CEBEBC
BCE
vvviii−=
+= :KVL
:KCL
Circuit symbol and Convention for current directions
(Note: vCE = vC – vE)
BJT iv characteristics is the relationship among (iB , iC , vBE , and vCE )
It is typically derived as ),(
)(
CEBC
BEB
vi givfi
==
Active mode:
0
/
/
DCE
VvSC
VvSCB
VveIi
eIii
TBE
TBE
≥=
==ββ
BJT operation in the “active” mode
F. Najmabadi, ECE65, Winter 2012
If the base is “thin” these electrons get near the depletion region of BC junction and are swept into the collector if vCB ≥ 0 (vBC ≤ 0 : BC junction is reverse biased!)
In this picture, ic is independent of vBC
(and vCE ) as long as
TBE VvSC eIi /=
0
0 0
DCE
CEDCEBEBC
VvvVvvv
≥≤−=−=
As Emitter is heavily doped, a large number of electrons diffuse into the base (only a small fraction combine with holes) The number of these electrons scales as TBE Vve /
BE junction is forward biased (vBE = VD0)
Base current is also proportional to
and therefore, iC : iB = iC/β
TBE Vve /
BJT operation in saturation mode
F. Najmabadi, ECE65, Winter 2012
For vBC ≥ 0 BC junction is forward biased and a diffusion current will set up, reducing iC .
1. Soft saturation: vCE ≥ 0.3 V (Si)* vBC ≤ 0.4 V (Si), diffusion current is small and iC is very close to its active-mode level.
2. Deep saturation region: 0.1 < vCE < 0.3 V (Si) or vCE ≈ 0.2 V = Vsat (Si), iC is smaller than its active-mode level (iC < β iB). o Called saturation as iC is set by outside
circuit & does not respond to changes in iB.
3. Near cut-off: vCE ≤ 0.1 V (Si) Both iC & iB are close to zero.
Similar to the active mode, a large number of electrons diffuse into the base.
BE junction is forward biased (vBE = VD0)
“Deep” Saturation mode:
satCE
BC
VvSB
Vvii
eIi TBE
≈<
=
/
ββ
* Sedra & Smith includes this in the active region, i.e., BJT is in active mode as long as vCE ≥ 0.3 V.
BJT iv characteristics includes four parameters
F. Najmabadi, ECE65, Winter 2012
NPN transistor
Circuit symbol and Convention for current directions
(Note: vCE = vC – vE)
BJT iv characteristics is the relationship among (iB , iC , vBE , and vCE )
It is typically derived as ),(
)(
CEBC
BEB
vi givfi
==
Simplified physical structure
BJT iv characteristics: iB = f(vBE) & iC = g(iB , vCE)
F. Najmabadi, ECE65, Winter 2012
iB
Cut-off : BE is reverse biased
0 ,0 == CB ii
Active: BE is forward biased BC is reverse biased
BC ii β=
Saturation: BE is forward biased, BC is forward biased
1. Soft saturation: 2. Deep saturation: 3. Near cut-off:
BCCE iiv ,V 7.03.0 β≈≤≤
BCCE iiv ,V 3.01.0 β<≤≤0 ,V 1.0 ≈≤ CCE iv
Early Effect modifies iv characteristics in the active mode
F. Najmabadi, ECE65, Winter 2012
iC is NOT constant in the active region.
Early Effect: Lines of iC vs vCE for different iB (or vBE ) coincide at vCE = − VA
+=
A
CEVvSC V
veIi TBE 1/
NPN BJT iv equations
F. Najmabadi, ECE65, Winter 2012
“Linear” model
Cut-off : BE is reverse biased Active: BE is forward biased BC is reverse biased (Deep) Saturation: BE is forward biased BC is reverse biased
0 ,0 == CB ii0
0 ,0
DBE
CB
Vvii
<==
+=
==
A
CEVvSC
VvSCB
VveIi
eIii
TBE
TBE
1/
/
ββ0
0
, 0 ,
DCEBC
BDBE
VviiiVv
≥=≥=
β
BCsatCE
VvSB
iiVv
eIi TBE
,
/
ββ
<≈
=
BCsatCE
BDBE
iiVviVv
, 0 , 0
β<=≥=
V 2.0 ,V 7.0 Si,For 0 == satD VV
PNP transistor is the analog to NPN BJT
F. Najmabadi, ECE65, Winter 2012
PNP transistor
Compared to a NPN: 1) Current directions are reversed 2) Voltage subscripts “switched”
“Linear” model
Cut-off : EB is reverse biased Active: EB is forward biased CB is reverse biased (Deep) Saturation: EB is forward biased CB is reverse biased
0 0 ,0
DEB
CB
Vvii
<==
0
0
, 0 ,
DECBC
BDEB
VviiiVv
≥=≥=
β
BCsatEC
BDEB
iiVviVv
, 0 , 0
β<=≥=
Notations
F. Najmabadi, ECE65, Winter 2012
DC voltages: Use “Double subscript” of BJT terminal: VCC , VBB , VEE . Resistors:
Use “subscript” of BJT terminal: RC , RB , RE .
Voltage sources are identified by node voltage!
Transistor operates like a “valve:” iC & vCE are controlled by iB
F. Najmabadi, ECE65, Winter 2012
Controller part: Circuit connected to BE sets iB
Controlled part: iC & vCE are set by transistor state (& outside circuit)
Cut-off (iB = 0): Valve Closed iC = 0
Active (iB > 0): Valve partially open iC = β iB
Saturation (iB > 0): Valve open iC < β iB iC limited by circuit connected to CE terminals, increasing iB does not increase iC
Recipe for solving BJT circuits (State of BJT is unknown before solving the circuit)
1. Write down BE-KVL and CE-KVL:
2. Assume BJT is OFF, Use BE-KVL to check: a. BJT OFF: Set iC = 0, use CE-KVL to find vCE (Done!) b. BJT ON: Compute iB
3. Assume BJT in active. Set iC = β iB . Use CE-KVL to find vCE . If vCE ≥ VD0 , Assumption Correct, otherwise in saturation:
4. BJT in Saturation. Set vCE = Vsat . Use CE-KVL to find iC . (Double-check iC < β iB )
NOTE: o For circuits with RE , both BE-KVL & CE-KVL have to be solved
simultaneously.
F. Najmabadi, ECE65, Winter 2012
F. Najmabadi, ECE65, Winter 2012
Example 1: Compute transistor parameters (Si BJT with β = 100).
CEC
BEB
vivi
+=
+×=
10 12 :KVL-CE
10 40 4 :KVL-BE3
3
incorrect Assumption V 7.0V 4V 4 0 10 40 4 :KVL-BE
V 7.0 and 0 :off-Cut Assume
0
30
→=>==→+××=
=<=
DBE
BEBE
DBEB
Vvvv
Vvi
0A 25.8 7.0 10 40 4 :KVL-BE
0 and V 7.0 :ON BE3
0
>=→+××=
≥==
µBB
BDBE
iiiVv
correct Assumption V 7.0V 75.3V 75.3 1025.8 10 12 :KVL-CE
mA 25.81025.8100
V 7.0 and :Active Assume
0
33
60
→=>==→+××=
=××==
=≥=
−
−
DCE
CECE
BC
DCEBC
Vvvv
iiVvii
β
β
BJT Transfer Function (1)
F. Najmabadi, ECE65, Winter 2012
CECCCC
BEBBi
viRVviRv+=
+= :KVL-CE
:KVL-BE
0 :KVL-CE0
0 :KVL-BE and 0 :off-Cut 0
CCCECECCC
C
iBEBEBi
DBEB
VvvRVi
vvvRvVvi
=→+×==
=→+×=<=
,0 ,0 Cutoffin BJT For 0
CCCECB
Di
VviiVv
===→<
0
:KVL-BE
0 and :ON BE
0
00
0
DiB
B
DiBDBBi
BDBE
VviR
VviViRv
iVv
≥→≥
−=→+×=
≥=
BJT Transfer Function (2)
F. Najmabadi, ECE65, Winter 2012
CECCCC
B
DiBDBE
viRVR
VviVv
+=
−==
:KVL-CE
and :ON BE 00
BC
DCCDiDCE
CCCCCECECCCC
B
DiC
DCEBc
RRVVVvVv
iR-VvviRVR
Vvi
Vvii
/
:KVL-CE
and :Active
000
0
0
β
β
β
−+≤→≥
=→+=
−×=
≥=
activein BJT /
For 000 →
−+≤≤
BC
DCCDiD RR
VVVvVβ
BJT Transfer Function (3)
F. Najmabadi, ECE65, Winter 2012
CECCCC
B
DiBDBE
viRVR
VviVv
+=
−==
:KVL-CE
and :ON BE 00
BC
satCCDIHiBc
C
satCCCsatCCCC
BcsatCE
RRVVVVvii
RV-ViViRV
iiVv
/
:KVL-CE
and :nSaturaatio
0 ββ
β
−+=>→<
=→+=
<=
saturationin BJT /
For 00 →<
−+ i
BC
DCCD v
RRVVV
β
BJT Transfer Function (4)
F. Najmabadi, ECE65, Winter 2012
saturation deepin BJT /
activein BJT /
Cutoffin BJT
0
000
0
→<−
+
→−
+≤≤
→<
iBC
satCCD
BC
DCCDiD
Di
vRRVVV
RRVVVvV
Vv
β
β
BJT transfer function on the load line
F. Najmabadi, ECE65, Winter 2012
CCCCCE iRVv )KVL-(CE Line Load
−=
togetherincrease & :Active 0
CB
IHiD
iiVvV ≤≤
unchanged but increases :Saturation
CB
iIH
iivV <
:offCut
0Di Vv <−
BJT as a switch
Use: Logic gate can turn loads ON (BJT in saturation) or OFF (BJT in cut-off)
ic is uniquely set by CE circuit (as vce = Vsat)
RB is chosen such that BJT is in deep saturation with a wide margin (e.g., iB = 0.2 ic /β)
F. Najmabadi, ECE65, Winter 2012
Load is placed in collector circuit
*Lab 4 circuit Solved in Lecture notes (problems 12 & 13)
BJT as a Digital Gate
Other variants: Diode-transistor logic (DTL) and transistor-transistor logic (TTL) BJT logic gates are not used anymore except for high-speed emitter-coupled
logic circuits o Low speed (switching to saturation is quite slow). o Large space and power requirements on ICs
F. Najmabadi, ECE65, Winter 2012
RTL NOT gate (VL = Vsat , VH = VCC)
Resistor-Transistor logic (RTL)
RTL NOR gate* RTL NAND gate*
*Solved in Lecture notes (problems 14 & 15)
BJT β varies substantially
Our BJT model includes three parameters: VD0 , Vsat and β o VD0 and Vsat depend on base semiconductor: o For Si, VD0 = 0.7 V, Vsat = 0.2 V
Transistor β depends on many factors: o Strongly depends on temperature (9% increase per oC) o Depends on iC (not constant as assumed in the model) o β of similarly manufactured BJT can vary (manufacturer spec sheet
typically gives a range as well as an average value for β ) o We will use the average β in calculations (PSpice also uses average β but
includes temperature and iC dependence). o βmin is an important parameter. For example, to ensure operation in
deep saturation for all similar model BJTs, we need to set iC /iB < βmin
F. Najmabadi, ECE65, Winter 2012