block diagram - cache.industry.siemens.com · appr. init. date copying of this document and giving...

Appr.Init.Date

COPY

ING OF

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MENT

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IVING

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USE O

R COM

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ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N

Rev. Modification Date NameSheet

Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E

NormInd. Circuit Diagram

Copyr

ight (C

) Siem

ens A

G, 20

06

Item No.:Unmounted Components are displayed blue or with dashed linesupdateDate=13/02/05

updateTime=07:37:56

Siemens AGDocumentationBlock Diagram

401

14.1.2013

A5E31374985A

002 EB200P

Memories (P. 017-024)018 - Level shifters019 - Level shifters020 - SDRAM - Micron021 - SDRAM - ISSI022 - Burst mode FLASH023 - EMC connectors

009 - ERTEC 200P

ERTEC 200P (P. 009-014)

010 - ERTEC 200P011 - ERTEC 200P012 - ERTEC 200P013 - ERTEC 200P - PWR014 - ERTEC 200P - PWR

005 - Trace MICTOR

007 - USB

Test and Debug (P. 002-008)002 - LEDs

006 - Trace, User GPIOs bus switches

003 - User GPIOs, octal switch004 - Debug bus switch, TMP, EEPROM, RS485

008 - Use Case MICTORs

RJ45, POF (P. 015-016)015 - RJ45016 - POF

FPGA (P. 025-027)024 - FPGA025 - FPGA026 - FPGA

027 - PCIe connector

PCIe (P. 028)

028 - External PSU convertor

PSU (P. 029-032)

029 - Power convertors030 - Power switching031 - Power sensing

033 - Reset circuit

RST, CFG (P. 033-034)032 - Config pin headers

Block diagram

017 - POF

Appr.Init.Date

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OF TH

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TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

402

Test and debugLEDs

EB200P

YELLOWLYA67KH2A K

REDLSA67KH1A K

750RR19

1 2

750RR20

1 2

750RR21

1 2

750RR22

1 2

GREENLGL29KH10A K

GREENLGL29KH14A K

GREENLGL29KH15A K

REDLSL29KH11A K

YELLOWLYL29KH12A K

YELLOWLYL29KH13A K

YELLOWLYL29KH17A KYELLOW

LYL29KH16A K

750RR23

1 2

750RR24

1 2

750RR25

1 2

750RR26

1 2

750RR27

1 2

750RR28

1 2

750RR29

1 2

750RR30

1 2

EN

74ALVC16244D3

25

36353332

13141617

EN

74ALVC16244D3

24

30292726

19202223

EN

74ALVC16244D3

1

47464443

2356

EN

74ALVC16244D3

48

41403837

891112

D2

GND 39VCC7 VCC18 VCC31 VCC42GND 4GND 10GND 15GND 21GND 28GND 34

GND 45

GND

P3.3V

GND

ORANGELOL29KH20A K

ORANGELOL29KH21A K

ORANGELOL29KH22A K

ORANGELOL29KH23A K

ORANGELOL29KH24A K

ORANGELOL29KH25A K

ORANGELOL29KH26A K

ORANGELOL29KH27A K

ORANGELOL29KH28A K

ORANGELOL29KH29A K

ORANGELOL29KH30A K

ORANGELOL29KH31A K

ORANGELOL29KH32A K

ORANGELOL29KH33A K

ORANGELOL29KH34A K

ORANGELOL29KH35A K

EN

74ALVC16244D2

1

47464443

2356

EN

74ALVC16244D2

48

41403837

891112

EN

74ALVC16244D2

25

36353332

13141617

EN

74ALVC16244D2

24

30292726

19202223

D3

GND 39VCC7 VCC18 VCC31 VCC42GND 4GND 10GND 15GND 21GND 28GND 34

GND 45

GND

750RR2

1 2

750RR3

1 2

750RR4

1 2

750RR5

1 2

750RR6

1 2

750RR7

1 2

750RR1

1 2

750RR8

1 2

750RR9

1 2

750RR10

1 2

750RR11

1 2

750RR12

1 2

750RR13

1 2

750RR14

1 2

750RR15

1 2

750RR16

1 2

GND

GND GND

FPGA_DONE5:E2;25:B6

FPGA_INITN25:B6

PSU_PG31:B8;33:B3

GPIO[0-95]4:B1;5:C2;6:B1;

8:B1;9:E1;10:A3;16:A3;16:C3;25:A1;

26:A2;32:A5

USER_GPIO[0-15]3:B2;6:B1

REDLSL29K

H6AK

GREENLGL29KH5A K

750RR18

1 2750RR17

1 2

P3.3V

P3.3V

16 V2u2C1 1

2

16 V2u2C2 1

2

16 V100nC3 1

2

16 V100nC4 1

2

GND GND

P3.3VP3.3VGND

P3.3V P3.3V

GND

GREENLGA67KH3A KGREEN

LGA67KH4A K

ORANGELOL29KH36A K

750RR398

1 2

FPGA_INFO26:B6

USER

_GPIO

[0-15

]

USER_GPIO[0]USER_GPIO[1]USER_GPIO[2]USER_GPIO[3]




GPIO[

0-95]

GPIO[25]GPIO[26]GPIO[27]

GPIO[28]GPIO[29]GPIO[30]GPIO[31]

PSU_PG

FPGA_INITNFPGA_DONEFPGA_INFO

FPGA DONE

FPGA INIT(ERROR)

BracketSync

BracketPower

BracketMaintenance

BracketError

PCBSync

PCBError

PCBPower

PCBMaintenance

PCBFO-1

PCBFO-2

PCBPROFIenergy

PCBDiagnostic

PCBUser GPIO 0

PCBUser GPIO 1

PCBUser GPIO 2

PCBUser GPIO 3

PCBUser GPIO 4

PCBUser GPIO 5

PCBUser GPIO 6

PCBUser GPIO 7

PCBUser GPIO 8

PCBUser GPIO 9

PCBUser GPIO 10

PCBUser GPIO 11

PCBUser GPIO 12

PCBUser GPIO 13

PCBUser GPIO 14

PCBUser GPIO 15

max 40mA max 40mA

User and status LEDs

User LEDs

Status LEDs

FPGA LEDs

FPGA INFO

Appr.Init.Date

COPY

ING OF

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IVING

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ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

403

Test and debugEB200P

User octal switch and GPIOs

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3VUSER_GPIO[0-15]

2:A1;6:B1

GND

P3.3V

GND

16 V2u2C5 1

2 16 V100nC6 1

2

GND GND

P3.3V

50 V1n

C8 12

P3.3V P3.3V

P3.3V

GND

X501X502

X503X504X505X506X507X508X509X5010X5011X5012X5013X5014X5015X5016X5017X5018

X5019X5020

S1116

S1215

S1314

S1413

S1512

S1611

S1710

S189

50 V10nC7 1

2

4K7R34

12

4K7R44

12

4K7R33

12

4K7R48

12

4K7R54

12

4K7R38

12

4K7R37

12

4K7R32

12

4K7R42

12

4K7R36

12

4K7R46

12

4K7R31

12

4K7R52

12

4K7R35

12

4K7R50

12

4K7R40

12

470RR53

12

470RR51

12

470RR49

12

470RR47

12

470RR45

12

470RR43

12

470RR41

12

470RR39

12

USER_GPIO[0] USER_GPIO[0]USER_GPIO[1] USER_GPIO[1]USER_GPIO[2] USER_GPIO[2]USER_GPIO[3] USER_GPIO[3]USER_GPIO[4] USER_GPIO[4]USER_GPIO[5] USER_GPIO[5]USER_GPIO[6] USER_GPIO[6]USER_GPIO[7] USER_GPIO[7]USER_GPIO[8] USER_GPIO[8]USER_GPIO[9] USER_GPIO[9]USER_GPIO[10] USER_GPIO[10]USER_GPIO[11] USER_GPIO[11]

USER_GPIO[12]USER_GPIO[12]USER_GPIO[13]USER_GPIO[13]USER_GPIO[14]USER_GPIO[14]USER_GPIO[15]USER_GPIO[15]

User GPIOs

Appr.Init.Date

COPY

ING OF

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DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:55

Siemens AG14.1.2013

A5E31374985A

002

404


Debug bus switch, TMP, EEPROM, RS485

1B

2A

1A

5

OE1OE2

1

2

12

3

5443

2

45 5

1

3 34

2

VCCGND

1

2B

74CB3Q3384

D422

3131

1224

256910

21

1516192023

18171411874

GND

P3.3V

TEMP-SENS

TMP123U3

U+3SO 6CS5

SCK4

U-1 NC2

EEPROM

24C16D5

SCL6WC7

1NC2

3

SDA 5

GND

1KR64

12

1KR66

12

GND GND

4K7R65

12

4K7R63

12

P3.3VP3.3V

1KR60

12

1KR59

12

GND

P3.3V

GND

P3.3V

GND

TEST_XTEMP_EN32:B8 TEST_XEEPROM_EN32:B8

TEST_XUART_EN32:B8

1B

2A

1A

5

OE1OE2

1

2

12

3

5443

2

45 5

1

3 34

2

VCCGND

1

2B

74CB3Q3384

D622

313

11224

256910

21

1516192023

18171411

874

P3.3V

GND

UART_RX7:C7

UART_CTS7:D7

UART_TX7:D7

UART_RTS7:D7

11

2

SN65HVD10D7

EN13EN22

4

1

67

GND

P3.3V

D7VCC8 GND 5

TEST_XTRACE_EN6:B1;25:D7;32:B8

PIPESTAT[0]5:B8PIPESTAT[1]5:B8PIPESTAT[2]5:B8TRACESYNC5:B8TRACECLK5:D8

GPIO[0-95]2:A1;5:C2;6:B1;

8:B1;9:E1;10:A3;16:A3;16:C3;25:A1;

26:A2;32:A5

100KR67

12

100KR68

12

100KR69

12

GND

P3.3V

GND

100RR70

12

GND

16 V100nC13 1

2

GND

P3.3V P3.3V

GNDP3.3V

16 V2u2C9 1

2

P3.3V

16 V2u2

C10 12

GND

16 V100nC12 1

2

GND

P3.3VGND

P3.3V

50 V1n

C18 12

50 V1n

C19 12

GND

P3.3VGND

P3.3V

P3.3V

GND

16 V100nC14 1

216 V2u2

C11 12

GND

P3.3V

50 V1n

C20 12

P3.3V P3.3V

GNDGND

16 V2u2

C22 12 16 V

100nC24 1

2

P3.3V

P3.3VGND

16 V100nC23 1

216 V2u2

C21 12

GND

P3.3V

P3.3V

50 V1n

C27 12

P3.3V

GND

P3.3V

GNDGND

GND

10KR61

12

P3.3V

10KR55

12

P3.3V

10KR56

12

P3.3V

10KR57

12

P3.3V

10KR58

12

P3.3V

GNDD5VCC8 GND 4

X121

X122X123

50 V10n

C15 12

50 V10n

C16 12

50 V10n

C17 12

50 V10n

C25 12

4K7R62

12

TEMP_XCSTEMP_SCKTEMP_SO

EEPROM_SDA

EEPROM_SCL

GPIO[15]GPIO[14]

GPIO[16]GPIO[17]

GPIO[19]

GPIO[0-95]

GPIO[

0-95]

GPIO[14]


GPIO[16]GPIO[17]

GPIO[9]

GPIO[0]

GPIO[35]GPIO[36]GPIO[37]GPIO[34]GPIO[54]

SYNC_P

SYNC_N

TEST_XEEPROM_ENTEST_XTEMP_EN

TEST_XTRACE_ENTEST_XUART_EN

RS485 SYNC

max 10mA

max 100mA

max 10mA

max 5mA max 5mA

Test and debug circuits

Temperature sensor

User EEPROM

RS485 sync

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

405

DebugEB200P

Trace Mictor, FPGA JTAG, ERTEC JTAG

GND

ERTEC_XTRST9:B1

ERTEC_TDI9:C1

ERTEC_TMS9:C1

ERTEC_TCK9:B1

ERTEC_XSRST9:C1 ERTEC_TDO

9:C1

P3.3V

TRACESYNC4:D8

TRACECLK4:D8

PIPESTAT[0-2]4:C8

ERTEC_RTCK9:C1

16 V100nC35 1

2

GND GND

P3.3V

GND

P3.3V

GND

P3.3V

16 V2u2

C33 12 50 V

1nC39 1

2

P3.3V

TRACE_DBACK6:E8 TRACE_DBGRQ6:E8

P3.3V P3.3V

GNDGPIO[0-95]

2:A1;4:B1;6:B1;8:B1;9:E1;10:A3;

16:A3;16:C3;25:A1;26:A2;32:A5

0RR71

1 2

0RR72

1 2

GND GND

50 V1n

C40 12

P3.3V P3.3VP3.3V

GND

16 V100nC36 1

2

GND

P3.3V

16 V2u2

C34 12

GND

16 V100nC30 1

2 50 V1n

C32 12

GND

16 V2u2

C29 12

GNDGND

FPGA_TDI24:B1

FPGA_TCK24:B1

FPGA_TMS24:B1

FPGA_TDO24:B1

GNDFPGA_DONE2:A1;25:B6

FPGA_PROGRAMN25:B6

TRACEPKT[0-15]6:B8

X31 1 X31 2

X31 3 X31 4

X31 5 X31 6

X31 7 X31 8

X31 9 X31 10

X31 11 X31 12

X31 13 X31 14

X31 15 X31 16

X31 17 X31 18

X31 19 X31 20

X32 1 X32 2

X32 3 X32 4

X32 5 X32 6

X32 7 X32 8

X32 9 X32 10

X30 1 X30 2X30 3 X30 4X30 5 X30 6X30 7 X30 8X30 9 X30 10X30 11 X30 12X30 13 X30 14X30 15 X30 16X30 17 X30 18X30 19 X30 20X30 21 X30 22X30 23 X30 24X30 25 X30 26X30 27 X30 28X30 29 X30 30X30 31 X30 32X30 33 X30 34X30 35 X30 36X30 37 X30 38

X30 S1X30 S2X30 S3X30 S4X30 S5

50 V10n

C31 12

50 V10n

C37 12

50 V10n

C38 12

P3.3V P3.3V P3.3V P3.3V

P3.3V

10KR407

12

10KR406

12

GND

GND

TRACEPKT[0-15]

TRACEPKT[9]

TRACEPKT[10]

TRACEPKT[11]

TRACEPKT[12]

TRACEPKT[13]

TRACEPKT[14]

TRACEPKT[15]

TRACEPKT[0]

TRACEPKT[1]

TRACEPKT[3]

TRACEPKT[4]

TRACEPKT[5]

TRACEPKT[6]

TRACEPKT[7]

PIPESTAT[1]

PIPESTAT[2]

TRACEPKT[8]

TRACESYNC

TRACECLK

PIPESTAT[0]

TRACE_DBACK

ERTEC_XTRST

ERTEC_TDI

ERTEC_TMS

ERTEC_TCK

ERTEC_RTCK

ERTEC_TDO

ERTEC_XSRST

JTAG_DBACK

GPIO[3]

GPIO[2]

TRACEPKT[2]

JTAG_DBGRQ

TRACE_DBGRQ

Trace and JTAG conectors

ERTEC 200P JTAG connector

FPGA JTAG connector

ERTEC 200P trace connector

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

406


Trace and user GPIOs bus switches

1B

2A

1A

5

OE1OE2

1

2

12

3

5443

2

45 5

1

3 34

2

VCCGND

1

2B

74CB3Q3384

D1022

3131

1224

256910

21

1516192023

18171411874

1B

2A

1A

5

OE1OE2

1

2

12

3

5443

2

45 5

1

3 34

2

VCCGND

1

2B

74CB3Q3384

D1122

3131

1224

256910

21

1516192023

18171411874

P3.3V

GND

TEST_XTRACE_EN4:B1;25:D7;32:B8

16 V100nC50 1

2

GND GND

P3.3V

GND

P3.3V

GND

P3.3V

16 V2u2

C49 12 50 V

1nC52 1

2

P3.3V

16 V100nC54 1

2

GND GND

P3.3V

GND

P3.3V

GND

P3.3V

16 V2u2

C53 12 50 V

1nC56 1

2

P3.3V

TRACE_DBACK5:A2TRACE_DBGRQ5:A2

P3.3V P3.3VP3.3V

50 V1n

C44 1216 V

2u2C41 1

2

P3.3V

GND

P3.3V

GND

P3.3V

GND

16 V100nC42 1

2

GND

P3.3V

GND

1B

2A

1A

5

OE1OE2

1

2

12

3

5443

2

45 5

1

3 34

2

VCCGND

1

2B

74CB3Q3384

D822

313

11224

256910

21

1516192023

18171411

874

P3.3V

GND GND

P3.3V

16 V2u2

C45 12 16 V

100nC46 1

2 50 V1n

C48 12

GND GND

1B

2A

1A

5

OE1OE2

1

2

12

3

5443

2

45 5

1

3 34

2

VCCGND

1

2B

74CB3Q3384

D922

313

11224

256910

21

1516192023

18171411

874

TEST_XUSERGPIO_EN32:B8

GPIO[0-95]2:A1;4:B1;5:C2;

8:B1;9:E1;10:A3;16:A3;16:C3;25:A1;

26:A2;32:A5

10KR73

12

P3.3V

USER_GPIO[0-15]2:A1;3:B2

TRACEPKT[0-15]5:B8

50 V10n

C43 12 50 V

10nC47 1

2 50 V10n

C51 12 50 V

10nC55 1

2

GPIO[38]GPIO[39]GPIO[40]GPIO[41]GPIO[42]GPIO[43]GPIO[44]GPIO[45]GPIO[46]GPIO[47]


TRACEPKT[0]TRACEPKT[1]TRACEPKT[2]TRACEPKT[3]TRACEPKT[4]TRACEPKT[5]TRACEPKT[6]TRACEPKT[7]TRACEPKT[8]TRACEPKT[9]

TRACEPKT[10]TRACEPKT[11]TRACEPKT[12]TRACEPKT[13]TRACEPKT[14]TRACEPKT[15]

GPIO[52]GPIO[53]

GPIO[

0-95]

GPIO[3]GPIO[2]

USER

_GPIO

[0-15

]

GPIO[

0-95]

GPIO[0]GPIO[1]GPIO[2]GPIO[3]GPIO[4]GPIO[5]GPIO[6]GPIO[7]GPIO[16]GPIO[17]

GPIO[18]GPIO[19]GPIO[20]GPIO[21]GPIO[22]GPIO[23]

USER_GPIO[0]USER_GPIO[1]USER_GPIO[2]USER_GPIO[3]USER_GPIO[4]USER_GPIO[5]USER_GPIO[6]USER_GPIO[7]USER_GPIO[8]USER_GPIO[9]

USER_GPIO[10]USER_GPIO[11]USER_GPIO[12]USER_GPIO[13]USER_GPIO[14]USER_GPIO[15]

max 5mA

max 5mA

max 5mA

max 5mA

Bus switheches for user GPIOs and trace interface

Bus switheches for user GPIOs Bus switheches for trace interface

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:55

Siemens AG14.1.2013

A5E31374985A

002

407


Serial over USB

D12VCC3

GND 8VDD184 VCC25

GND 18GND 28

EEPROM

24C256D13

A01A12

SCL6WP7 SDA 5A2/NC3

D13VCC8 GND 4

4K7R86

12

4K7R87

12

GND

GND

10KR77

12

10KR76

12

USB-SP-CTRL

P3

TUSB3410D12

X1/CLKI27X226

DP6DPM7

RESET9

TEST023TEST124

VREGEN1

WAKEUP12

0 321 313 304 29

SCL 11SDA 10

RTS 20CTS 13DTR 21DSR 14DCD 15

RI/CP 16

SOUT/IR_SOUT 19SIN/IR_SIN 17

CLKOUT 22PUR 5

SUSPEND 2

GND

GND

10KR75

12

12 MHzB1

1 3

S50 V33p

C6012

50 V33p

C58 12

GND GNDGND

GND

GND

15KR80

12

15KR81

12

16 V100nC62 1

2

GND

GND GND

1K5R82

1 2

10KR85

12

10KR84

12

GND

UART_TX4:C8

UART_RTS4:C8

UART_RX4:C8

UART_CTS4:C8

GND

10KR83

12

16 V100nC71 1

2

GND GND GNDGND

16 V2u2

C70 12 50 V

1nC73 1

2

50 V1n

C66 12

GND

16 V100nC64 1

2

GND

16 V2u2

C61 12

GND GND GND

16 V100nC67 1

2

GND

50 V1n

C69 12

GND

1MR74

12 1 kV

100nC57 1

2

GND GND

X11 1

X11 2X11 3

X11 4

X11 5

X11 S

USB_P1.8V

10KR354

12

10KR355

12

50 V10n

C65 12 50 V

10nC68 1

2

50 V10n

C72 12

P3.3V P3.3V P3.3V

P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V

P3.3V

P3.3V P3.3V P3.3V P3.3V

P3.3V

P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V

BZX84C3V33.3 V

V2 KA

USB6B1V1

4 53

821

76

1KR79

12

330RR78

1 2UART_RX

UART_RTSUART_CTSUART_TX

max 10mA

max 30mA

USB to serial converter

Note: Preprogrammed EEPROM will be used (A5E03799388)

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

408

InterfacesEB200P

Use case MICTORs

GND

GPIO[0-95]2:A1;4:B1;5:C2;

6:B1;9:E1;10:A3;16:A3;16:C3;25:A1;

26:A2;32:A5

GND GND

P3.3V P3.3V P3.3VP5.0V P5.0V P5.0V

ERTEC_REF_CLK9:C8

P3.3V

16 V2u2

C74 12

GNDGND

P3.3V

50 V1n

C80 1216 V

100nC76 1

2

GND

P3.3V

GND

P3.3V

50 V1n

C81 12

GND

16 V100nC77 1

2

P5.0V

GNDGND GND

16 V2u2

C75 12

P5.0V P5.0V P5.0V P5.0V

GND

50 V1n

C88 12

GNDP5.0V

P3.3V

16 V100nC84 1

2

P3.3V

50 V1n

C89 1216 V

2u2C83 1

2 16 V100nC85 1

2P5.0V

GND

P3.3V

GND

P3.3V

GND

GNDP5.0V

GND

GND

16 V2u2

C82 12 16 V

100nC92 1

2

GND

P3.3V

50 V1n

C96 12

GND

P3.3V P3.3V

GNDGND

16 V2u2

C90 12

P5.0VP5.0VGND

16 V100nC93 1

216 V2u2

C91 12

GND

P5.0V P5.0V

50 V1n

C97 12

GNDGND

P3.3VX20 1 X20 2X20 3 X20 4X20 5 X20 6X20 7 X20 8X20 9 X20 10X20 11 X20 12X20 13 X20 14X20 15 X20 16X20 17 X20 18X20 19 X20 20X20 21 X20 22X20 23 X20 24X20 25 X20 26X20 27 X20 28X20 29 X20 30X20 31 X20 32X20 33 X20 34X20 35 X20 36X20 37 X20 38

X20 S1X20 S2X20 S3X20 S4X20 S5


X21 S1X21 S2X21 S3X21 S4X21 S5


X22 S1X22 S2X22 S3X22 S4X22 S5

50 V10n

C78 12

50 V10n

C79 12

50 V10n

C86 12

50 V10n

C87 12

50 V10n

C94 12

50 V10n

C95 12

PM_FLASH_XRESET33:C7

1KR366

12

P3.3V

GPIO[16]

GPIO[17]

GPIO[18]

GPIO[19]

GPIO[20]

GPIO[21]

GPIO[22]

GPIO[23]

GPIO[24]

GPIO[25]

GPIO[26]

GPIO[27]

GPIO[28]

GPIO[29]

GPIO[30]

GPIO[31]

GPIO[0]

GPIO[1]

GPIO[2]

GPIO[3]

GPIO[4]

GPIO[5]

GPIO[6]

GPIO[7]

GPIO[8]

GPIO[9]

GPIO[10]

GPIO[11]

GPIO[12]

GPIO[13]

GPIO[14]

GPIO[15]

GPIO[48]

GPIO[49]

GPIO[50]

GPIO[51]

GPIO[52]

GPIO[53]

GPIO[54]

GPIO[55]

GPIO[56]

GPIO[57]

GPIO[58]

GPIO[59]

GPIO[60]

GPIO[61]

GPIO[62]

GPIO[63]

GPIO[32]

GPIO[33]

GPIO[34]

GPIO[35]

GPIO[36]

GPIO[37]

GPIO[38]

GPIO[39]

GPIO[40]

GPIO[41]

GPIO[42]

GPIO[43]

GPIO[44]

GPIO[45]

GPIO[46]

GPIO[47]

GPIO[80]

GPIO[81]

GPIO[82]

GPIO[83]

GPIO[84]

GPIO[85]

GPIO[86]

GPIO[87]

GPIO[88]

GPIO[89]

GPIO[90]

GPIO[91]

GPIO[92]

GPIO[93]

GPIO[94]

GPIO[95]

GPIO[64]

GPIO[65]

GPIO[66]

GPIO[67]

GPIO[68]

GPIO[69]

GPIO[70]

GPIO[71]

GPIO[72]

GPIO[73]

GPIO[74]

GPIO[75]

GPIO[76]

GPIO[77]

GPIO[78]

GPIO[79]

ERTEC_REF_CLKPM_FLASH_XRESET

Use case connectors

Use case 0 Use case 1 Use case 2

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

409

ERTEC 200PEB200P

ERTEC 200P

ERTEC_TDO5:A2

ERTEC_TMS5:A2

ERTEC_TDI5:A2

ERTEC_RTCK5:A2

ERTEC_TCK5:A2

ERTEC_XTRST5:B2

ERTEC_XSRST5:A2

1KR89

12

1KR90

12

10KR88

12

GND GND

25 MHzB2

1 3

S

50 V15p

C106 12

50 V15p

C10712

22RR102

1 2GND GNDGND

1KR101

12

ERTEC_REF_CLK8:A1

GND

GPIO[0-95]2:A1;4:B1;5:C2;

6:B1;8:B1;10:A3;16:A3;16:C3;25:A1;

26:A2;32:A5

10RR96

1 2

ERTEC_PXHIF

10KR93

12

10KR91

12

GNDGNDGND

1KR100

12

GND

GND

50 V1n

C104 1216 V

100nC100 1

2

GND GND

16 V2u2

C98 12

GND

ERTEC_P1.2V_A

ERTEC_XRST33:B7

1KR103

12

1KR104

12

GND

X70W18

X70W14

X70 U13 X70U16

X70 W8 X70Y14

X70V14

X70 M15

X70 P3

X70T14

X70 T8

X70 W15

X70W17

X70R12

X70 U11

X70 W7

X70F12

X70R18

X70P6

X70V19

X70T11

X70Y18

X70 R10

X70Y17

X70V18

X70 T17

X70W16

X70 T18

X70W19

X70U15

X70 V17

X70T10

X70R14

X70 R17X70 T16

X70 V9X70 U7

X70U14

X70 J15

X70 U18

X70 R7

X70 U12

X70 T7

X70 U9

X70T9

X70 U8

X70 F9

X70V20

X70 R16

X70T15

X70 U17

X70 U10

X70R9

X70 P4

P3.3V P3.3V

P3.3V

0RR92

1 2

GND

50 V1n

C725 1216 V

2u2C722 1

2

GND

16 V100n

C723 12 50 V

10nC724 1

2

GNDGND

P3.3V

GND

P3.3V P3.3V P3.3V P3.3V

74LVC1G07D43

2 4D43VCC5 GND 3

24

5

29

9

XTRST

13

BYP_CLKTDO

TAP_SEL

AVDD

19

23

4

28

8

ERTEC200+

1227

TMS XCLK2

18

GPIO

22

3

7

2611

31

TDI

01

15

17

XCLK1

21

2

25

6

30

10

TCK

14

16

XSRST

AGND

20

REF_CLK

TMC1TEST

TACTTMC2

XRESET

GPIO/INT

RTCK

CTRL_STBY0CTRL_STBY1CTRL_STBY2

NC

ERTEC200+D0

P4P3

W8T8R7

R10T7

V9U7U8U9

U10U11U12U13R16R17T16T17T18U17U18V17

V15V14

Y14W14T11

T9T10T14T15U14U15R18U16W19W18W17V20Y18Y17V19V18

W16

P6

R9F12R14R12

M15

W15

W7

J15F9

X70V15

0RR386

1 2

33RR405

1 2

10KR399

12

10KR400

12

4K7R402

12

10KR401

12

P3.3V P3.3V P3.3V P3.3V

4K7R404

12

4K7R403

12

GNDGND

1KR95

12

GPIO[16]GPIO[17]GPIO[18]GPIO[19]GPIO[20]GPIO[21]GPIO[22]GPIO[23]GPIO[24]GPIO[25]GPIO[26]GPIO[27]GPIO[28]GPIO[29]GPIO[30]GPIO[31]

GPIO[7]GPIO[6]GPIO[5]GPIO[4]GPIO[3]GPIO[2]GPIO[1]GPIO[0]

GPIO[8]GPIO[9]GPIO[10]GPIO[11]GPIO[12]GPIO[13]GPIO[14]GPIO[15]

max5mA

ERTEC 200P

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4010

ERTEC 200PEB200P

ERTEC 200P

GPIO[0-95]2:A1;4:B1;5:C2;6:B1;8:B1;9:E1;

16:A3;16:C3;25:A1;26:A2;32:A5

XHIF_XWR

18

0

XHIF_BE0

16

5

9

1

12

2

6

ERTEC200+

XHIF_SEG_1

XHIF_D15

XHIF_XCS_M

14

4

15

8

3

10

XHIF_SEG_0

10

XHIF_XCS_R_A20

1

3

1312

XHIF_XIRQ

7

19

8

4

11

13

11

17

XHIF_XRD

7

2

XHIF_BE1

6

9

14

5

XHIF_XRDY

XHIF_BE3XHIF_BE2

31

2526

17

22

24

27

23

19

2829

16

21

30

18

20

XHIF_SEG_2

XHIF_A

ERTEC200+D0

L15G15

P16J17N16H16J16N17M17K17K16M16L16H17G16P17L17G17

C15B16E15D15C17E16B14E17B19C18C19B15C13D17C16A15B18D19

E18D18D16F16F17E14

A17

D20C20E13

E11D12D14E10D13

E7D10

D9D11E12D8D7E9F7E8

F14B17

A16

X70 H16

X70 D13 X70F14

X70 G15

X70 G17

X70E16

X70 N16

X70 D11

X70 F7

X70 J17

X70A17

X70C19

X70C15

X70C20

X70 D14

X70A15X70C16

X70 N17

X70 E13

X70 M16

X70C13

X70C17

X70 K16X70E17

X70D15

X70D17

X70 L15

X70E14

X70 P16

X70B15

X70B16

X70 L16

X70 D7

X70 D9

X70 E10

X70B14

X70 D8

X70C18

X70D18 X70D16

X70 E11

X70B17

X70 E12

X70 K17

X70 E9

X70E18

X70 E7

X70D20

X70 J16

X70 P17

X70F17X70 D10X70F16

X70D19

X70E15

X70 D12

X70B19

X70 E8

X70 H17

X70B18

X70 M17

X70A16

X70 G16X70 L17

4K7R385

12

GND

GPIO[32]GPIO[33]GPIO[34]GPIO[35]GPIO[36]GPIO[37]GPIO[38]GPIO[39]GPIO[40]GPIO[41]GPIO[42]GPIO[43]

GPIO[45]GPIO[46]GPIO[47]GPIO[48]GPIO[49]GPIO[50]

GPIO[52]GPIO[53]GPIO[51]GPIO[60]GPIO[61]GPIO[62]GPIO[63]GPIO[58]GPIO[59]

GPIO[56]GPIO[57]

GPIO[44]

GPIO[64]GPIO[65]GPIO[66]GPIO[67]GPIO[68]GPIO[69]GPIO[70]GPIO[71]GPIO[72]GPIO[73]GPIO[74]GPIO[75]GPIO[76]GPIO[77]GPIO[78]GPIO[79]GPIO[80]GPIO[81]GPIO[82]GPIO[83]GPIO[84]GPIO[85]GPIO[86]GPIO[87]GPIO[88]GPIO[89]GPIO[90]GPIO[91]GPIO[92]GPIO[93]GPIO[94]GPIO[95]

GPIO[55]GPIO[54]

ERTEC 200P - XHIF

EMC_XRDY_PER19:C4

ERTEC_EMC

X70F5

X70 U5

X70K3

X70 B3

EMC_DTXR18:A4;19:C4;32:A5

EMC_XCS_PER018:E1;22:E1

EMC_XBE2_DQM218:E1;20:D1;21:E2

X70 V1

X70 D1

X70 B4

X70 W4

X70 C3

X70J4

X70 U2

X70H2

EMC_AB[0-23] 18:A1;20:A1;21:A2;22:A1;32:B5

X70 V3


0RR416

1 2

X70N1

X70 D4

GND GND

X70K2

X70H4

X70 U4

X70 T3

X70 G6

EMC_XCS_SDRAM20:D1;21:E2

EMC_DB[0-31]18:A4;20:A1;21:A2;22:A1

ERTEC_EMC

X70U6

X70J2

X70G1

ERTEC_EMC

X70 T5 X70J3

X70 B2

X70 C4

X70 W2

EMC_XRAS_SDRAM20:D1;21:E2

16 V2u2

C733 12

EMC_XRD18:E1;22:E1

X70E6

X70G2

X70 W3

X70R4

X70R5

X70 D3

X70M2

X70 Y4

X70T4

ERTEC_EMC

EMC_XCAS_SDRAM20:D1;21:F2

EMC_XWR18:E1;22:E1

X70P5

X70F4

X70F3

X70 C2

GND

16 V100n

C734 12

X70T6

X70H1

0RR415

1 2

X70N4

X70 Y3

X70E3

X70M1

EMC_XWE_SDRAM20:D1;21:F2

EMC_XCS_PER319:B4

X70N2

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4011

ERTEC 200PEB200P

ERTEC 200P

X70P1

50 V10n

C735 12

X70 D5

X70 A3

X70 D2

X70E4

X70 U1

X70 V5

X70 B5X70P2

X70R3

XBE_DQM

15

19

31

20

15

6

0

26

23

9

1

17

14

18

29

19

XRDY_PER

14

5

25

9

3

1

6

2

13

17

XOE_DRIVER

3

XWE_SDRAM

18

XWR

13

4

24

22

2

XCS_SDRAM

XCS_PER

5

3

12

16

2

DTXR

XRD

12

8

23

21

1XCAS_SDRAM

30

D

4

11

8

28

0

3

11

7

22

20

0XRAS_SDRAM

21

ERTEC200+

16

10

7

271

2

10A

0

ERTEC200+D0

G6

D3E5T3T5

D2C3D1C1C2B2B3A3A4B4A5C5B5D5C4D4Y3V3W3V1W2U1V2U2U5U3U4V6W4V5V4Y4

G4F4F5E4E3G1G2F3H1H2J2J1K2L2M4M2N2N4P1P2P5R3R4

T4R5D6E6

N1M1

J3J4K3K4

U6T6

H4

EMC_XCS_PER219:B4

X70M4


X70 C5

X70L2

X70 V2

X70J1

50 V1n

C736 12

X70 C1

X70K4

ERTEC_EMC

GND

X70 E5

X70 U3

X70D6

EMC_XOE_DRIVER18:A4;19:C4;32:A5

EMC_XCS_PER118:E1


X70 V4

GND

X70 V6

X70 A4

ERTEC_EMC

X70 A5

X70G4

MUX

74LVC1G157D44

4

G16

1311

D44VCC5 GND 2

10KR439

1 2 3 4

8 7 6 5

10KR440

1 2 3 4

8 7 6 5

ERTEC_EMC

10KR441

1 2 3 4

8 7 6 5

ERTEC_EMC

10KR444

12

10KR445

12

10KR446

12

10KR447

12 10K

R448

12

ERTEC_EMCERTEC_EMCERTEC_EMCERTEC_EMCERTEC_EMC

EMC_

DB[0-

31]

EMC_

AB[0-

23]

EMC_DB[1]

EMC_DB[7]EMC_DB[8]EMC_DB[9]EMC_DB[10]EMC_DB[11]

EMC_DB[13]EMC_DB[14]

EMC_DB[16]EMC_DB[17]EMC_DB[18]EMC_DB[19]EMC_DB[20]EMC_DB[21]EMC_DB[22]EMC_DB[23]EMC_DB[24]EMC_DB[25]EMC_DB[26]EMC_DB[27]EMC_DB[28]EMC_DB[29]EMC_DB[30]EMC_DB[31]

EMC_AB[23]EMC_AB[22]EMC_AB[21]EMC_AB[20]EMC_AB[19]EMC_AB[18]EMC_AB[17]EMC_AB[16]EMC_AB[15]EMC_AB[14]EMC_AB[13]EMC_AB[12]

EMC_AB[10]

EMC_AB[8]EMC_AB[7]

EMC_AB[5]EMC_AB[4]

EMC_AB[2]EMC_AB[1]EMC_AB[0]

EMC_AB[3]

EMC_AB[6]

EMC_AB[9]

EMC_AB[11]EMC_DB[12]

EMC_DB[15]

EMC_DB[6]EMC_DB[5]EMC_DB[4]

EMC_DB[2]EMC_DB[3]

EMC_DB[0]

ERTEC 200P - EMC

To boot from burst mode flash in legacy mode keepit as is, to boot from legacy mode flash in legacymode move R416 to R415 position

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4012

ERTEC 200PEB200P

ERTEC 200P

EMC_CLK_O_SDRAM120:D1;21:E2EMC_CLK_O_SDRAM220:D1;21:E2

EMC_CLK_O_BF122:E1

EMC_XAV_BF22:E1

EMC_XRDY_BF22:E1

P2_LINK15:E1;17:E3

P1_LINK15:C1;17:E3

P2_ACT15:E1;17:E3

P1_ACT15:C1;17:F3

P1_TXP15:C1 P1_TXN15:C1

P1_TDXP16:E1 P1_TDXN16:E1

P1_RDXP16:E1 P1_RDXN16:E1

P1_RXP15:C1 P1_RXN15:C1

P2_RXN15:E1

P2_RXP15:E1

P2_RDXP16:B1P2_RDXN16:C1

P2_TDXP16:B1P2_TDXN16:B1

P2_TXP15:E1P2_TXN15:E1

12K4R124

1 2

GND

EMC_CLK_O_BF222:E1

GND

GND

GND GND

16 V100n

C115 1216 V

2u2C111 1

2

GND GND

50 V1n

C123 12

GNDGND

16 V2u2

C110 12

GND

50 V1n

C122 12

GND

16 V100n

C114 12

GND

16 V100n

C112 1216 V

2u2C108 1

2 50 V1n

C120 12

GNDGND GND

GND

16 V2u2

C132 12

GNDGND GND

16 V100n

C133 12 50 V

1nC137 1

2

49R9R126

12

GND

50 V15p

C140 12

GND

50 V15p

C143 12

49R9R128

12

P1_FXEN16:E1

P2_FXEN16:B1

0RR123

1 20RR122

1 2

GND

16 V100n

C113 12

GND

50 V1n

C121 12

GND

16 V2u2

C109 12

GND

50 V1n

C145 12

GNDGND

16 V2u2

C136 12

GNDGND

16 V100n

C139 12

GND GND

16 V2u2

C124 12 16 V

100nC125 1

2

GNDGND

50 V1n

C127 12

50 V1n

C131 12

GNDGND

16 V2u2

C128 12

GNDGND

16 V100n

C129 12

50 V1n

C144 1216 V

100nC138 1

2

GNDGND GND

16 V2u2

C135 12

GNDX70 F20 X70F19

X70 G20

X70 U20

X70 C9

X70J6

X70 K20

X70 A11

X70Y8

X70 L20

X70M18

X70 B12X70 A12

X70H5

X70 L5

X70M6

X70N20

X70P20

X70 H20

X70 A9

X70 T12 X70A8

X70 L4X70 K5

X70W11

X70N18

X70K19

X70Y9

X70 B11

X70 G5

X70M20

X70Y12

X70 U19

X70W9

X70 J18

X70 L19

X70M19

X70 T13 X70B8

X70 J19

X70 B9

X70 J20

X70N5

X70 B10

X70K18

X70M5

X70G18

X70J5

X70N19

X70 H18

X70W12

X70V10

X70 R20 X70R19

X70Y11

X70 W10

X70 H19

50 V10n

C116 12

50 V10n

C117 12

50 V10n

C118 12

50 V10n

C119 12

50 V10n

C126 12

50 V10n

C130 12

50 V10n

C134 12

50 V10n

C141 12

50 V10n

C142 12

P3.3V

0RR397

12

0RR393

12

P1TDXN

DVDD3

P2TDXN

P1SDXP

P1TXN

ATP

P2TXN

P2RXP

P1VDDARXTX

DVDD1

P1RDXP

VDDACB

P2RDXP

P1SDXN

PVSSA PVSSA

ERTEC200+

P1RDXN

P2SDXP

P2RDXN

DGND3

VSSAPLLCB

P1RXP

P2SDXN

PVSSA PVSSA

DGND1

P1RXN P2RXN

VDDAPLL

P1TDXP P2TDXP

P1TXP

P2VDDARXTX

P2TXP

P1FXEN

VDD33ESD

A_PHY1A_PHY2

L_PHY2L_PHY1

TESTOUT5

CLK_O_SDRAM1CLK_O_SDRAM0

CLK_O_SDRAM2

CLK_O_BF2CLK_O_BF1CLK_O_BF0

XRDY_BFXAV_BF

CLK_I_SDRAMCLK_I_BF

VDD_PECL1

P2FXEN

EXTRES

VDD_PECL2

TESTOUT6TESTOUT7

ERTEC200+D0

L4K5

L5G5

U19U20T12T13

H20H19

J20J19

A12B12

A9B9

A11B11

J18H18

G20

W10B10R20F20

K20L20L19 K18

G18

F19R19

P20

N18M18

W11Y11

W9Y9

W12Y12

M19M20

N19N20

B8A8V10H5J5J6

M5N5

C9

M6

Y8

K19

P11

ERTEC_EMC ERTEC_EMC

P1_SDXP17:C3 P1_SDXN17:C3

P2_SDXP17:B3P2_SDXN17:B3

P1.5V_A_SEPERTEC_P3.3V_A

ERTEC_P1.5V_A

0RR394

12

10KR125

12

10KR127

12

10KR436

12

ERTEC_EMC

P2_RXNP2_RXP

P2_TXNP2_TXP

P2_RDXNP2_RDXP

P2_TDXNP2_TDXP

P2_SDXNP2_SDXPP1_SDXP

P1_SDXN

P1_TDXPP1_TDXN

P1_RDXPP1_RDXN

P1_TXPP1_TXN

P1_RXPP1_RXN

P1_ACTP2_ACTP1_LINKP2_LINK

ERTEC 200P - Profinet ports

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:55

Siemens AG14.1.2013

A5E31374985A

002

4013

Power supplyEB200P

ERTEC 200P

ERTEC_P1.2V_A

ERTEC_PXHIF

ERTEC_P3.3V_AERTEC_P1.5V_A

GND

ERTEC_PXHIFP1.2V_A

GND GND GNDGND

P1.5V_A

GND GND

P3.3V P3.3V

D0

VDD_

EMC

A1

GND

R15

GND

R11

GND

R2GN

DR6

GND

P18

GND

R1

GND

P12

GND

P14

GND

P7GN

DP9

GND

N12

GND

N13

GND

N8GN

DN9

GND

M13

GND

M14

GND

M11

GND

M12

GND

M9GN

DM1

0

GND

M7GN

DM8

GND

L12

GND

L18

VDD_

EMC

A6VD

D_XH

IFA1

4VD

D_XH

IFA1

8VD

D_XH

IFA2

0VD

D15

C6VD

D33

C8VD

D15

C10

VDD3

3C1

2VD

D15

C14

VDD_

EMC

E1VD

D_EM

CE2

VDD_

XHIF

E19

VDD3

3F1

1VD

D_XH

IFF1

3VD

D33

F18

VDD3

3G3

VDD_

XHIF

G8VD

D12

G10

VDD1

2G1

1VD

D_XH

IFG1

3VD

D15

G19

VDD_

EMC

H6VD

D_EM

CH7

VDD1

2H1

0VD

D12

H11

VDD_

XHIF

H14

VDD_

XHIF

H15

VDD_

EMC

K1

VDD_

XHIF

F8

VDD_

EMC

B6

VDD3

3K6

VDD1

2K7

VDD1

2K8

VDD1

2K1

3VD

D12

K14

VDD1

2L7

VDD1

2L8

VDD1

2L1

3VD

D12

L14

VDD3

3M3

VDD1

5N3

VDD_

EMC

N6VD

D_EM

CN7

VDD1

2N1

0VD

D12

N11

GND

T20

GND

V8GN

DV1

2GN

DV1

6GN

DW1

GND

W6GN

DW2

0GN

DY2

GND

J9GN

DJ10

GND

J11GN

DJ12

GND

J13GN

DJ14

GND

K9GN

DK1

0GN

DK1

1GN

DK1

2GN

DK1

5GN

DL1

GND

L3GN

DL6

GND

L9

GND

F2GN

DF6

GND

F10

GND

F15

GND

G7GN

DG9

GND

G12

GND

G14

GND

H3GN

DH8

GND

H9GN

DH1

2GN

DH1

3GN

DJ7

GND

J8

GND

A2GN

DA7

GND

A10

GND

A13

GND

A19

GND

B1GN

DB7

GND

B13

GND

B20

GND

C7GN

DC1

1GN

DE2

0GN

DF1

GND

L10

GND

L11

VDD_

XHIF

N14

VDD_

XHIF

N15

VDD3

3P8

VDD1

2P1

0VD

D12

P11

VDD3

3P1

3VD

D33

P15

VDD1

5P1

9VD

D33

R8VD

D33

R13

VDD_

EMC

T1VD

D_EM

CT2

VDD3

3T1

9VD

D15

V7VD

D15

V11

VDD1

5V1

3VD

D_EM

CW5

VDD3

3W1

3VD

D_EM

CY1

VDD_

EMC

Y5

GND

Y6GN

DY1

0GN

DY1

3

VDD3

3Y7

VDD3

3Y1

6VD

D33

Y20

GND

Y15

GND

Y19

X70

A1X7

0A6

X70

A14

X70

A18

X70

A20

X70

B6X7

0C6

X70

C8X7

0C1

0X7

0C1

2X7

0C1

4X7

0E1

X70

E2X7

0E1

9X7

0F8

X70

F11

X70

F13

X70

F18

X70

G3X7

0G8

X70

G10

X70

G11

X70

G13

X70

G19

X70

H6X7

0H7

X70

H10

X70

H11

X70

H14

X70

H15

X70

K1X7

0K6

X70

K7X7

0K8

X70

K13

X70

K14

X70

L7X7

0L8

X70

L13

X70

L14

X70

M3X7

0N3

X70

N6X7

0N7

X70

N10

X70

N11

X70

N14

X70

N15

X70

P8X7

0P1

0X7

0P1

1X7

0P1

3X7

0P1

5X7

0P1

9X7

0R8

X70

R13

X70

T1X7

0T2

X70

T19

X70

V7X7

0V1

1X7

0V1

3X7

0W5

X70

W13

X70

Y1X7

0Y5

X70

Y7X7

0Y1

6X7

0Y2

0

X70

N9

X70

J10

X70

J12

X70

W6

X70

B20

X70

M10

X70

K12

X70

F10

X70

F6

X70

F15

X70

Y10

X70

V8

X70

J8

X70

N13

X70

R6

X70

L3

X70

P7

X70

T20

X70

Y15

X70

J13

X70

K15

X70

P18

X70

L10

X70

G9

X70

R11

X70

G14

X70

K10

X70

L9

X70

E20

X70

H3

X70

M8

X70

A2

X70

Y13

X70

M7

X70

J14

X70

M13

X70

W20

X70

B1

X70

R1

X70

A10

X70

B13

X70

M9

X70

Y2

X70

J11

X70

L12

X70

V16

X70

F1

X70

Y6

X70

G12

X70

H9

X70

C11

X70

A19

X70

H12

X70

A13

X70

L18

X70

R2

X70

P14

X70

R15

X70

W1

X70

A7

X70

M12

X70

G7

X70

C7

X70

H13

X70

Y19

X70

V12

X70

J9

X70

P12

X70

L6

X70

J7

X70

P9

X70

F2

X70

B7

X70

K11

X70

N12

X70

K9

X70

L11

X70

M14

X70

L1

X70

H8

X70

M11

X70

N8

BLM15Z2

21

BLM15Z10

21

BLM15Z6

21

P3.3V

ERTEC_EMC

P1.5V_A P1.2V

16 V100n

C146 12 16 V

100nC149 1

2 16 V100n

C153 12 16 V

100nC155 1

2 16 V100n

C161 12 16 V

100nC162 1

2

0RR360

1 2

0RR361

1 2

0RR387

12

0RR388

12

0RR396

12

P1.8V

P1.5V_A_SEP P1.2V_SEPP3.3V_SEP

0RR392

12

ERTEC_EMC

ERTEC_PXHIF

P3.3V_SEP

P1.2V_SEP

ERTEC_EMCP1.5V_A_SEP

ERTEC 200P - power supply pins

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4014

Power supplyEB200P

ERTEC 200P capacitors

GND

GND GND

16 V2u2

C200 12

GND

ERTEC_PXHIF

GND

GNDGND

16 V100n

C224 12

GND

GND

16 V2u2

C216 12

GND GND

GND

GND

GND

GND

ERTEC_PXHIF

16 V2u2

C214 12

GND

GND

GND

16 V100n

C227 12

16 V2u2

C168 12

50 V1n

C196 12

GND

50 V1n

C211 12

16 V100n

C175 12

GND

GND

GND

ERTEC_PXHIF

16 V2u2

C171 12 50 V

1nC243 1

2

GND

ERTEC_PXHIF

50 V1n

C194 12

GNDGND GND GND GND

GND

16 V2u2

C215 12

GND

16 V100n

C222 12

50 V1n

C212 12

50 V1n

C209 12

GND

GND

16 V100n

C225 12

16 V100n

C178 12

16 V100n

C203 12

50 V1n

C191 12

50 V1n

C192 12

16 V100n

C204 12

16 V100n

C202 12

GNDGNDGND

16 V100n

C179 12

16 V2u2

C218 12

16 V2u2

C172 12

50 V1n

C210 12

GND

50 V1n

C193 12

GND GND

GND

50 V1n

C242 12

GND

16 V100n

C223 12

ERTEC_PXHIF

GNDGND

50 V1n

C195 12

16 V2u2

C217 1216 V

100nC201 1

2

GND

GNDGND

50 V1n

C239 12

16 V100n

C180 12

GND

16 V100n

C176 12

GND

GND

ERTEC_PXHIF

GND

16 V2u2

C169 12

GND

16 V2u2

C170 12

GND GND

GND

50 V1n

C241 12

16 V2u2

C198 12

GND

16 V2u2

C167 12

GND

50 V1n

C238 12

GNDGND

16 V100n

C177 12 50 V

1nC240 1

2

16 V100n

C226 12

GND

GND

GND

ERTEC_PXHIF

16 V2u2

C199 12

GND

50 V10n

C183 12

50 V10n

C184 12

50 V10n

C185 12

50 V10n

C186 12

50 V10n

C187 12

50 V10n

C188 12

50 V10n

C206 12

50 V10n

C207 12

50 V10n

C208 12

50 V10n

C230 12

50 V10n

C231 12

50 V10n

C232 12

50 V10n

C233 12

50 V10n

C234 12

50 V10n

C235 12

ERTEC_EMC ERTEC_EMC ERTEC_EMC ERTEC_EMC




P1.2V_SEP P1.2V_SEP P1.2V_SEP P1.2V_SEP

P1.2V_SEPP1.2V_SEP P1.2V_SEP P1.2V_SEP

P1.2V_SEPP1.2V_SEP P1.2V_SEP P1.2V_SEP

P3.3V_SEP P3.3V_SEP P3.3V_SEP P3.3V_SEP

P3.3V_SEPP3.3V_SEP P3.3V_SEPP3.3V_SEP

P3.3V_SEPP3.3V_SEP P3.3V_SEPP3.3V_SEP

P3.3V_SEP P3.3V_SEP

P1.5V_A_SEP P1.5V_A_SEP P1.5V_A_SEP P1.5V_A_SEP

P1.5V_A_SEP P1.5V_A_SEPP1.5V_A_SEPP1.5V_A_SEP

P1.5V_A_SEP P1.5V_A_SEPP1.5V_A_SEPP1.5V_A_SEP

ERTEC 200P - power supply capacitors

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4015

InterfacesEB200P

ERTEC 200P ethernet ports - RJ45

P1_ACT12:D3;17:F3

P1_LINK12:E3;17:E3

P2_ACT12:E3;17:E3

P2_LINK12:E3;17:E3

P1_TXP12:D3 P1_TXN12:D3

P2_TXP12:D7 P2_TXN12:D7

P2_RXN12:D7

P2_RXP12:D7

P1_RXP12:D3 P1_RXN12:D3

49R9R129

12

49R9R133

12

49R9R135

12

49R9R139

12

49R9R130

12

49R9R134

12

49R9R136

12

49R9R140

12

AD8131N1U-6 VOCM2 +8 -1 U+3

+ 4

- 5

AD8131N2U-6 VOCM2 +8 -1 U+3

+ 4

- 5

49R9R147

1 2

49R9R148

1 2

49R9R149

1 2

49R9R150

1 2

GND

16 V2u2

C257 12

GNDGND GND

16 V100n

C259 12 50 V

1nC267 1

2

GND GND

P3.3V

P5.0V

GNDGND

P3.3V

GNDGND

GND

ERTEC_P5.0V_A

ERTEC_P5.0V_A ERTEC_P5.0V_A ERTEC_P5.0V_A ERTEC_P5.0V_A

16 V100n

C260 12

ERTEC_P5.0V_A

GND

50 V1n

C268 12

ERTEC_P5.0V_A ERTEC_P5.0V_A

16 V2u2

C258 12

ERTEC_P5.0V_A

GNDGND GND

10KR131

12

10KR137

12

10KR132

12

10KR138

12 16 V

100nC252 1

2

GNDGND

16 V100n

C251 12

GNDGND

10RR141

12

10RR143

12

10RR142

12

10RR144

12

470RR146

12

470RR152

12

470RR145

12

470RR151

12

50 V10n

C253 12 50 V

10nC255 1

2

50 V10n

C254 12 50 V

10nC256 1

2

GND GND

GND GND

EARTH

100RR161

1 2

100RR162

1 2

1KR153

12

1KR154

12

1KR157

12

1KR158

12

1KR155

12

1KR156

12

1KR159

12

1KR160

12


GND GND

50 V10n

C263 12 50 V

10nC265 1

2

GND GND

GND GND


GND GND

50 V10n

C264 12 50 V

10nC266 1

2

BLM15Z12

21

BLM15Z14

21

BLM15Z13

21

50 V10n

C261 12

50 V10n

C262 12

10 V10u

C707 12

10 V10u

C708 12

GND

GND

16 V100n

C245 12 16 V

100nC248 1

2

16 V100n

C246 12 16 V

100nC249 1

2

16 V100n

C247 12 16 V

100nC250 1

2 10 V10u

C709 12

GNDGND

1kV4n7

C731 12 1kV

4n7C732 1

2

GND

12364578

RJ45X1

C10

C8C12

C11

C9C1C2C3C4C5C6C7

S3

12364578

RJ45X1

D10

D8D12

D11

D9D1D2D3D4D5D6D7

S4

RJ45X1

A9

A12

A11

S

A1A2A3A4A5A6A7A8

S1

A10

12364578

RJ45X1

B10

B8B12

B11

B9B1B2B3B4B5B6B7

S2

1MR163

12

1MR164

12

GND

P2_ACT

P1_ACT

TAPA_P

TAPA_N

TAPB_P

TAPB_N

P1_LINK

P2_LINK

P1_TXPP1_TXN

P1_RXPP1_RXN

P2_TXPP2_TXN

P2_RXPP2_RXN

max 50mA

max 50mA

TAP

Profinet ports

Profinet port 1

Profinet port 2

TAP A - Profinet port 1 Tx

TAP A - Profinet port 1 Rx

Place R129, R130, R133, R134R135, R136, R139, R140 close toErtec

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:55

Siemens AG14.1.2013

A5E31374985A

002

4016

InterfacesEB200P

ERTEC 200P ethernet ports - POF

4K7R194

12

130RR169

12

130RR173

12

GND GND

GND GND

130RR171

12

130RR175

12

TRANSCEIVER

QFBR-5978X3SDA1 SCL12 TX_DISABLE9TD-11 TD+10VEETX8 VCCTX7 VCCRX 3

VEERX 2

RD+ 6RD- 5

SD 4

TRANSCEIVER

QFBR-5978X4SDA1 SCL12 TX_DISABLE9TD-11 TD+10VEETX8 VCCTX7 VCCRX 3

VEERX 2

RD+ 6RD- 5

SD 4

4K7R202

12

GND

GND

4K7R201

12

4K7R193

12

GND GND

GND GND

16 V100n

C278 12

GND

50 V1n

C286 12

GND GNDGND

10 V10u

C270 12

GND

10 V10u

C274 12

50 V1n

C287 12

GND GND

16 V100n

C279 12

GND GND

10 V10u

C275 12

10 V10u

C276 12

GND

16 V100n

C280 12

50 V1n

C289 12

GND GND

16 V100n

C281 12

GND

GND

GND

GND

50 V1n

C288 12

10 V10u

C277 12

GND

GND

10 V10u

C272 12

P3.3V

GNDGND

P3.3V

10 V10u

C273 1210 V

10uC271 1

2

10 uHL1

1 2

10 uHL2

1 2

10 uHL3

1 2

10 uHL4

1 2

0RR196

12

0RR198

12

0RR195

12

0RR197

12

GPIO[0-95]2:A1;4:B1;5:C2;6:B1;8:B1;9:E1;

10:A3;16:A3;25:A1;26:A2;32:A5

GPIO[0-95]2:A1;4:B1;5:C2;6:B1;8:B1;9:E1;

10:A3;16:C3;25:A1;26:A2;32:A5

0RR172

12

0RR176

12

0RR170

12

0RR174

12

50 V10n

C282 12

50 V10n

C283 12

50 V10n

C284 12

50 V10n

C285 12

P2_RDXP12:D7 P2_RDXN12:D7

P1_RDXP12:D3 P1_RDXN12:D3

P2_TDXP12:C7 P2_TDXN12:C7

P1_TDXP12:C3 P1_TDXN12:C3

P1_SD17:C6

P2_SD17:B6

P2_FXEN12:D7

P1_FXEN12:D3

1KR199

12

1KR200

12

150RR167

1 2

150RR168

1 2

150RR166

1 2150RR165

1 2

GPIO[6]GPIO[7]

GPIO[4]GPIO[5]

max 300mA

max 300mA

POFs

POF port 2

POF port 1

How to instal POF:1. Remove Qaud RJ45 connector with magnetics2. Solder R169, R173, R195, R197 0 Ohm (A5E00091701) 130 Ohm (A5E00375218) 3. Solder R171, R175, R196, R198 0 Ohm (A5E00091701) 130 Ohm (A5E00375218)4. Replace R170, R174, with 82 Ohm resistor (A5E00375108)5. Replace R172, R176, with 82 Ohm resistor (A5E00375108)6. Solder both POF transceivers (A5E00384758)7. Be careful with user GPIOs pull downs (R46, R44, R42, R40)

Resitor placement:Close to ERTEC : R167,R168,R171,R175R172, R176

Resitor placement:Close to ERTEC : R165,R166,R170,R174R169, R173

Resitor tolerance:All resistors with value 82 and 130 Ohm haveto be with 1% tolerance

Tx termination in Transciever included

Tx termination in Transciever included

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4017

InterfacesEB200P

ERTEC 200P ethernet ports - POF

130RR185

12

GND GND

GNDGND

130RR187

12

GND GND GNDGND

YELLOWLYA67K

H37AK

YELLOWLYA67K

H38AK

GREENLGA67K

H39AK

GREENLGA67K

H40AK

750RR410

1 2

750RR411

1 2

750RR412

1 2

750RR413

1 2

130RR190

12

130RR192

12



P1_LINK12:E3;15:C1

P1_ACT12:D3;15:C1

P2_ACT12:E3;15:E1

P2_LINK12:E3;15:E1

130RR419

12

130RR420

12

130RR421

12

130RR422

12

100LVELT22D45

721

100LVELT22D45

643

D45VCC8 GND 5

GND

P3.3V

10 V10u

C737 12

10 V10u

C738 12

10 uHL12

1 2

16 V100n

C740 12 50 V

10nC742 1

2 50 V1n

C744 12

GND

GND

P2_SD16:B6

P1_SD16:E6

GND

GND

GND

82RR188

12

82RR191

12

82RR186

12

82RR189

12

82RR418

12

82RR417

12

191RR427

12

191RR425

12

GND GND

50 V10n

C747 1210 V

10uC745 1

2

GND

50 V1n

C748 1216 V

100nC746 1

2

GND

GND

COMP/

TLV3502U4

- 2+ 1

7

COMP/

TLV3502U4

- 4+ 3

6

U4VCC8 GND 5

POF port 2

POF port 1

POFs

Resitor placement:Close to ERTEC : R185,R190,R186,R189R187, R192, R188, R191

Resitor tolerance:All resistors with value 82 and 130 and 191 Ohm have to be with 1% tolerance

How to instal POF:1. Solder R410, R411, R412, R413 750 Ohm (A5E00091712) Comparator (U4) and PECL (D45) driver placement:Close to POFs (X3, X4)

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4018

MemoryEB200P

Level shifters

3EN2[AB]

6EN5[AB]

1

45

2

74LVC16T245D14

G348

40383736

353332302927

3EN1[BA]1

26

2

35689111213

G625

14161719202223

6EN4[BA]24

47

46444341

D14

GND 39VCCB7 VCCB18 VCCA31 VCCA42GND 4GND 10GND 15GND 21GND 28GND 34

GND 45

3EN2[AB]

6EN5[AB]

1

45

2

74LVC16T245D15

G348

40383736

353332302927

3EN1[BA]1

26

2

35689111213

G625

14161719202223

6EN4[BA]24

47

46444341

D15


GND 45

EMC_AB[0-23]11:A6;20:A1;21:A2;22:A1;32:B5

EMC_XBE0_DQM011:E1;20:D1;21:E2 EMC_XBE1_DQM111:E1;20:D1;21:E2 EMC_XBE2_DQM211:E1;20:D1;21:E2 EMC_XBE3_DQM311:E1;20:D1;21:E2

EMC_XCS_PER011:D8;22:E1

EMC_XCS_PER111:D8 EMC_XWR

11:D8;22:E1 EMC_XRD11:D8;22:E1

1KR204

12

1KR203

12

GND

LS_XCS_PER023:C6

LS_XCS_PER125:B1LS_XWR23:C6;24:C1LS_XRD23:C6;24:C1LS_XBE0_DQM023:D3;25:C7LS_XBE1_DQM123:D4;26:B6LS_XBE2_DQM223:D6;24:B1LS_XBE3_DQM323:D7;25:B1

3EN2[AB]

6EN5[AB]

1

45

2

74LVC16T245D16

G348

40383736

353332302927

3EN1[BA]1

26

2

35689111213

G625

14161719202223

6EN4[BA]24

47

46444341

D16


GND 45

3EN2[AB]

6EN5[AB]

1

45

2

74LVC16T245D17

G348

40383736

353332302927

3EN1[BA]1

26

2

35689111213

G625

14161719202223

6EN4[BA]24

47

46444341

D17


GND 45

EMC_DB[0-31]11:A2;20:A1;21:A2;22:A1

LS_DB[0-31] 23:A2;24:B1;25:A1;26:A2

10KR205

1 2 3 4

8 7 6 5

10KR207

1 2 3 4

8 7 6 5

10KR209

1 2 3 4

8 7 6 5

10KR211

1 2 3 4

8 7 6 5

10KR208

1 2 3 4

8 7 6 5

10KR206

1 2 3 4

8 7 6 5

10KR210

1 2 3 4

8 7 6 5

10KR212

1 2 3 4

8 7 6 5

GND

EMC_XOE_DRIVER11:E8;19:C4;32:A5 EMC_DTXR11:E8;19:C4;32:A5

P3.3V

P3.3V

P3.3V

LS_AB[0-23]23:A2;24:B1;25:A1

ERTEC_EMC

ERTEC_EMC

1KR414

12

ERTEC_EMC

EMC_

DB[0-

31]

EMC_

AB[0-

23]

EMC_AB[0]

LS_A

B[0-23

]

LS_AB[0] EMC_DB[0]

EMC_DB[1]EMC_DB[2]EMC_DB[3]EMC_DB[4]EMC_DB[5]EMC_DB[6]EMC_DB[7]EMC_DB[8]

EMC_DB[9]EMC_DB[10]EMC_DB[11]EMC_DB[12]EMC_DB[13]EMC_DB[14]EMC_DB[15]

EMC_DB[16]

EMC_DB[17]EMC_DB[18]EMC_DB[19]EMC_DB[20]EMC_DB[21]EMC_DB[22]EMC_DB[23]EMC_DB[24]

EMC_DB[25]EMC_DB[26]EMC_DB[27]EMC_DB[28]EMC_DB[29]EMC_DB[30]EMC_DB[31]

LS_D

B[0-31

]

LS_DB[16]

LS_DB[17]LS_DB[18]LS_DB[19]LS_DB[20]LS_DB[21]LS_DB[22]LS_DB[23]LS_DB[24]

LS_DB[25]LS_DB[26]LS_DB[27]LS_DB[28]LS_DB[29]LS_DB[30]LS_DB[31]

LS_DB[0]

LS_DB[1]LS_DB[2]LS_DB[3]LS_DB[4]LS_DB[5]LS_DB[6]LS_DB[7]LS_DB[8]

LS_DB[9]LS_DB[10]LS_DB[11]LS_DB[12]LS_DB[13]LS_DB[14]LS_DB[15]

EMC_AB[1]EMC_AB[2]EMC_AB[3]EMC_AB[4]EMC_AB[5]EMC_AB[6]EMC_AB[7]EMC_AB[8]

EMC_AB[9]EMC_AB[10]EMC_AB[11]EMC_AB[12]EMC_AB[13]EMC_AB[14]EMC_AB[15]

EMC_AB[16]

EMC_AB[17]EMC_AB[18]EMC_AB[19]EMC_AB[20]

LS_AB[1]LS_AB[2]LS_AB[3]LS_AB[4]LS_AB[5]LS_AB[6]LS_AB[7]LS_AB[8]

LS_AB[9]LS_AB[10]LS_AB[11]LS_AB[12]LS_AB[13]LS_AB[14]LS_AB[15]

LS_AB[16]

LS_AB[17]

LS_AB[19]LS_AB[20]

LS_AB[18]


LS_AB[21]LS_AB[22]LS_AB[23]

max 100mA max 100mA

max 100mA max 100mA

Level shifters

Level shifters - address busLevel shifters - data bus

As defualt the levelshifter for address bus is disabled.To enable it moveR414 to position R203

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4019

Power supplyEB200P

Level shifters

16 V100n

C304 12 50 V

1nC320 1

2GND GNDGND GND

GND

16 V100n

C305 12

GNDGND

50 V1n

C321 12

GND

GND

16 V100n

C307 12

16 V100n

C306 12

GNDGND

50 V1n

C322 12

GND

GND GNDGND

50 V1n

C323 12

GND

GND

16 V100n

C308 12

GNDGND

50 V1n

C324 12

GND

GND

16 V100n

C302 12

GNDGND

50 V1n

C318 12

GND

16 V2u2

C300 12

16 V2u2

C299 12

16 V2u2

C298 12

16 V2u2

C297 12

16 V2u2

C296 12

16 V2u2

C294 12 50 V

10nC310 1

2

50 V10n

C312 12

50 V10n

C313 12

50 V10n

C314 12

50 V10n

C315 12

50 V10n

C316 12

P3.3VP3.3VP3.3V P3.3V

P3.3VP3.3VP3.3V P3.3V

DIR[BA]

AB

74LVC2T45D40

7

6

DIR[AB]5

2

3 D40VCCA1 GND 4VCCB8

DIR[BA]

AB

74LVC2T45D41

7

6

DIR[AB]5

2


DIR[BA]

AB

74LVC2T45D42

7

6

DIR[AB]5

2


EMC_XCS_PER211:D8

LS_XCS_PER223:C6

LS_XCS_PER323:C6

EMC_XCS_PER311:D8

1KR367

12

1KR368

12

P3.3V

GND GND

GND

P3.3V

P3.3V

GND

GND

P3.3V

50 V1n

C720 12

GND

50 V10n

C719 12

GND

P3.3V

GND

50 V10n

C718 12

P3.3V

16 V100n

C716 12

16 V2u2

C715 12

GND

16 V2u2

C714 12

GND

GND

P3.3V

GND

16 V100n

C717 12 50 V

1nC721 1

2

GND

EMC_XOE_DRIVER11:E8;18:A4;32:A5

EMC_DTXR11:E8;18:A4;32:A5

LS_XOE_DRIVER23:D6

LS_DTXR23:D6

EMC_XRDY_PER11:E1

LS_XRDY_PER23:D6

ERTEC_EMC

ERTEC_EMC

ERTEC_EMC

ERTEC_EMC

ERTEC_EMC


ERTEC_EMC ERTEC_EMC ERTEC_EMC

ERTEC_EMCERTEC_EMCERTEC_EMC ERTEC_EMC



10KR114

12

P3.3V

Level shifters, capacitors for level shifters

Level shifters for control signals

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4020

MemoryEB200P

SDRAM

D19VSS J1VDDQA7 VDDA9 VDDQB3 VDDQC7 VDDQD3 VDDE7 VDDJ9 VSS A1

VSSQ A3VSSQ B7VSSQ C3VSSQ D7

VSS E3

A

D

SDRAM 32Mx16

D19

CLKF2 CKEF3

UDQMF1 LDQME8 WEF9 CASF7 RASF8 CSG9 BA1G8 BA0G711G2 10H9 9G3 8H1 7H2 6H3 5J2 4J3 3J7 2J8 1H8 0H7

0 A81 B92 B83 C94 C85 D96 D87 E98 E19 D2

10 D111 C212 C113 B214 B115 A2

12G1

D18VSS J1VDDQA7 VDDA9 VDDQB3 VDDQC7 VDDQD3 VDDE7 VDDJ9 VSS A1

VSSQ A3VSSQ B7VSSQ C3VSSQ D7

VSS E3

EMC_DB[0-31]11:A2;18:A4;21:A2;22:A1

EMC_AB[0-23]11:A6;18:A1;21:A2;22:A1;32:B5

EMC_XCS_SDRAM11:E8;21:E2 EMC_XRAS_SDRAM11:E8;21:E2 EMC_XCAS_SDRAM11:E8;21:F2 EMC_XWE_SDRAM11:E8;21:F2

EMC_CLK_O_SDRAM112:E7;21:E2 EMC_CLK_O_SDRAM212:E7;21:E2

EMC_XBE0_DQM011:E1;18:E1;21:E2 EMC_XBE1_DQM111:E1;18:E1;21:E2 EMC_XBE2_DQM211:E1;18:E1;21:E2 EMC_XBE3_DQM311:E1;18:E1;21:E2 GNDGND GND

50 V1n

C349 12

GND

16 V2u2

C328 12

GND

GND

16 V2u2

C329 12

GNDGND

16 V100n

C336 12

16 V100n

C335 12

50 V1n

C350 12

GND

GND

GND

16 V2u2

C331 12

GND

16 V100n

C339 12

GND

50 V1n

C353 12

GND

GNDGND

GND

49R9R217

12

GND

50 V15p

C327 1250 V

15pC326 1

2

GND

49R9R214

12

50 V10n

C341 12

50 V10n

C342 12

50 V10n

C345 12


50 V10n

C344 1216 V

100nC338 1

2 50 V1n

C352 1216 V

2u2C330 1

2

ERTEC_EMCERTEC_EMC ERTEC_EMC ERTEC_EMC



ERTEC_EMCERTEC_EMC

ERTEC_EMC

A

D

SDRAM 32Mx16

D18

CLKF2 CKEF3


0 A81 B92 B83 C94 C85 D96 D87 E98 E19 D2

10 D111 C212 C113 B214 B115 A2

12G1

10KR213

12

10KR216

12

EMC_XRESET22:E1;33:D7

1KR215

12

ERTEC_EMC

0RR449

1 2

SDRAM_CKE21:C2

EMC_

DB[0-

31]

EMC_

AB[0-

23]

EMC_XBE3_DQM3EMC_XBE2_DQM2

EMC_AB[0]EMC_AB[1]

EMC_AB[2]EMC_AB[3]EMC_AB[4]EMC_AB[5]EMC_AB[6]EMC_AB[7]EMC_AB[8]EMC_AB[9]EMC_AB[10]EMC_AB[11]EMC_AB[12]EMC_AB[13]EMC_AB[14]

EMC_AB[0-23]

EMC_

AB[0-

23]

EMC_AB[0]EMC_AB[1]


EMC_XWE_SDRAMEMC_XCAS_SDRAMEMC_XRAS_SDRAM

EMC_DB[0-31]

EMC_

DB[0-

31]

EMC_DB[0]EMC_DB[1]EMC_DB[2]EMC_DB[3]EMC_DB[4]EMC_DB[5]EMC_DB[6]EMC_DB[7]EMC_DB[8]EMC_DB[9]

EMC_DB[10]EMC_DB[11]EMC_DB[12]EMC_DB[13]EMC_DB[14]EMC_DB[15]


EMC_CLK_O_SDRAM2

EMC_XCS_SDRAM

SDRAM_CKE

SDRAM

max 200mA max 200mA

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4021

MemoryEB200P

SDRAM

EMC_DB[0-31]11:A2;18:A4;20:A1;22:A1

EMC_XCS_SDRAM11:E8;20:D1 EMC_XRAS_SDRAM11:E8;20:D1 EMC_XCAS_SDRAM11:E8;20:D1 EMC_XWE_SDRAM11:E8;20:D1

EMC_CLK_O_SDRAM112:E7;20:D1 EMC_CLK_O_SDRAM212:E7;20:D1

EMC_XBE0_DQM011:E1;18:E1;20:D1 EMC_XBE1_DQM111:E1;18:E1;20:D1 EMC_XBE2_DQM211:E1;18:E1;20:D1 EMC_XBE3_DQM311:E1;18:E1;20:D1

A

D

SDRAM 32Mx16

D20

CLKF2 CKEF3


0 A81 B92 B83 C94 C85 D96 D87 E98 E19 D2

10 D111 C212 C113 B214 B115 A2

A12/NCG1

[NC/VREF]E2J1 VSSE3A1

J9 VDDE7A9

VSSQ A3C3

B7D7

VDDQ B3D3

A7C7

A

D

SDRAM 32Mx16

D21

CLKF2 CKEF3


0 A81 B92 B83 C94 C85 D96 D87 E98 E19 D2

10 D111 C212 C113 B214 B115 A2

A12/NCG1

[NC/VREF]E2J1 VSSE3A1

J9 VDDE7A9

VSSQ A3C3

B7D7

VDDQ B3D3

A7C7

GND GNDGNDGND

EMC_AB[0-23]11:A6;18:A1;20:A1;22:A1;32:B5


SDRAM_CKE20:A5

EMC_XBE3_DQM3EMC_XBE2_DQM2

EMC_AB[0]EMC_AB[1]


EMC_AB[0-23]

EMC_AB[0]EMC_AB[1]


EMC_CLK_O_SDRAM2

EMC_XWE_SDRAMEMC_XCAS_SDRAMEMC_XRAS_SDRAMEMC_XCS_SDRAM

EMC_DB[0-31]




EMC_

AB[0-

23]

EMC_

DB[0-

31]

EMC_

AB[0-

23]

EMC_

DB[0-

31]

SDRAM_CKE

SDRAM (alternative package)

max 200mA max 200mA

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4022

MemoryEB200P

Burst mode FLASH

1KR221

12

D

A

FLASH

S29WS128PD22

RESETD5 ACCC5 WPC2 OEH324/NCG8

20E6 19D7 18E4 17F4 16G9 15D9 14F8 13E8 12D8 11C8 10F7 9E7 8C7 7C3 6D3 5E3 4F3 3D2 2E2 1F2 0G2

0 J31 G42 K43 H54 H65 K76 G77 J88 K39 H4

10 J411 K512 J713 H714 K815 H8

RDY E5

21E9

23/NCF6 22F9

CLKB4

AVDB2 CEH2 WEC6

D22VCCB6 VCCJ5 VCCL5 VCCQL8 VSS B3

VSS G3VSS J9VSS L4

EMC_XAV_BF12:F3 EMC_XRDY_BF

12:E3

EMC_CLK_O_BF112:E7

EMC_XWR11:D8;18:E1 EMC_XRD11:D8;18:E1

1KR220

12

GND

50 V15p

C356 12

49R9R225

12

49R9R223

12

GND

50 V15p

C354 12

EMC_CLK_O_BF212:E7

16 V100n

C360 12

GND

50 V1n

C368 1216 V

2u2C357 1

2

GND GND GND

GND

50 V1n

C369 12

GND

16 V100n

C361 12

GND

GND

50 V1n

C370 12

GNDGND

16 V100n

C362 12

GND

16 V2u2

C358 12

GND

50 V10n

C364 12

50 V10n

C365 12

50 V10n

C366 12

EMC_XCS_PER011:D8;18:E1

0RR357

1 2

1KR358

12

D

A

FLASH

S29WS128PD23

RESETD5 ACCC5 WPC2 OEH324/NCG8

20E6 19D7 18E4 17F4 16G9 15D9 14F8 13E8 12D8 11C8 10F7 9E7 8C7 7C3 6D3 5E3 4F3 3D2 2E2 1F2 0G2

0 J31 G42 K43 H54 H65 K76 G77 J88 K39 H4

10 J411 K512 J713 H714 K815 H8

RDY E5

21E9

23/NCF6 22F9

CLKB4

AVDB2 CEH2 WEC6

1KR359

12

16 V2u2

C696 12

16 V2u2

C697 12

16 V100n

C698 12

16 V100n

C699 12

16 V100n

C700 12

50 V10n

C701 12

50 V10n

C702 12

50 V10n

C703 12

50 V1n

C704 12

50 V1n

C705 12

50 V1n

C706 12

GND GND GND GND

GND GND GND

GND GND GND GND

D23VCCB6 VCCJ5 VCCL5 VCCQL8 VSS B3

VSS G3VSS J9VSS L4

GND

EMC_DB[0-31]11:A2;18:A4;20:A1;21:A2

EMC_AB[0-23]11:A6;18:A1;20:A1;21:A2;32:B5

10KR369

12

1KR370

12

ERTEC_EMC ERTEC_EMC ERTEC_EMC ERTEC_EMC ERTEC_EMC

ERTEC_EMC

ERTEC_EMC ERTEC_EMCERTEC_EMC

ERTEC_EMC


ERTEC_EMC ERTEC_EMC ERTEC_EMC


ERTEC_EMCERTEC_EMC ERTEC_EMCERTEC_EMC

ERTEC_EMCERTEC_EMC ERTEC_EMC

ERTEC_EMCERTEC_EMC ERTEC_EMCERTEC_EMC

10KR222

12

10KR224

12

0RR442

1 2

0RR443

1 2

GND

EMC_XRESET20:B1;33:D7

EMC_

DB[0-

31]

EMC_

AB[0-

23]



EMC_AB[0]EMC_AB[1]EMC_AB[2]EMC_AB[3]EMC_AB[4]EMC_AB[5]EMC_AB[6]EMC_AB[7]EMC_AB[8]EMC_AB[9]EMC_AB[10]EMC_AB[11]EMC_AB[12]EMC_AB[13]EMC_AB[14]EMC_AB[15]EMC_AB[16]EMC_AB[17]EMC_AB[18]EMC_AB[19]EMC_AB[20]EMC_AB[21]EMC_AB[22]

EMC_AB[3]

EMC_AB[13]

EMC_

DB[0-

31]


EMC_AB[0]

EMC_AB[9]

EMC_AB[18]EMC_AB[17]EMC_AB[16]EMC_AB[15]

EMC_

AB[0-

23]

EMC_AB[14] EMC_DB[16]EMC_DB[17]

EMC_DB[30]


EMC_DB[31]


EMC_AB[2]

EMC_DB[29]

EMC_AB[1]


EMC_DB[25]EMC_AB[22]

EMC_DB[26]

EMC_AB[21]

EMC_DB[27]

EMC_AB[20]EMC_AB[19]

EMC_DB[28]

EMC_AB[8]EMC_AB[7]EMC_AB[6]EMC_AB[5]EMC_AB[4]

Burst Mode FLASH

max 100mA max 100mA

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG14.1.2013

A5E31374985A

002

4023

MemoryEB200P

EMC connectors

LS_DB[0-31]18:A8;24:B1;25:A1;26:A2

GND

50 V1n

C379 12

GNDGND

16 V100n

C373 12

GND

16 V2u2

C371 12

P3.3V

16 V2u2

C372 12

GND

16 V100n

C374 12

GND

50 V1n

C380 12

GNDGND

50 V10n

C376 1250 V

10nC377 1

2


X80 S1X80 S2X80 S3X80 S4X80 S5


X81 S1X81 S2X81 S3X81 S4X81 S5

GNDGND

P3.3V P3.3V P3.3V P5.0V

P3.3V P3.3V P3.3VP3.3VP3.3V P3.3V P3.3V

LS_XBE0_DQM018:E3;25:C7

LS_XBE1_DQM118:E3;26:B6


LS_XRD18:E3;24:C1

LS_XWR18:E3;24:C1

LS_XCS_PER219:B6

LS_XCS_PER018:E3


50 V1n

C713 1216 V

100nC711 1

2

P5.0V

GNDGND

16 V2u2

C710 12

GNDGND

50 V10n

C712 12

P5.0V P5.0V P5.0V

LS_XCS_PER319:B6

LS_AB[0-23]18:A3;24:B1;25:A1

LS_DTXR19:C6

LS_XOE_DRIVER19:C6

LS_XRDY_PER19:C6

LS_D

B[0-31

]

LS_DB[16]

LS_DB[17]

LS_DB[18]

LS_DB[19]

LS_DB[20]

LS_DB[21]

LS_DB[22]

LS_DB[23]

LS_DB[24]

LS_DB[25]

LS_DB[26]

LS_DB[27]

LS_DB[28]

LS_DB[29]

LS_DB[30]

LS_DB[31]

LS_DB[0]

LS_DB[1]

LS_DB[2]

LS_DB[3]

LS_DB[4]

LS_DB[5]

LS_DB[6]

LS_DB[7]

LS_DB[9]

LS_DB[10]

LS_DB[11]

LS_DB[12]

LS_DB[13]

LS_DB[14]

LS_DB[15]

LS_DB[8]

LS_D

B[0-31

]

LS_A

B[0-23

]

LS_AB[16]

LS_AB[17]

LS_AB[18]

LS_AB[19]

LS_AB[20]

LS_A

B[0-23

]

LS_AB[0]

LS_AB[1]

LS_AB[2]

LS_AB[3]

LS_AB[4]

LS_AB[5]

LS_AB[6]

LS_AB[8]

LS_AB[9]

LS_AB[10]

LS_AB[11]

LS_AB[12]

LS_AB[13]

LS_AB[14]

LS_AB[15]

LS_AB[7]

LS_AB[21]

LS_AB[22]

LS_AB[23]

EMC connectors

EMC connector 0 EMC connector 1

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG14.1.2013

A5E31374985A

002

4024

FPGAEB200P

FPGA

LS_DB[0-31]18:A8;23:A2;25:A1;26:A2

FPGA_CONFIG[3]32:B8

4K7R236

12

FPGA_TCK5:F2

FPGA_TDI5:F2

FPGA_TMS5:F2

FPGA_TDO5:E2

GND GND

16 V2u2

C421 12

GND

50 V1n

C424 1216 V

100nC422 1

2

GND

GND GND GND

FPGA_P1.2V_A_S

REFCLK+27:D6

REFCLK-27:D6

X1_PETp027:D4

X1_PETn027:D4

X1_PERp027:E6

X1_PERn027:E6

GNDGNDGND

16 V100n

C407 1216 V

2u2C403 1

2

GND

50 V1n

C417 12

GND GNDGNDGND

GND

16 V100n

C409 12

GNDGNDGND

16 V2u2

C405 12 50 V

1nC419 1

2

GND

16 V100n

C410 12

GNDGNDGND

16 V2u2

C406 12 50 V

1nC420 1

2

GND

GND

GND

16 V100n

C434 12

GND

16 V2u2

C427 12

GND

GND

GNDGNDGND

GND

50 V1n

C448 12

16 V2u2

C426 12

GND

GND

16 V2u2

C429 12 16 V

100nC437 1

216 V100n

C436 12

GND

16 V2u2

C428 12

GND GND

50 V1n

C449 12

50 V1n

C447 12

GND

50 V1n

C450 12

16 V100n

C435 12

50 V1n

C475 12

GNDGND

16 V100n

C459 1216 V

2u2C451 1

2

GND GND

FPGA_AUX_P3.3V_AP3.3V

GNDGND

FPGA_AUX_P3.3V_A

FPGA_AUX_P3.3V_A FPGA_AUX_P3.3V_A FPGA_AUX_P3.3V_A FPGA_AUX_P3.3V_A

FPGA_P1.2V_A_I

FPGA_P1.2V_A_O

16 V2u2

C452 12

GND

50 V1n

C476 12

GND GNDGND

16 V100n

C460 12

GNDGND

FPGA_P1.2V_A_I

FPGA_P1.2V_A_I FPGA_P1.2V_A_I FPGA_P1.2V_A_I FPGA_P1.2V_A_I

50 V1n

C477 12

GND

16 V100n

C461 1216 V

2u2C453 1

2

GNDGNDGND

GNDGND

FPGA_P1.2V_A_O

FPGA_P1.2V_A_O FPGA_P1.2V_A_O FPGA_P1.2V_A_O FPGA_P1.2V_A_O

50 V1n

C479 12

GNDGND

16 V100n

C463 1216 V

2u2C455 1

2

GND GND

FPGA_P1.2V_A_S FPGA_P1.2V_A_S FPGA_P1.2V_A_S FPGA_P1.2V_A_S

50 V1n

C482 12

GNDGND

16 V2u2

C458 12

GND GND

FPGA_P1.2V_A_S

16 V100n

C466 12

FPGA_P1.2V_A_SFPGA_P1.2V_A_SFPGA_P1.2V_A_S

50 V1n

C478 12

GNDGND

16 V2u2

C454 12

GND GND

FPGA_P1.2V_A_S

16 V100n

C462 12

FPGA_P1.2V_A_SFPGA_P1.2V_A_SFPGA_P1.2V_A_S

GND GND

FPGA_P1.2V_A_S

VCCAUX

NC

,FPGA

BANK

2

GNDIO

BANK

12

GNDIO

ECP2MD1

J9J8J3H9H8

F9F8F7

F10E9E8E6

E11D7D6D5D4

D14D13D12D11D10

PCLKC2_0G14 PCLKT2_0G13 PR14BH11 PR14AG11 PR13BE13 PR13AF12 SPLLT_IN_AD15 SPLLC_IN_AD16 SPLLT_FB_AE12 SPLLC_FB_AF11 RDQ22F13 RDQ22F14 VREF2-2C16 VREF1-2B16 VCCIO_2G12 VCCIO-2E14 VCCIO_1E10 VCCIO_0E7XRESF4 VCCJK7 TMSN4 TDON6 TCKK6 TDIL5 VCCRX0 C15

HDINP0 A14VCCIB0 B15HDINN0 B14VCCTX0 C12

HDOUTP0 A11VCCOB0 A12

HDOUTN0 B11VCCTX1 C11

HDOUTN1 B10VCCOB1 C10

HDOUTP1 A10VCCRX1 C14HDINN1 B13VCCIB1 C13HDINP1 A13AUX33 B9CLKN D8CLKP D9VCCP C9

HDINP2 A5VCCIB2 C5HDINN2 B5

VCCRX2 C4HDOUTP2 A8

VCCOB2 C8HDOUTN2 B8

VCCTX2 C7HDOUTN3 B7

VCCOB3 A6HDOUTP3 A7

VCCTX3 C6HDINN3 B4VCCIB3 B3HDINP3 A4

VCCRX3 C3

G8H10J7K9

M15M2P9R12R5

10KR237

12

GND

BLM15Z27

21

BLM15Z28

21

BLM15Z29

21

BLM15Z30

21

50 V10n

C423 12

50 V10n

C413 12

50 V10n

C415 12

50 V10n

C416 12

50 V10n

C467 12

50 V10n

C468 12

50 V10n

C469 12

50 V10n

C470 12

50 V10n

C471 12

50 V10n

C474 1250 V

10nC439 1

2

50 V10n

C440 12

50 V10n

C441 12

50 V10n

C442 12

P1.2V_A

P1.2V_A

P1.2V_A

P3.3V P3.3V P3.3V P3.3V

50 V10n

C414 1216 V

100nC408 1

2 50 V1n

C418 1216 V

2u2C404 1

2

P3.3V P3.3V P3.3V P3.3V

P3.3V P3.3VP3.3V P3.3V

P3.3V P3.3VP3.3V P3.3V

P3.3V P3.3VP3.3V P3.3V

P3.3V P3.3V P3.3V

P3.3V P3.3V P3.3V P3.3V

P3.3VP3.3V P3.3VP3.3V

P3.3VP3.3V P3.3VP3.3V

P3.3VP3.3V P3.3VP3.3V

16 V100n

C431 12 16 V

100nC443 1

2

16 V100n

C432 12 16 V

100nC444 1

2

16 V100n

C433 12 16 V

100nC445 1

2

16 V100n

C438 12 16 V

100nC446 1

2

LS_AB[0-23]18:A3;23:A2;25:A1

LS_XBE2_DQM218:E3;23:D6

LS_XWR18:E3;23:C6 LS_XRD18:E3;23:C6

LS_D

B[0-31

]

FPGA_CONFIG[3]LS_XBE2_DQM2

LS_DB[23]LS_DB[19]

LS_DB[20]

LS_DB[24]LS_DB[25]

LS_AB[12]

LS_AB[9]

LS_DB[16]

LS_DB[17]

LS_DB[18]

SERDES output

SERDES input

FPGA

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:55

Siemens AG14.1.2013

A5E31374985A

002

4025

FPGAEB200P

FPGA

LS_DB[0-31]18:A8;23:A2;24:B1;26:A2


GPIO[0-95]2:A1;4:B1;5:C2;6:B1;8:B1;9:E1;

10:A3;16:A3;16:C3;26:A2;32:A5

100RR240

12

100RR242

12

GND GND

MEMORY

serialFlash_16MbD27

CS1WP3SCK6 RESET 7

SI5SO 2

D27VCC8 VSS 4

FPGA_INITN2:A1

10KR239

12

10KR241

12

10KR243

12

FPGA_DONE2:A1;5:E2

1KR238

12

GND

100RR244

12

GND

1KR245

12

1KR246

12

FPGA_PROGRAMN5:F2

50 V5n6

C483 12

GND

GND

16 V100n

C487 12

GNDGNDGND

16 V2u2

C484 12 50 V

1nC494 1

2

GND GND

FPGA_CONFIG[0]32:B8FPGA_CONFIG[2]32:B8

FPGA_CONFIG[1]32:B8

FPGA_ERTEC_XRESET33:C3

16 V2u2

C501 12

GND GND GND

16 V100n

C505 12 50 V

1nC516 1

2

GND

16 V2u2

C502 12

GND GND GND

16 V100n

C506 12 50 V

1nC517 1

2

GND

16 V2u2

C499 12

GND GND GND

16 V100n

C503 12 50 V

1nC514 1

2

GND

16 V100n

C493 12

GNDGND GND

16 V2u2

C507 12 50 V

1nC513 1

2

GND

GND

FPGA_XRESET33:B7

TEST_XTRACE_EN4:B1;6:B1;32:B8

BANK

7

BANK

4BA

NK 3

BANK

8

,FPGA

GNDIO GNDIO

ECP2MD1

A1H14T16

T1PCLKC4_0/BDQ24T8 PCLKT4_0/BDQ24T7 BDQ51P14 BDQ51P16 BDQ51P15 BDQ51R14 BDQ51R16 BDQ51R15 BDQ51R13 BDQ51T14 BDQ51N10 BDQS51P11 BDQ51T13 BDQ51T12 BDQ51R11 BDQ51T11 BDQ51M9 BDQ51L9 BDQ33P10 BDQ33N9 BDQ33R10 BDQS33T10 BDQ33T9 BDQ33R9 BDQ33M8 BDQ33N7 BDQ33R8 BDQ33R7 BDQ33N8 BDQ33P8 VREF2_4L7 VREF1_4L8 VCCIO_4M10 VCCIO_4P12PCLKC3_0J11 PCLKT3_0J12 RLM1_SPLLT_IN_AF15 RLM1_SPLLC_IN_AE16 RLM1_SPLLT_FB_AH15 RLM1_SPLLC_FB_AG16 RLM0_GDLLT_IN_AJ15 RLM0_GDLLC_IN_AH16 RLM0_GDLLT_FB_AJ16 RLM0_GDLLC_FB_AK15 RLM0_PLLCAPK11 RLM0_GPLLT_IN_AJ13 RLM0_GPLLC_IN_AJ14 RLM0_GPLLT_FB_AH12 RLM0_GPLCC_FB_AH13 VREF2_3F16 VREF1_3G15 VCCIO_3M14 VCCIO_3K12

VCCIO_8 T15CFG2 L11CFG1 L10CFG0 P13

PROGRAMN N12CCLK N11INITN M11DONE N13

WRITEN M12CSN N14

CS1N M13D0/SPIFASTN N15

D1 N16D2 M16D3 L12D4 L13D5 L16D6 K16

D7/SPID0 L14DI/CSSPION L15

DOUT/CSON/CSSPI1N K13BUSY/SISPI K14

VCCIO_7 E3VCCIO_7 G5

VREF1_7 F5VREF2_7 F6

LDQ6 A2LDQ6 B2LDQ6 D3LDQ6 C2LDQ6 E4LDQ6 E5LDQ6 B1LDQ6 C1

LDQS6 D2LDQ6 D1LDQ6 E1LDQ6 F1LDQ6 F3LDQ6 F2

LUM0_SPLLT_IN_A G4LUM0_SPLLC_IN_A G3PUM0_SPLLT_FB_A G1LUM0_SPLLC_FB_A G2

PL13A H1PL13B J1PL14A H2PL14B H3LDQ22 G6LDQ22 H6

PCLKT7_0 J2PCLKC7_0 K1

A3A9A15A16

50 V10n

C497 12

50 V10n

C509 12

50 V10n

C511 12

50 V10n

C512 12

50 V10n

C490 12

P3.3VP3.3V P3.3VP3.3V

P3.3VP3.3V P3.3VP3.3V

P3.3VP3.3V P3.3VP3.3V

P3.3VP3.3V P3.3VP3.3V

P3.3VP3.3V P3.3VP3.3V

P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V

P3.3V

LS_AB[0-23]18:A3;23:A2;24:B1

LS_XCS_PER118:E3


LS_D

B[0-31

]

FPGA_FLASH_CLK

LS_DB[29]LS_DB[28]


GPIO[

0-95]

GPIO[

0-95]

FPGA_CONFIG[0]

FPGA_CONFIG[1]

LS_DB[8]LS_DB[7]LS_DB[5]LS_DB[6]LS_DB[9]

LS_DB[10]LS_DB[11]

GPIO[83]

FPGA_CONFIG[2]

FPGA_ERTEC_XRESET

GPIO[84]

FPGA_XRESET

GPIO[80]

GPIO[81]

TEST_XTRACE_EN

LS_A

B[0-23

]

LS_AB[8]LS_AB[10]LS_AB[6]LS_DB[21]LS_AB[1]

LS_XBE3_DQM3

LS_AB[0]

LS_XCS_PER1LS_AB[3]LS_AB[4]LS_AB[2]LS_AB[7]LS_AB[5]

LS_AB[11]LS_DB[22]LS_DB[26]

GPIO[82]

LS_DB[2]

LS_DB[3]LS_DB[4]

LS_DB[1]

LS_DB[0]LS_DB[31]

LS_DB[27]LS_XBE0_DQM0

LS_AB[14]LS_AB[15]

LS_AB[16]LS_AB[17]


LS_AB[13]

FPGA_FLASH_XCS

FPGA_FLASH_XCSFPGA_FLASH_MISO

FPGA_FLASH_MOSI

FPGA_FLASH_MOSI

LS_AB[18]

max 30mA

FPGA

FPGA configuration FLASH

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG14.1.2013

A5E31374985A

002

4026

FPGAEB200P

FPGA

LS_DB[0-31]18:A8;23:A2;24:B1;25:A1

GPIO[0-95]2:A1;4:B1;5:C2;6:B1;8:B1;9:E1;

10:A3;16:A3;16:C3;25:A1;32:A5

GND

GNDGND GNDGND

50 V1n

C570 12

GNDGND

16 V100n

C552 1216 V

2u2C543 1

2

FPGA_P1.2V_A

FPGA_P1.2V_A FPGA_P1.2V_A FPGA_P1.2V_A FPGA_P1.2V_A

FPGA_P1.2V_A

16 V2u2

C539 12 50 V

1nC566 1

2

GNDGND

16 V100n

C548 12

GND GND

16 V2u2

C538 12 50 V

1nC565 1

2

GNDGND

16 V100n

C547 12

GND GND

16 V2u2

C537 12 50 V

1nC564 1

2

GNDGND

16 V100n

C546 12

GND GND

GND GND

16 V100n

C544 12

16 V100n

C545 12

GND

50 V1n

C563 12

50 V1n

C562 12

GND

GNDGND50 V5n6

C522 12

GND

VCC

BANK

6

,FPGA

BANK

5

GNDIO

ECP2MD1

E15E2

B12

PCLKC5_0P7 PCLKT5_0P6 BDQ6T5 BDQ6T4 BDQ6T3 BDQ6R4 BDQ6T2 BDQ6R3 BDQ6R2 BDQS6R1 BDQ6P1 BDQ6P2 BDQ6P4 BDQ6P3 BDQ6M6 BDQ6L6 BDQ6N5 BDQ6M5 VREF2_5T6 VREF1_5R6 VCCIO_5P5 VCCIO_5M7 VCCIO_6 K5VCCIO_6 M3

VREF1_6 K4VREF2_6 J4

GDLLT_IN_A M1GDLLT_FB_A N2GDLLC_IN_A N1

GDLLC_FB_A N3GPLLT_IN_A L1

GPLLT_FB_A L3GPLLC_IN_A L2

GPLLC_FB_A L4SPLLT_IN_A J6

SPLLT_FB_A K3SPLLC_IN_A J5

SPLLC_FB_A K2PLLCAP M4

PCLKC6_0 H5PCLKT6_0 H4

VCCPLL G10G7G9H7J10K10K8

B6

BLM15Z33

21

50 V10n

C553 12

50 V10n

C554 12

50 V10n

C555 12

50 V10n

C556 12

50 V10n

C557 12

50 V10n

C561 12

P1.2V_A

P3.3V P3.3V

P1.2V

P1.2V P1.2V P1.2V P1.2V

P1.2VP1.2V P1.2V P1.2V

P1.2VP1.2V P1.2V P1.2V

P3.3VP3.3V P3.3V

P3.3VP3.3V P3.3V

16 V100n

C528 12 16 V

100nC532 1

2


FPGA_INFO2:A1

LS_D

B[0-31

]

GPIO[

0-95]

GPIO[79]GPIO[61]GPIO[73]GPIO[74]GPIO[76]GPIO[77]GPIO[67]GPIO[70]GPIO[64]GPIO[94]GPIO[95]GPIO[65]GPIO[68]GPIO[66]GPIO[71]GPIO[69]GPIO[72]GPIO[75]GPIO[78]GPIO[50]

LS_DB[12]LS_DB[13]

GPIO[

0-95]

GPIO[0-95]

GPIO[90]

GPIO[91]GPIO[93]


GPIO[86]

GPIO[85]LS_DB[15]

LS_DB[30]

GPIO[92]

LS_DB[14]

FPGA

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG40

27

14.1.2013

A5E31374985A

002InterfacesEB200P

PCIe board connector

PCIE_P3.3V

GND

PCIE_P3.3V_AUXPCIE_P12.0V

GND

XIN_SLOT28:E2

PCIE_P12.0V PCIE_P3.3V

X1_PETp024:B5

X1_PETn024:B5

X1_PERp024:B5

X1_PERn024:B5

REFCLK+24:C5

REFCLK-24:C5

PCIE_XRESET33:B3

16 V100nC577

1 2

16 V100nC576

1 2

GND

PCIE_P12.0V

25 V22u

C571 12 25 V

22uC572 1

2 25 V22u

C573 12 25 V

22uC574 1

2 25 V22u

C575 12

PCIE_P3.3V PCIE_P3.3V_AUXPCIE_P12.0V

GND GND GND

PCIE_P3.3V

GND

X60 A1

X60 A2

X60 A3

X60 A4

X60 A5

X60 A6

X60 A7

X60 A8

X60 A9

X60 A10

X60 A11

X60 A12

X60 A13

X60 A14

X60 A15

X60 A16

X60 A17

X60 A18

X60 B1

X60 B2

X60 B3

X60 B4

X60 B5

X60 B6

X60 B7

X60 B8

X60 B9

X60 B10

X60 B11

X60 B12

X60 B13

X60 B14

X60 B15

X60 B16

X60 B17

X60 B18

SERDES input

SERDES output

PCIe Connector X1

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AG14.1.2013

A5E31374985A

002

4028

Power supplyEB200P

External power input

STEP-DOWNREGULATOR

L5973DN3

U+8VREF6COMP4INH3HSINKTHU-7

OUT 1

FB 5SYNC 2

GND

50 V4u7

C591 12 50 V

4u7C594 1

250 V100u

C589 AK50 V

100uC586 A

K

1.5AF1

1 2

P6SMB36CA36 VV5 A1

A2

50 V100n

C580 12

L6

1

4

2

3 50 V100n

C592 12

GND

EXT_P24.0V

EXT_P24.0V EXT_P24.0V EXT_P24.0V EXT_P24.0V

GND GND GND GND

EXT_P24.0V

220RR256

12

1K5R257

12

15KR255

12

GND

MBRS340T3V8A

K

EXT_P12.0V

GND

4K7R251

12

50 V22n

C579 12

50 V220p

C578 12

GNDGND

25 V22u

C588 12 25 V

22uC590 1

2 25 V22u

C593 1225 V

470uC585 A

K

EXT_P12.0V EXT_P12.0V EXT_P12.0V EXT_P12.0V

GND GND GND GND

50 V100n

C581 12

XIN_SLOT27:E4

GND

BC847CV4

E

BC

10KR250

1 2

GND

22KR252

12

EXT_P24.0V

BC847CV7

E

BC

GND

10KR253

1 2

PCIE_P3.3V

220 uHL5

1 2

X10 1

X10 2

VREF

BZX84C3V33.3 V

V3 KA

MBRS340T3V6

A K

MBRS340T3V24

A K

50 V100n

C726 12

SENSE_EXT_P24.0V

SENSE_EXT_P24.0V

10KR249

12

10KR371

12

BC847CV25

E

BC

10KR372

1 2

1000mA @ 24V

max1500mA

External power supply input and convertor

24V to 12V convertor

+

-

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG40

29

14.1.2013

A5E31374985A

002Power supplyEB200P

Power convertors

STEP-DOWN-REGVIN_AVIN_SWINH(EN)AGNDPGND

SWVFB

SYNC

GND[PAD]

ST1S10N4

16248

735

9

50 V4u7

C599 1225 V

10uC596 1

2

GND

P12.0V

GND GND GND

15 uHL7

1 2

6.3 V22u

C609 12 6.3 V

22uC613 1

2

P3.3V

AUX_OUT_P3.3V

GND GND GND

25 V4n7

C606 12

GND GND


SWVFB

SYNC

GND[PAD]

ST1S10N5

16248

735

9 25 V4n7

C607 12

GND

50 V4u7

C600 12

GND GND

6.3 V22u

C614 12

P12.0V

GND

6.3 V22u

C610 12

GND

15 uHL8

1 2

25 V10u

C597 12

50 V4u7

C601 12

GND

P12.0V

GND


SWVFB

SYNC

GND[PAD]

ST1S10N6

16248

735

9

GND GNDGND

25 V10u

C598 12

GND

330 uHL9

1 2P5.0V

10 V22u

C611 12 10 V

22uC615 1

2

82KR262

12

2KR263

12

16KR264

12

GND

GND GND


SWVFB

SYNC

GND[PAD]

ST1S10N7

16248

735

9 25 V4n7

C622 12

GNDGND GND

6.3 V22u

C630 12

GND

6.3 V22u

C626 12

GND

AUX_P3.3V

10 V10u

C616 12 6.3 V

4u7C618 1

2

P1.8V

2.2 uHL10

1 2

10 V10u

C617 12

GND GNDGND

6.3 V4u7

C619 12

P1.2VSTEP-DOWN-REG

VIN_AVIN_SWINH(EN)AGNDPGND

SWVFB

SYNC

GND[PAD]

ST1S10N8

16248

735

9

GNDGND

AUX_P3.3V

GND

2.2 uHL11

1 2

25 V4n7

C623 12

6.3 V22u

C631 12

GND

6.3 V22u

C627 12

PSU_STEP3_EN29:E1;31:B8

PSU_STEP3_EN29:A5;31:B8

PSU_STEP2_EN29:D5;29:E5;31:B8

REG

L6932H1.2N9

EN1FB3 GND 6VIN2

PGOOD 5VOUT 4

THERM[PAD] TH 10KR265

1 2

10 V10u

C620 12

GNDGNDGND GND

10 V10u

C628 12

P1.5V_A

25 V4n7

C624 12

PSU_STEP2_EN29:C5;29:E5;31:B8

P1.2V_A

10 V10u

C629 12

GND

10KR266

1 2

25 V4n7

C625 12

REG

L6932H1.2N10

EN1FB3 GND 6VIN2

PGOOD 5VOUT 4

THERM[PAD] TH

PSU_STEP2_EN29:C5;29:D5;31:B8

10 V10u

C621 12

GNDGND

0RR270

12

2K4R259

12

7K5R258

12

7K5R260

12

2K4R261

12

1K6R272

12

2KR271

12

1KR273

12

1KR267

12

2KR274

12

2KR268

12

2KR269

1225 V

4n7C608 1

2

AUX_P3.3V

AUX_P3.3V

max3000mA

max2000mA

max300mA

max700mA

max2000mA

max300mA

max400mA

12V to 3.3V convertor

12V to 3.3V convertor (aux)

12V to 5.0V convertor

3.3V to 1.8V convertor




Power supply convertors

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG40

30

14.1.2013

A5E31374985A

002Power supplyEB200P

Power switching

PCIE_P12.0V

PCIE_P3.3V

P12.0V

AUX_OUT_P3.3VAUX_P3.3V

EXT_P12.0V

FDS4685V10

4

1235678

FDS4685V14

4

1235678

Si4486EYV13

4

5678123

Si4486EYV9

4

5678123

10KR277

12

10KR275

12

GND GND

BC857BV15

E

BC

BC847CV11

EB

C

P12.0V P12.0V

47KR284

1 2

BC847CV17

EB

C

GND

10KR281

12

P12.0V

10KR279

1 2

47KR283

1 2

GND

10KR276

12

BC847CV16

EB

C

GND

P12.0V

10KR278

12

P12.0V

BC847CV18

EB

C

47KR286

1 2

GND

P12.0V

47KR285

1 210KR280

1 210K

R282

12

GND

47KR287

12

SENSE_EXT_P24.0V

BC857BV12

E

BC

Power switches

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG14.1.2013

A5E31374985A

002

4031

Power supplyEB200P

Power sensing

3K9R304

12

P5.0VP1.8V

P1.2V_A

P1.2V P1.5V_A

GND

GND

GND

P0.8V P2.5V

P0.8V

P0.8V

P2.5V

P2.5V

P0.8V

GND

P2.5V

REF

431N11

KAD

JAD

JA

GND

P12.0V

1KR329

12

P2.5V

GND

P0.8V

50 V1n

C652 12

GND GND

16 V100n

C644 12

GND

10 V10u

C641 12

GND

P2.5V P2.5V P2.5V P2.5V

GND

50 V1n

C638 1210 V

10uC632 1

2 16 V100n

C634 12

GNDGND GND

P0.8V P0.8V P0.8V P0.8V

BAS40-07V20

34

21

1KR327

12

BAS40-07V23

34

21

BAS40-07V21

34

21

BAS40-07V22

34

21

GND

P0.8V P2.5V

BAS40-07V19

1 4

BAS40-07V19

2 3

GND

P0.8V P2.5V

PSU_PG2:A1;33:B3

AUX_P3.3V

10KR322

12

10KR323

12

10KR324

12

P3.3VAUX_P3.3V AUX_P3.3V

74LVC1G07D28

2 4

D30VCC5 GND 3

74LVC1G07D29

2 4

D29VCC5 GND 3

74LVC1G07D30

2 4

D28VCC5 GND 3

1KR325

12

AUX_P3.3V

PSU_STEP3_EN29:E1;29:A5

PSU_STEP2_EN29:C5;29:D5;29:E5

P3.3V AUX_P3.3V AUX_P3.3V

GND GND GNDGND GND

16 V100n

C646 12 16 V

10nC650 1

2

AUX_P3.3V AUX_P3.3VAUX_P3.3V AUX_P3.3V

16 V100n

C640 12

GNDGND

16 V100n

C647 12

GNDGND

P3.3VP3.3V

P12.0V

GND

P12.0V

GND

GNDGND

16 V100n

C635 12

GNDGND

50 V1n

C639 1225 V

10uC633 1

2

P12.0V P12.0V P12.0V P12.0V P12.0VP12.0V P12.0V

GND GND GND

25 V10u

C642 12 16 V

100nC645 1

2

P12.0V

50 V1n

C653 12

GND

COMP

2901U1

-6+7 1

COMP

2901U1

-4+5 2

COMP

2901U2

-8+9 14

COMP

2901U2

-10+11 13

COMP

2901U2

-6+7 1

COMP

2901U2

-4+5 2

U1VCC3 GND 12

U2VCC3 GND 12

50 V10n

C643 12

50 V10n

C651 12

50 V10n

C636 12

50 V10n

C637 12

50 V10n

C648 12

50 V10n

C649 12

22RR373

12

22RR374

12

470RR288

12

470RR291

12

470RR311

12

1K2R289

12

1K2R326

12

1K2R292

12

680RR295

12

680RR297

12

560RR305

12

560RR307

12

3K3R302

12

3K3R301

12

3K3R321

12

3K3R303

12

3K3R319

12

3K3R320

12

100KR315

1 2

100KR299

1 2

100KR298

1 2

100KR316

1 2100KR300

1 2

100KR317

1 2

1K5R375

12

10RR309

12

820RR376

12

120RR377

12

1K8R310

12

18KR312

12

39RR313

12

390RR378

12

10RR379

12

P3.3V

10KR328

12

2K7R330

12

22KR380

12

22KR381

12

22KR382

12

GND GND GND

56RR308

12

56RR293

12

56RR296

12

56RR290

12

COMP

2901U1-10+11 13

COMP

2901U1-8+9 14

GND

P12.0V

GND

P12.0VPWR_STEP2_EN

PWR_PG

PWR_PG

PWR_PG

PWR_PG

PWR_PG

PWR_PGPWR_STEP3_EN

PWR_STEP3_EN

PWR_STEP3_EN

max5mA

max5mA max5mA

max5mA max5mA

max5mA

Power sensing circuits

Voltage reference

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG40

32

14.1.2013

A5E31374985A

002ConfigurationEB200P

Configuration jumpers

4K7R331

12

EMC_DTXR11:E8;18:A4;19:C4EMC_XOE_DRIVER11:E8;18:A4;19:C4EMC_AB[0-23] 11:A6;18:A1;20:A1;21:A2;22:A1

4K7R332

12

4K7R334

12

4K7R336

12

4K7R338

12

4K7R340

12

GND GND

4K7R333

12

GND

4K7R335

12

GND

4K7R337

12

GND

4K7R339

12

GND

4K7R342

12

GND

GPIO[0-95]2:A1;4:B1;5:C2;6:B1;8:B1;9:E1;

10:A3;16:A3;16:C3;25:A1;26:A2

P3.3V

TEST_XUART_EN4:B1

TEST_XTRACE_EN4:B1;6:B1;25:D7

TEST_XTEMP_EN4:B1

TEST_XEEPROM_EN4:B1TEST_XUSERGPIO_EN6:A1

FPGA_CONFIG[0]25:C7FPGA_CONFIG[1]25:D7FPGA_CONFIG[2]25:C7FPGA_CONFIG[3]24:B1

P3.3V P3.3V

10KR344

12

10KR346

12

10KR345

12

GND GND

10KR347

12

GND

X40 1X40 2X40 3X40 4X40 5X40 6X40 7X40 8X40 9X40 10X40 11X40 12X40 13X40 14X40 15X40 16X40 17X40 18X40 19X40 20X41 1X41 2X41 3X41 4X41 5X41 6X41 7X41 8X41 9X41 10

X42 1X42 2X42 3X42 4X42 5X42 6X42 7X42 8X42 9X42 10X42 11X42 12X42 13X42 14X42 15X42 16X42 17X42 18X42 19X42 20X43 1X43 2X43 3X43 4X43 5X43 6X43 7X43 8X43 9X43 10

X21

S

ERTEC_EMC ERTEC_EMC ERTEC_EMC ERTEC_EMC ERTEC_EMC

50 V100n

C727 12

1KR408

12

0RR383

1 2

GND

EMC_AB[23]

GPIO[9]GPIO[0]

EMC_AB[18]


EMC_AB[22]

EMC_AB[19]

EMC_AB[15]


Pin Function Signal01 Sync(0) BNC tip pin03 Sync(1) BNC tip pin05 Trace Trace CS bus switch OE07 EEPROM EEPROM CS bus switch OE09 User GPIOs User GPIOs CS bus switch OE11 UART UART CS bus switch OE13 TEMP TEMP CS bus switch OE15 F_XHIF(0) FPGA_CONFIG(0)17 F_XHIF(1) FPGA_CONFIG(1)19 F_XHIF(2) FPGA_CONFIG(2)21(01) F_XHIF(3) FPGA_CONFIG(3)23(03) None NC25(05) None NC27(07) None NC29(09) None NC

Pin Function Signal01 Boot(0) ERTEC EMC DTXR03 Boot(1) ERTEC EMC XOE_DRIVER05 Boot(2) ERTEC EMC A1507 Boot(3) ERTEC EMC A1609 Config(0) ERTEC EMC A1711 Config(1) ERTEC EMC A1813 Config(2) ERTEC EMC A1915 Config(3) ERTEC EMC A2017 Config(4) ERTEC EMC A2119 Config(5) ERTEC EMC A2221(01) Config(6) ERTEC EMC A2323(03) None NC25(05) None NC27(07) None NC29(09) None NC

Configuration jumpersERTEC 200P jumpers FPGA jumpers

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AG14.1.2013

A5E31374985A

002

4033

Power supplyEB200P

Reset circuit

FPGA_ERTEC_XRESET25:D7

PCIE_XRESET27:D6 ERTEC_XRST

9:D1

PSU_PG2:A1;31:B8

S0 12

1KR349

12

P3.3V

GND

74LVC1G07D33

2 4

D32VCC5 GND 3

74LVC1G07D34

2 4

FPGA_XRESET25:D7

D33VCC5 GND 3

1KR352

12

P3.3V

1KR353

12

P3.3V

74LVC1G07D35

2 4

D34VCC5 GND 3

P3.3V P3.3V

1KR350

12

GND

P3.3V

GND

P3.3V P3.3V

GND

16 V2u2

C658 12

GND

P3.3V

16 V100n

C660 12

GND

P3.3V

50 V1n

C664 12

16 V2u2

C668 12

GND

GND

P3.3V

GND

16 V2u2

C666 12

GNDGND

P3.3V P3.3V

50 V1n

C673 12

P3.3V

16 V100n

C669 12

GND

P3.3V

GND

16 V2u2

C659 12

GNDGND

P3.3V P3.3V

50 V1n

C665 12

P3.3V

16 V100n

C661 12

P3.3V

16 V100n

C670 12 50 V

1nC674 1

2

P3.3VP3.3VP3.3V

GND GNDGND

16 V2u2

C667 12

GND

P3.3V

P3.3V

P3.3V

GND

GND

P3.3VP3.3V

16 V2u2

C675 12

GND GND GNDGND

16 V100n

C677 12

P3.3V

50 V1n

C681 12

P3.3V

74LVC1G07D32

2 4

D35VCC5 GND 3

P3.3V

P3.3V

10KR348

12

50 V10n

C662 12

50 V10n

C663 12

50 V10n

C671 12

50 V10n

C672 12

50 V10n

C679 12

PM_FLASH_XRESET8:A1

74LVC1G07D36

2 4

74LVC1G07D37

2 4

D37VCC5 GND 3

D36VCC5 GND 3 74LVC1G07

D38

2 4

D38VCC5 GND 3

74LVC1G07D39

2 4

D39VCC5 GND 3

1KR351

12

P3.3V

GND

GND

P3.3V

P3.3V

GND

GND

P3.3V

GND

GND

GND

16 V2u2

C676 12 16 V

100nC678 1

2 50 V10n

C680 12

GND

50 V1n

C682 12

GND

P3.3V P3.3VP3.3V

GND

P3.3V

P3.3V

16 V2u2

C683 12 16 V

100nC685 1

2 50 V1n

C689 12

GND GND

P3.3V

GNDGND

P3.3VP3.3V

50 V10n

C687 12

P3.3V

16 V2u2

C684 12 16 V

100nC686 1

2 50 V1n

C690 12

GND GND

P3.3V

GNDGND

P3.3VP3.3V

50 V10n

C688 12

GND

16 V2u2

C691 12

P3.3V

GNDGND

P3.3V P3.3V

50 V1n

C694 12

P3.3V

GND

16 V100n

C692 12 50 V

10nC693 1

2

16 V100n

C695 12

GND

RESC

7733N12

U+87

RES2CT3CONTR1GND4

5RESET6RESET

ERTEC_EMC

1KR219

12

EMC_XRESET20:B1;22:E1

max5mA

max5mA

max5mA

max5mA

max5mA

max5mA max5mA

max5mA max5mA

Reset circuit

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56

Siemens AGCONNECTOR TABLESBlock Diagram

4034

14.1.2013

A5E31374985A

002 EB200P

PIN.NO123456789

101112

NETNAMEP1_TXPP1_TXNP1_RXPSIGN587SIGN586P1_RXN

EARTHSIGN580P1_LINKSIGN581P1_ACT

NETNAMEP2_TXPP2_TXNP2_RXPSIGN585SIGN584P2_RXN

EARTHSIGN582P2_LINKSIGN583P2_ACT

NETNAMETAPA_PTAPA_NSIGN592SIGN594SIGN595SIGN591

EARTH

NETNAMETAPB_PTAPB_NSIGN593SIGN596SIGN597SIGN590

EARTH

X1 A B C D

PIN.NOS1S

S2S3S4

NETNAMEEARTHEARTHEARTHEARTHEARTH

X1 SHIELDPINS

PIN.NO12

NETNAMESIGN354

INPUT_GROUND

X10

PIN.NO12345

NETNAMESIGN111SIGN113SIGN112

SIGN110

X11

PIN.NOS

NETNAMESIGN490

X11 SHIELDPINS

PIN.NO123

NETNAMESYNC_PSYNC_NSIGN95

X12PIN.NO

1COP1COP2

NETNAMESIGN640

X2

PIN.NOS

NETNAMEGND

X2 SHIELDPINS

PIN.NO1234567891011121314151617181920212223242526272829303132333435363738

NETNAMEP3.3VP5.0VP3.3VP5.0V

PM_FLASH_XRESET

GPIO[31]GPIO[15]GPIO[30]GPIO[14]GPIO[29]GPIO[13]GPIO[28]GPIO[12]GPIO[27]GPIO[11]GPIO[26]GPIO[10]GPIO[25]GPIO[9]

GPIO[24]GPIO[8]

GPIO[23]GPIO[7]

GPIO[22]GPIO[6]

GPIO[21]GPIO[5]

GPIO[20]GPIO[4]

GPIO[19]GPIO[3]

GPIO[18]GPIO[2]

GPIO[17]GPIO[1]

GPIO[16]GPIO[0]

X20

PIN.NOS1S2S3S4S5

NETNAMEGNDGNDGNDGNDGND

X20 SHIELDPINS

PIN.NO1234567891011121314151617181920212223242526272829303132333435363738


ERTEC_REF_CLK


X21

PIN.NOS1S2S3S4S5


X21 SHIELDPINS

PIN.NO1234567891011121314151617181920212223242526272829303132333435363738



X22

PIN.NOS1S2S3S4S5


X22 SHIELDPINS

PIN.NO123456789

1011121314151617181920212223242526272829303132333435363738

NETNAME

TRACECLKTRACE_DBGRQTRACE_DBACKERTEC_XSRST

ERTEC_TDOP3.3V

ERTEC_RTCKP3.3V

ERTEC_TCKTRACEPKT[7]ERTEC_TMSTRACEPKT[6]ERTEC_TDI

TRACEPKT[5]ERTEC_XTRSTTRACEPKT[4]TRACEPKT[15]TRACEPKT[3]TRACEPKT[14]TRACEPKT[2]TRACEPKT[13]TRACEPKT[1]TRACEPKT[12]TRACEPKT[0]TRACEPKT[11]TRACESYNC

TRACEPKT[10]PIPESTAT[2]TRACEPKT[9]PIPESTAT[1]TRACEPKT[8]PIPESTAT[0]

X30

PIN.NOS1S2S3S4S5


X30 SHIELDPINS

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57


4035

14.1.2013

A5E31374985A

002 EB200P

PIN.NO123456789

1011121314151617181920

NETNAMEP3.3VP3.3V

ERTEC_XTRSTGND

ERTEC_TDIGND

ERTEC_TMSGND

ERTEC_TCKGND

ERTEC_RTCKGND

ERTEC_TDOGND

ERTEC_XSRSTGND

JTAG_DBGRQGND

JTAG_DBACKGND

X31

PIN.NO123456789

10

NETNAMEFPGA_TCK

GNDFPGA_TMS

GNDFPGA_TDI

P3.3VFPGA_TDO

GNDFPGA_DONE

FPGA_PROGRAMN

X32

PIN.NO1234567891011121314151617181920

NETNAMEEMC_DTXR

SIGN515EMC_XOE_DRIVER

SIGN520EMC_AB[15]

SIGN516EMC_AB[16]

SIGN521EMC_AB[17]

SIGN522EMC_AB[18]

SIGN523EMC_AB[19]

SIGN517EMC_AB[20]

SIGN524EMC_AB[21]

SIGN518EMC_AB[22]

SIGN519

X40

PIN.NO123456789

10

NETNAMEEMC_AB[23]

SIGN525

X41

PIN.NO1234567891011121314151617181920

NETNAMESIGN529GPIO[9]SIGN529GPIO[0]

TEST_XTRACE_ENGND

TEST_XEEPROM_ENGND

TEST_XUSERGPIO_ENGND

TEST_XUART_ENGND

TEST_XTEMP_ENGND

FPGA_CONFIG[0]GND

FPGA_CONFIG[1]P3.3V

FPGA_CONFIG[2]P3.3V

X42

PIN.NO123456789

10

NETNAMEFPGA_CONFIG[3]

GND

X43

PIN.NO123456789

1011121314151617181920

NETNAMEGNDGND

USER_GPIO[0]USER_GPIO[1]USER_GPIO[2]USER_GPIO[3]USER_GPIO[4]USER_GPIO[5]USER_GPIO[6]USER_GPIO[7]USER_GPIO[8]USER_GPIO[9]

USER_GPIO[10]USER_GPIO[11]USER_GPIO[12]USER_GPIO[13]USER_GPIO[14]USER_GPIO[15]

P3.3VP3.3V

X50

PIN.NO123456789

101112131415161718

NETNAMESIGN351

PCIE_P12.0VPCIE_P12.0V

GND

PCIE_P3.3VPCIE_P3.3V

PCIE_XRESETGND

REFCLK+REFCLK-

GNDSIGN352SIGN353

GND

NETNAMEPCIE_P12.0VPCIE_P12.0V

GND

GNDPCIE_P3.3V

PCIE_P3.3V_AUX

GNDX1_PETp0X1_PETn0

GNDSIGN351

XIN_SLOT

X60 A BPIN.NO

123456789

1011121314151617181920212223242526272829303132333435363738


LS_XBE0_DQM0LS_XBE1_DQM1

LS_DB[31]LS_DB[15]LS_DB[30]LS_DB[14]LS_DB[29]LS_DB[13]LS_DB[28]LS_DB[12]LS_DB[27]LS_DB[11]LS_DB[26]LS_DB[10]LS_DB[25]LS_DB[9]

LS_DB[24]LS_DB[8]

LS_DB[23]LS_DB[7]

LS_DB[22]LS_DB[6]

LS_DB[21]LS_DB[5]

LS_DB[20]LS_DB[4]

LS_DB[19]LS_DB[3]

LS_DB[18]LS_DB[2]

LS_DB[17]LS_DB[1]

LS_DB[16]LS_DB[0]

X80

PIN.NOS1S2S3S4S5


X80 SHIELDPINS

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57


4036

14.1.2013

A5E31374985A

002 EB200P

PIN.NO123456789

1011121314151617181920

NETNAMEERTEC_EMC

GNDEMC_DB[24]EMC_DB[23]EMC_DB[21]ERTEC_EMC

GNDSIGN542P1_TDXN

GNDP1_SDXNP1_RDXN

GNDERTEC_PXHIF


ERTEC_PXHIFGND

ERTEC_PXHIF

NETNAMEGND

EMC_DB[26]EMC_DB[25]EMC_DB[22]EMC_DB[19]ERTEC_EMC

GNDSIGN543P1_TDXP

SIGN11032P1_SDXPP1_RDXP

GNDGPIO[39]GPIO[44]GPIO[34]GPIO[58]GPIO[49]GPIO[41]

GND

NETNAMEEMC_DB[28]EMC_DB[27]EMC_DB[30]EMC_DB[17]EMC_DB[20]

P1.5V_A_SEPGND

P3.3V_SEPSIGN363

P1.5V_A_SEPGND

P3.3V_SEPGPIO[45]

P1.5V_A_SEPGPIO[33]GPIO[47]GPIO[37]GPIO[42]GPIO[43]GPIO[57]

NETNAMEEMC_DB[29]EMC_DB[31]

EMC_XBE3_DQM3EMC_DB[16]EMC_DB[18]

EMC_XCS_PER2GPIO[83]GPIO[84]GPIO[87]GPIO[88]GPIO[86]GPIO[93]GPIO[90]GPIO[92]GPIO[36]GPIO[51]GPIO[46]GPIO[53]GPIO[50]GPIO[56]

NETNAMEERTEC_EMCERTEC_EMCEMC_AB[5]EMC_AB[4]

EMC_XBE2_DQM2EMC_XCS_PER3

GPIO[89]GPIO[80]GPIO[82]GPIO[91]GPIO[94]GPIO[85]GPIO[95]GPIO[62]GPIO[35]GPIO[38]GPIO[40]GPIO[52]

ERTEC_PXHIFGND

NETNAMEGNDGND


GNDGPIO[81]

ERTEC_PXHIFSIGN307

GNDP3.3V_SEP

GNDERTEC_PXHIF

GPIO[63]GND

GPIO[60]GPIO[61]

P3.3V_SEPGND

P1.5V_A_SEP

NETNAMEEMC_AB[6]EMC_AB[7]P3.3V_SEPEMC_AB[1]SIGN208

EMC_XRDY_PERGND

ERTEC_PXHIFGND

P1.2V_SEPP1.2V_SEP

GNDERTEC_PXHIF

GNDGPIO[55]GPIO[67]GPIO[64]

SIGN11030P1.5V_A_SEP

SIGN11033

NETNAMEEMC_AB[9]EMC_AB[10]

GNDEMC_AB[0]

SIGN208ERTEC_EMCERTEC_EMC

GNDGND

P1.2V_SEPP1.2V_SEP

GNDGND

ERTEC_PXHIFERTEC_PXHIF

GPIO[76]GPIO[68]

GNDP1_RXPP1_RXN

NETNAMEEMC_AB[12]EMC_AB[11]

EMC_XCS_SDRAMEMC_XRAS_SDRAM

EMC_CLK_O_SDRAM1EMC_CLK_O_SDRAM2

GNDGNDGNDGNDGNDGNDGNDGND

SIGN307GPIO[75]GPIO[78]

GNDP1_TXPP1_TXN

NETNAMEERTEC_EMCEMC_AB[13]

EMC_XCAS_SDRAMEMC_XWE_SDRAM

EMC_XAV_BFP3.3V_SEPP1.2V_SEPP1.2V_SEP

GNDGNDGNDGND

P1.2V_SEPP1.2V_SEP

GNDGPIO[71]GPIO[72]SIGN544SIGN214

SIGN11033

NETNAMEGND

EMC_AB[14]GND

EMC_XRDY_BFSIGN209

GNDP1.2V_SEPP1.2V_SEP

GNDGNDGNDGND

P1.2V_SEPP1.2V_SEPGPIO[54]GPIO[69]GPIO[65]

GNDGND

SIGN11030

NETNAMEERTEC_EMC

GNDEMC_DB[15]EMC_DB[0]

ERTEC_EMCGND

P3.3V_SEPSIGN364P2_TDXN

GNDP2_SDXNP2_RDXN

GNDSIGN142

GNDP3.3V_SEP

GPIO[29]GPIO[28]

GNDP3.3V_SEP

X70 A B C D E F G H J K L Y

PIN.NO123456789

1011121314151617181920

NETNAMEEMC_XRD

EMC_AB[16]P3.3V_SEPEMC_AB[15]

SIGN209EMC_CLK_O_BF2

GNDGNDGNDGNDGNDGNDGNDGND

SIGN305GPIO[70]GPIO[73]

GNDP2_TXPP2_TXN

NETNAMEEMC_XWR

EMC_AB[17]P1.5V_A_SEPEMC_AB[18]

EMC_CLK_O_BF1ERTEC_EMCERTEC_EMC

GNDGND

P1.2V_SEPP1.2V_SEP

GNDGND

ERTEC_PXHIFERTEC_PXHIF

GPIO[77]GPIO[74]

GNDP2_RXPP2_RXN

NETNAMEEMC_AB[19]EMC_AB[20]ERTEC_TCK

ERTEC_XTRSTEMC_AB[21]

SIGN362GND

P3.3V_SEPGND

P1.2V_SEPP1.2V_SEP

GNDP3.3V_SEP

GNDP3.3V_SEP

GPIO[79]GPIO[66]

GNDP1.5V_A_SEP

SIGN11033

NETNAMEGNDGND


EMC_XCS_PER1GND

SIGN643P3.3V_SEP

SIGN312ERTEC_XSRST

GNDSIGN309

P3.3V_SEPGNDGND


GNDP1.5V_A_SEP

NETNAMEERTEC_EMCERTEC_EMC

EMC_XBE1_DQM1EMC_XCS_PER0

EMC_XBE0_DQM0SIGN11008SIGN140

ERTEC_TMSGPIO[16]GPIO[17]SIGN146P2_ACTP1_ACTGPIO[18]GPIO[19]GPIO[10]GPIO[11]GPIO[12]

P3.3V_SEPGND

NETNAMEEMC_DB[10]EMC_DB[8]EMC_DB[6]EMC_DB[5]EMC_DB[7]EMC_DTXR

GPIO[1]GPIO[2]GPIO[3]GPIO[4]GPIO[5]GPIO[6]GPIO[7]GPIO[20]GPIO[21]GPIO[23]GPIO[13]GPIO[14]P2_LINKP1_LINK

NETNAMEEMC_DB[12]EMC_DB[9]EMC_DB[14]EMC_DB[1]EMC_DB[2]EMC_DB[4]

P1.5V_A_SEPGND

GPIO[0]SIGN541

P1.5V_A_SEPGND

P1.5V_A_SEPGND

SIG10007GND


NETNAMEGND


ERTEC_EMCGND

ERTEC_RTCKERTEC_TDIP2_TDXP

SIGN11032P2_SDXPP2_RDXP

P3.3V_SEPSIGN143

ERTEC_XRSTSIGN147GPIO[26]GPIO[25]GPIO[24]

GND

X70 M N P R T U V W

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:56


4037

14.1.2013

A5E31374985A

002 EB200P

PIN.NO123456789

1011121314151617181920212223242526272829303132333435363738


LS_XBE2_DQM2LS_XBE3_DQM3LS_XOE_DRIVER

LS_AB[15]LS_DTXRLS_AB[14]

LS_XRDY_PERLS_AB[13]LS_XRD

LS_AB[12]LS_XWR

LS_AB[11]LS_XCS_PER3

LS_AB[10]LS_XCS_PER2

LS_AB[9]LS_XCS_PER0


LS_AB[22]LS_AB[6]

LS_AB[21]LS_AB[5]

LS_AB[20]LS_AB[4]

LS_AB[19]LS_AB[3]

LS_AB[18]LS_AB[2]

LS_AB[17]LS_AB[1]

LS_AB[16]LS_AB[0]

X81

PIN.NOS1S2S3S4S5


X81 SHIELDPINS

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

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DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AGPOWER TABLESBlock Diagram

4038

14.1.2013

A5E31374985A

002 EB200P

REFERENCED29,D30

TYPE74LVC1G07

AUX_P3.3V5

GND3

PIN_NO

REFERENCED0

TYPEERTEC200+

ERTEC_EMCA1A6B6E1E2H6H7K1N6N7T1T2W5Y1Y5

ERTEC_PXHIFA14A18A20E19F13F8

G13G8H14H15N14N15

GNDA10A13A19A2A7B1B13B20B7

C11C7E20F1F10F15F2F6

G12G14G7G9H12H13H3H8H9J10

P1.2V_SEPG10G11H10H11K13K14K7K8L13L14L7L8

N10N11P10P11

P1.5V_A_SEPC10C14C6

G19N3P19V11V13V7

P3.3V_SEPC12C8F11F18G3K6M3P13P15P8

R13R8T19W13Y16Y20Y7

PIN_NO

REFERENCED0

TYPEERTEC200+

ERTEC_EMC ERTEC_PXHIF GNDJ11J12J13J14J7J8J9

K10K11K12K15K9L1L10L11L12L18L3L6L9

M10M11M12M13M14M7M8M9N12N13N8N9P12P14P18P7P9R1R11R15R2R6T20V12V16V8W1

W20W6Y10Y13Y15Y19Y2Y6

P1.2V_SEP P1.5V_A_SEP P3.3V_SEPPIN_NO

REFERENCED18,D19

D22,D23

D44

TYPESDRAM 32Mx16

S29WS128P

74LVC1G157

ERTEC_EMCA7A9B3C7D3E7J9B6J5L5L85

GNDA1A3B7C3D7E3J1B3G3J9L42

PIN_NO

REFERENCEU1,U2

TYPE2901

GND12

P12.0V3

PIN_NO

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:37:57

Siemens AGPOWER TABLESBlock Diagram

4039

14.1.2013

A5E31374985A

002 EB200P

REFERENCED14,D15,D16,D17

D40,D41,D42

TYPE74LVC16T245

74LVC2T45

ERTEC_EMC3142

1

GND1015212834394454

P3.3V187

8

PIN_NO

REFERENCED2,D3

D5D7

D13D27

D28,D32,D33,D34D35,D36,D37D38,D39,D43

TYPE74ALVC16244

24C16SN65HVD10

24C256serialFlash_16Mb

74LVC1G07

GND10152128343944545443

P3.3V1831427

88885

PIN_NO

REFERENCED12

TYPETUSB3410

GND18288

P3.3V253

USB_P1.8V4

PIN_NO

REFERENCED45U4

TYPE100LVELT22

TLV3502

GND55

POF_SD_P3.3V88

PIN_NO

Appr.Init.Date

COPY

ING OF

THIS

DOCU

MENT

AND G

IVING

IT TO

OTHE

RS AN

D THE

USE O

R COM

MUNIC

ATION

OF TH

E CON

TENT

S THE

REOF

ARE F

ORBID

DEN

WITH

OUT E

XPRE

SS AU

THOR

ITY. O

FFEN

DERS

ARE L

IABLE

TO TH

E PAY

-ME

NT OF

DAMA

GES A

LL RI

GHTS

ARE R

ESER

VED I

N THE

EVEN

T OF T

HEGR

ANT O

F A PA

TENT

OR TH

E REG

ISTRA

TION O

F A UT

ILITY

MOD

EL OR

DESIG

N


Sheets1 2 3 4 5 6 7 8

6 732 541 8

A

B

C

D

E

F F

C

D

A

B

E


Copyr

ight (C

) Siem

ens A

G, 20

06


updateTime=07:44:25

Siemens AGSPACING CLASSESBlock Diagram

4040

14.1.2013

A5E31374985A

002 EB200P

EARTHNoGroupDiffPairExtPWR

EARTH0.500.500.500.50

NoGroup0.50

B-ISOB-ISO0.50

DiffPair0.50

B-ISOB-ISO0.50

ExtPWR0.500.500.500.50

Group Spacings for External Layers

EARTHNoGroupDiffPairExtPWR

EARTH0.500.500.500.50

NoGroup0.50

B-ISOB-ISO0.50

DiffPair0.50

B-ISOB-ISO0.50

ExtPWR0.500.500.500.50

Group Spacings for Internal Layers

Not Connected Pin Table

EPLD1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1D1

PIN.NOA10A13A4A5A6A7A8

B10B13B3B4B5B7B8

C10C13C5C8

D10D11D12D13D14D4D5D6D7E11E6E8E9F10

Spacing ClassNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroup


EPLX1X1X1X1X1X1X1X1X1X1X1X1

X11X2X2

X20X21X22X22X3X3

X30X30X30X30X30X30X4X4

X41X41X41X41X41X41X41X41X43X43X43X43X43X43X43X43X60X60X60X60X60X60X60X60X60X60

PIN.NOA7B7

C10C11C12C7C9

D10D11D12D7D94

COP1COP2

6656

COP1COP2

1102345

COP1COP2

103456789

103456789

A5A6A7A8

B11B12B3B5B6B9

Spacing ClassNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroupNoGroup


EPLD23D23D23D23D23D23D23D23D23D23D23D23D23D28D29D3D3D3D3D3D30D32D33D34D35D36D37D38D39D4D4D4D4D4D42D43D6D9D9D9D9N1N10N10N12N2N3N9N9

R440U1U1U3V2V3

PIN.NOH9J2J6K2K6K9L2L3L6L7L9M1M10

11

1112689111111111

10192023931

1016192023778672788

13142

NCNC



EPLD1D1D1D1

D11D11D12D12D12D12D12D12D12D18D19D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D22D23D23D23D23D23D23D23D23D23D23D23D23D23D23

PIN.NOF7F8F9

K1320232212229303132E2E2A1

A10B5B7B8B9C4C9D4D6F5G5G6H9J2J6K2K6K9L2L3L6L7L9M1

M10A1

A10B5B7B8B9C4C9D4D6E5F5G5G6


block diagram - cache.industry.siemens.com · appr. init. date copying of this document and giving...

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