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BOOST UP OF RANDOM PULSE WIDTH MODULATION OVER SINUSOIDAL PULSE WIDTH MODULATION FOR THREE PHASE VOLTAGE SOURCE INVERTER Sreeja P 1 P.Muthukumar 2 L.Padmasuresh 3 1 Research scholar, Noorul Islam University, Chennai-600 025, India 2 Associate Professor, Dept of EEE, AMET University, Chennai,Tamilnadu-603772, India 3 Professor, Dept of EEE, Baselios Mathew II College of Engineering, Sasthamkotta, Kerala 690521,India 1 [email protected], 2 [email protected] , 3 [email protected] Abstract One of the inexpensive concepts in modern power electronics is the principle of random pulse width modulation (RPWM) for control of semiconductor based power converters, accelerated by the steadily increasing concern with or regulations regarding emissions of acoustic noise, vibrations and electric fields. Novel co-simulation of random pulse width modulation generation for three phase inverter drive by using Modelsim6.3f and Matlab 7.10, in order to disperse the acoustic noise spectra of an induction motor drive is presented. This scheme is randomized by selecting the triangle arbitrarily among the two triangles. The arbitration selection is based 8 bit linear feedback shift register. The least bit of the register output decide the winning triangle which is to compare with sine reference wave to generate pulses. The results of co-simulation are presented for both RPWM and SPWM in terms of Fundamental, Total Harmonic Distortion(THD), Harmonic Spread Factor(HSF). In addition, Xilinx XC3S500E FPGA device synthesis results are presented. The experimental validation of SPWM and RPWM are presented at the end and compared. Keywords: Pulse width modulation, Random pulse width modulation, Total harmonic distortion, Field programmable gate array, Harmonic spread factor 1. INTRODUCTION In recent years, pulse width modulation (PWM) inverter fed induction motors have been widely applied as motor drives in industry[1]. Owing to the deterministic frequency PWM switching of the inverters, the motors generate an unpleasant acoustic switching noise International Journal of Pure and Applied Mathematics Volume 119 No. 7 2018, 407-429 ISSN: 1311-8080 (printed version); ISSN: 1314-3395 (on-line version) url: http://www.ijpam.eu Special Issue ijpam.eu 407

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BOOST UP OF RANDOM PULSE WIDTH

MODULATION OVER SINUSOIDAL PULSE

WIDTH MODULATION FOR THREE PHASE

VOLTAGE SOURCE INVERTER

Sreeja P1 P.Muthukumar2 L.Padmasuresh3

1Research scholar, Noorul Islam University, Chennai-600 025, India

2Associate Professor, Dept of EEE, AMET University, Chennai,Tamilnadu-603772, India

3Professor, Dept of EEE, Baselios Mathew II College of Engineering, Sasthamkotta, Kerala

690521,India

[email protected], [email protected] , [email protected]

Abstract

One of the inexpensive concepts in modern power electronics is the principle of random

pulse width modulation (RPWM) for control of semiconductor based power converters,

accelerated by the steadily increasing concern with or regulations regarding emissions of

acoustic noise, vibrations and electric fields. Novel co-simulation of random pulse width

modulation generation for three phase inverter drive by using Modelsim6.3f and Matlab 7.10,

in order to disperse the acoustic noise spectra of an induction motor drive is presented. This

scheme is randomized by selecting the triangle arbitrarily among the two triangles. The

arbitration selection is based 8 bit linear feedback shift register. The least bit of the register

output decide the winning triangle which is to compare with sine reference wave to generate

pulses. The results of co-simulation are presented for both RPWM and SPWM in terms of

Fundamental, Total Harmonic Distortion(THD), Harmonic Spread Factor(HSF). In addition,

Xilinx XC3S500E FPGA device synthesis results are presented. The experimental validation

of SPWM and RPWM are presented at the end and compared.

Keywords: Pulse width modulation, Random pulse width modulation, Total harmonic

distortion, Field programmable gate array, Harmonic spread factor

1. INTRODUCTION

In recent years, pulse width modulation (PWM) inverter fed induction motors have

been widely applied as motor drives in industry[1]. Owing to the deterministic frequency

PWM switching of the inverters, the motors generate an unpleasant acoustic switching noise

International Journal of Pure and Applied MathematicsVolume 119 No. 7 2018, 407-429ISSN: 1311-8080 (printed version); ISSN: 1314-3395 (on-line version)url: http://www.ijpam.euSpecial Issue ijpam.eu

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and a mechanical vibration. To solve this problem, Random PWM [2]–[6] has attracted

attention from 1987 . The significant feature of an inverter adopting random PWM is that its

output harmonic spectra are dispersed and distributed continuously. Hence, the acoustic noise

and mechanical vibration can be greatly reduced. Generally, the existing random PWM can

be classified into three categories :

1) random carrier frequency PWM scheme ; 2) random switching scheme ; and 3) random

pulse position PWM scheme .

In this paper presents the digital implementation of Sinusoidal pulse width modulation

generation and random carrier pulse width modulation generation. The simulated

environment for the proposed scheme having the co-simulation feature i.e. Random pulses is

generated by using modelsim6.3f and MATLAB 7.10 is used for analysis.

In this paper comprising of seven sections. Section 2 describes about the types of pulse

width modulation. Section 3 explains the digital implementation of SPWM, Section 4

describes the proposed scheme implementation in digital processor. Section 5 shows the

simulated environment and performance parameters. Section 6 deals with the simulation

results and its comparison. Section 6 brings out the conclusion.

2. PULSE WIDTH MODULATION

Because of advances in solid state high power devices and processors, switching power

converters are used in more and more modern induction motor drives to convert and deliver

the required energy to the motor. This energy is controlled by Pulse Width Modulated

(PWM) signals applied to the gates of the power semiconductors. PWM signals are pulse

trains with variable pulse width and fixed frequency. There is one pulse of fixed magnitude

in every PWM period. However, the duration(width) of the pulses changes from pulse to

pulse according to a modulating reference signal. When a PWM signal is applied to the gate

or base of a power transistor, it cause the “ON” and “OFF” intervals of the transistor to

change from one PWM period to another PWM period according to the same modulating

reference signal. The frequency of a PWM signal must be much higher than that of the

modulating reference signal, the fundamental frequency, such that the available energy

delivered to the motor and its load depends mostly on the modulating signal.

The advantages of PWM based switching power converter are

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No temperature variation-and ageing-caused degradation in linearity or drifting,

Compatible with modern digital controllers (VLSI/FPGA[7][10] and advanced

processors)

Easy to implement and control

The basic PWM techniques are:

1. Single Pulse Width Modulation

2. Multi Pulse Width Modulation

3. Sinusoidal Pulse Width Modulation (SPWM )

But when the technology progresses some advanced modulation techniques is also

proposed: 1. Space vector Modulation (SVPWM )[3] 2. Random PWM[4][6]

2.1 PRINCIPLE AND OPERATION OF SINUSOIDAL PULSE WIDTH

MODULATION FOR THREE PHASE INVERTER

Among all PWM schemes, SPWM is one of the most popular and simple methods utilized in

power inverter and motor control drives. Its main features can be summarized as sine-triangle

wave comparison. As shown in Figure 1, a sine wave (reference modulated wave) is

compared with a triangle wave (high frequency carrier wave) and when the instantaneous

value of the triangle wave is less than that of the sine wave, the PWM output signal is in high

level („1‟). Otherwise it goes into the low level („0‟). The switching is produced at every

moment the sine wave meet with the triangle wave[4]-[6]. Thus the different meeting

positions result in variable duty cycle of the output waveform.

Figure 1. SPWM waveform generation

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3. DIGITAL IMPLEMENTATION OF SINUSOIDAL PULSE WIDTH

MODULATION GENERATION

In terms of the basic principle of SPWM illustrated in Figure 1, it‟s easy to implement using

analog circuit (Figure 2). Sine reference and triangle carrier waves are respectively generated

by specially designed circuits and then fed to the properly selected comparator which can

output the desired SPWM signal. But the control precision and reliability of this scheme are

always not so satisfying due to the complicated analog circuit structure as well as the

instability of the parameters of all analog devices.

Figure 2. Analog scheme for SPWM generation

With the development of the digital VLSI, nowadays the software implementation for SPWM

is completely adopted to realize high accuracy control. In Figure 3.shows a typical hardware

of the SPWM generation circuit through the digital logic circuits combination.

In the digital implementation of SPWM generation comprises of 3 major section.

1.Sinusoidal reference generation, 2. Triangle carrier generation section, 3.Comparison and

Dead time insertion. In each of the above module comprises of derived clock generation

module from the Master board clock.

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Figure 3. Typical Sinusoidal pulse width modulation generator using digital logic circuits

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3.1 REFERENCE SINE WAVE GENERATION

In the 50 Hz Sine Reference generation module only one quarter (0 to 90o) sine sample values

has been used to generate the four quadrant which will generate the bipolar reference

wave.50 sine samples has been used in one quarter cycle,

So each sampling rate is 90o/50 = 1.8

o. shown in Figure 4.

Figure 4. Sampling of sine reference

This sine samples multiplied with chosen modulation index, then will get the reference sine

wave.

Sampling period calculation

200 sampling period=20 milliseconds for 50 Hz.

1 sample period=20 milliseconds/200 =100 µseconds.

So that, 10 kHz sampling frequency has been used to sample the data.

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3.2 10 KHZ CLOCK GENERATION

In the FPGA design, synchronous reset and 50 MHz board clock has been used. Figure.5.

shows the flowchart to generate the 10 kHz clock. This clock has been used to sample sine

data from look up table.

Figure 5 10kHz Clock Generation

3.3 TRIANGLE CARRIER WAVE GENERATION

In Figure 3. shows the triangle carrier wave generation. Up down Counter based VHDL

program has been used for carrier wave generation. Switching frequency is equal to the

carrier frequency in SPWM. 3 kHz switching frequency has been selected for this case.

Modulation index means it is the ratio of amplitude of the modulating wave to the amplitude

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of the Triangle wave. Positive peak of carrier wave is Vc=Vm in positive half cycle and Vc=-

Vm for negative peak value.

3.4 COMPARISON AND DEAD TIME INSERTION

Three comparator and three not gates has been used to generate the 6 pulses. As per SPWM

approach , if modulating signal higher the triangle signal , then the pulse will be high

otherwise low. The upper and lower devices of each phase leg cannot be gated on

simultaneously either by purpose or by EMI noise. Otherwise, a shoot through would occur

and destroy the devices. The shoot through problem due to electromagnetic interference

(EMI) noise misgating on is a major killer to the inverter‟s reliability. Dead time to block

both upper and lower devices has to be provided in the VSI. Here, 2.5 micro seconds has

been used as a dead time.

4. RANDOM PULSE WIDTH MODULATION

A random carrier is acquired by randomly composing two triangular carriers, each of the

same fixed frequency, but of opposite phase. The random selection of two carriers is decided

by “low” or “high” states of the random binary sequence (RBS) as listed in table 1.

Table 1.Truth table of the multiplexer

RBS Status Mux Output

0 C

1 C bar

In Figure 6 shows that the random bit generation methodology. Two fixed frequency

triangle generated and fed to the 2:1 multiplexer. Selection bit of multiplexer is based on the

8 bit linear feedback shift register. The output of the shift register has been changed every

switching cycle. In this case 3 kHz have taken as a switching frequency. The concept diagram

is shown in Figure 7.

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.

Figure 6. Random bit generation

Figure 7. RPWM Generation

In addition to the SPWM generation, random bit generation and inverted triangle generation

are added for the digital implementation of the RPWM shown in Figure 8. The initial value

of the triangle carrier is zero and the initial value of the inverted triangle carrier is the peak of

the triangle. This is the only difference between the two triangles. Three xor gates and linear

feedback shift register has been used to generate the random bit. . The interpretation selection

of the two triangles is based on the output of the xor gate output which is normally call it as a

pseudo random binary sequence(PRBS) bit.

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Figure 8. Typical random pulse width modulation generator

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5. SIMULATION ENVIRONMENT

In the developed co-simulation is time efficient method to describe mixed simulation.

Two simulators and a synthesizer have been used to build this work. ModelsimSE 6.3f is

used for digital design simulation. Matlab / Simulink tool incorporated three-phase inverter

design modeling, analysis tool (FFT-Powergui) and an interface tool [8]. The functionality

verification done by RTL based test bench also incorporated in the Modelsim-VHDL-design.

50MHz system clock has been used for all VHDL design modules. Active high reset is used

for system design deactivation. Workspace is the area to stock up the data between two

simulators. HDL Co-simulation is a powerful tool, used as interface between design and

analysis environments shown in Figure.9. The scope of the real time implementation is

analyzed by using Xilinx project navigator tool incorporated synthesis behavior analysis.

Figure 9. Co-simulation Environment

The evaluation chart derived from voltage harmonic spectrum has been given for various

modulation index (Ma) ranges from 0.2 to 1.0 shown in table 3. Modulation index is the ratio

of the peaks of modulating wave and carrier wave. The table 4 gives the voltage harmonic

spectrum evaluation chart for dominating harmonic order (D-H-O) and its amplitude value

for Ma=0.8. The diagram clearly depicts that peak amplitude of the dominating harmonic is

very less when compared with the conventional methods. Harmonic spread factor (HSF) is

the performance evaluation indicators to investigate the acoustic noise power of the PWM

based induction motors[4][6][9][10]. The concept of statistical deviation is employed for HSF

MATLAB 7.10.0(R2010a)

Analysis

Three

phase

Inverter

W O R K S P A C E

Modelsim6.3f-

HDL Simulator

Xilinx Synthesis-Report SPEED/AREA/POWER

Xilinx Synthesis-Report

SPEED/AREA/POWER

VHDL - Digital Design for Proposed Pulse

generation

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2 2 2

2 3

2

1

...rms rms n rms

rms

V V VTHD

V

%

calculation for evaluating the harmonic spread effect of the random PWM. The HSF can be

defined as follows

(1)

(2)

Where,„Hj‟ is amplitude of jth harmonics, „H0‟ is average value of all „N-1‟ harmonics.

The HSF quantifies the harmonic spectra spread effect of random PWM scheme and it should

be small. For an ideally flat spectrum of white noise, the HSF would be zero (Young-cheol

Lim et al 2010). The performance parameters (Fundamental voltage, THD and HSF) are

carried out by using FFT window in matlab with one cycle. The THD is defined as the ratio

of harmonic amplitude to the fundamental amplitude. The distortion of voltage/current

waveforms can be quantified using total harmonic distortion (THD) and give as

(3)

Where, V1 is the rms value of fundamental component of the output voltage and V2, V3,...

are the rms values of second, third,... harmonics.

6. DISCUSSION ON SIMULATION AND EXPERIMENTAL

RESULTS

Figure.10 and Figure.11 shows the Sine reference wave generation output(fm=50 Hz)

and random Carrier generation output(Fs=3 kHz). In Figure 12. depicts the all the

switching pulses generation with corresponding carrier and reference wave.

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Figure 10. Sinusoidal Reference Generation using Modelsim 6.3f

Figure. 11. Carrier Generation with Random bit using Modelsim 6.3f

Figure. 12. Pulse Generation of RPWM with Random bit using Modelsim 6.3f

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Modulation Index ma=0.2

SPWM RPWM

Modulation Index ma=0.4

Figure 13. Spectrum of SPWM and RPWM for Modulation index ma=0.2 and 0.4

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Modulation Index ma=0.6

SPWM RPWM

Modulation Index ma=0.8

Figure.14. Spectrum of SPWM and RPWM for Modulation index ma=0.2 and 0.4

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SPWM

RPWM

Figure 15. Spectrum of SPWM and RPWM for Modulation index ma=1.0

Random bit also generated every 3 kHz, which is also shown in Figure.11 and Figure.12.

1 In the performance comparison shown in table 2, some of the points can be arrived.

2 In the Fundamental voltage point of view there is no much degradation in the RPWM

compare with counterpart SPWM.

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Table 2. Performance Comparison for various modulation Indexes

Ma

PWM Techniques

SPWM

Two

Triangle

RPWM

Performance

Parameters

0.2

Fundamental 37.76 36

% THD 253 258

HSF 3.57 3.3

Dominating Voltage

Harmonics 58,62,119,121,239,240 119,121,239,360

0.4

Fundamental 75.6 74

% THD 163 164

HSF 4.79 4.46

Dominating voltage

Harmonics

58,62,119, 121 ,178,

239 119,121,239,120

0.6

Fundamental 113 112

% THD 119 123

HSF 5.38 4.78

Dominating voltage

Harmonics

58,62,119, 121,177,

181 119,121,120,359

0.8

Fundamental 150.3 151

% THD 93.6 93

HSF 5.49 4.56

Dominating voltage

Harmonics 58,62,119,121 119,121,239,120

1

Fundamental 188.6 189

% THD 80.02 75.02

HSF 8.63 3.83

Dominating voltage

Harmonics 58,62,119,121 119,121,77,235

3 In the case of conventional SPWM shown in the Figure 13 to Figure 15 the cluster of

harmonic peak appears at 3 kHz and its multiples. But, as in the case of random

triangle PWM shown in the Figure 7 , the cluster of harmonics are considerably

reduced at the switching frequency and its odd multiples of 3 i.e. 3, 9 , 15 , 21 etc.

4 Harmonic spread factor is the acoustic noise performance predictor shows the clear

dominations of the RPWM. The value of HSF is less though out the modulation index

range from 0.2 to 1.0. where are its range is high and large variation in the SPWM.

5 It is observed that this RPWM will be useful for high speed application where the

acoustic noise is major impact.

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6 In this RPWM digital implementation, 13 % of look up tables are utilized. 2 DSP

based 18x18 multipliers are used for development of carrier and reference waves. A

50 MHz board clock has been used for sequential digital circuit design.

Figure 16. Experimental setup

Figure 17. Harmonic spectrum of SPWM for ma=0.8

0-500 order

50 V

100 V

150 V

Mag

nit

ud

e in

Vo

ltag

e ->

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Figure 18. Harmonic spectrum of RPWM for ma=0.8

The methods have been tested with the designed setup consisting of a FPGA based PWM

inverter circuit. It contains a FPGA board, inverter module with driver circuits, an

autotransformer and an induction motor drive. Yokogawa Digital Storage oscilloscope will be

used for all the inverter output measurements. The experimental setup for control of an

induction motor is shown in Figure 16. and the parameters required for the setup is listed in

the Table 3. The inverter is fed with a DC voltage of 220 V with the help of an

autotransformer and a rectifier. As explained in previous that the conventional and proposed

method PWM signals have been generated by FPGA. A dead time of 2.9µ seconds is

introduced between the switches of the same inverter leg in order to ensure smooth transition

of the switching states of the inverter. Both the SPWM and RPWM schemes test were carried

out with the fundamental frequency of the inverter voltage was set at 50 Hz. All the hardware

results are analysed from modulation index ranges from 0.2 to 1.0.

0-500 order

50 V

100 V

150 V

Mag

nit

ud

e in

Vo

ltag

e ->

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Table 3. Parameters of the system used in the hardware setup

Inverter 3Φ Two level Inverter

Switching Device IGBT

Input Voltage 220 Volt

Load 3 Φ Induction Motor

Modulation Index 0.8

Dead Time 2.9 µs

Control Open loop

Filter No

Table 4. Simulation and Experimental Result comparison

Technique SPWM

Simulation Results Hardware results

ma

Output

Voltage

THD %

HSF

Output

Voltage

THD %

HSF

0.2 38.04 253.47 3.57 36.5 60.67 3.545

0.4 76.91 162.18 4.79 74.6 45.81 4.765

0.6 113.90 121.54 5.38 112.5 30.21 5.355

0.8 153.20 90.43 5.49 151.2 24.01 5.465

1.0 190.19 69.09 4.49 186.6 18.66 4.465

In SPWM, When the frequency modulation index mf is an integer, the modulation scheme is

known as synchronous PWM and is more sui for implementation in a FPGA digital

processor. If mf is ≥9 and it is multiple of three, all the harmonics in line voltage with the

order lower than mf-2 are eliminated. In SPWM, the harmonics are centred on mf and its

multiples. i.e harmonics are presented mf,mf±2,2mf±2,3mf±2…… as shown in Figure 17.

The experimental results revealed that the output harmonics are presented at the centred

around the 3 kHz, 6 kHz, 9 kHz, 12 kHz, 15 kHz and 18 kHz. In the harmonic spectrum each

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line shows the 50 Hz. The HSF performance parameter of SPWM is giving the low value of

HSF at 0.2 ma, whereas the highest value occurred at modulation index 0.8. So, this is

compassionate of band of HSF between 3.5 to 5.5.

Table 5. Simulation and Experimental Result comparison

Technique RPWM

Simulation Results Hardware results

ma

Output Voltage

THD %

HSF

Output

Voltage

THD %

HSF

0.2 36 258 3.3 40.2 61 3.275

0.4 74 164 4.46 78.3 47 4.435

0.6 112 123 4.78 120.5 32 4.755

0.8 151 93 4.56 163.04 22 4.535

1.0 189 70.18 3.83 185 17.2 3.805

In the Two triangle RPWM method, the harmonics are presented at 2mf±2, 4mf±2…. i.e the

dominating harmonics are present at 6 kHz and 12 kHz and 18 kHz. The counterpart SPWM

is having the harmonics fashioned at 3 kHz and 9 kHz and 15 kHz are suppressed in RPWM

which is shown in Figure 18. In the Fundamental and THD point of view there is no much

difference in the RPWM compare SPWM. But, in the HSF, is somewhat degraded compare

SPWM, which makes the band between 3.27 to 4.75 as shown in Table 5.

7. CONCLUSION

The digital implementation of the both sinusoidal pulse width modulation and random pulse

width modulation are described. The detailed SPWM and two triangle RPWM generation of

FPGA is spoken. The spectral analysis of the above methods is carefully examined in

MATLAB environment. The validity of the simulated spectral analysis is examined through

experimentation. Comparisons showed an excellent equivalency between simulation and

actually measured spectra. At the end of this analysis, it is to conclude that two triangle

random pulse width modulation outperforms.

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