bridging the gap between theory and hardware mario d. marino, g. robins, k. skadron and l. wang...

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Bridging the Gap Between Theory and Hardware Mario D. Marino, G. Robins, K. Skadron and L. Wang {mdm9uw,robins,skadron,lw2aw}.cs.virginia.edu Department of Computer Science - UVa

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Bridging the Gap Between Theory and Hardware

Mario D. Marino, G. Robins, K. Skadron and L. Wang{mdm9uw,robins,skadron,lw2aw}.cs.virginia.edu

Department of Computer Science - UVa

2 © 2010 Mario D. Marino 2

Algorithm Language

HW/BinaryTheory

Programmer's life

Compiler

Outline1. Motivation

2. Bridging the Gap Between Theory and Hardware

3. Example of Integration: translator JFLAP 2 VHDL and ghdl Simulation Validation

4. Prospective Contributions & Future Work

4 © 2010 Mario D. Marino 4

Algorithm Language

HW/BinaryTheory

Programmer's life

Compiler

Outline

1. Motivation

2. Bridging the Gap Between Theory and Hardware

3. Example of Integration: translator JFLAP 2 VHDL and ghdl Simulation Validation

4. Prospective Contributions

Integrating Theory and HW

1. Special-purpose hardware to reflect Theory

2. Reduce unnecessary code

3. Reduce language restrictions

Bridging the Gap Between Theory and Hardware

7 © 2010 Mario D. Marino 7

idea!?

Behavioraldescription

TheoryTM, automata

VHDL

FPGA-specializedpurpose processortranslation

AlgorithmHW

Outline

1. Motivation

2. Bridging the Gap Between Theory and Hardware

3. Example of Feasibility: translator JFLAP 2 VHDL and ghdl simulation validation

4. Prospective Contributions & Future Work

Translator: JFLAP2VHDL• Translator: – Source: theoretical models

– Output: VHDL

• theoretical models: JFLAP (Duke)– Graphical tool

– Theoretical models description: Turing Machines, grammars

– Output format xml

• VHDL: validation

– ghdl Simulation

Example: translation input: Turing Machine

ghdl simulation validation – Turing Machine

• Generated TM VHDL code => ghdl VHDL simulator

• Correct results

Outline

1. Motivation

2. Bridging the Gap Between Theory and Hardware

3. Example of Integration: translator JFLAP 2 VHDL and ghdl simulation validation

4. Prospective Contributions & Future Work

Example: translation output – parallel Turing Machine

Prospective Contributions & Future Work

14 © 2010 Mario D. Marino 14

• Better coupling Theory/HW/Alg/Lang./Comp

• Applications: “small” compiler, small programs

• Formal verification / debugging

• Compare to the traditional approach

• Compare to System C

• Education and Pedagogy: Theory x Engineering

15 © 2010 Mario D. Marino 15

Questions?Thanks!

Example: translation output – ghdl - simulation validation