bruno nova preparação da dissertação supervisor: antónio araújo mieic – feup
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TOOL TO SUPPORT COMPUTER
ARCHITECTURE TEACHING AND LEARNING
Bruno Nova
Preparação da Dissertação
Supervisor: António Araújo
MIEIC – FEUP
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Agenda
Context The problem Some existing tools Proposed solution Technology to be used Work plan
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Context
Computer architectureSubject of courses like:
○ Informatics Engineering○ Electrical Engineering
Students learn topics like:○ Data representation and circuits○ Composition of a CPU○ Programming in assembly○ Processor performance
MIPS usually used
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The problem
Students have difficulties understanding:CPU datapath and controlProcessor pipelining
○ General operation○ Advantages ○ Hazards
Performance calculation…
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The problem
Why do students have these difficulties?Absence of tools that:
○ Are geared towards education○ Show the CPU state in each execution step○ Represent the datapath graphically○ Simulate both unicycle and pipeline versions○ Are simple to use and understand
Some tools exist, but none covers all these aspects
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Some existing tools
MARS
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Source: [1]
No pipeline
No visual datapath
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Some existing tools
ProcSim
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Source: [2]
Few instructions
No pipeline
Sequential animation
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Some existing tools
MIPS-Datapath
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Source: [3]
Few instructions
Bad state visualization
Lim. hazards detection
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Some existing tools
WebMIPS
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Source: [4]
Static datapath
Click for inputs/outputs
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Proposed solution
Create a simulator of a MIPS CPU that:Integrates various features:
○ Simulate unicycle and pipelined versions○ Show detailed information step-by-step
Displaying the datapath graphically
○ Execute programs or single instructions○ Identify the critical path and performance○ Allow configuration of the datapath
By parameterizing blocks
Reuses or interacts with existing toolsIs intuitive and simple to use
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Technology to be used
MIPS architecture Developed in Java
Cross-platform language Simplified version for Android tablets
Which use Java tooNothing like this exists
Reuse work already done
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Work plan Requirements specification (1 week)
Interface specification (1 week)
Non-functional prototype Implementation (13 weeks)
Internal CPU representation (3 weeks)
Editor and simulation (4 weeks)
○ Unicycle○ Pipeline
Datapath configuration (2 weeks)
Android version (4 weeks)
Documentation and report (2 weeks)
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References[1] Dr. Kenneth Vollmar and Dr. Pete Sanderson. MARS: An
Education-Oriented MIPS Assembly Language Simulator. March 2006. Accessed on January 7, 2013. http://www.cs.missouristate.edu/~vollmar/MARS/fp288-vollmar.pdf.
[2] James Garton. ProcessorSim – A Visual MIPS R2000 Processor Simulator, 2005. Accessed on January 7, 2013. http://jamesgart.com/procsim.
[3] Andrew Gascoyne-Cecil. MIPS-Datapath. Accessed on January 7, 2013. http://mi.eng.cam.ac.uk/~ahg/MIPS-Datapath.
[4] Irina Branovic, Roberto Giorgi, and Enrico Martinelli. WebMIPS: A New Web-Based MIPS Simulation Environment for Computer Architecture Education. Workshop on Computer Architecture Education, 31st International Symposium on Computer Architecture, 2004. Accessed on January 8, 2013. http://www4.ncsu.edu/~efg/wcae/2004/submissions/giorgi.pdf.
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Questions?
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