buspro-s user's manual - corelis€¦ · explore the capabilities of the buspro-s on your own,...

Corelis, Inc.13100 Alondra Blvd. Cerritos, CA 90703

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CORELIS1

BusPro-S ™

High Speed Multi-IOSPI Host, Debugger, and Programmer

User’s Manual

Preface i

PrefaceCopyright © 2012-2017, Corelis, Inc.

PRINTING HISTORY

Edition 1, June 2012Edition 2, March 2017

GENERAL NOTICEInformation contained in this document is subject to change without notice. CORELIS shall not be liablefor errors contained herein for incidental or consequential damages in connection with the furnishing,performance, or use of material contained in this manual.

This document contains proprietary information that is protected by copyright. All rights reserved. No partof this document may be reproduced or translated to other languages without the prior written consent ofCORELIS. This manual is a CORELIS proprietary document and may not be transferred to another partywithout the prior written permission of CORELIS.

CORELIS assumes no responsibility for the use of or reliability of its software on equipment that is notfurnished by CORELIS.

ENVIRONMENTAL NOTICE

This product must be disposed of in accordance with the WEEE directive.

TRADEMARK NOTICEWindows is a registered trademark of Microsoft Corporation.

Other products and services named in this book are trademarks or registered trademarks of theirrespective companies. All trademarks and registered trademarks in this book are the property of theirrespective holders.

ii Preface

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Product maintenance agreements and other customer assistance agreements are available for Corelisproducts. For assistance, contact your nearest Corelis Sales and Service Office.

RETURN POLICYNo items returned to CORELIS for warranty, service, or any other reason shall be accepted unless firstauthorized by CORELIS, either direct or through its authorized sales representatives. All returned itemsmust be shipped pre-paid and clearly display a Return Merchandise Authorization (RMA) number on theshipping carton. Freight collect items will NOT be accepted.

Customers or authorized sales representatives must first contact CORELIS with notice of request forreturn of merchandise. RMAs can only originate from CORELIS. If authorization is granted, an RMAnumber will be forwarded to the customer either directly or through its authorized sales representative.

CONTACT INFORMATIONThe latest news, tips and updates on the Corelis bus analyzer hardware and software products can befound in the Corelis user forums. The forums are provided as a free service to our existing customers butan individual user name and password is required. To request an account, please visitforums.corelis.com/register.php

For sales inquiries, please contact [email protected].

For any support related questions, please enter a support request at www.corelis.com/support or [email protected].

For more information about other products and services that Corelis offers, please visit www.corelis.com

http://www.corelis.com/

mailto:[email protected]

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mailto:[email protected]

http://forums.corelis.com/register.php

iii

Table of Contents

Chapter 1 Product Overview ......................................................................................... 1Introduction to the SPI Bus ................................................................................................................... 1

Introduction to the BusPro-S™............................................................................................................. 4

SPI Exerciser Software Toolset............................................................................................................. 7

Third Party Application Interface (BusPro_S.DLL) ............................................................................. 7

BusPro-S Hardware Controller.............................................................................................................. 7

BusPro-S Hardware Self-Test................................................................................................................ 8

Chapter 2 Installation..................................................................................................... 9Installing the SPI Exerciser Application Software ............................................................................10

Installing the BusPro-S Hardware.......................................................................................................18

Chapter 3 Getting Started............................................................................................ 21Overview................................................................................................................................................21

Using Debugger ....................................................................................................................................22

Using Programmer ...............................................................................................................................33

Chapter 4 Connecting to a Target............................................................................... 40Connecting the SPI Signals.................................................................................................................40

Chapter 5 Interactive Debugger.................................................................................. 41Overview................................................................................................................................................41

Command Script Interfaces.................................................................................................................43

Debugger Transaction Log..................................................................................................................46

Other Features ......................................................................................................................................48

Debugger Command Script Keywords...............................................................................................49

Chapter 6 EEPROM and Flash Memory Programmer ............................................... 69Overview................................................................................................................................................69

Programmer Features ..........................................................................................................................70

Chapter 7 Third Party Application Interface .............................................................. 77Overview................................................................................................................................................77

Dynamic Link Library (DLL).................................................................................................................78

General Calling Sequence ...................................................................................................................79

iv

Function Reference ..............................................................................................................................82

Appendix A BusPro-S Hardware Reference ......................................................... 131Hardware Specifications....................................................................................................................131

Hardware DC and Switching Characteristics ..................................................................................131

SPI Timing Diagrams..........................................................................................................................133

v

List of Figures

Figure 1. 4-wire SPI Bus Configuration with Multiple Slaves ....................................................................... 1Figure 2. SPI Bus Timing ............................................................................................................................. 2Figure 3. 3-wire SPI Configuration with One Slave...................................................................................... 2Figure 4. Quad IO SPI Configuration with One Slave.................................................................................. 3Figure 5. Illustration of the BusPro-S ........................................................................................................... 5Figure 6. BusPro-S Product Components.................................................................................................... 6Figure 7. SPI Exerciser Installation Wizard................................................................................................10Figure 8. License Agreement Screen.........................................................................................................11Figure 9. Customer Registration Screen....................................................................................................12Figure 10. Destination Folder Screen ........................................................................................................13Figure 11. Select Program Folder Screen..................................................................................................14Figure 12. Completing the Installation Wizard Screen...............................................................................15Figure 13. Windows 7 Security Warning Pop-up Window .........................................................................16Figure 14. Windows XP Logo Test Warning Pop-up Window....................................................................16Figure 15. Installation Completed Screen ..................................................................................................17Figure 16. Found New Hardware Wizard - Welcome Screen (Windows XP) ............................................18Figure 17. Found New Hardware Wizard - Install Options (Windows XP).................................................19Figure 18. Found New Hardware Wizard – Installation Complete (Windows XP) .....................................20Figure 19. Editing and Running Command Script......................................................................................22Figure 20. Observing Transaction Log Entry .............................................................................................23Figure 21. Editing and Running Command Script......................................................................................23Figure 22. Observing Transaction Log Entry .............................................................................................24Figure 23. Editing and Running Command Script......................................................................................24Figure 24. Observing Transaction Log Entry .............................................................................................25Figure 25. Editing and Running Command Script......................................................................................25Figure 26. Observing Transaction Log Entry .............................................................................................26Figure 27. Editing and Running Command Script......................................................................................26Figure 28. Observing Transaction Log Entry .............................................................................................27Figure 29. Editing and Running Command Script......................................................................................28Figure 30. Observing Transaction Log Entry .............................................................................................28Figure 31. Stepping Command Script ........................................................................................................29Figure 32. Stepping Command Script ........................................................................................................30Figure 33. Observing Transaction Log Entry .............................................................................................30Figure 34. Selecting Run To Cursor Menu Item.........................................................................................31Figure 35. Running to Cursor .....................................................................................................................32Figure 36. Observing Transaction Log Entry .............................................................................................32Figure 37. Erasing and Blank-checking Memory .......................................................................................33Figure 38. Observing Memory Read Window ............................................................................................34Figure 39. Editing Memory Content ...........................................................................................................34Figure 40. Updating Memory Content ........................................................................................................35Figure 41. Observing Memory Read Window ............................................................................................35Figure 42. Programming and Verifying ......................................................................................................36Figure 43. Observing Memory Read Window ............................................................................................36Figure 44. Editing Memory Content ...........................................................................................................37Figure 45. Updating Memory Content ........................................................................................................37Figure 46. Observing Memory Read Window ............................................................................................38Figure 47. Verifying Memory ......................................................................................................................38Figure 48. Observing Programmer Diagnostics .........................................................................................39

vi

Figure 49. BusPro-S Connector Pin Numbers ...........................................................................................40Figure 50. Debugger Window ....................................................................................................................42Figure 51. Debugger Command Script Window.........................................................................................43Figure 52. Debugger Transaction Log Window..........................................................................................46Figure 53. Debugger Transaction Log Pop-up Menu.................................................................................47Figure 54. Pin Status Indicator ...................................................................................................................48Figure 55. Program-Verify-Erase Tab in Ready State ...............................................................................70Figure 56. Program-Verify-Erase Tab in Running State ............................................................................71Figure 57. Read Tab ..................................................................................................................................73Figure 58. Read Tab with Mismatched Memory Content...........................................................................73Figure 59. Programmer Diagnostics Window.............................................................................................74Figure 60. Programmer Diagnostics Window Displaying Information on Error..........................................75Figure 61. Pin Status Indicator ...................................................................................................................75Figure 62. Timing Diagrams of SPI Modes ..............................................................................................113Figure 63. Data Out Timing ......................................................................................................................132Figure 64. Data In Timing.........................................................................................................................132Figure 65. SPI Mode 0 Timing..................................................................................................................133Figure 66. SPI Mode 1 Timing..................................................................................................................133Figure 67. SPI Mode 2 Timing..................................................................................................................134Figure 68. SPI Mode 3 Timing..................................................................................................................134Figure 69. 3-Wire and Microwire Timing ..................................................................................................135

vii

List of Tables

Table 1. SPI Mode Definitions ...................................................................................................................... 2Table 2. BusPro-S Pin Descriptions ...........................................................................................................40Table 3. Command Script Interface Component Descriptions ...................................................................45Table 4. Transaction Log Window Column Descriptions............................................................................46Table 5. Debugger Command Script Keywords .........................................................................................50Table 6. Signal Mappings in Data Line Modes ...........................................................................................51Table 7. Signal Mappings in Data Line Modes ...........................................................................................52Table 8. Signal Mappings in Data Line Modes ...........................................................................................53Table 9. Signal Mappings in Data Line Modes ...........................................................................................59Table 10. Program-Verify-Erase Tab Component Descriptions .................................................................72Table 11. Read Tab Component Descriptions ...........................................................................................74Table 12. DLL Components........................................................................................................................78Table 13. BusPro-S DLL Functions ............................................................................................................83Table 14. Bit to Signal Mapping..................................................................................................................98Table 15. Signal Mappings in Data Line Modes .......................................................................................105Table 16. Valid Frequency Values in SPI Interface Types .......................................................................108Table 17. CPOL and CPHA of SPI Modes ...............................................................................................113Table 18. Comparison of SPI Type Interfaces..........................................................................................115

Introduction ix

Introduction

What this User’s Manual CoversThis User’s Manual was designed to make using your BusPro-S™ SPI host adapter and its softwareeasier and more efficient. The manual contains easy to navigate tutorials and reference information thatare presented in a logical progression.

The following briefly summarizes each chapter:

Chapter 1: Product OverviewThis chapter provides you with an overview of the BusPro-S host adapter and software applicationfeatures as well as an introduction to the SPI bus.

Chapter 2: InstallationIn this chapter you will learn how to install the SPI Exerciser software and the BusPro-S hardware.

Chapter 3: Getting StartedThis chapter introduces you to the basic usage of the BusPro-S for writing and executing debuggerscripts and programming with serial EEPROM and Flash memory devices. Although it is possible toexplore the capabilities of the BusPro-S on your own, working through this chapter will provide you withan immediate feel for its ease of use and core functionality.

Chapter 4: Connecting to a TargetThis chapter provides you with the pin assignment information of the BusPro-S controller.

Chapter 5: Interactive DebuggerThis chapter describes the features of the Debugger which are used to manually generate traffic andinteract with the target SPI bus.

Chapter 6: EEPROM and Flash Memory ProgrammerThis chapter describes the features of the Programmer, which are used to read and write the content ofEEPROM and Flash memory devices on the target SPI bus.

Chapter 7: Third Party Application InterfaceThis chapter provides a reference on all of the function calls available for use in third party softwareapplications that control the BusPro-S host adapter through the provided dynamic link library (DLL).

Appendix A: BusPro-S Hardware ReferenceThis appendix presents the physical and electrical specifications for the BusPro-S hardware.

Product Overview 1

Chapter 1Product Overview

BusPro-S and SPI Exerciser product overview

Introduction to the SPI BusThe Serial Peripheral Interface (SPI) bus was developed by Motorola to provide full-duplex synchronousserial communication between master and slave devices. The SPI bus is commonly used forcommunication with Flash memory, sensors, real-time clocks (RTCs), analog-to-digital converters, andmore.

As shown in Figure 1, standard SPI masters communicate with slaves using the serial clock (SCK),Master Out Slave In (MOSI), Master In Slave Out (MISO), and Slave Select (SS) lines. The SCK, MOSI,and MISO signals can be shared by slaves while each slave has a unique SS line.

Figure 1. 4-wire SPI Bus Configuration with Multiple Slaves

The SPI bus defines no protocol for data exchange, limiting overhead and allowing for high speed datastreaming. Clock polarity (CPOL) and clock phase (CPHA) can be specified as ‘0’ or ‘1’ to form fourunique modes to provide flexibility in communication between master and slave as shown in Figure 2.

2 Product Overview

Figure 2. SPI Bus Timing

If CPOL and CPHA are both ‘0’ (defined as Mode 0) data is sampled at the leading rising edge of theclock. Mode 0 is by far the most common mode for SPI bus slave communication. If CPOL is ‘1’ andCPHA is ‘0’ (Mode 2), data is sampled at the leading falling edge of the clock. Likewise, CPOL = ‘0’ andCPHA = ‘1’ (Mode 1) results in data sampled at on the trailing falling edge and CPOL = ‘1’ with CPHA =‘1’ (Mode 3) results in data sampled on the trailing rising edge. Table 1 below summarizes the availablemodes.

Mode CPOL CPHA0 0 01 0 12 1 03 1 1

Table 1. SPI Mode Definitions

In addition to the standard 4-wire configuration, the SPI bus has been extended to include a variety of IOstandards including 3-wire for reduced pin count and dual or quad I/O for higher throughput.

In 3-wire mode, MOSI and MISO lines are combined to a single bidirectional data line. Transactions arehalf-duplex to allow for bidirectional communication. Reducing the number of data lines and operating inhalf-duplex mode also decreases maximum possible throughput; many 3-wire devices have lowperformance requirements and are instead designed with low pin count in mind.

Figure 3. 3-wire SPI Configuration with One Slave

Product Overview 3

Multi I/O variants such as dual I/O and quad I/O add additional data lines to the standard for increasedthroughput. Components that utilize multi I/O modes can rival the read speed of parallel devices. QuadI/O devices can, for example, offer up to 4 times the performance of standard 4-wire SPI whencommunicating with a high speed device. Read operations from high density Flash memory can benefitgreatly from the increased throughput offered by multi I/O communication.

Figure 4. Quad IO SPI Configuration with One Slave

4 Product Overview

Introduction to the BusPro-S™The Corelis BusPro-S is a SPI (Serial Peripheral Interface) host adapter product, which provides thecapabilities to test, debug, and program SPI slave devices. It consists of the hardware controller and thesoftware application along with a third-party application programming interface (API). The BusPro-Shardware controller and the SPI Exerciser software application provide the following features:

High-performance SPI controller with multi-IO interface. Four IO modes including standard (4-wire), 3-wire, dual, and quad. User-programmable SCK rate up to 30 MHz in standard mode and up to 60 MHz in enhanced

mode. Up to 200 Mb/s throughput in enhanced mode for fast programming speed. Selectable interface voltage of 1.8V, 2.5V, and 3.3V. Configurable bit order, slave select polarity, and SPI mode. Eight independent slave select signals for designs with multiple slave devices. Powerful debugger with command script editor. In-System Programming (ISP) of SPI serial Flash and EEPROMs. Detailed transaction log with time stamp and data recording. High-speed USB 2.0 interface. Robust and portable bus-powered USB device, no external power supply required. Royalty-free software application programming interface (API). SPI Exerciser software supports Windows® XP, Windows Vista®, and Windows® 7 operating

systems (32-bit and 64-bit).

Because of its rich feature set and ease-of-use, the BusPro-S can be used in a variety of applications,such as product development, troubleshooting, validation, system integration, production, and fieldtesting.

The BusPro-S hardware controller, shown in Figure 5, connects to the PC via a high-speed USB 2.0 portand can operate either with the provided SPI Exerciser software application, or using the included API ofC/C++ library function calls from third party software applications such as National Instruments’ LabVIEWor custom user-developed software.

Product Overview

FFigure 5. Illustration of the BusPro-S

5

6 Product Overview

The overview of the BusPro-S product components are illustrated in Figure 6.

SPI ExerciserApplication

USB 2.0

BusPro_S.DLL(API)

BusPro-SController

SPI Target Bus

SPI

Figure 6. BusPro-S Product Components

Product Overview 7

SPI Exerciser Software ToolsetThe SPI Exerciser provides GUI based easy-to-use Debugger and Programmer modules. For userconvenience, all available options can be easily accessed from the main screens, which are all tab-basedGUI. In addition, the Transaction Log and Programmer Diagnostics windows are provided as dock-ablewindows so that they can be easily moved around and rearranged according to the user’s needs.

DebuggerThe Debugger module provides a direct read/write interactive interface with the target SPI busthrough the use of command scripts. It can be used to perform simple data transfers both to and fromslave devices acting as the master device on the bus. Looping and other execution methods for thecommand scripts are provided along with the multiple tabs for maintaining multiple commandsessions. It provides the access to both Standard and Enhanced SPI interfaces of the BusPro-Scontroller through using two different command script interface tabs.

Transaction LogThe Transaction Log records and displays all activities performed by the BusPro-S through theDebugger commands. Using the information provided in the log, users can efficiently track, test,debug, and validate their SPI target devices. The log can be continuously gathered and backed upduring each session and also can be exported.

ProgrammerUsing the Programmer tool, the BusPro-S can be utilized to perform high speed programming of SPI-compatible serial EEPROM and Flash memory devices. Devices can be programmed in-system andat maximum programming speed, which is typically within several seconds depending on the memorysize. The Programmer provides options to Erase, Program, Verify, and Read target memory. Thecontent of the memory device can be also saved to a file in a supported data file format includingMotorola S-Record, Intel Hex, and a hex-text file format.

Programmer DiagnosticsThe Programmer Diagnostics window displays a summary of the actions performed by theProgrammer. It displays the result of the actions such as erase, blank-check, program, and verify, anddisplays the total time it took. When an action fails, it displays more detailed information on why theaction failed along with the comparison of expected and actual results.

Third Party Application Interface (BusPro_S.DLL)The BusPro-S includes an application programming interface (API) in the form of a 32-bit Windows DLL.All major host functions are available through the API for convenient integration into third partyapplications and for use with popular lab and test executive software suites.

BusPro-S Hardware ControllerThe BusPro-S is a high-speed, multi-IO SPI host adapter designed with speed, versatility, and value inmind. It features two different SPI interface types; one with the support for all four SPI modes, and theother with the enhanced data line modes such as 3-wire, dual, and quad. The Enhanced SPI interfacefeatures a 60 MHz clock rate with up to 200 Mb/s throughput.

8 Product Overview

BusPro-S Hardware Self-TestThe Self-Test program included with the product performs basic hardware diagnostics of the BusPro-Scontroller. It performs a USB communications test, a board-level boundary-scan test, and a voltage test.The program is located in the “SelfTest” folder in the SPI Exerciser program folder (e.g. “C:\ProgramFiles\Corelis\SPI Exerciser\SelfTest”).

Installation 9

Chapter 2Installation

Installing the SPI Exerciser software and the BusPro-S hardware

Prior to installation, please verify that the following SPI Exerciser software and BusPro-S hardwarematerials are present and free from visible damage or defects. If anything appears to be missing ordamaged, please contact Corelis immediately.

The BusPro-S product consists of the following components:- BusPro-S Hardware- 6’ USB 2.0 Cable- SPI Target Interface Cable consisting of flying leads- CD-ROM containing the SPI Exerciser application, user’s manual, and example files

10 Installation

Installing the SPI Exerciser Application SoftwareYou must first install the SPI Exerciser application software, and then connect the BusPro-S controller.The application software contains the driver for the BusPro-S.

The BusPro-S controller is a hot-pluggable USB device. However, it is not recommended to plug in orunplug the BusPro-S while the SPI Exerciser application is running. The BusPro-S CD-ROM contains theinstallation program. Windows will automatically recognize and configure the BusPro-S the first time it isdetected in your system. Administrator rights are required to install the software on a Windows OS.

Installation Steps1. Insert the Corelis SPI Exerciser CD-ROM into your CD drive. The installation program should start

automatically and display the Welcome to the Installation Wizard screen as shown in Figure 7. (Ifthe installation program does not automatically start, go to the Windows Explorer, find the“setup.exe” file on the CD-ROM drive, and double-click on it to launch the installer.)

Figure 7. SPI Exerciser Installation Wizard

2. Click on the Next button.

Installation 11

3. The License Agreement screen shown in Figure 8 will be displayed.

Figure 8. License Agreement Screen

4. Review the entire agreement, and if you agree, select I accept the terms of the license agreement,and then click on the Next button.

12 Installation

5. The Customer Registration screen shown in Figure 9 will then be displayed.

Figure 9. Customer Registration Screen

6. Type in or change the User Name and Organization as needed, then click on the Next button.

Installation 13

7. The Destination Folder screen shown in Figure 10 will be displayed.

8. Accept the default installation folder, or customize your installation by selecting the browse button. Itis strongly recommended that the application be installed in the default folder.

Figure 10. Destination Folder Screen


14 Installation

10. The Select Program Folder screen shown in Figure 11 will be displayed.

11. Select Anyone who uses this computer or Only for me.

12. By default, the installer will place a shortcut icon for the SPI Exerciser on your desktop. If you do notwish this shortcut to be created, uncheck the checkbox on this screen.

Figure 11. Select Program Folder Screen


Installation 15

14. The Completing the Installation Wizard screen shown in Figure 12 will be displayed.

15. To change any installation parameters, click on the Back button. Otherwise, click on the Next buttonand the installation process will begin.

Figure 12. Completing the Installation Wizard Screen

16. The installer copies the program files to the specified folder and support files to the Windows systemfolders. In addition, the installer creates a Windows Start Menu group named SPI Exerciser.

16 Installation

17. If you are running Windows 7 or Vista, the software installation may be interrupted by the operatingsystem by displaying warning pop-up windows as shown in Figure 13. If this occurs, click on theInstall this driver software anyway button to safely ignore the warnings and proceed with theinstallation.

Figure 13. Windows 7 Security Warning Pop-up Window

18. If you are running Windows XP, the software installation may be interrupted by the operating systemby displaying warning pop-up windows as shown in Figure 14. If this occurs, click on the ContinueAnyway button to safely ignore the warnings and proceed with the installation.

Figure 14. Windows XP Logo Test Warning Pop-up Window

Installation 17

19. The Installation Completed screen shown in Figure 15 will appear to indicate that the installation iscomplete. Click on the Finish button to exit from the installation program.

Figure 15. Installation Completed Screen

18 Installation

Installing the BusPro-S HardwareThe BusPro-S controller is a hot-plug USB device. You must first install the SPI Exerciser software beforeinstalling the BusPro-S controller. Drivers for the BusPro-S controller are installed with the SPI Exercisersoftware and not installing the software and drivers first may result in improper unit configuration andoperation.

Installation Steps1. You should have already installed the SPI Exerciser at this point. If not, please do so before

continuing with hardware installation.

2. Connect a USB 2.0 compatible cable from the BusPro-S USB 2.0 connector to any available USB 2.0connector on your PC.

3. If you are running Windows XP, the Found New Hardware Wizard dialog box should automaticallyappear as shown in Figure 16.

Figure 16. Found New Hardware Wizard - Welcome Screen (Windows XP)

4. Click on No, not this time and click on the Next button.

Installation 19

5. The dialog shown in Figure 17 will pop up.

Figure 17. Found New Hardware Wizard - Install Options (Windows XP)

6. Click on Install the software automatically (Recommended) and click on the Next button.

7. The Hardware Wizard will attempt to locate the driver that was installed with the SPI Exercisersoftware. Under Windows XP, a warning dialog box may pop up. You can safely ignore the warningand continue the installation process by pressing the Continue Anyway button.

20 Installation

8. After the necessary files are copied to the system, the dialog box shown in Figure 18 will appearindicating that the driver has been successfully installed.

Figure 18. Found New Hardware Wizard – Installation Complete (Windows XP)

9. Click on the Finish button to close the Hardware Wizard dialog box.

10. Another Found New Hardware Wizard should appear again. Repeat steps 3 to 8.

11. The installation of the driver is now complete and Windows will proceed to detect and configure theBusPro-S.

Congratulations! You have now successfully installed the BusPro-S and drivers on your computer and it isready to be used.

Getting Started 21

Chapter 3Getting Started

SPI Exerciser operation overview and tutorial

OverviewThis chapter will quickly introduce you to the basic usage of the Corelis SPI Exerciser tool for accessing atarget SPI bus via the BusPro-S. Although it is possible to explore the capabilities of this system on yourown, working through this chapter is intended to give an immediate feel and appreciation for its ease ofuse and core functionality. The material in this chapter is organized as a series of example scenarios withstep-by-step instructions.

22 Getting Started

Using DebuggerThe example scenarios in this section will guide you through the basic features of the Debugger modulestep by step.

Scenario 1: Writing and reading bytes and bits1. Connect the BusPro-S to the host computer through a USB 2.0 port.2. Connect the target system or device if any. (You can still go through with the example without any

real target, but you will not be able to see any real data.)3. Start the SPI Exerciser application.4. Go to the Standard SPI Debugger Tab.5. At the “Tab 1-1” of the command script window, type in the text “write AB” and execute it by clicking

on the [Run] button.

Figure 19. Editing and Running Command Script

6. Then you will see the Transaction Log showing the very first transaction you generated, which writesa byte “0xAB” to the device whose chip-select line is tied to slave select line ‘0’.

Getting Started 23

Figure 20. Observing Transaction Log Entry

7. Now go to the “Tab 1-2” of the command script window, type in the text “read 2”, and execute it byclicking on the [Run] button.


8. Then you will see the Transaction Log showing 2 bytes read from the slave device. (If no target isattached, FF FF will be returned.)

24 Getting Started


9. Now go to the “Tab 1-3” of the command script window, type in the text “writeread CD EF 3456”, and execute it by clicking on the [Run] button.


10. Then you will see the Transaction Log showing that the 4 bytes of data (0xCD, 0xEF, 0x34, and0x56) are written to the slave device, and 4 bytes are read from it at the same time. (If no target isattached, all FF’s will be returned.)

Getting Started 25


11. Now go to the “Tab 1-4” of the command script window, type in all three commands used in the threeprevious tabs, and execute it by clicking on the [Run] button.


12. Then you will see the Transaction Log showing all three commands executed in a sequence.

26 Getting Started


13. Now go to the “Tab 1-5” of the command script window, type in the following text, and execute it byclicking on the [Run] button.

writebit 7 3F // write 7 bits 0011.111 (= 0x3F & 0xFE)readbit F // read 15 bitswritereadbit 9 AB CD // write 9 bits 1010.1011.1 (first 9 MSB)

// and read 9 bits back from slave


Getting Started 27

14. Then you will see the Transaction Log showing all three commands executed in a sequence. Noticethat the number of bytes now includes a fraction part, which indicates the number of bits in addition tothe bytes. (e.g. 1.7 = 1 byte + 7 bits = 15 bits)


Scenario 2: Generating dual and quad mode transactions1. Connect the BusPro-S to the host computer through a USB 2.0 port.2. Connect the target system or device if any. (You can still go through with the example without any

real target, but you will not be able to see any real data.)3. Start the SPI Exerciser application.4. Go to the 3-wire/Dual/Quad SPI Debugger Tab.5. At the “Tab 2-1” of the command script window, type in the following text, and execute it by clicking

on the [Run] button.

// write 2 bytes in 3-wire mode3wiremodewrite AB CD

// read 2 bytes in dual modedualmoderead 2

// write 4 bytes and read 2 bytes in 4-wire mode4wiremodewrite 1A 2B 3C 4Dread 2

// read 4 bytes in quad modequadmoderead 4

28 Getting Started


6. Then you will see the Transaction Log showing all five transactions with various data line modes.


Scenario 3: Loading and running command scripts1. Connect the BusPro-S to the host computer through a USB 2.0 port.

Getting Started 29

2. Connect the target system or device if any. (You can still go through with the example without anyreal target, but you will not be able to see any real data.)

3. Start the SPI Exerciser application.4. Select the [File | Open…] menu item, and then open the “C:\Corelis Examples\SPI

Exerciser\Examples\Winbond_W25Q80BV.sep” project file.5. Go to the Debugger module by clicking on the Debugger icon on the shortcut bar.6. Go to the “Tab 2-1” of the 3-wire/Dual/Quad SPI tab.7. Click on the [Step] button once, and then you will see an arrow on the line 1, indicating the current

execution line.

Figure 31. Stepping Command Script

8. Click on the [Step] button three more times, and then you will see the arrow moving down to the line13.

30 Getting Started

Figure 32. Stepping Command Script

9. Go to the Transaction Log, and then you will see the record of “write 50” transaction displayed.


10. Now right-click on the line 17, and then select the [Run To Cursor] menu item.

Getting Started 31

Figure 34. Selecting Run To Cursor Menu Item

11. Then you will see the arrow moving down to the line 17.

32 Getting Started

Figure 35. Running to Cursor

12. Go to the Transaction Log, and then you will see the records of the lines 13 and 15 executed.


Getting Started 33

Using ProgrammerThe example scenario in this section will guide you through the basic features of the Programmer modulestep by step.

Scenario 1: Programming, verifying, and updating SPI EEPROM1. Prepare a SPI target board with an Atmel AT25640 EEPROM memory.2. Connect the SCK, MOSI, and MISO signals from BusPro-S to the target board. Connect the CS (chip-

select) signal of the device to the Slave Select line 6 (pin number 19) on the BusPro-S.3. Launch the SPI Exerciser.4. Go to the Program-Verify-Erase tab of the Programmer module by clicking on Programmer icon on

the shortcut bar.5. Set the [Data File] to “C:\Corelis Examples\SPI Exerciser\Examples\Data

Files\sequential1k.exo”.6. Set the [Manufacturer] to “Atmel EEPROM”.7. Set the [Type] to “AT25640 (8 Kbyte SPI EEPROM)”.8. Set the [Slave Select] to “6”.9. Set the [Clock Rate] to “1 MHz”.10. Set the [Voltage] to “3.3 V”.11. Enable [Erase] and [Blank check] actions only12. Click on the [Run] button to run the tasks.13. Observe that both actions are passed.

Figure 37. Erasing and Blank-checking Memory

14. Go to the Read tab and click on the [Refresh] button.15. Observe that all values are shown as “FF”.

34 Getting Started

Figure 38. Observing Memory Read Window

16. Click on a memory location (e.g. 0x42), then an edit box will appear.

Figure 39. Editing Memory Content

17. Prepare a SPI target board with an Atmel AT25640 EEPROM memory.

Getting Started 35

Figure 40. Updating Memory Content

18. Observe that the memory location (e.g. 0x42) displays the entered value (AB).


19. Click on the [Refresh] button.20. Observe that the memory location (e.g. 0x42) still displays the entered value (AB).21. Go back to the Program-Verify-Erase tab.22. Enable [Program] and [Verify] actions only23. Click on the [Run] button to run the tasks.24. Observe that both actions are passed.

36 Getting Started

Figure 42. Programming and Verifying

25. Go to the Read tab and click on the [Refresh] button.26. Observe that the sequential values (in two-byte unit) are shown as below.


27. Click on a memory location (e.g. 0x55), then an edit box will appear.

Getting Started 37

Figure 44. Editing Memory Content

28. Type in a hex value (e.g. CD) and press the [Enter] key.

Figure 45. Updating Memory Content

29. Observe that the memory location (e.g. 0x55) displays the entered value (CD).

38 Getting Started


30. Click on the [Refresh] button.31. Observe that the memory location (e.g. 0x55) still displays the entered value (CD).32. Go back to the Program-Verify-Erase tab.33. Enable the [Verify] action only34. Click on the [Run] button to run the tasks.

Figure 47. Verifying Memory

35. Observe that the verification fails, and the Programmer Diagnostics window displays a detaileddiagnostics message as shown below.

Getting Started 39

Figure 48. Observing Programmer Diagnostics

40 Connecting to a Target

Chapter 4Connecting to a Target

BusPro-S controller pin assignments and descriptions

Connecting the SPI SignalsFigure 49 and Table 2 describe the pin assignments and descriptions of the BusPro-S controller.

19 17 15 13 11 9 7 5 3 120 18 16 14 12 10 8 6 4 2

Figure 49. BusPro-S Connector Pin Numbers

Pin Number 4-Wire Signal 3-Wire Signal Dual Signal Quad Signal Direction1 SCK SCK SCK SCK Controller Output2 GND GND GND GND GND3 MOSI IO0 IO0 IO0 Bidirectional4 GND GND GND GND GND5 MISO NC IO1 IO1 Bidirectional6 GND GND GND GND GND7 NC NC NC IO2 Bidirectional8 GND GND GND GND GND9 NC NC NC IO3 Bidirectional

10 GND GND GND GND GND11 Enable* Enable Enable Enable Controller Output12 GND GND GND GND GND13 SS0 SS0 SS0 SS0 Controller Output14 SS1 SS1 SS1 SS1 Controller Output15 SS2 SS2 SS2 SS2 Controller Output16 SS3 SS3 SS3 SS3 Controller Output17 SS4 SS4 SS4 SS4 Controller Output18 SS5 SS5 SS5 SS5 Controller Output19 SS6 SS6 SS6 SS6 Controller Output20 SS7 SS7 SS7 SS7 Controller Output

Table 2. BusPro-S Pin Descriptions

* Enable (active high) indicates when the controller is actively driving the bus signals.

Interactive Debugger 41

Chapter 5Interactive Debugger

Debugger module overview and component descriptions

OverviewThe Debugger module provides a direct read/write interactive interface with the target SPI bus throughthe use of command scripts. It can be used to perform simple data transfers both to and from slavedevices acting as the master device on the bus. Typical applications include:

Generating SPI bus traffic and confirming basic bus operation and integrity Establishing the presence and behavior of a master device Poking data to (or initializing) slave devices Peeking the contents of slave devices Interactively checking SPI devices under various SPI modes and clock rates and assessing bus

conformance while observing signals with external instrumentation

The Debugger module can be accessed by clicking on the Debugger icon in the shortcut bar. It consistsof the Command Script interface tabs and the Transaction Log window. The Debugger main screen isshown in Figure 50.

42 Interactive Debugger

Figure 50. Debugger Window


Command Script InterfacesThe Debugger module features two separate tabs for providing access to the Standard and EnhancedSPI type interfaces of the BusPro-S controller. Each interface has its own command script interface,which includes multiple tabs for maintaining multiple command sessions. The command script interfacetakes command keywords and data values from users and executes them in a sequential manner. TheGUI components such as the menu items and the toolbar buttons provide various execution methodsincluding running, pausing, stepping, breaking, aborting, looping, and running to cursor.

Standard SPI TabThe Standard SPI tab offers the options to operate in various SPI modes (0, 1, 2, and 3). In this interface,however, only the standard (4-wire) data line mode is supported. The maximum clock rate supported inthis interface is 30 MHz.

Enhanced (3-wire/Dual/Quad) SPI TabThe Enhanced SPI tab offers the options to operate in various data line modes such as 3-wire, dual, andquad modes as well as the standard (4-wire) mode. However, it supports only the SPI mode 0. Themaximum clock rate supported in this interface is 60 MHz.

GUI ComponentsThe GUI components of the Debugger’s Command Script interfaces are shown in Figure 51, and Table 3describes their functions.

Figure 51. Debugger Command Script Window


Component Description

Command Script editwindow

Specifies the command keywords and data bytes to be executed. Thetexts following double slashes “//” are considered as comments and areignored during the execution. The keywords are shown in blue, and thecomments are shown in green. The multiple sub-tabs are provided forconvenience so that users can to go back and forth between multiplescripts while peeking and poking slave devices.

Bit Order drop-down list Specifies the order of the bits shifted out and in. With “MSB First” option,the MSB bit of the first byte specified in the command script is shifted out.With “LSB First” option, the LSB of the last byte specified in the commandscript is shifted out.

SS Polarity drop-down list Specifies a polarity of the slave select lines. If “Active Low (OC)” isselected, the slave select lines are pulled high during idle times, anddriven low when active. If “Active Low” is selected, the slave select linesare driven high during idle times, and driven low when active. If “ActiveHigh” is selected, the slave select lines are driven low during idle times,and driven high when active.

Clock Rate drop-down list Specifies the operating clock rate.

Voltage drop-down list Specifies the operating voltage.

SPI Mode drop-down list Specifies the SPI mode, which is a combination of clock polarity andphase. There are four different modes, and only mode 0 is supported forEnhanced SPI interface.

Slave Select drop-downlist

Specifies the slave select line to be asserted during read and writetransactions.

Loops combo box Specifies the number times to repeat the execution of the script.

Step button Executes a single line of command, and then pauses.

Run To button Executes the script until the line with the cursor is reached, and thenpauses.

Run button Executes the script until it completes. The execution can be interruptedby a breakpoint, pause, or abort actions.

Pause button Pauses the current execution of the script.

Stop button Aborts the current execution of the script.



Breakpoint marker Indicates a breakpoint. When the line with a breakpoint is reached duringan execution of a script, it pauses the execution. (A breakpoint can be seton a line either by pressing the [F9] key or by selecting the “ToggleBreakpoint” menu item on the right-click pop-up menu.)

Table 3. Command Script Interface Component Descriptions


Debugger Transaction LogThe Transaction Log records and displays all activities performed by the BusPro-S through the Debuggercommands. Using the information provided in the log, users can efficiently track, test, debug, and validatetheir targets under development. The log can be continuously gathered and backed up during eachsession and can be exported to files. An example of the Transaction Log window is shown in Figure 52,and the description of each column is in Table 4.

Figure 52. Debugger Transaction Log Window

Column Description

Tx# Shows the transaction number.

R/W Indicates whether the transaction is write, read, or writeread.

Bytes Indicates the number of bytes and bits being transferred. The number ofbits is shown as a fraction. (e.g. 1.3 bytes = 1 byte + 3 bites = 11 bits)

Data Out Displays the data bytes being written to a slave device.

Data In Displays the data bytes being read from a slave device.

Timestamp Displays the time when the transaction is performed.

Data Line Mode Indicates the data line mode being used for the transaction.

SS Indicates the ID of the slave select line being asserted.

Mode Shows the SPI mode of the transaction.

Tab Indicates which tab the transaction is being executed from.

Line Indicates which line on the command script performed the transaction.

Table 4. Transaction Log Window Column Descriptions

The maximum number of transactions the log can display is one million. Once that number is reached,the old transactions are saved to a temporary file until they are exported to a CSV (Comma SeparatedValue) file using the Export feature.


The Export feature can be accessed through the right-click pop-up menu as shown in Figure 53. Themenu also allows users to select and copy a transaction to the clipboard as a comma-separated text andclear the log’s content.

Figure 53. Debugger Transaction Log Pop-up Menu


Other Features

Saving and Loading Debugger Options and ScriptsAll options and command scripts used in a Debugger session can be preserved by saving them to a SPIExerciser Project file (*.sep). The project file can be opened at a later time to continue with the previousdebugging session seamlessly.

To save the current session to a project file, select the [File | Save] or [File | Save As…] menu item, orclick on the Save ( ) toolbar button.

To load a previously saved session from a project file, select the [File | Open…] menu item, or click onthe Open ( ) toolbar button.

To start a new project with blank scripts and default options, select the [File | New] menu item, or click onthe New ( ) toolbar button.

PrintA Debugger script can be printed by selecting the [File | Print…] menu item or by clicking on the Print (

) toolbar button.

Pin Status IndicatorThe status bar of the SPI Exerciser’s main window displays the current states of the data and slave selectpins. The value ‘0’ indicates that the pin is in low state, and the value ‘1’ indicates it is in high state. Whilea script is running, the states are unknown and indicated as a bar, ‘-‘. Figure 54 shows the StatusIndicator.

Figure 54. Pin Status Indicator


Debugger Command Script Keywords

The Debugger script keywords are listed in Table 5. Debugger commands are not case-sensitive and arealways immediately followed by their parameters. While multiple data bytes can be listed together on asingle or multiple lines, each command (along with its associated parameters) must be placed on its ownseparate line—although a trailing comment is allowed on the same line. The detailed descriptions of thekeywords are followed by the summary table.

Keyword Description

3wiremode3m

Changes the current data line mode to 3-wire mode. (This command is supported forEnhanced SPI interface only)

4wiremode4m

Changes the current data line mode to 4-wire mode.

dualmodedm

Changes the current data line mode to dual mode. (This command is supported forEnhanced SPI interface only)

gpioio

Sets the output enables and levels of individual slave select lines. (This commandcannot be queued when operating with Standard SPI interface)

nop Inserts no-op commands into the command queue, which will add a 3-clock delayeach. (This command is supported for Enhanced SPI interface only)

pause Pauses the execution of command script for a specified duration.

qexecqe

Executes queued commands.

qstartqs

Marks a start of queued command group.

quadmodeqm

Changes the current data line mode to quad mode. (This command is supported forEnhanced SPI interface only)

readrd

Reads a specified number of bytes from a slave device.

readbitrdb

Reads a specified number of bits of data from a slave device. (This command is notsupported for dual and quad data line modes)

ss Sets the ID of the slave select line to be used on subsequent read/write transactions.

ssoff Releases the slave select line asserted by a prior “sson” command.

sson Asserts a slave select line according to the current slave select ID and the polarity.

writewt

Writes a specified sequence of bytes to a slave device.

writebitwtb

Writes a specified number of bits of data to a slave device. (This command is notsupported for dual and quad data line modes)

writereadwtrd

Writes a specified sequence of bytes to a slave device while reading back the samenumber of bytes from it.


Keyword Description

writereadbitwtrdb

Writes a specified number of bits of data to a slave device while reading back thesame number of bits. (This command is not supported for 3-wire, dual, and quaddata line modes)

Table 5. Debugger Command Script Keywords


3wiremode / 3m

Description:Changes the current data line mode to 3-wire mode. In 3-wire mode, only one data line is used in half-duplex mode. Table 6 shows the various data line modes and their signal configurations. (NOTE: Thiscommand is supported for Enhanced SPI Type only.)

Pinnumber

4-wiremode

3-wiremode

Dualmode

Quadmode

3 MOSI (unidirectional) IO0 (bidirectional) IO0 (bidirectional) IO0 (bidirectional)5 MISO (unidirectional) not used IO1 (bidirectional) IO1 (bidirectional)7 not used not used not used IO2 (bidirectional)9 not used not used not used IO3 (bidirectional)

Table 6. Signal Mappings in Data Line Modes

(NOTE: Only 4-wire mode is supported when operating with Standard SPI Type interface.)

Format:3wiremode3m

Parameters:

Example:// change to 3-wire mode and read 2 bytes

3wiremode

read 2

// change to 4-wire mode and read 2 bytes

4wiremode

read 2

// change to dual mode and read 2 bytes

dualmode

read 2

// change back to 3-wire mode and read 2 bytes

3m

read 2


4wiremode / 4m

Description:Changes the current data line mode to 4-wire mode, which is the most commonly used mode. In 4-wiremode, two data lines are used in full-duplex mode. Table 7 shows the various data line modes and theirsignal configurations.

Pinnumber

4-wiremode

3-wiremode

Dualmode

Quadmode




Format:4wiremode4m

Parameters:

Example:// change to 4-wire mode and read 2 bytes

4wiremode

read 2


3wiremode

read 2

// change to dual mode and read 2 bytes

dualmode

read 2

// change back to 4-wire mode and read 2 bytes

4m

read 2


dualmode / dm

Description:Changes the current data line mode to dual mode. In dual mode, two data lines are used in half-duplexmode. Table 8 shows the various data line modes and their signal configurations. (NOTE: This commandis supported for Enhanced SPI Type only.)

Pinnumber

4-wiremode

3-wiremode

Dualmode

Quadmode




Format:dualmodedm

Parameters:

Example:// change to dual mode and read 2 bytes

dualmode

read 2


3wiremode

read 2


4wiremode

read 2

// change back to dual mode and read 2 bytes

dm

read 2


gpio / io

Description:Sets the output enables and levels of individual slave select lines. This command provides a method forutilizing the slave select line as GPIO lines. (NOTE: This command cannot be queued when operating inStandard SPI Type interface.)

Format:gpio value output_enableio value output_enable

Parameters:value

The 8-bit value representing the output levels of Slave Select (SS) lines. The MSB represents the levelfor SS7, and the LSB for SS0. The value ‘1’ represents high, and the ‘0’ represents low. The lines aredriven to their specified levels only when the corresponding bits in the output_enable value are also set.

output_enableThe 8-bit value representing the output-enable settings of Slave Select (SS) lines. The MSB representsthe setting for SS7, and the LSB for SS0. The value ‘1’ makes the output to be enabled, and the ‘0’ tobe disabled. The lines are driven to the levels specified by the value parameter only when thecorresponding bits in this parameter are also set.

Example:// drive Slave Select lines 6, 4, 2, and 0 high

// and 7, 5, 3, and 1 low

gpio 55 FF

// drive Slave Select lines 6, 4, 2, and 0 high

// and 7, 5, 3, and 1 low

io 30 F0


nop

Description:Inserts no-op commands into the command queue, which will add a 3-clock delay each. (NOTE: Thiscommand is supported for Enhanced SPI Type only.)

Format:nop [count]

Parameters:value [optional]

The number of no-op commands to be inserted into the transaction queue. If not specified, only one no-op command will be inserted.

Example://

// read 8 bytes of data in dual mode from W25Q Flash memory address 0x100

//

qstart // start of queue

sson // assert CS

4wiremode // write command in 4wiremode

write bb // Fast Read Dual I/O Instruction

nop // insert extra 3-clock cycle delay between two writes

dualmode // switch to dual mode

write 00 01 00 00 // write address A23-16, A15-8, A7-0, M7-0

nop 5 // insert extra 15-clock cycle delay between write and read

read 8 // 8 read bytes

ssoff // release CS

qexec // end of queue: execute the commands


pause

Description:Pauses the execution of command script for a specified duration. (NOTE: This command is ineffective ifadded to a command queue to insert a delay between commands. Use “nop” command instead.)

Format:pause milliseconds

Parameters:milliseconds

The number of milliseconds to pause the execution of commands.

Example:read 2 // read 2 bytes

pause 1000 // pause 1 second

write AB 12 // write 2 bytes

pause 500 // pause a half second

read 2 // read 2 bytes


qexec / qe

Description:Executes queued commands. The Debugger Command Script supports queued command mode, whichallows multiple commands to be added to a queue and executed at once without any delay betweenthem. This commands executes all queued commands following the prior “qstart” command. (In anormal non-queued mode, the host computer’s USB communications and computational delays willcreate undefined time gaps between command executions.)

Format:qexecqe

Parameters:

Example://


//


sson // assert CS






ssoff // release CS



qstart / qs

Description:Marks a start of queued command group. The Debugger Command Script supports queued commandmode, which allows multiple commands to be added to a queue and executed at once without any delaybetween them. The subsequent “qexec” command executes all queued commands following thiscommand. (In a normal non-queued mode, the host computer’s USB communications and computationaldelays will create undefined time gaps between command executions.)

Format:qstartqs

Parameters:

Example://


//


sson // assert CS






ssoff // release CS



quadmode / qm

Description:Changes the current data line mode to quad mode. In quad mode, four data lines are used in half-duplexmode. Table 9 shows the various data line modes and their signal configurations. (NOTE: This commandis supported for Enhanced SPI Type only.)

Pinnumber

4-wiremode

3-wiremode

Dualmode

Quadmode




Format:quadmodeqm

Parameters:

Example:// change to quad mode and read 2 bytes

quadmode

read 2


3wiremode

read 2


4wiremode

read 2

// change back to quad mode and read 2 bytes

qm

read 2


read / rd

Description:Reads a specified number of bytes from a slave device. The data read can be retrieved from theTransaction Log window.

Format:read byte_countrd byte_count

Parameters:byte_count

The number of bytes to be read in hex string format.

Example:// read 256 bytes (hex: 0x100)

read 100

// read 31 bytes (hex: 0x1F)

rd 1F


readbit / rdb

Description:Reads a specified number of bits of data from a slave device. The data read can be retrieved from theTransaction Log window. (NOTE: This command is not supported for dual and quad data line modes.)

Format:readbit bit_countrdb bit_count

Parameters:bit_count

The number of bits to be read in hex string format.

Example:// read 256 bits (hex: 0x100) of data

read 100

// read 255 bits (hex: 0xFF) of data

rd FF


ss

Description:Sets the ID of the slave select line to be used on subsequent read/write transactions. This commandoverrides the slave select ID chosen on the Debugger GUI. If this command is not given, the valuechosen on the GUI is used.

Format:ss slave_select_id

Parameters:slave_select_id

The ID of slave select line to be asserted. The valid ID’s are ‘0’ through ‘7’.

Example:

// read 2 bytes from slave 0

ss 0

read 2


ss 1

read 2


ss 4

read 2


ss 7

read 2


ssoff

Description:Releases the slave select line asserted by a prior “sson” command.

Format:ssoff

Parameters:

Example://


//


sson // assert CS






ssoff // release CS



sson

Description:Asserts a slave select line according to the current slave select ID and the polarity. This commandoverrides the assertions and de-assertions performed at the beginning and end of read/write transactions.In other words, when this command is given, the slave select line stays asserted until the “ssoff”command is given or the script is ended.

Format:sson

Parameters:

Example://


//


sson // assert CS






ssoff // release CS



write / wt

Description:Writes a specified sequence of bytes to a slave device.

Format:write byte…wt byte…

Parameters:byte…

One or more bytes to be written in hex string format.

Example:// writes four byte 0xAB, 0xCD, 0x12, and 0x34

write AB CD 12 34

// writes a byte 0xFE

wt 0xFE


writebit / wtb

Description:Writes a specified number of bits of data to a slave device. (NOTE: This command is not supported fordual and quad data line modes.)

Format:writebit bit_count byte…wtb bit_count byte…


The number of bits to be written in hex string format.

byte…The bits to be written, grouped in bytes in hex string format. Depending on the current Bit Order setting,MSB or LSB of bits within the specified byte sequence will be written.

Example:// in MSB First bit order (shift out MSB first)

// writes 15 bits of data, <=1010.1100.0011.011 (binary) to a slave

writebit F AC 36

writebit F AC 37 // this has the same outcome since the LSB is ignored

// in LSB First bit order (shift out LSB first)

// writes 15 bits of data, 101.0110.0001.1011=> (binary) to a slave

wtb F 56 1B

wtb F D6 1B // this has the same outcome since the MSB is ignored


writeread / wtrd

Description:Writes a specified sequence of bytes to a slave device while reading back the same number of bytes fromit. The data read can be retrieved from the Transaction Log window. (NOTE: This command is notsupported for 3-wire, dual, and quad data line modes.)

Format:writeread byte…wtrd byte…

Parameters:byte…

One or more bytes to be written in hex string format.

Example:// writes four byte 0xAB, 0xCD, 0x12, and 0x34,

// and reads back four bytes at the same time

writeread AB CD 12 34

// writes a byte 0xFE, and reads back a byte

wtrd 0xFE


writereadbit / wtrdb

Description:Writes a specified number of bits of data to a slave device while reading back the same number of bitsfrom it. The data read can be retrieved from the Transaction Log window. (NOTE: This command is notsupported for 3-wire, dual, and quad data line modes.)

Format:writereadbit bit_count byte…wtrdb bit_count byte…


The number of bits to be written in hex string format.

byte…The bits to be written, grouped in bytes in hex string format. Depending on the current Bit Order setting,MSB or LSB of bits within the specified byte sequence will be written.

Example:// in MSB First bit order (shift out MSB first)

// writes 15 bits of data, <=1010.1100.0011.011 (binary) to a slave and

// reads back 15 bits from it.

writereadbit F AC 36

writereadbit F AC 37 // this has the same outcome since the LSB is ignored

// in LSB First bit order (shift out LSB first)

// writes 15 bits of data, 101.0110.0001.1011=> (binary) to a slave and

// reads back 15 bits from it.

wtrdb F 56 1B

wtrdb F D6 1B // this has the same outcome since the MSB is ignored

EEPROM and Flash Memory Programmer 69

Chapter 6EEPROM and Flash Memory Programmer

Programmer module overview and component descriptions

OverviewThe Programmer module provides an interface specifically tailored for convenient interaction withstandard SPI EEPROM and Flash memory devices on the target SPI bus. It enables users to erase andprogram most common SPI EEPROM or Flash memory devices. It further supports comparing currentcontents against the source data file. The device content read can also be viewed and saved to a file.

Standard data file formats supported include:

EXO / S

HEX / MCS

BIN

In addition, a simple user-friendly text file format can specify the memory content.

70 EEPROM and Flash Memory Programmer

Programmer FeaturesThe Programmer module can be accessed by clicking on the Programmer icon in the shortcut bar. Itconsists of two tabs, Program-Verify-Erase and Read, and the Programmer Diagnostics window.

Program-Verify-Erase TabThe Program-Verify-Erase tab allows users to erase, blank-check, program, and verify the specifiedEEPROM or Flash memory device with the contents of the user specified data file. The user selects thetarget device type from a pull-down list of known manufacturers and types. Then the available data linemodes are preloaded for a selection. In addition to selecting a source data file, the user can enter anadditive/subtractive adjustment to the internal device offset declared in the file. The following actions canbe performed in this tab:

Program – load the EEPROM or Flash memory with the contents of the referenced data file.

Verify – compare the EEPROM or Flash memory with the referenced file and indicate a pass/failoutcome.

Erase – clear the content of the EEPROM or Flash memory

Blank Check – checks whether the Flash memory is properly erased

The Program-Verify-Erase tab windows in different states are shown in Figure 55 and Figure 56. Table 10describes the components in the tab window.

Figure 55. Program-Verify-Erase Tab in Ready State


Figure 56. Program-Verify-Erase Tab in Running State



Data File edit box andBrowse button

Specifies the file containing the data to be programmed. Use the browsebutton to locate the data file.

Manufacturer drop-downlist

Specifies the manufacturer of the SPI EEPROM or Flash memory deviceto be programmed.

Type drop-down list Specifies the type of the SPI EEPROM or Flash device to program.Various selections are available for supported devices from each of themanufactures in the Manufacturer drop-down list.

Data Line Mode drop-down list

Specifies the data line mode to be used for accessing the device. Thisdrop-down list is populated with all supported data line modes for theselected device type.

Slave Select drop-downlist

Specifies a slave select line to be asserted for accessing the device.

Address Offset drop-down list and edit box

Specifies an offset for the programming. The drop-down list allows forselection of whether to “Add” or “Subtract” the offset value which isentered into the edit box on the right. The offset value must be entered inhexadecimal format.

Clock Rate drop-down list Specifies the clock rate to be used for accessing the device.

Voltage drop-down list Specifies the voltage to be used for accessing the device.

Action list Specifies which actions to perform. Checking on the check box enablesthe specified action.

Status indicator andProgress bar

Indicates the current status of actions. The progress bar shows thepercent complete information while performing an action.

Run button Starts and stops the selected actions. The button turns into an Abortbutton when any action is being performed.

Table 10. Program-Verify-Erase Tab Component Descriptions

Read TabThe Read tab allows users to view the content of the EEPROM or Flash memory device. It also providesa capability to save the memory content to a file. When the actual content is different from the specifieddata file, the memory location with mismatched values are highlighted, and the expected value isdisplayed when hover the cursor over it. For EEPROM devices, the memory contents can be updateddirectly by clicking on a cell in the memory display, typing a new value, and pressing the [Enter] key. Thememory display list also supports scrolling and page-hopping through the data.

Examples of Read tab windows are shown in Figure 57 and Figure 58, and Table 11 describes thecomponents of the tab window.


Figure 57. Read Tab

Figure 58. Read Tab with Mismatched Memory Content



Memory Content displaylist

Displays the memory content of the device being accessed.

Address edit box Changes the starting address of the memory display to a specifiedaddress. Entering a new address in hexadecimal and pressing the [Enter]key changes the starting address of the memory display.

Jump to Beginning button Moves the memory display window to the beginning.

Page Up button Moves up the memory display window by one page.

Page Down button Moves down the memory display window by one page.

Jump to End button Moves the memory display window to the end.

Refresh button Refreshes the memory display window by reading the current memorycontent.

Dump button Dumps the current content of the memory device to a file.

Table 11. Read Tab Component Descriptions

Programmer Diagnostics WindowThe Programmer Diagnostics window displays a summary of the actions performed by the Programmer. Itdisplays the result of the actions including erase, blank-check, program, and verify, and displays the totaltime it took. When an action fails, it displays more detailed information on why the action failed along withthe comparison of expected and actual results as shown in Figure 60.

Figure 59. Programmer Diagnostics Window


Figure 60. Programmer Diagnostics Window Displaying Information on Error

Saving and Loading Programmer SessionAll options used in a Programmer session can be preserved by saving them to a SPI Exerciser Project file(*.sep). The project file can be opened at a later time to continue with the previous session seamlessly.

To save the current session to a project file, select the [File | Save] or [File | Save As…] menu item, orclick on the Save ( ) toolbar button.

To load a previously saved session from a project file, select the [File | Open…] menu item, or click onthe Open ( ) toolbar button.

To start a new project with blank scripts and default options, select the [File | New] menu item, or click onthe New ( ) toolbar button.

Pin Status IndicatorThe status bar of the SPI Exerciser’s main window displays the current states of the data and slave selectpins. The value ‘0’ indicates that the pin is in low state, and the value ‘1’ indicates it is in high state. Whilea script is running, the states are unknown and indicated as a bar, ‘-‘. Figure 54 shows the StatusIndicator.

Figure 61. Pin Status Indicator

Third Party Application Interface 77

Chapter 7Third Party Application Interface

Description of using the BusPro-S with third party software

OverviewThe BusPro-S provides the ability to operate most of its features by using function calls from third partysoftware. In this manner, such applications can access the connected SPI bus of the target, includinginteracting with it and performing EEPROM or Flash memory programming. This effectively provides suchsoftware with a portal to the connected SPI bus.

More generally, any application which can call DLL routines can invoke the library routines described inthis chapter and gain control and visibility of the BusPro-S resources and the connected SPI bus.

78 Third Party Application Interface

Dynamic Link Library (DLL)The Dynamic Link Library is comprised of a set of routines which can be invoked in a standard fashion bya user’s program. Table 12 lists the primary files necessary for using the DLL.


BusPro_S.DLL The encapsulated library of SPI routines

BusPro_S.LIB The import library

BusPro_S.H C include file containing the required DLL function prototypes

Table 12. DLL Components

These files are provided in the SPI Exerciser installation folder. Additionally, all of the *.BIN and *.DLLfiles from the SPI Exerciser installation folder are required in order to support the BusPro_S.DLLfunctions.

As a design reference example of the usage of these DLL functions, sample programs with source codeare also provided in the “C:\Corelis Examples\SPI Exerciser\BusPro_S API” folder.

Table 13 lists and describes the functions provided by the BusPro-S DLL. The following pages give moredetailed information about each function.


General Calling Sequence

The BusPro-S initialization function, “bps_init_adapter()” must be called prior to any other APIfunctions are called. It is also recommended to call the hardware configuration functions following theinitialization function, even though the default settings may work as is. Below is an example code inC/C++ programming language.

//////////////////////////////////////////////////////

// init controller

//

printf("\ninitializing BusPro-S controller...");

// initialize adapter

nRet = bps_init_adapter();

if (nRet != BPS_FT_OK)

goto exit;

// set SPI type to Enhanced (3-wire/Dual/Quad) type

nRet = bps_set_spi_type(SPI_TYPE_ENHANCED);


goto exit;

// set voltage to 3.3 V

nRet = bps_set_voltage(3300);


goto exit;

// set frequency to 10 MHz.

nRet = bps_set_frequency(10000000);


goto exit;

// set Slave Select Polarity to Active Low (Open-Collector)

nRet = bps_set_ss_polarity(SS_POLARITY_ACTIVE_LOW_OC);


goto exit;


// set SPI mode to 0 (only supported mode in Enhanced SPI type)

nRet = bps_set_spi_mode(0);


goto exit;

// set Slave Select to 6

nRet = bps_set_ss(6);


goto exit;

Sleep(500);

//////////////////////////////////////////////////////

// peek-and-poke registers

//

printf("\nreading values SR1 and SR2 registers...");

// set the data line mode to normal (4-wire) mode.

nRet = bps_set_data_line_mode(DATA_LINE_MODE_4WIRE);


goto exit;

// send "Write Enable Status Register" command, 50h

pucDataOut[0] = 0x50;

nRet = bps_spi_write(pucDataOut, 1*8);


goto exit;

// send command to set the "Quad-Enable(QE)" bit on SR2






goto exit;


// read Status Register SR1


pucDataOut[1] = 0xff;

nRet = bps_spi_write_read(pucDataOut, pucDataIn, 2*8);


goto exit;

printf("\ndata read from SR1: %02X ", pucDataIn[1]);

// read Status Register SR2


pucDataOut[1] = 0xff;

nRet = bps_spi_write_read(pucDataOut, pucDataIn, 2*8);


goto exit;



Function Reference

Function Description

bps_assert_ss Asserts a slave select line specified by a prior “bps_set_ss()”function call.

bps_assert_ss_q Queues an assertion action of a slave select line specified by aprior “bps_set_ss()” function call.

bps_deassert_ss De-asserts the slave select line asserted by a prior“bps_assert_ss()” function call.

bps_deassert_ss_q Queues a de-assertion action of a slave select line assertedby a prior “bps_assert_ss_q()” function call.

bps_execute_queue Executes all previously queued transactions at once andreturns all read data in a single data buffer.

bps_get_adapter_serial_number Returns an alphanumeric serial number of the BusPro-Scontroller being connected.

bps_get_adapter_engine_version Returns the version number of the hardware engine loaded onthe BusPro-S controller being connected.

bps_get_data_line_mode Returns the current data line mode being used.

bps_get_signal_levels Returns the current levels of the data and slave select signals.

bps_init_adapter Initializes the BusPro-S controller.

bps_nop_q Inserts no-op commands into the transaction queue, which willadd a 3-clock delay each. (for Enhanced SPI Type only)

bps_ping Checks whether the BusPro-S is connected and functional.

bps_set_bit_order Sets the order of bits to be written and read from and to theslave devices.

bps_set_data_line_mode Sets the mode of operation for data lines. (Only 4-wire modeis supported for Standard SPI Type)

bps_set_frequency Sets the operating clock rate to a specified value.

bps_set_gpio Sets the output enables and levels of individual Slave Selectlines.

bps_set_gpio_q Adds a command for setting the output enables and levels ofGPIO to the transaction queue.

bps_set_spi_mode Sets the SPI mode, which is a combination of clock polarityand phase. (Only mode 0 is supported for Enhanced SPIType)

bps_set_spi_type Sets the current SPI interface type to a new type.

bps_set_ss Specifies a slave select line to be asserted during subsequentwrite and read transactions.

bps_set_ss_polarity Specifies a polarity of the slave select lines.


Function Description

bps_set_voltage Sets the operating voltage to a specified value.

bps_spi_read Reads specified number of data bits from a slave device.

bps_spi_read_q Queues a read transaction with a specified number of databits to be read from a slave device.

bps_spi_write Writes out specified number of data bits to a slave device.

bps_spi_write_q Queues a write transaction with a specified number of databits to be written to a slave device.

bps_spi_write_read Writes out specified number of data bits to a slave devicewhile reading back the same number of bits from it.

bps_spi_write_read_q Queues a write-and-read transaction with a specified numberof data bits to be transferred to and from a slave device.

Table 13. BusPro-S DLL Functions


bps_assert_ss()

Description:Asserts a slave select line specified by a prior “bps_set_ss()” function call. The line will be keptasserted until a subsequent “bps_deassert_ss()” function call is made. The effect of the assertionmade by this function overrides assertion/de-assertion pairs that are built into individual write and readtransactions. Therefore, the “bps_assert_ss()” and “bps_deassert_ss()” function calls in pair canbe used to group a sequence of multiple write and read transactions together within a single slave selectevent.

Prototype:int bps_assert_ss();

Parameters:

Return Value:BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the“BusPro_S.h” file.

Example:unsigned char pucDataOut[100]; // output data buffer

unsigned char pucDataIn[100]; // input data buffer

// set Slave Select to 2nRet = bps_set_ss(2);if (nRet != BPS_FT_OK)

goto exit;

// assert Slave Select line

nRet = bps_assert_ss(); // asserts slave select line 2, and keep it

if (nRet != BPS_FT_OK) // asserted until bsp_deassert_ss() is called

goto exit;

// send command for "memory read" at address 0x100000

pucDataOut[0] = 0x03; // read instruction

pucDataOut[1] = 0x10; // addr MSB

pucDataOut[2] = 0x00; // addr

pucDataOut[3] = 0x00; // addr LSB



goto exit;


// read 8 bytes

nRet = bps_spi_read(pucDataIn, 8*8);


goto exit;

// de-assert Slave Select line

nRet = bps_deassert_ss (); // de-asserts slave select line 2


goto exit;


bps_assert_ss_q()

Description:Queues an assertion action of a slave select line specified by a prior “bps_set_ss()” function call. Thisfunction provides the same effect as the “bps_assert_ss()” function but is to be used in queuedtransaction mode.

Prototype:int bps_assert_ss_q();

Parameters:




// START of QUEUE /////////////////////////////


goto exit;

// queue asserting Slave Select line

nRet = bps_assert_ss_q(); // will assert slave select 2 during

if (nRet != BPS_FT_OK) // execution of queued transactions

goto exit;

// queue writing of "memory read" command at address 0x100000





nRet = bps_spi_write_q(pucDataOut, 4*8);


goto exit;


// queue reading of 8 bytes

nRet = bps_spi_read_q(8*8);


goto exit;

// queue releasing of Slave Select line

nRet = bps_deassert_ss_q(); // will de-assert slave select 2 during


goto exit;

// END of QUEUE ///////////////////////////////

// execute the queued transactions

// (pucDataIn will contain all data bytes being returned

// from all queued transactions. (e.g. 8 in this case))

nRet = bps_execute_queue(pucDataIn);


goto exit;


bps_deassert_ss()

Description:De-asserts the slave select line asserted by a prior “bps_assert_ss()” function call. The“bps_assert_ss()” and “bps_deassert_ss()” function calls in pair can be used to group asequence of multiple write and read transactions together within a single slave select event.

Prototype:int bps_deassert_ss();

Parameters:





goto exit;


nRet = bps_assert_ss(); // asserts slave select line 2, and keep it

if (nRet != BPS_FT_OK) // asserted until bsp_deassert_ss() is called

goto exit;








goto exit;

// read 8 bytes




goto exit;


nRet = bps_deassert_ss (); // de-asserts slave select line 2


goto exit;


bps_deassert_ss_q()

Description:Queues a de-assertion action of a slave select line asserted by a prior “bps_assert_ss_q()” functioncall. This function provides the same effect as the “bps_deassert_ss()” function but is to be used inqueued transaction mode.

Prototype:int bps_deassert_ss_q();

Parameters:




// START of QUEUE /////////////////////////////


goto exit;




goto exit;








goto exit;





goto exit;




goto exit;

// END of QUEUE ///////////////////////////////






goto exit;


bps_execute_queue()

Description:Executes all previously queued transactions at once and returns all read data in a single data buffer. Byqueuing and executing write and read transactions together in a back-to-back sequence, the gapsbetween them can be reduced down to several clocks. This will help testing and validating slave devicesunder development by simulating a fast-acting master device on the bus.

Prototype:int bps_execute_queue(

unsigned char* ucBufferIn);

Parameters:pucBufferIn

The pointer to a buffer to store the data bytes read.




// START of QUEUE /////////////////////////////

// repeat 7 times with different slave select lines

for (int i=0; i<7; i++)

{

// set Slave Select to i

nRet = bps_set_ss(i);


goto exit;




goto exit;









goto exit;




goto exit;




goto exit;

}

// END of QUEUE ///////////////////////////////



// from all queued transactions. (e.g. 16 bytes in this

// case with 2 bytes from each slave device))



goto exit;

for (int i=0; i<8; i++)

{

printf("\ndata read from slave#%d: %02X %02X",

i, pucDataIn[2*i], pucDataIn[2*i+1]);

}


bps_get_adapter_serial_number()

Description:Returns an alphanumeric serial number of the BusPro-S controller being connected.

Prototype:int bps_get_adapter_serial_number(

char* szSerialNumber,int nMaxLen

);

Parameters:szSerialNumber

The pointer to a string buffer where the serial number will be stored in.

nMaxLenThe size of the szSerialNumber buffer in number of character bytes including a terminating NULL.


Example:char szSerialNumber[32];

// get the serial number of the BusPro-S controller.

// the function will return up to 31 characters.

nRet = bps_get_adapter_serial_number(szSerialNumber, 32);


goto exit;

// display the serial number

printf("\nSN = %s", szSerialNumber);


bps_get_adapter_engine_version()

Description:Returns the version number of the hardware engine loaded on the BusPro-S controller being connected.

Prototype:int bps_get_adapter_engine_version(

int* pnEngineVersion);

Parameters:szSerialNumber

The pointer to an integer where the version number will be stored in.


Example:int nVersionNumber;

// get the engine’s version number

nRet = bps_get_adapter_engine_version(&nVersionNumber);


goto exit;

// display the version number

printf("\nEngine Version = %d", nVersionNumber);


bps_get_data_line_mode()

Description:Returns the current data line mode being used. See the description of “bps_set_data_line_mode”function for more details on configuring and using data line modes.

Prototype:int bps_get_data_line_mode(

int* pnDataLineMode);

Parameters:pnDataLineMode

The pointer to an integer representing the current data line mode. Possible values are“DATA_LINE_MODE_4WIRE”(=0), “DATA_LINE_MODE_3WIRE”(=1), “DATA_LINE_MODE_DUAL”(=2),and “DATA_LINE_MODE_QUAD”(=3), for Enhanced SPI Type interface, and“DATA_LINE_MODE_4WIRE”(=0) for Standard SPI Type interface.


Example:int nDataLineMode;

// get the current data line mode

nRet = bps_get_data_line_mode(&nDataLineMode);


goto exit;

// display the data line mode

printf("\ndata line mode = ");

if (nDataLineMode == DATA_LINE_MODE_4WIRE)

printf("4-wire");

else if(nDataLineMode == DATA_LINE_MODE_3WIRE)

printf("3-wire");

else if(nDataLineMode == DATA_LINE_MODE_DUAL)

printf("Dual");

else if(nDataLineMode == DATA_LINE_MODE_QUAD)


printf("Quad");

else

printf("unknown");


bps_get_signal_levels()

Description:Returns the current levels of the data and slave select signals.

Prototype:int bps_get_signal_levels(

unsigned short* pusSignalLevels);

Parameters:pusSignalLevels

The pointer to a 16-bit word representing the current levels of data and slave select signals. Table 14shows the mapping of each bit to a signal.

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Signal n/a n/a n/a n/a IO3 IO2 IO1 IO0 SS7 SS6 SS5 SS4 SS3 SS2 SS1 SS0Pin# n/a n/a n/a n/a 9 7 5 3 20 19 18 17 16 15 14 13

Table 14. Bit to Signal Mapping


Example:unsigned short usSignalLevels;

// get the current signal levels

nRet = bps_get_signal_levels(&usSignalLevels);


goto exit;

// display the signal levels

printf("\nSS0 = %d", (usSignalLevels & 0x1));

printf("\nSS1 = %d", ((usSignalLevels >> 1) & 0x1));








printf("\nIO0 = %d", ((usSignalLevels >> 8) & 0x1));





bps_init_adapter()

Description:Initializes the BusPro-S controller. This function must be called prior to any other API functions are called.

Prototype:int bps_init_adapter();

Parameters:


Example:// initialize adapter



goto exit;




goto exit;




goto exit;




goto exit;


bps_nop_q()

Description:Inserts no-op commands into the transaction queue, which will add a 3-clock delay each. (NOTE: Thisfunction is operational only when using Enhanced SPI Type interface.)

Prototype:int bps_nop_q(

int nCount);

Parameters:nCount

The number of no-op commands to be inserted into the transaction queue.




// START of QUEUE /////////////////////////////


nRet = bps_assert_ss_q();


goto exit;








goto exit;

// insert an additional 15-clock delay between


// the "memory read" command and the read transaction

nRet = bps_nop_q(5);


goto exit;




goto exit;


nRet = bps_deassert_ss_q();


goto exit;

// END of QUEUE ///////////////////////////////






goto exit;

// display read values

printf("\ndata read: ");

for (i=0; i<8; i++)

printf("%02X ", pucDataIn[i]);


bps_ping()

Description:Checks whether the BusPro-S is connected and functional.

Prototype:int bps_ping();

Parameters:

Return Value:BPS_FT_OK (=0) if the function completes successfully and the BusPro-S is connected and functional.Otherwise BPS_ERROR_PING_FAILED (=0x1005).

Example:// ping the adapter

nRet = bps_ping();

if (nRet == BPS_FT_OK)

printf("\nBusPro-S connected and functional.");

else

printf("\nBusPro-S not connected or not functional.");


bps_set_bit_order()

Description:Sets the order of bits to be written and read from and to the slave devices. One option is to shift out andin the MSB (Most Significant Bit) of the data stream stored in the buffer first. The other option is to shiftout and in the LSB (Least Significant Bit) first.

Prototype:int bps_set_bit_order(

int nBitOrder);

Parameters:nBitOrder

The new bit order to be used. The valid options are “BIT_ORDER_MSB_FIRST”(=0), and“BIT_ORDER_LSB_FIRST”(=1).


Example:// change the bit order to MSB first

nRet = bps_set_bit_order(BIT_ORDER_MSB_FIRST);


goto exit;

// change the bit order to LSB first

nRet = bps_set_bit_order(BIT_ORDER_LSB_FIRST);


goto exit;


bps_set_data_line_mode()

Description:Sets the mode of operation for data lines. The most common data line mode is 4-wire mode, which usestwo data lines operating in full-duplex mode. The 3-wire mode uses a single data line in half-duplex mode.The dual mode uses two data lines in half-duplex mode, and the quad mode uses four data lines in half-duplex mode. Table 15 summarizes the mapping of signals in various data line modes.

Pinnumber

4-wiremode

3-wiremode

Dualmode

Quadmode




Prototype:int bps_set_data_line_mode(

int nDataLineMode);

Parameters:nDataLineMode

The new data line mode to be used. The valid modes are the “DATA_LINE_MODE_4WIRE”(=0),“DATA_LINE_MODE_3WIRE”(=1), “DATA_LINE_MODE_DUAL”(=2), and “DATA_LINE_MODE_QUAD”(=3),for Enhanced SPI Type interface, and only the “DATA_LINE_MODE_4WIRE”(=0) for Standard SPI Typeinterface.


Example://////////////////////////////////////////////////////

// read W25Q80BV device in quad mode (IO1,IO1,IO2,IO3 / half-duplex)

// (group the transaction sequence into a queue and execute them at once.)

// set the interface to Enhanced SPI (4-wire/3-wire/Dual/Quad) type



goto exit;





goto exit;

// change to 4-wire mode

nRet = bps_set_data_line_mode(DATA_LINE_MODE_4WIRE);


goto exit;

// queue writing Fast Read Quad I/O instruction

pucDataOut[0] = 0xEB;



goto exit;

// change to dual mode

nRet = bps_set_data_line_mode(DATA_LINE_MODE_QUAD);


goto exit;

// queue writing address value









goto exit;

// queue reading 8 bytes



goto exit;


// queue releasing Slave Select line



goto exit;

// execute queued transactions

nRet = bps_execute_queue(pucDataIn); // pucDataIn returns all data bytes(8)

if (nRet != BPS_FT_OK) // from queued the transactions

goto exit;



for (i=0; i<8; i++)

{


pucDataIn[i] = 0xCD; // reset buffer

}


bps_set_frequency()

Description:Sets the operating clock rate to a specified value.

Prototype:int bps_set_frequency(

int nFrequency);

Parameters:nFrequency

The frequency value to be used in Hz unit. The valid selections vary depending on the current SPIinterface type. Table 16 lists the valid frequency values.

Standard SPI Type Enhanced SPI Type

500000, (0.5 MHz)

1000000, (1 MHz)

2000000, (2 MHz)

3000000, (3 MHz)

4000000, (4 MHz)

5000000, (5 MHz)

6000000, (6 MHz)

7500000, (7.5 MHz)

10000000, (10 MHz)

15000000, (15 MHz)

30000000, (30 MHz)

250000, (0.25 MHz)

500000, (0.5 MHz)

750000, (0.75 MHz)

1000000, (1 MHz)

2000000, (2 MHz)

3000000, (3 MHz)

4000000, (4 MHz)

5000000, (5 MHz)

6000000, (6 MHz)

7500000, (7.5 MHz)

10000000, (10 MHz)

12000000, (12 MHz)

15000000, (15 MHz)

20000000, (20 MHz)

30000000, (30 MHz)

60000000, (60 MHz)

Table 16. Valid Frequency Values in SPI Interface Types






goto exit;




goto exit;




goto exit;




goto exit;


bps_set_gpio()

Description:Sets the output enables and levels of individual Slave Select lines. This function provides a method forutilizing the Slave Select line as GPIO lines.

Prototype:int bps_set_gpio(

unsigned char ucValue,unsigned char ucOutputEnable

);

Parameters:ucValue

The 8-bit value representing the output levels of Slave Select (SS) lines. The MSB represents the levelfor SS7, and the LSB for SS0. The value ‘1’ represents high, and the ‘0’ represents low. The lines aredriven to their specified levels only when the corresponding bits in the ucOutputEnable value are alsoset.

ucOutputEnableThe 8-bit value representing the output-enable settings of Slave Select (SS) lines. The MSB representsthe setting for SS7, and the LSB for SS0. The value ‘1’ makes the output to be enabled, and the ‘0’ tobe disabled. The lines are driven to the levels specified by the ucValue parameter only when thecorresponding bits in this parameter are also set.


Example:// drive Slave Select lines 6, 4, 2, and 0 high

// and 7, 5, 3, and 1 low

nRet = bps_set_gpio(0x55, 0xFF);


goto exit;

// drive Slave Select lines 5 and 4 high

// and 7 and 6 low

nRet = bps_set_gpio(0x30, 0xF0);


goto exit;


bps_set_gpio_q()

Description:Adds a command for setting the output enables and levels of GPIO to the transaction queue. Thisfunction provides a method for utilizing the Slave Select line as GPIO lines. All queued transactions areexecuted when the “bps_execute_queue” function is called. (NOTE: This function is operational onlywhen using Enhanced SPI Type interface.)

Prototype:int bps_set_gpio_q(

unsigned char ucValue,unsigned char ucOutputEnable

);

Parameters:ucValue

The 8-bit value representing the output levels of Slave Select (SS) lines. The MSB represents the levelfor SS7, and the LSB for SS0. The value ‘1’ represents high, and the ‘0’ represents low. The lines aredriven to their specified levels only when the corresponding bits in the ucOutputEnable value are alsoset.

ucOutputEnableThe 8-bit value representing the output-enable settings of Slave Select (SS) lines. The MSB representsthe setting for SS7, and the LSB for SS0. The value ‘1’ makes the output to be enabled, and the ‘0’ tobe disabled. The lines are driven to the levels specified by the ucValue parameter only when thecorresponding bits in this parameter are also set.


Example:// queue the command for driving Slave Select lines

// 6, 4, 2, and 0 high, and 7, 5, 3, and 1 low

nRet = bps_set_gpio_q(0x55, 0xFF);


goto exit;

// queue the command for driving Slave Select lines

// 5 and 4 high and 7 and 6 low

nRet = bps_set_gpio_q(0x30, 0xF0);


goto exit;





goto exit;

Third Party Application Interf

Description:Sets the SPI mode, which is a comeither ‘0’, meaning the base level ophase can be either ‘0’, meaning thdata are captured on trailing edge.is CPOL=0 and CPHA=1, mode 2Figure 62 and table summarizeoperating with Enhanced SPI Type

Figu

Tab

Prototype:int bps_set_spi_mode(

int nSPIMode);

Parameters:nSPIMode

The new SPI mode to be used. Thonly ‘0’ for Enhanced SPI Type in

face

bps_se

bination of clock polarity and phase. The clock polarof the clock is low, or ‘1’, meaning the base levelhe data are captured on the clock’s leading edge, oThe SPI mode 0 is the combination of CPOL=0 and

2 is CPOL=1 and CPHA=0, and mode 3 is CPOLthe various SPI modes. (NOTE: Only mode 0 isinterface.)

ure 62. Timing Diagrams of SPI Modes

Mode CPOL CPHA0 0 01 0 12 1 03 1 1

ble 17. CPOL and CPHA of SPI Modes

he valid modes are ‘0’ through ‘3’ for Standard SPI Tterface.

113

et_spi_mode()

rity (CPOL) can beis high. The clock

or ‘1’, meaning thed CPHA=0, mode 1L=1 and CPHA=1.s supported when

Type interface, and


Return Value:// initialize adapter



goto exit;

// set SPI type to Standard (4-wire only) type

nRet = bps_set_spi_type(SPI_TYPE_STANDARD);


goto exit;

// set SPI mode to 3

nRet = bps_set_spi_mode(3);


goto exit;

// all subsequent write and read will operate with the

// base value of the clock as 1, and capture the data

// on trailing edges, which are rising edges


bps_set_spi_type()

Description:Sets the current SPI interface type to a new type. BusPro-S provides two different types of SPI businterfaces. The “Standard SPI Type” interface is to be used for operating in various SPI modes (0, 1, 2,and 3). With this interface, however, only the standard (4-wire) data line mode is supported. On the otherhand, the “Enhanced SPI Type” interface supports 3-wire, dual, and quad data line modes as well as thestandard (4-wire) data line mode; but, it operates in the SPI mode 0 only. Table 18 summarizes theirdifferences.

Standard SPI Type Interface Enhanced SPI Type InterfaceSPI Mode Supported 0, 1, 2, 3 0Data Line Mode Supported 4-wire 4-wire, 3-wire, Dual, QuadMaximum Clock Rate 30 MHz 60 MHz

Table 18. Comparison of SPI Type Interfaces

Prototype:int bps_set_spi_type(

int nSPIType);

Parameters:nSPITypeThe new SPI interface type to be used. The valid selections are “SPI_TYPE_STANDARD” (=0) and“SPI_TYPE_ENHANCED” (=1).

Return Value:// initialize adapter



goto exit;




goto exit;




goto exit;





goto exit;


bps_set_ss()

Description:Specifies a slave select line to be asserted during subsequent write and read transactions for bothqueued and non-queued mode. The actual assertion of the line occurs at the start of each transaction orwhen the “bps_assert_ss()” function or the “bps_assert_ss_q()” function (during execution of aqueued sequence) is called. Likewise, the de-assertion of the line occurs at the end of each transaction orwhen the “bps_deassert_ss()” function or the “bps_deassert_ss_q()” function (during executionof a queued sequence) is called.

Prototype:int bps_set_ss(

int nSSID);

Parameters:nSSID

The ID of slave select line to be asserted. The valid ID’s are ‘0’ through ‘7’, and the startup default valueis ‘0’.




// read a byte from each of the eight slavesfor (int i=0; i<7; i++){

// set Slave Select to inRet = bps_set_ss(i);if (nRet != BPS_FT_OK)

goto exit;

// read a byte of data from slave i

nRet = bps_spi_read(pucDataIn, 1*8); // assertion and de-assertion

if (nRet != BPS_FT_OK) // occur during the transaction

goto exit;

printf("\ndata read from slave#%d: %02X ", i, pucDataIn[i]);

}


// START of QUEUE /////////////////////////////


goto exit;




goto exit;








goto exit;




goto exit;




goto exit;

// END of QUEUE ///////////////////////////////






goto exit;


bps_set_ss_polarity()

Description:Specifies a polarity of the slave select lines. After this function is called, all slave select lines shift to thenon-asserted state. In other words, if the polarity is active low, the slave select lines are driven high orpulled-up high (if OC mode is selected). If the polarity is active high, then the slave select lines are drivenlow and stay low until the actual assertion event occurs.

Prototype:int bps_set_ss_polarity(

int nSSPolarity);

Parameters:nSSPolarity

The polarity of slave select line. The valid selections are “SS_POLARITY_ACTIVE_LOW_OC”(=0),“SS_POLARITY_ACTIVE_LOW”(=1), and “SS_POLARITY_ACTIVE_HIGH”(=2).


Example:// set Slave Select Polarity to Active High// all Slave Select lines driven low in non-active statenRet = bps_set_ss_polarity(SS_POLARITY_ACTIVE_HIGH);if (nRet != BPS_FT_OK)

goto exit;


goto exit;


nRet = bps_assert_ss(); // drives slave select line 2 high, and keeps it

if (nRet != BPS_FT_OK) // high until bsp_deassert_ss() is called

goto exit;




goto exit;


// read 8 bytes



goto exit;


nRet = bps_deassert_ss (); // de-asserts slave select line 2 by driving

if (nRet != BPS_FT_OK) // the line low

goto exit;


bps_set_voltage()

Description:Sets the operating voltage to a specified value.

Prototype:int bps_set_voltage(

int nMilliVolt);

Parameters:nMilliVolt

The voltage value to be used in mV unit. The valid selections are “1800”(1.8V), “2500”(2.5V), and“3300”(3.3V).





goto exit;




goto exit;




goto exit;




goto exit;


bps_spi_read()

Description:Reads specified number of data bits from a slave device. For the duration of the operation, the slaveselect line specified by a preceding “bps_set_ss()” function call will be asserted according to thepolarity specified by a preceding “bps_set_ss_polarity()” function call.

Prototype:int bps_spi_read(

unsigned char *pucDataIn,int nBitsToReceive

);

Parameters:pucDataIn

The pointer to a buffer to store the data bytes read.

nBitsToReceiveThe number of bits to be read.


Example:// set Slave Select Polarity to Active Low (Open-Collector)nRet = bps_set_ss_polarity(SS_POLARITY_ACTIVE_LOW_OC);if (nRet != BPS_FT_OK)

goto exit;


goto exit;


// read of 8 bytes of data



goto exit;


bps_spi_read_q()

Description:Queues a read transaction with a specified number of data bits to be read from a slave device. All queuedtransactions are executed when the “bps_execute_queue” function is called.

Prototype:int bps_spi_read_q(

int nBitsToReceive);

Parameters:nBitsToReceive

The number of bits to be read.




// START of QUEUE /////////////////////////////




goto exit;








goto exit;





goto exit;




goto exit;

// END of QUEUE ///////////////////////////////






goto exit;



for (i=0; i<8; i++)



bps_spi_write()

Description:Writes out specified number of data bits to a slave device. For the duration of the operation, the slaveselect line specified by a preceding “bps_set_ss()” function call will be asserted according to thepolarity specified by a preceding “bps_set_ss_polarity()” function call.

Prototype:int bps_spi_write(

unsigned char *pucDataOut,int nBitsToSend

);

Parameters:pucDataOutThe pointer to an array of data bytes to be written.

nBitsToSendThe number of bits to be written.



goto exit;


goto exit;

// send command to set the "Quad-Enable(QE)" bit on SR2

pucDataOut[0] = 0x01; // write register

pucDataOut[1] = 0x00; // SR1 value

pucDataOut[2] = 0x02; // SR2 value (w/ QE bit)



goto exit;


bps_spi_write_q()

Description:Queues a write transaction with a specified number of data bits to be written to a slave device. All queuedtransactions are executed when the “bps_execute_queue” function is called.

Prototype:int bps_spi_write_q(

unsigned char *pucDataOut,int nBitsToSend

);


nBitsToSendThe number of bits to be written.




// START of QUEUE /////////////////////////////




goto exit;









goto exit;




goto exit;




goto exit;

// END of QUEUE ///////////////////////////////






goto exit;



for (i=0; i<8; i++)



bps_spi_write_read()

Description:Writes out specified number of data bits to a slave device while reading back the same number of bitsfrom it. For the duration of the operation, the slave select line specified by a preceding “bps_set_ss()”function call will be asserted according to the polarity specified by a preceding“bps_set_ss_polarity()” function call.

Prototype:int bps_spi_write_read(

unsigned char *pucDataOut,unsigned char *pucDataIn,int nBitsToTransfer

);


pucDataInThe pointer to a buffer to store the data bytes read.

nBitsToSendThe number of bits to be transferred.



goto exit;


goto exit;

// read Status Register SR1pucDataOut[0] = 0x05;pucDataOut[1] = 0xff;nRet = bps_spi_write_read(pucDataOut, pucDataIn, 2*8);if (nRet != BPS_FT_OK)

goto exit;



bps_spi_write_read_q()

Description:Queues a write-and-read transaction with a specified number of data bits to be transferred to and from aslave device. All queued transactions are executed when the “bps_execute_queue” function is called.

Prototype:int bps_spi_write_read_q(

unsigned char *pucDataOut,int nBitsToTransfer

);

Parameters:pucDataOut

The pointer to an array of data bytes to be written.

nBitsToSendThe number of bits to be transferred.




// START of QUEUE /////////////////////////////




goto exit;

// queue command and address for reading 4 bytes from address 0x200000

pucDataOut[0] = 0x03; // read command




pucDataOut[4] = 0xFF; // byte 1 (shift out dummy bytes for reading)

pucDataOut[5] = 0xFF; // byte 2




nRet = bps_spi_write_read_q(pucDataOut, 8*8);


goto exit;




goto exit;

// END of QUEUE ///////////////////////////////






goto exit;

// display read values (first four are ignored)


for (i=4; i<8; i++)


BusPro-S Hardware Reference 131

Appendix ABusPro-S Hardware Reference

Hardware SpecificationsPhysical

MechanicalDimensions (box)

3.25 inches x 2.30 inches x 0.80 inches (+/- 0.10”)

Host InterfaceUSB Connector Standard Type B SocketPort Version 2.0

Power Requirements5.0V Provided by the host USB 2.0 port in compliance with its requirements.

Do not connect the hardware to the host PC through a bus (passive/un-powered) powered USB hub as it may not provide adequate operatingcurrent.

USB extender cables are not recommended.

Hardware DC and Switching CharacteristicsAbsolute Maximum Ratings1

Symbol Description UnitsVIN and VTS I/O input voltage or voltage applied to 3-state output,

relative to GND–0.60 to 4.10 V

TSTG Storage temperature (ambient) –65 to 150 °CTj Maximum junction temperature +125 °C

Recommended Operating Conditions2

Symbol Description Min Typ Max UnitsVIN Input voltage relative to GND –0.50 – 4.00 VTj Junction temperature operating range 0 – 85 °C

1 Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device.These are stress ratings only, and functional operation of the device at these or any other conditions beyond thoselisted under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extendedperiods of time might affect device reliability.2 All voltages are relative to ground.

132 BusPro-S Hardware Reference

Interface DC Input and Output LevelsVoltage VIL VIH VOL VOH IOL IOH

V V, Min V, Max V, Min V, Max V, Max V, Min mA mA3.3 –0.5 0.8 2.0 4.0 0.4 2.4 16 –162.5 –0.5 0.7 1.7 4.0 0.4 2.1 16 –161.8 –0.5 0.4 0.8 4.0 0.4 1.4 16 –16

System Switching Characteristics and PerformanceSymbol Description Min Typ Max Units

TCLK Clock Period 17 – 2000 nstco Data Out Propagation Time 0 – 5 nstsu Data In Setup Time 5 – – nsth Data In Hold Time 0 – – ns

Figure 63. Data Out Timing

Figure 64. Data In Timing


SPI Timing Diagrams

SPI Mode 0 (0, 0) CPOL = 0: Clock is low when idle CPHA = 0: Data is sampled on the leading (first) clock edge Data is captured on the clock’s rising edge (low → high transition) Data is propagated on the clock’s falling edge (high → low transition)

Figure 65. SPI Mode 0 Timing

SPI Mode 1 (0, 1) CPOL = 0: Clock is low when idle CPHA = 1: Data is sampled on the trailing (second) clock edge Data is captured on the clock’s falling edge (high → low transition) Data is propagated on the clock’s rising edge (low → high transition)


134 BusPro-S Hardware Reference

SPI Mode 2 (1, 0) CPOL = 1: Clock is high when idle CPHA = 0: Data is sampled on the leading (first) clock edge Data is captured on the clock’s falling edge (high → low transition) Data is propagated on the clock’s rising edge (low → high transition)


SPI Mode 3 (1, 1) CPOL = 1: Clock is high when idle CPHA = 1: Data is sampled on the trailing (second) clock edge Data is captured on the clock’s rising edge (low → high transition) Data is propagated on the clock’s falling edge (high → low transition)



“3-Wire” and “Microwire” Mode SPIThe output data bits will toggle on the rising edge of the Clock and are stable after the specified timedelay (TPD).

Figure 69. 3-Wire and Microwire Timing

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