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of thanks to all the reviewers who gave their time and provided helpful and constructive comments. Vish- wani Agrawal was a constant source of support and an invaluable re- source. Finally, a general round of accolades to the design for testability community, who have built a most interesting body of knowledge and who continually find novel and in- teresting ways to "pierce the barriers." i M. Ray Mercer is an assistant professor of electrical and com- puter engineering at the University of Texas at Austin, where he holds the Werner W. Dornber- ger Centennial Teach- ing Fellowship in En- gineering. His research interests are in design for testability, automatic test pat- tern generation, fault-tolerant comput- ing, and computer-aided design of VLSI devices. Before joining UT, Mercer was a member of the technical staff both at Bell Labs in Murray Hill, New Jersey, and at Hewlett-Packard Labs in Palo Alto, California. He received a BS from Texas Tech University in Lubbock, Texas, in 1968; an MS from Stanford University in Palo Alto, California, in 1971; and a PhD from the University of Texas at Austin in 1980. All degrees were in electrical engineering. Mercer is a 1986 National Science Foundation Presidential Young Investi- gator, D& I's Design for Testability Edi- tor, and the 1985-86 Chairman of the Central Texas Chapter of the Computer Society of the IEEE. A member of Tau Beta Pi, Eta Kappa Nu, and IEEE, he holds two patents in design for testability and the ITC 1982 Best Paper Award (with Vishwani Agrawal). Mercer's address is Dept. of Elec. and Comp. Engrg., ENS 143, The University of Texas, Austin, TX 78712. October 1986 Workshop on Design Principles for Experi- mental Distributed Systems, October 16-17, West Lafayette, Ind. Contact Samuel Conte, Dept. of CS, CS Bldg., Purdue Univ., West Lafayette, IN 47907; (317) 494-6005. SPIE Symp. on Advances in Intelligent Robotics Systems, October 26-31, Cambridge, Mass. Contact SPIE Tech. Prog. Committee, 1986 Cambridge Symp., PO Box 10, Belling- ham, WA 98227; (206) 676-3290. IEEE Galium Arsenide IC Symp., October 28-30, Grenelefe, Fla. Contact Robert Mar- kunas, Research Triangle Inst., PO Box 12194, Research Triangle Park, NC 27709; (919) 541-6153. November 1986 Automated Manufacturing Exhibit and Conf., November 3-6, Greenville, S.C. Contact AM- 86, PO Box 5616, Greenville, SC 29606; (803) 239-2967. Int'l Workshop on Symbolic Layout and Compaction, November 5-6, Chapel Hill, N.C. Contact Franc Brglez, MCNC/ BNR, PO Box 12889, 3021 Cornwallis Rd., Research Tri- angle Park, NC 27709; (919) 248-1800. ASSP Workshop on VLSI Signal Processing, November 5-7, Los Angeles. Contact S.Y. Kung, Image Processing Inst., Powell Hall, Univ. South. Calif., University Park, Los Angeles, CA 90007; (213) 743-6581. Applied Robotics and Design Automation Conference, November 10-12, St. Louis, Mo. Contact A.H. Soni, Sch. Mech. and Aero- space Engineering, Oklahoma State Univ., Stillwater, OK 74078; (405) 624-5900. Int'l Conf. on Computer-Aided Design, November 10-13, Santa Clara, Calif. Contact MP Assoc., 7366 Old Mill Tr., Suite 101, Boulder, CO 80301; (303) 530-4562. Autofact Conf. and Expo, November 11-14, Detroit. Contact SME, One SME Dr., PO Box 930, Dearborn, MI 48121; (313) 271-0023. Fifth VLSI Packaging Workshop, November 17-18, Paris. Contact Karel Kurzweil, Bull- Rue Jean Jaures, 78340 Les Clayes Sous Bois, France; (33) 13-462-7048. D& T CALENDAR December 1986 Electrical and Electronics Conf. and Expo., December 1-3, Toronto. Contact IEEE Cana- dian Regional Office, 7061 Yonge St., Thorn- hill, Ontario L3T 2A6, Canada; (416) 881-1930. Int'l Computer Symp., December 15, Tainan, Taiwan. Contact Ming T. Liu, Dept. of Com- puter and Information Science, Ohio State Univ., 2036 Neil Ave., Columbus, OH 43210; (614) 422-1837. January 1987 SCS Multiconference, January 14-16, San Diego. Contact Soc. for Computer Simula- tion, PO Box 17900, San Diego, CA 92117; (619) 277-3888. Second Topical Meeting on Picosecond Elec- tronics amd Optoelectronics, January 14-16, Incline Village, Nev. Contact Optical Soc. of Amer., Picosecond Elec. and Optoelec., 1816 Jefferson Pi. NW, Washington, DC 20036. Design Automation Workshop, January 20-23, Apache Junction, Ariz. Contact James Armstrong, Dept. of EE, Virginia Tech, Blacksburg, VA 24061; (703) 961-7078. Fourth Int'l Symp. on Modeling and Simu- lation Methodology: Intelligent Environ- ments, Goal-Directed Models, January 21-23, Tucson, Ariz. Contact Bernard Zeigler, ECE Dept., Univ. of Ariz., Tuscon, AZ 85712; (602) 621-2108. February 1987 3 Third Int'l Conf. on Data Engineering, February 2-6, Los Angeles. Contact IEEE Computer Society, 1730 Massachusetts Ave. NW, Washington, DC 20036; (202) 371-0101. Systems Design and Integration Conf., Feb- ruary 10-12, San Francisco. Contact Deanna Myerson, Elec. Conv. Mngmt., 8110 Airport Blvd., Los Angeles, CA 90045; (800) 421-6816 or (800) 262-4208 (in Calif.). > Third Conf. on Artificial Intelligence 05 Applications, February 22-28, Orlando, Fla. Contact Jan Aikins, Aion Corp., 101 Univ. Ave., Palo Alto, CA 94301; (415) 328-9595. IEEE Int'l Solid-State Circuits Conf£, Feb- ruary 25-27, New York. Contact IEEE, 345 E. 47th St., New York, NY 10017; (212) 705-7900. { Sixth IEEE Phoenix Conf. on Com- puters and Communications, February 25-27, Scottsdale, Ariz. Contact Forouzan Golshani, Dept. of CS, Ariz. State Univ., Tempe, AZ 85287; (602) 965-2855. Int'l Solid-State Circuits Conf., February 25-27, New York. Contact IEEE, 345 E. 47th St., New York, NY 10017; (212) 705-7900. Cont'd on page 71 IEEE DESIGN & TEST 8

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Page 1: CALENDAR - IEEE Computer Society · PDF fileCentralTexasChapter oftheComputer Society ofthe IEEE. ... (204) 2614528. IEEE Microelectronics Conf. and ... SanJose, CA95120, or Jack Goldberg,

of thanks to all the reviewers whogave their time and provided helpfuland constructive comments. Vish-wani Agrawal was a constant sourceof support and an invaluable re-source. Finally, a general round ofaccolades to the design for testabilitycommunity, who have built a mostinteresting body of knowledge andwho continually find novel and in-teresting ways to "pierce thebarriers." i

M. Ray Mercer is anassistant professor ofelectrical and com-puter engineering atthe University ofTexas at Austin,where he holds theWerner W. Dornber-ger Centennial Teach-ing Fellowship in En-

gineering. His research interests are indesign for testability, automatic test pat-tern generation, fault-tolerant comput-ing, and computer-aided design of VLSIdevices.

Before joining UT, Mercer was amember of the technical staff both atBell Labs in Murray Hill, New Jersey,and at Hewlett-Packard Labs in PaloAlto, California. He received a BS fromTexas Tech University in Lubbock,Texas, in 1968; an MS from StanfordUniversity in Palo Alto, California, in1971; and a PhD from the University ofTexas at Austin in 1980. All degrees werein electrical engineering.

Mercer is a 1986 National ScienceFoundation Presidential Young Investi-gator, D& I's Design for Testability Edi-tor, and the 1985-86 Chairman of theCentral Texas Chapter of the ComputerSociety of the IEEE. A member of TauBeta Pi, Eta Kappa Nu, and IEEE, heholds two patents in design for testabilityand the ITC 1982 Best Paper Award(with Vishwani Agrawal). Mercer'saddress is Dept. of Elec. and Comp.Engrg., ENS 143, The University ofTexas, Austin, TX 78712.

October 1986Workshop on Design Principles for Experi-mental Distributed Systems, October 16-17,West Lafayette, Ind. Contact Samuel Conte,Dept. of CS, CS Bldg., Purdue Univ., WestLafayette, IN 47907; (317) 494-6005.

SPIE Symp. on Advances in IntelligentRobotics Systems, October 26-31, Cambridge,Mass. Contact SPIE Tech. Prog. Committee,1986 Cambridge Symp., PO Box 10, Belling-ham, WA 98227; (206) 676-3290.

IEEE Galium Arsenide IC Symp., October28-30, Grenelefe, Fla. Contact Robert Mar-kunas, Research Triangle Inst., PO Box12194, Research Triangle Park, NC 27709;(919) 541-6153.

November 1986Automated Manufacturing Exhibit and Conf.,November 3-6, Greenville, S.C. Contact AM-86, PO Box 5616, Greenville, SC 29606; (803)239-2967.

Int'l Workshop on Symbolic Layout andCompaction, November 5-6, Chapel Hill, N.C.Contact Franc Brglez, MCNC/ BNR, PO Box12889, 3021 Cornwallis Rd., Research Tri-angle Park, NC 27709; (919) 248-1800.

ASSP Workshop on VLSI Signal Processing,November 5-7, Los Angeles. Contact S.Y.Kung, Image Processing Inst., Powell Hall,Univ. South. Calif., University Park, LosAngeles, CA 90007; (213) 743-6581.

Applied Robotics and Design AutomationConference, November 10-12, St. Louis, Mo.Contact A.H. Soni, Sch. Mech. and Aero-space Engineering, Oklahoma State Univ.,Stillwater, OK 74078; (405) 624-5900.

Int'l Conf. on Computer-Aided Design,November 10-13, Santa Clara, Calif.

Contact MP Assoc., 7366 Old Mill Tr., Suite101, Boulder, CO 80301; (303) 530-4562.Autofact Conf. and Expo, November 11-14,Detroit. Contact SME, One SME Dr., POBox 930, Dearborn, MI 48121; (313) 271-0023.Fifth VLSI Packaging Workshop, November17-18, Paris. Contact Karel Kurzweil, Bull-Rue Jean Jaures, 78340 Les Clayes Sous Bois,France; (33) 13-462-7048.

D&T

CALENDARDecember 1986Electrical and Electronics Conf. and Expo.,December 1-3, Toronto. Contact IEEE Cana-dian Regional Office, 7061 Yonge St., Thorn-hill, Ontario L3T 2A6, Canada; (416)881-1930.

Int'l Computer Symp., December 15, Tainan,Taiwan. Contact Ming T. Liu, Dept. of Com-puter and Information Science, Ohio StateUniv., 2036 Neil Ave., Columbus, OH 43210;(614) 422-1837.

January 1987SCS Multiconference, January 14-16, SanDiego. Contact Soc. for Computer Simula-tion, PO Box 17900, San Diego, CA 92117;(619) 277-3888.

Second Topical Meeting on Picosecond Elec-tronics amd Optoelectronics, January 14-16,Incline Village, Nev. Contact Optical Soc. ofAmer., Picosecond Elec. and Optoelec., 1816Jefferson Pi. NW, Washington, DC 20036.

Design Automation Workshop, January20-23, Apache Junction, Ariz. Contact

James Armstrong, Dept. of EE, Virginia Tech,Blacksburg, VA 24061; (703) 961-7078.

Fourth Int'l Symp. on Modeling and Simu-lation Methodology: Intelligent Environ-ments, Goal-Directed Models, January 21-23,Tucson, Ariz. Contact Bernard Zeigler, ECEDept., Univ. of Ariz., Tuscon, AZ 85712;(602) 621-2108.

February 19873 Third Int'l Conf. on Data Engineering,

February 2-6, Los Angeles. ContactIEEE Computer Society, 1730 MassachusettsAve. NW, Washington, DC 20036; (202)371-0101.

Systems Design and Integration Conf., Feb-ruary 10-12, San Francisco. Contact DeannaMyerson, Elec. Conv. Mngmt., 8110 AirportBlvd., Los Angeles, CA 90045; (800) 421-6816or (800) 262-4208 (in Calif.).

> Third Conf. on Artificial Intelligence05 Applications, February 22-28, Orlando,Fla. Contact Jan Aikins, Aion Corp., 101Univ. Ave., Palo Alto, CA 94301; (415)328-9595.

IEEE Int'l Solid-State Circuits Conf£, Feb-ruary 25-27, New York. Contact IEEE, 345 E.47th St., New York, NY 10017; (212) 705-7900.

{ Sixth IEEE Phoenix Conf. on Com-puters and Communications, February

25-27, Scottsdale, Ariz. Contact ForouzanGolshani, Dept. of CS, Ariz. State Univ.,Tempe, AZ 85287; (602) 965-2855.

Int'l Solid-State Circuits Conf., February25-27, New York. Contact IEEE, 345 E. 47thSt., New York, NY 10017; (212) 705-7900.

Cont'd on page 71

IEEE DESIGN & TEST8

Page 2: CALENDAR - IEEE Computer Society · PDF fileCentralTexasChapter oftheComputer Society ofthe IEEE. ... (204) 2614528. IEEE Microelectronics Conf. and ... SanJose, CA95120, or Jack Goldberg,

Continued from page 8

March 1987+ VLSI Test Workshop, March 24-25,

Atlantic City, N.J. Contact WesleyRadcliff, IBM, E. Fishkill, Bldg. 321-SEI,Dept. 277, Hopewell Junction, NY 12533;(914) 894-4346.

Second Int'l Conf. on Robotics and Factoriesof the Future, March 24-27, Salt Lake City,Utah. Contact R. Radharamanan, Dept. ofMechanical and Indust. Engnrg., College ofEngnrg., Univ. of Utah, Salt Lake City, UT84112; (801) 581-2241.

IEEE Int'l Conf. on Robotics and Automa-tion, March 30-April 2, Raleigh, N.C. ContactHarry Hayman, 738 Whitaker Terr., SilverSpring, MD 20901; (301) 434-1990.

Second Int'l Conf. on Supercomputing, May4-7, 1987, San Francisco. Submit four copiesof manuscripts for receipt by November 1 toLana P. Kartashev and Steven I. Kartashev,3000 34th St. S., Suite B-309, St. Petersburg,FL 33711.

q Design Automation Workshop, January21-23, 1987, Gold Canyon Ranch,

Apache Junction, Ariz. Send short summariesof your interests and activities as they pertainto the role of artificial intelligence in designautomation. Submit information for receiptby November 1. If you have suggestions forsession themes or would like to organize asession, contact Gary Leive, GE Calma, POBox 13049, Research Triangle Park, NC27709; (919) 549-3613.

A Design Automation Conf., June 28-July 1, 1987, Miami Beach, Fla. Submit

papers for receipt by November 14 to DonaldThomas, MP Assoc., 7366 Old Mill Tr., Suite101, Boulder CO 80301; (303) 5304333.Topicproposals for panels and tutorials are dueDecember 12.

4 IEEE Transactions on Software Engi-neering. Papers are solicited for a special

issue with a focus on software tools andtechniques relating to the development, analy-sis, maintenance, implementation, and testingof computer communication systems. Submitsix copies by November 15, to either SudhirAggarwal, Room 2C-180, AT&T Bell Labs,600 Mountain Ave., Murray Hill, NJ 07974;(201) 582-6095, or B. Gopinath, MRE 2K-306, Bell Comm. Research, 435 South St.,Morristown, NJ 07960; (201) 829-4252.

Custom Integrated Circuits Conf., May 4-7,1987, Portland, Oreg. Submit 60 copies of a250-word summary, including a 35-word ab-stract that describes the original, unpublishedwork and the author's name, affiliation, com-plete address, and telephone number for re-ceipt by November 20 to Roberta Kaspar,CICC 87, 20 Ledgewood Dr., Rochester, NY

April 1987, Fourth Int'l Workshop on Software Spe-

cification and Design, April 3-4, Mon-terey, Calif. Contact M.T. Harandi, Dept. ofCS, Univ. of Ill. at Champaign-Urbana, 1304W. Springfield, Urbana, IL 61801; (217)333-4666.

Second Tech. Workshop: New Directions forIC Testing, April 8-10, Winnipeg, Canada.Contact D.M. Miller, Dept. of CS, Univ. ofManitoba, Winnipeg, MB R3T 2N2; (204)2614528.

IEEE Microelectronics Conf. and Exhibition(Miconex 87), April 21-23, Winnipeg, Canada.Contact E. Gonzalez, Infotech Manitoba,1970 Ness Ave., Winnipeg, Canada R3J 0Y9;(204) 896-2222.

CA

14615; (716) 865-7164. Topics of interest in-clude gate arrays, standard cell, and fullcustom ICs; physical design techniques; circuitdesign and simulation; DSP applications;analog circuit techniques; fabrication tech-nologies; custom interfaces and packaging;and testing and reliability.

a; 17th Int'l Symposium on Fault-Tolerant7 Computing, June 17-19, 1987, Portland,

Oreg. Submit six copies of papers (5000 wordsmax.) for receipt by November 21 to FlaviuCristian, IBM Research, K5-yOl, 650 HarryRd., San Jose, CA 95120, or Jack Goldberg,SRI Int'l, 333 Ravenswood Ave., Menlo Park,CA 94025. Papers should clearly describe theproblems to be dealt with. Front page shouldinclude word count, subject area, contactaddress, phone number, and net address (ifavailable).

Built-in Self-Test Workshop, March>7 11-13, 1987, Charleston, S.C. Submiteight copies of a 400-word presentation ab-stract for receipt by December 8 to RichardSedmak, Self-Test Services, 6 LindenwoldTerr., Ambler, PA 19002; (215) 628-9700.Topics include relating BIST to on-line reli-ability, BIST design issues and implementa-tions, and evaluating BIST capabilities.

Expert Systems and Their Applications, May13-15, 1987, Avignon, France. Submit fivecopies of papers (20 pages max.) for receipt byDecember 15 to Jean-Claude Rault, Agencede l'Informatique, Tour Fiat Cedex 16, 92084Paris-La Defense, France; (33) 14-796-4314.Applications and real-life implementations arestressed.

10th Workshop on Design for Testability,April 21-23, 1987, Boulder, Co. Submit 10copies of a 300- to 500-word abstract forreceipt by January 13 to T.W. Williams, IBM,PO Box 1900, 67A/021, 6300 Diagonal Hwy.,Boulder, CO 80302. Topics stress state of theart in self-testing, scan techniques, and CADtools for DFT, as well as future directions.

D&TROUNDTABLE

Continued from page 67

Agrawal: I hope that as you are trying tomake correct circuits, you will also maketestable ones, which means you will includedesign for testability in your synthesis.

Karatsu: I think redundancy in a com-binatorial circuit depends mainly on thevariety of behavioral level input and thelogical primitives that you can use in thesynthesis system. We can eliminate redun-dancies through optimization. We can addscan-in, scan-out features in each registerto make it testable.

D&T: Imagine for a moment that you arethe Ann Landers of logic design. Whatadvice would you give designers? Whatshould they watch out for?

Karatsu: Over 20 years ago, the automaticcamera with an automatic exposing systemwas introduced. At the time many profes-sional cameramen said it would be of nouse because photography required experi-ence that cannot be built into a camera.Nowadays anyone can use a camera withautomated features because we learned howto use the technology. I think logic synthe-sis is similar. Today's designers have noexperience with logic synthesis features.When they start to use the synthesis pro-grams, they will develop their own tech-niques. After all, they are the ones who willbe doing the designs. They will learn howto make the best use of logic synthesis.

Brayton: My advice is the techniques arehere, they work, and if you see your CADsupport people not moving toward a logicsynthesis system, get on them and say,"This is the way of the future. Let's get withit."

Gregory: My advice is along the same lines.The Design Automation Conference clearlyshows that logic synthesis is here. We cansynthesize circuits from Boolean equationsthat are as small and as fast as thoseoptimized by hand.

Joyner: I think designers have to beginusing a synthesis tool. They'll see its bene-fits, that it allows them to concentrate ondoing the initial design and supplies themwith other needed data, such as timinginformation. But they first have to use thetool.

Pursuing the analogy of the automaticcamera, the camera's evolving features havemade it appropriate to a wider range ofapplications. This will also happen withlogic synthesis, although manual designwill continue to play a role. Logic designwill not meet 100% of all design needs, butit will address an increasing proportion ofthem.

D&T: I thank all of you for your partici-pation. I certainly learned from this dis-cussion, and I think our readers will also.

October 1986 71