can tutorial.pdf

5/27/2018 Can Tutorial.pdf

1/119

Atmel Microcontrollers

CAN Tutorial


2/11916/03/2004CAN Tutorial 2

CAN TutorialAgenda

Introduction or: What is CAN?

Why CAN?

CAN Protocol

CAN higher Layer ProtocolsCAN Applications

Atmel CAN Microcontrollers Family

CAN Registers Details

Conclusion


3/11916/03/2004CAN Tutorial 3

CAN Tutorial

*

Introduction

The CAN is an ISO standard (ISO 11898) for serialcommunication

The protocol was developed 1980 by BOSCH forautomotive applications

Today CAN has gained widespread use:

Industrial Automation

Automotive, etc.

The CAN standard includes: Physical layer

Data-link layer

Some message types

Arbitration rules for bus accessMethods for fault detection and fault confinement

Introduction


4/11916/03/2004CAN Tutorial 4

CAN TutorialWhy CAN?

Mature Standard CAN protocol more than 14 years

Numerous CAN products and tools on the market

Hardware implementation of the protocol

Combination of error handling and fault confinement with hightransmission speed

Simple Transmission Medium Twisted pair of wires is the standard, but also just one wire will

work

Other links works, too: Opto - or radio links

Excellent Error Handling CRC error detection mechanism

Fault Confinement Built-in feature to prevent faulty node to block system

Most used protocol in industrial and automotive world

Best Performance / Price ratio

Why CAN?


5/119

16/03/2004CAN Tutorial 5

CAN TutorialCAN Protocol

What is CAN?

ISO-OSI Reference Model

CAN Bus Logic

Typical CAN NodeCAN Bus Access and

Arbitration

CAN Bit Coding & Bit

StuffingCAN Bus Synchronization

CAN Bit Construction

Relation between Baud Rateand Bus Length

Frame Formats (1)

Frame Formats (2)

Frame Formats (3)

Frame Formats (4)Fault Confinement (1)

Fault Confinement (2)

Undetected Errors

CAN Protocol


6/119


CAN TutorialWhat is CAN?

Controller Area Network Invented by Robert Bosch GmbH

Asynchronous Serial Bus

Absence of node addressing

Message identifier specifies contents and priority

Lowest message identifier has highest priority

Non-destructive arbitration system by CSMA with collisiondetection

Multi-master / Broadcasting concept

Sophisticated error detection & handling system

Industrial and Automotive Applications

CAN Protocol


7/119


CAN TutorialISO-OSI* Reference Model

1. Physical Layer

2. Data Link Layer

3. Network Layer

4. Transport Layer

5. Session Layer

6. Presentation Layer

*) OSI - Open System Interconnection

7. Application Layer HLPs: CANopen, DeviceNet, OSEK/V**

Partially implementedby Higher LayerProtocols (HLP)

CAN Protocol

CAN Protocol


8/119


CAN TutorialCAN Bus Logic

Two logic states on

the CAN bus

1 = recessive

0 = dominant

Node

A

Node

B

Node

C BUS

D D D D

D D R D

D R D D

D R R DR D D D

R D R D

R R D D

R R R R

Wired-AND function:

as soon as one node transmit

a dominant bit (zero)

the bus is in the dominant state

Only if all nodes transmit

recessive bits (ones)

the Bus is in the recessive state

CAN Protocol


9/119


CAN TutorialTypical CAN Node

ControllerCAN

Controller

TxD

RxD

T89C51CC01/02

CAN_H

Diff.CANLineDriver

I/O

CAN_L

CAN Bus(terminated by 120 Ohm on each side)

CAN Protocol


10/119


CAN Tutorial

TXd

CANh

CANl

RXd

CAN

Controller

CAN

Transceiver

CANh

CANl

TXd

RXd

Dominant

Dominant

Recessive

CAN Bus (up to 40m @1Mb/s, up to 1km @50Kb/s)

Device#1

Device#2

Device#3

Device#n

Stub

CAN Protocol


11/119


CAN Tutorial

CAN Bus Access and Arbitration:CSMA/CD and AMP *)

Node 1: TxD

CAN Bus

Node 2: TxD

Node 3: TxD

Start of Frame

Arbitration Field

Node 2loses Arbitration

Node 3 losesArbitration

*)Carrier Sense Multiple Access/Collision Detection and Arbitration by Message Priority

CAN Protocol


12/119


CAN Tutorial

DataStream

CAN BusBit Stream

Number of consecutivebits with same polarity

1 1 1 2 3 4 5 1 1 2 3 4 5 1 2 3 4 5 1 1 1 2 3 1 2 3 4

1 1 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 1 2 3 1 2 3 4

$ = Staff Bits

$ $ $

CAN Bit Coding & Bit Staffing

Bit Coding : NRZ (Non-Return-To-Zero code) does not ensureenough edges for synchronization

Stuff Bits are inserted after 5 consecutive bits of the same level

Stuff Bits have the inverse level of the previous bit.

No deterministic encoding, frame length depends ontransmitted data

CAN Protocol


13/119


CAN Tutorial

Re-

synch

Re-

synch

Re-

synch

SOF

ID10 ID9 ID7ID8 ID6 ID5

All nodes synchronize on leading edge

of SOF bit (Hard Synchronization)

Intermission / Idle

CAN Bus Synchronization

Hard synchronization at Start Of Frame bit

Re-Synchronization on each Recessive to Dominant bit

CAN Protocol


14/119


CAN TutorialCAN Bit Construction

Length of one time quanta can be set to multiple of Controllerclock

1 Time quantum = 1 period of CAN Controller base clock

Number of time quanta in Propag and Phase segments is

programmable

1 Bit Time8 to 25 Time Quanta

NRZ Signal

Sample Point

SyncSeg

PropagSeg

PhaseSeg 1

PhaseSeg 2

1 tq 1 to 8 tq1 to 8 tq 1 to 8 tq

1 to16 tq

Phases

R

D

1 to 8 tq

CAN Protocol


15/119


CAN TutorialRelation between Baud Rate and Bus Length

0 1O 40 100 200 1000 10000

1000500200100

5020105

CAN Bus Length [m]

Bit Rate

[kbps]

Bit Rate

[kbps]

Example based on CAN Bus Lines by twisted pair

CAN Protocol


16/119


CAN Tutorial

SOF

ID DLC DATA

1 11 1

RTR

IDE

RB0

1 1 4

ARBITRATION CTRL

SOF

ID[28..18] DLC DATA

1 11 1

S

RR

IDE

RB0

1 1 4

ARBITRATION CTRL

1 118

ID[17..0]R

TR

RB1

CAN - V2.0A

CAN - V2.0B

Duration in Data Bit


SO

F

del

del

ARBITRATION CTRL DATA CRC EOF IFS

1 1 1 112- 32 6 064 15 7

Bit Stuffing

3Duration in Data BitBus Frame ACK

SOF Start of FrameCRC Cyclic Redundancy Code

del DelimiterACK Acknowledge

EOF End of FrameIFS Inter Frame Spacing

ID IdentifierIDE Identifier Extension

RTR Remote Transmission RequestSRR Substitute Remote Request

RB0/1 Reserved bitsDLC Data Length Code

Frame Formats (1)

CAN Protocol


17/119


CAN Tutorial

SOF Start of FrameCRC Cyclic Redundancy Code

del DelimiterACK Acknowledge

EOF End of FrameIFS Inter Frame Spacing

ID IdentifierIDE Identifier Extension

RTR Remote Transmission RequestSRR Substitute Remote Request

RB0/1 Reserved bitsDLC Data Length Code

CAN Protocol

CAN T t i l


18/119


CAN Tutorial

SOF

del

del

ARBIT.* CTRL DATA CRC EOF IFS

1 1 1 112- 32 6 064 15 7

Bit Stuffing

3Duration in Data Bit

Data Frame A

CK

(*) RTR = dominant

S

OF

del

del

ARBIT.* CTRL CRC EOF IFS

1 1 1 112- 32 6 15 7

Bit Stuffing

3Duration in Data BitRemote Frame AC

K

(*) RTR = recessive

Frame Formats (2)

CAN Protocol

CAN T t i l


19/119


CAN Tutorial

Error Flag

Error DelimiterData Frame

6 6 8

Superposition ofError Flag


Error Frame

IFS orOverload

Frame

Error Frame

Frame Formats (3)

If any of the CAN nodes detects a violation of the frameformat

or a stuff error, it immediately sends an Error Frame

CAN Protocol

CAN T t i l


20/119


CAN Tutorial

Overload Flag

Overload Delimiter

EOF or Error delimiteror Overload delimiter

6 6 8

Superposition ofOverload Flag


Overload Frame

IFS orOverload

Frame

Overload Frame

Frame Formats (4)

If any of the CAN nodes suffers from a data over flow,it might send

up two consecutive Overload Frames to delay thenetwork

CAN Protocol

CAN Tutorial


21/119


CAN Tutorial

Erroractive

Errorpassive

Bus offTEC256

TEC128

TEC


22/119


CAN TutorialFault Confinement (2)

Cyclic Redundancy Check (CRC) The CRC is calculated over the non-stuffed bit stream

starting with the SOF and ending with the Data field bythe transmitting node

The CRC is calculated again of the destuffed bit streamby the receiving node

A comparison of the received CRC and the calculatedCRC is made by the receiver

In case of mismatch the erroneous data frame isdiscarded . Instead of sending an acknowledge signal anerror frame is sent.

CAN Protocol

CAN Tutorial


23/119


CAN TutorialUndetected Errors

Error statistics depend on the entire environment Total number of nodes

Physical layout

EMI disturbance

Automotive example

2000 h/y

500 kbps

25% bus load

One undetected error every 1000 years

CAN Protocol

CAN Tutorial


24/119


CAN Tutorial

Higher level protocols

CAN Higher Layer Protocols (HLPs)

Why HLPs

CANOpen

DeviceNet

CAN KingdomOSEK/VDX

SDS

J1939

CAN Tutorial


25/119


CAN TutorialWhy HLPs

The CAN protocol defines only the physical and a lowdata link layer!

The HLP defines:

Start-up behavior

Definition of message identifiers for the different nodes

Flow control

transportation of messages > 8bytes

Definition of contents of Data Frames

Status reporting in the system


CAN Tutorial


26/119


CAN TutorialCANopen

Features CANopen a subset from CAL (CAN Application Layer)

developed by CiA!

Auto configuration the network

Easy access to all device parameters Device synchronization

Cyclic and event-driven data transfer

Synchronous reading or setting of inputs, outputs orparameters

Applications Machine automatisation

Advantages

Accommodating the integration of very small sensors andactuators

Open and vendor independent

Support s inter-operability of different devices

High speed real-time capability


CAN Tutorial


27/119


CAN Tutorial


DeviceNet

Features Created by Allen-Bradley (Rockwell Automatisation

nowadays), now presented by the users group ODVA(Open DeviceNet Vendor Association)

Power and signal on the same network cable Bus addressing by: Peer-to-Peer with multi-cast & Multi-

Master & Master-Slave

Supports only standard CAN

Applications Communications link for industrial automatisation: devices

like limit switches, photo-electric sensors, valve manifolds,motor starters, process sensors, bar code readers,variable

frequency drives, panels...

Advantages Low cost communication link and vendor independent

Removal and replacement of devices from the networkunder power

CAN Tutorial


28/119


CAN Tutorial


CAN Kingdom

CAN Kingdom is more then a HLP: A Meta protocol Introduced by KVASER, Sweden

A King (system designer) takes the full responsibility ofthe system

The King is represented by the Capital (supervising node) World wide product identification standard EAN/UPC is

used for

Applications

Machine control, e.g. industrial robots, weaving machines,mobile hydraulics, power switchgears, wide range ofmilitary applications

Advantages

Designed for safety critical applications Real time performance

Scalability

Integration of DeviceNet & SDC modules in CAN Kingdom

possible

CAN Tutorial


29/119


CAN Tutorial


OSEK/VDX

Initialized by: BMW, Bosch, DaimlerChrysler, Opel, Siemens,VW & IIIT of

the University of Karlsruhe / PSA and Renault

OSEK/VDX includes: Communication (Data exchange within and between

Control Units)

Network Management (Configuration determination andmonitoring)

Operating System (Real-time executive for ECU software)

Motivation: High, recurring expenses in the development and variant

management of non-application related aspects of controlunit software

Compatibility of control units made by differentmanufactures due to different interfaces

Goal: Portability and re-usability of the application software

Advantages: Clear saving in costs and development time

CAN Tutorial


30/119



SAE J1939

Features Developed by Society of Automotive Engineers heavy

trucks and bus division (SAE)

Use of the 29 identifiers

Support of real-time close loop control

Applications

Light to heavy trucks

Agriculture equipment e.g. tractors, harvester etc

Engines for public work

CAN Tutorial


31/119



Smart Distributed System ( SDS)

Features

Created by Honeywell

Close to DeviveNet, CAL & CANopen

CAN Tutorial


32/119


CAN: a Large Field of Applications

CAN applications

Building AutomatisationDomestic & Food distribution appliances

Automotive & Transportation

Robotic

Production Automatisation

Medical

Agriculture

CAN Tutorial


33/119


CAN applications

Building Automatisation

Heating Control Air Conditioning (AC)

Security (fire, burglar)

Access Control

Light Control

CAN Tutorial


34/119


CAN applications

Domestic & Food distribution appliances

Washing machines Dishes cleaner

Self-service bottle distributors connected to internet

CAN Tutorial


35/119


CAN applications

Automotive & Transportation

Automotive Dash board electronic

Comfort electronic

Ship equipment

Train equipment

Lifts

Busses

Trucks

Storage transportation systems

Equipment for handicapped people

Service & Analysis systems

CAN Tutorial


36/119


CAN applications

Robotic

Tool machines Transport systems

Assembly machines

Packaging machines

Knitting machines

Plastic injection machines

etc...

CAN Tutorial


37/119


CAN applications

Production Automatisation & Robotic

Control and link of production machines Production control

Tool machines

Transport systems

Assembly machines

Packaging machines

Knitting machines

Plastic injection machines

etc...

CAN TutorialA i lt


38/119


Agriculture

Harvester machines Seeding/Sowing machines

Tractor control

Control of live-stock breeding equipment

CAN applications

CAN TutorialCAN th lti t Fl h b d CAN


39/119


CAN family

CANary: the ultimate Flash-based CANmicrocontrollers

Atmel CAN Bus ControllerMain Features

Mailbox concept (1)

Mailbox concept (2)Channel Data Buffer (1)

Channel Data Buffer (2)

Autobaud & Listening Mode

Auto Reply Mode

Time Triggered Mode

Error Analysis Functions

CAN Self Test

Atmel CAN Controller

ConclusionCAN processor coresAdvanced C51 5 MIPS Core

Advanced AVR 16MIPS Core

T89C51CC01

Block Diagram

Features (1) Features (2)

Advantages

T89C51CC02

Block Diagram

Features (1) Features (2)

Advantages

AT89C51CC03

AT90CAN128

Block Diagram

Competitive advantages

CAN family summary

CAN TutorialCAN C t ll M i F t


40/119


CAN Controller: Main Features

Full validation by iVS/C&S Wolfenbttel/Germany CAN 2.0A and 2.0B programmable / Channel

1 MHz CAN Bus Data Rate at 8 MHz Crystal

15 Channel with 20 Bytes of Control & Data / Channel

120 Bytes Reception Buffer

Support of Time Triggered Communication (TTC)

Auto Baud, Listening & Automatic Reply mode

Mail Box addressing via indirect addressing

All Channel features programmable on-the-fly

Interrupt accelerator (available on AVR based controller)

CAN family

CAN TutorialCAN Controller: Mailbox concept (1)


41/119


CAN Controller: Mailbox concept (1)

TimStmp (2)

ID Masks (4)

ID Tag (4)

Message Data (1)

Channel Control & DLC

Channel Nr. &

Data Offset

Channel Status

Ch. 14 - TimStmp (2)

Ch. 0 - TimStmp (2)

Ch. 14 - ID Masks (4)

Ch. 0 - ID Masks (4)

Ch. 0 - Data Buffer (8)

Ch. 0 - ID Tag (4)

Ch. 14 - ID Tag (4)


Ch. 14 - Control & DLC

Ch. 0 - Status

Ch. 14 - Status

Ch. 0 - Control & DLC

SFRs CAN Controller Registers

15Chann

els

(*) Number of Bytes

CAN family

CAN TutorialCAN Controller: Mailbox concept (2)


42/119


Ch. 0 to 14 - TimStmp (2)

Ch. 0 to14 - ID Masks (4)

Ch. 0 to 14 - ID Tag (4)

Ch. 0 to 14 - Data Buffer (8)

Ch. 0 to 14 - Control & DLC

Ch. 0 to 14 - Status

CAN Controller: Mailbox concept (2)

Channel features 32 bit of ID Mask Register

32 bit of ID Tag Register

64 bit of cyclic Data BufferRegister

16 bit of Status, Control &DLC

16 bit of Time StampRegister

CAN family

CAN TutorialCAN Controller: Channel Data Buffer (1)


43/119


Ch. 0 - Data Buffer (8)Ch. 1 - Data Buffer (8)














CAN family

CAN Controller: Channel Data Buffer (1)

Main Features 15 Channels of 8 Byte (120 Bytes) Data Buffer

All Channels programmable as:

Receiver

TransmitterReceiver Buffer

Highest Priority for lowest Channel Nr.

Interrupts at:

Correct Reception of MessageCorrect Transmission

Reception Buffer full

CAN TutorialCAN Controller: Channel Data Buffer (2)


44/119


Reception Buffer

Receiver

Transmitter

Example:







Ch. 6 - Data Buffer (8)Ch. 7 - Data Buffer (8)








CAN family

CAN Controller: Channel Data Buffer (2)

Reception Buffer Features: Several Channels with same ID Mask (no important

message will be missed)

Lowest Channel Number served first

Each Channel can participate (no consecutive sequenceneeded)

CAN TutorialCAN Controller: Autoband & listening mode


45/119


CAN family

CAN Controller: Autoband & listening mode

CAN monitoring without influence to the bus lines No acknowledge by error frames

Error counters are frozen

Only reception possible

No transmission possible

Full error detection possible

Bit-rate adaption support

Hot-plugging of bus nodes to running networks withunknown bit-rate

CAN TutorialCAN Controller: Automatic Reply Mode


46/119


CANfamily

CAN Controller: Automatic Reply Mode

Automatic Message Transfer Automatic message transfer after

reception of Remote Frame

Deferred message transfer after

reception of Remote Frame

Automatic Retransmission of Data Frames under

Software control

CAN TutorialCAN Controller: Time Triggered Communication


47/119


CAN family

CAN Controller: Time Triggered Communication(TTC)

Support of Real Time Applications

Single shot transmission

16 bit CAN timer with IT at overflow

16 bit Time Stamp Register / Channel

Trigger for Time Stamp Register at

End of Frame (EOF) or Start of Frame (SOF)

CAN TutorialCAN Controller: Error Analysis Functions


48/119


CAN family

CAN Controller: Error Analysis Functions

Channel Status Register (Error Capture Register) Associated to each Channel

Type of CAN bus errors: DLC warning, Transmit OK,Receive OK, Bit error (on in transmit), Stuff error, CRC

error, Form error, Acknowledgement error Error Interrupts

Bus errors, Error passive and Error warning

Readable Error Counters

CAN TutorialCAN Controller: CAN Self Test


49/119

16/03/2004CAN Tutorial 49CAN family

CAN Controller: CAN Self Test

Analysis of own transmitted Message Support of local self test

Support of global self test

Software comparison of Tx & Rx buffer

Monitoring of CAN bus traffic

CAN TutorialCAN Controller: The Atmel CANcontroller


50/119


Status / Control

Registers

Task /Mask 0

MessageObject 0

MessageObject 1

Message

Object 14

HostInter-face

CANProtocol

Controller

CAN BusInterface

HostCPU

FIFO 0

FIFO 1

FIFO 14

Task /Mask 1

Task /

Mask 14

CAN family

15 Message objects (Channels), each with filtering,masking and FIFO buffer

All Channel features programmable on-the-fly

CAN TutorialCAN Controller: Conclusion


51/119

16/03/2004CAN Tutorial 51CAN family

1 MHz/sec CAN Bus Data Rate at 8 MHz Crystal Freq. CAN 2.0A and 2.0B programmable / Channel

15 Channel with 20 Bytes of Control & Data / Channel

120 Bytes Reception Buffer

Support of Time Triggered Communication (TTC)

Auto Baud, Listening & Automatic Reply mode

Mail Box addressing via SFRs

All Channel features programmable on-the-fly Interrupt process accelerator with AVR based controller

CAN TutorialCAN Microcontrollers: Advantages (1)


52/119


g ( )

5MIPS (30MHz X2, 60MHz X1)

Fully static operation

Asynchronous port reset

Second data pointer

Inhibit ALE

X2 CORE

4 level priority interruptsystem

Enhanced UART

Programmable Timer 2 clockout

Power Consumptionreduction

Wake up with externalinterrupts from Power Down

Advanced C51 Core

CAN family

CAN TutorialCAN Microcontrollers: Advantages (2)


53/119


g ( )

16MIPS core at 16MHz

Hardware Multiplier

IEEE 1149.1 Compliant JTAGInterface

Instruction set optimized forC programming

Self-Programming Memory

Remote Programming orField Upgrade

Read While Write

Lock Bit/Brownout

Protection Variable Boot Block Size: 1

to 8KB

Highest Code Density in Cand Assembly

Highest System Level

Integration Complete Set of

Development Tools

Advanced AVR Core

CAN family

CAN TutorialCAN Microcontrollers: T89C51CC01 Block Diagram


54/119


PCA5 Channels

Timers 0 / 1 / 2

Interrupt Unit

CAN

Controller15 Channels

C51 X2Core

Prog. WatchdogTimer

Boot FlashMemory

2K x 8

EEPROM

2K x 8

EmulationSupport Logic

Port 0

Port 1

Port 2

Port 3

8 I / O

8 I / O

8 I / O

8 I / O

User FlashMemory

32k x 8

ADC10bit / 8 Channels

RAM1.2K x 8

Po

rt4

Packages: PLCC44, TQFP44, CA-BGA64

CAN family

CAN TutorialCAN Microcontrollers: T89C51CC01 Features


55/119


C52 Core compatible Up to 60 MHz operation (X2 mode)

X2 Core

Double Data Pointer

32 Kb FLASH ISP, 2 Kb FLASH Boot Loader

2Kb EEPROM

1.25 k RAM (256b scratchpad RAM + 1kb XRAM)

3-16 bit Timers (T0,T1,T2) Enhanced UART

CAN Controller with 15 channels (2.0A and 2.0B)

CAN family

CAN TutorialCANary Microcontrollers: T89C51CC01 Features


56/119


10 bits A/D with 8 Channels

5 I/O Ports

Programmable Counter Array

5 channels, 5 Modes:

PWM, Capture, Timer, Counter, Watchdog(Channel 4 only)

1Mbit /sec CAN at 8MHz Crystal Frequency (X2mode)

Temperature: -40 to 85C Voltage: 3 to 5 Volt +/-10%

Packages: PLCC44, TQFP44, CA-BGA64

CAN family

CAN TutorialCAN Microcontrollers: T89C51CC01 Advantages


57/119


T89C51CC01 is the first CAN Controller of a newgeneration for smart embedded applications whichoffers Flash and ISP Technology for Customer Code &

Application Parameter up-date in a 44-pin package . For security reasons the 2kB Boot Memory is physically

separated from 32kB Customer memory.

Further for security reasons the Boot memory can be

written only in Parallel Mode outside the application. 10b ADC & 5 channel PCA allow T89C51CC01 single-chip

applications in most cases

Included in the delivery is a wide range of ApplicationProgramming interfaces (API) concerning ISP, EEPROM,Security, Customer & Boot Flash

CAN family

CAN TutorialCAN Microcontrollers: T89C51CC02 Block Diagram


58/119


PCA2 Channels

Timers 0 / 1 / 2

Interrupt Unit

CANController

4 Channels

C51 X2Core

Prog. Watchdog

Timer

Boot FlashMemory

2K x 8

EEPROM

2K x 8

EmulationSupport Logic

Port 1

Port 3

2 I / O

8 I / O

User FlashMemory

16k x 8

ADC

10bit / 8 Channels

RAM0.5K x 8

Port4

TestSupport Logic

Port 2

Port 1 8 I / OPort 1

Packages: PLCC28, SOIC28, QPF32

CAN family

CAN TutorialCAN Microcontrollers: T89C51CC02 Features


59/119


C52 Core and T89C51CC01 compatible Up to 60 MHz operation (X2 mode)

X2 Core

Double Data Pointer

16 kb FLASH ISP

2 Kb FLASH Boot Loader

2 kb EEPROM

512b RAM (256b scratchpad RAM + 256b XRAM) 3-16 bit Timers (T0,T1,T2)

Enhanced UART

CAN Controller with 4 channels (2.0A and 2.0B)

CAN family

CAN TutorialCANary Microcontrollers: T89C51CC02 Features


60/119


10 bit ADC with 8 Channels

3 I/O Ports

Programmable Counter Array (PCA)

2 channels, 5 Modes

PWM, Capture, Timer, Counter

1MBit/sec CAN at 8MHz Crystal Frequency (X2 mode)

Temperature: -40 to 85C Voltage: 3 to 5 Volt +/10%

Package: SOIC28, Plcc28, TQFP32, TSSOP28

CAN family

CAN TutorialCAN Microcontrollers: T89C51CC02 Advantages


61/119


T89C51CC02 is designed for embedded low-end, highvolume applications

Same functions like included in T89C51CC01

Reduced costs in a 24 pin package.

Main difference to T89C51CC01: No access possible to external RAM/ROM via Ports 0 & 2

Customer Flash Memory 16kBytes

On-chip RAM: 512Bytes

4 channel CAN Controller

2 channel PCA

All other functions will remain identical in the sense that

the T89C51CC01 development tools can be used forT89C51CC02.

CAN family

CAN TutorialAT89C51CC03


62/119


Extend the CAN family to64KB Flash and 2KB RAM

Up to 60 MHz operation (X2mode)

Integrated Power Fail Detect(replace external BOD)

Protection against false flashwrite

Sport a fast SPI with Master and

Slave mode Fully compatible with

T89C51CC01 (32KB Flash)

3 volts to 5.5 volts

UART bootloader and CANbootloader

PLCC44, VQFP44, BGA64,PLCC52(*) VQFP64(*) packages

(*) with SPI interface

PCAPCA

5 Channels5 Channels

RAMRAM2.2K x 82.2K x 8

C51 X2C51 X2CoreCore

InterruptInterruptCtrlCtrl

WatchdogWatchdog

Flash BootFlash BootMemoryMemory

2K x 82K x 8

EEPROMEEPROM

2K x 82K x 8

SPISPI

Flash ProgramFlash ProgramMemoryMemory

64k x 864k x 8

ADCADC

10bit / 810bit / 8ChannelsChannels

CAN ControllerCAN Controller

15 Message15 MessageObjectsObjects

Port4

Port4

Packages: TQFP44, PLCC44, BGA8*8

Timers 0 / 1Timers 0 / 1/ 2/ 2

Port 0Port 0

Port 1Port 1

Port 2Port 2

Port 3Port 3

EUARTEUART

CAN family

CAN TutorialAT90CAN128


63/119


Interrupt CtrlInterrupt Ctrl

WatchdogWatchdog

EEPROMEEPROM

4K Bytes4K Bytes

JTAG EmulationJTAG EmulationSupport LogicSupport Logic

Flash & BootFlash & BootMemoryMemory

128K Bytes128K Bytes

ADCADC

10bit / 8 Channels10bit / 8 Channels

CAN ControllerCAN Controller

15 Message15 Message

ObjectsObjects

Packages: TQFP64, QFN64, CA-BGA64

Timers 0 / 2 8bitsTimers 0 / 2 8bits

Timers 2&3 16bitsTimers 2&3 16bits

Port APort A

Port BPort B

Port CPort C

Port DPort D

USART (2)USART (2)

8 PWM Output8 PWM Output

TWITWI

SPISPI

Port EPort E

Port FPort F

Port GPort G

AVRAVRCoreCore

SRAMSRAM4K Bytes4K Bytes

Main Characteristics8-Bit AVR Core/1 MIPS per MHz (16MHzat 4.5V)

128KB Flash

4KB RAM

4KB EEPROM (100K cycles)

CAN Controller CAN 2.0A/B with 15 MOB

8-channel 10-bit ADC

2 x 8-bit Timer/Counter0 andTimer/Counter2

16-bit Timer/Counter 1/3

Dual Programmable USART: LIN capable

Two Wire Interface

Programmable SPI: master/slave

Programmable Brown-out detector

TQFP64 + QFN64 + CA-BGA64 packages

CAN family

CAN TutorialAT90CAN128 Competitive Advantage


64/119


Performance: Processing Speed: 16MIPS AVR RISC Core

128KB Flash Program Memory; 4KB EEPROM; 4KB RAM

V2.0A/B CAN Controller: Mail Box Message management up to 15 dynamicmessages at the same time

Flexibility:

Self-Programming Memory

Remote Programming or Field Upgrade

Read While Write

Lock Bit/Brownout Protection

Variable Boot Block Size: 1 to 8KB

Higher Layer Protocol Software: CANopen and DeviceNetTM from ToolVendors Partners

Hardware Multiplier

IEEE 1149.1 Compliant JTAG Interface

Atmel Commitment to CAN Networking: a Complete CANMicrocontroller Family

CAN family

CAN TutorialAT90CAN128 in CAN Family


65/119


NEW

AVR 8-Bit RISC8051 Architecture

2111UART (Hardware)

Timer 1 / 3Timers 0 / 1 / 2Timers 0 / 1 / 2Timers 0 / 1 / 2Timers 16bit

TQFP44, PLCC44,BGA8*8

Same UART / CAN asT89C51CC01

Port 0 / 1 / 2 / 3

-

5 channels

10 bit / 8 channels

3 to 5.5

YES15 Message Objects

YES

2.2KB

2KB

64KB/2KB

5

Y2003

AT89C51CC03

1655MIPS

YES--SPI

4KB2KB2KBEEPROM

4KB0.5KB1.2KBRAM

Hard : SPI, JTAG

Soft : UART, CAN

UART / CANUART / CAN

(DeviceNet CANopen)

Bootloader

2.7 to 5.53 to 5.53 to 5.5Supply (V)

Port A/B/C/D/E/F/GPort 1 / 2 / 3Port 0 / 1 / 2 / 3Port

TQFP64, QFN64, BGA64SOIC24, SOIC28,TQFP32, PLCC28TQFP44, PLCC44, CA-BGA64Packages

Timers 0 / 2--Timers 8bit

10 bit / 8 channels10 bit / 8 channels10 bit / 8 channelsADC

-2 channels5 channelsPCA

15 Message Objects4 Message Objects15 Message ObjectsCAN Controller

YES--Power Fail Detect

128KB/ up to 8KB16KB/2KB32KB/2KBFlash program/boot

Intro : March 2004Y2001Y2000Introduce in

T89C51CC02T89C51CC01

AVR 8-Bit RISC8051 Architecture

2111UART (Hardware)

Timer 1 / 3Timers 0 / 1 / 2Timers 0 / 1 / 2Timers 0 / 1 / 2Timers 16bit

TQFP44, PLCC44,BGA8*8

Same UART / CAN asT89C51CC01

Port 0 / 1 / 2 / 3

-

5 channels

10 bit / 8 channels

3 to 5.5

YES15 Message Objects

YES

2.2KB

2KB

64KB/2KB

5

Y2003

AT89C51CC03

1655MIPS

YES--SPI

4KB2KB2KBEEPROM

4KB0.5KB1.2KBRAM

Hard : SPI, JTAG

Soft : UART, CAN

UART / CANUART / CAN

(DeviceNet CANopen)

Bootloader

2.7 to 5.53 to 5.53 to 5.5Supply (V)

Port A/B/C/D/E/F/GPort 1 / 2 / 3Port 0 / 1 / 2 / 3Port

TQFP64, QFN64, BGA64SOIC24, SOIC28,TQFP32, PLCC28TQFP44, PLCC44, CA-BGA64Packages

Timers 0 / 2--Timers 8bit

10 bit / 8 channels10 bit / 8 channels10 bit / 8 channelsADC

-2 channels5 channelsPCA

15 Message Objects4 Message Objects15 Message ObjectsCAN Controller

YES--Power Fail Detect

128KB/ up to 8KB16KB/2KB32KB/2KBFlash program/boot

Intro : March 2004Y2001Y2000Introduce in

AT90CAN128T89C51CC02T89C51CC01

Atmel CAN controllers


66/119

CAN REGISTERSC51 base Core

CAN Registers

CAN TutorialC51 CAN General registers (1)


67/119


BRP5 BRP4 BRP3 BRP2 BRP1 BRP0 --

CANBT1

SJW1 SJW0 - PRS2 PRS1 PRS0 --

CANBT2

PHS2-2 PHS2-1 PHS2-0 PHS1-2 PHS1-1 PHS1-0 SMP-

CANBT3

BRP = prescaller. Tscl = (BRP+1)/FCAN

SJW = resynchronization Jump bit

PRS = propagation to compensate physical delayPHS2 = phase error compensation after sampling point

PHS1 = phase error compensation before sampling point

SMP = sample type : 0 for 1 sample, 1 for 3 samples (1/2Tscl apart fromcenter)

CAN Registers

CAN TutorialC51 CAN General Registers (2)


68/119


CANGCON

OVRQ TTC SYNCTTC AUTOBAUD TEST ENA GRESABRQ

General Control register

ABRQ : Abort request. An on going transmission or reception will becompleted before the abort.

OVRQ : Overload frame request (see frame format 4 page for details)TTC : Set to select the Time Trigger Communication mode

SYNCTTC : select Start of Frame or end of Frame for TTC synchronization

AUTOBAUD : listening mode only when set

Test : factory reserved bitENA : Enable CAN standby when bit=0

GRES : General reset

CAN Registers

CAN TutorialC51 CAN General Registers (3)


69/119


OVFG - TBSY RBSY ENFG BOFF ERRP-

CANGSTA

General Status register

OVFG : Overload Frame Flag (set while the overload frame is sent. No IT)

TBSY : Transmitter Busy (Set while a transmission is in progress)

RBSY : Receive Busy (set while a reception is in progress)

ENFG : Enable On Chip CAN controller Flag. Cleared after completion ofon going transmit or receive after ENA has been cleared in CANGCON

BOFF : Bus Off indicationERRP : Error Passive indication

CAN Registers

CAN TutorialC51 CAN General Register (5)


70/119


- OVRTIM OVRBUF SERG CERG FERG AERGCANIT

CANGIT

General Interrupt

CANIT : Set if one at least of the 15 channels has an IT

OVRTIM : Overrun CAN TIMER (roll over FFFF to 0000) can generate an

INT if ETIM bit in IE1 is setOVRBUF : Overrun Buffer

SERG : Stuffing error detected

CERG : CRC error detected (the faulty channel will also get a CRC error inits CANSTCH)

FERG : Form error

AERG : Acknowledge error general : A transmit message has not beenacknowledged (ACK bit was red at 1)

CAN Registers



71/119


- ENRX ENTX ENERCH ENBUF ENERG --

CANGIE

General Interrupt enable register

ENRX : Enable receive interrupt

ENTX : Enable Transmit Interrupt

ENERCH : Enable message error (SERR, CERR, FERR, AERR) comingfrom any channel (See ENERG below)

ENBUF : Enable Buffer INT (OVRBUF)

ENERG : Enable general error (SERG, CERG, FERG, AERG) (See ENERCHabove)

CAN Registers

CAN TutorialC51 CAN General register (7)


72/119


ENCH14 ENCH13 ENCH12 ENCH11 ENCH10 ENCH9 ENCH8-

CANEN1

ENCH6 ENCH5 ENCH4 ENCH3 ENCH2 ENCH1 ENCH0ENCH7

CANEN2

ENCHi = 0 for unused channel

ENCHi = 1 for message enable (ready to send or ready to receive)

ENCHi is set by rewriting the configuration in CANCONCHi

CAN Registers



73/119


SIT14 SIT13 SIT12 SIT11 SIT10 SIT9 SIT8-

CANSIT1

SIT6 SIT5 SIT4 SIT3 SIT2 SIT1 SIT0SIT7

CANSIT2

Status Interrupt message object

SITi = 0 No Interrupt for channel i

SITi = 1 Interrupt request from channel i

CAN Registers



74/119


IECH14 IECH13 IECH12 IECH11 IECH10 IECH9 IECH8-

CANIE1

IECH6 IECH5 IECH4 IECH3 IECH2 IECH1 IECH0IECH7

CANIE2

Enable Interrupt message object

IECHi = Interrupt disable for channel i

SITi = 1 Interrupt enable for channel i

CAN Registers



75/119


TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0TEC7

CANTEC

REC6 REC5 REC4 REC3 REC2 REC1 REC0REC7

CANREC

CANTEC and CANREC : error counters

CAN Registers

CAN TutorialCAN Message Object pointer register


76/119


CANPAGE

CHNB2 CHNB1 CHNB0 AINC INDX2 INDX1 INDX0CHNB3

CHNB : Selection of the message object : 0 to 14

AINC : Auto-increment the index if AINC=0 . Successive access toCANMSG register will read or write the successive bytes (up to 8)

INDX : Byte location (0 to 7) in the data buffer array pointed by CANMSG.

CAN Registers

CAN TutorialC51 CAN Message object register (1)


77/119


CONCH0 RPLV IDE DLC3 DLC2 DLC1 DLC0CONCH1

CANCONCH

CAN Message Object Control Register

CONCH : 00 Disable

01 Transmit

10 Receive11 Receive Buffer

RPLV : Automatic reply (0 to reply not ready, 1 to reply ready)

IDE : 0 for CAN2.0A (11 bit Identifier)

1 for CAN2.0B (29 bit identifier)

DLC : Data length code (0 to 8) indicate the number of valid Bytesexpected from a received message. Give number of valid byte totransmit for a transmit message.

CAN Registers



78/119


TXOK RXOK BERR SERR CERR FERR AERRDLCW

CANSTCH

Message Object status register

DLCW : Error number of receive byte is not equal to CANCONCH DLC

TXOK : transmit OK

RXOK : receive OK

BERR : transmit bit error.

Recessive bit detected while a dominant bit was sent.

Or Dominant ack bit during an error frame transmission

SERR : Stuffing error

CERR : CRC errorFERR : Form error

AERR : Ack error : no detection of a dominant bit in the ack slot

CANary Registers

CAN TutorialMessage object register IDT CAN2.0A (3)


79/119


IDT9 IDT8 IDT7 IDT6 IDT5 IDT4 IDT3IDT10

CANIDT1

IDT1 IDT0 - - - - -IDT2

CANIDT2

- - - - - - --

CANIDT3

- - - - RTRTAG - RBOTAG-

CANIDT4

IDT = transmit Identifier or expected receive Identifier (see also mask)

RTRTAG : Remote transmit request tag

RB0TAG : reserved bit

CAN Registers

CAN TutorialMessage object register IDT CAN2.0B (4)


80/119



CANIDT1


CANIDT2


CANIDT3

IDT3 IDT2 IDT1 IDT0 RTRTAG RB1TAG RBOTAGIDT4

CANIDT4


RTRTAG : Remote transmit request tag

RB1TAG RB0TAG : reserved bit

CAN Registers

CAN TutorialMessage object register IDM CAN2.0A (5)


81/119


IDMSK9 IDMSK8 IDMSK7 IDMSK6 IDMSK5 IDMSK4 IDMSK3IDMSK10

CANIDM1

IDMSK1 IDMSK0 - - - - -IDMSK2

CANIDM2

- - - - - - --

CANIDM3

- - - - RTRMSK - IDEMSK-

CANIDM4

IDM = Receive Identifier mask(see also IDT)

RTMSK : remote transmission request mask value : 0 comparison trueforced, 1 bit comparison enable

IDEMSK : Identifier extension mask value : 0 comparison true forced 1

comparison enable (detect CAN2.0b reception while CAN2.0a expected)CAN Registers

CAN TutorialMessage object register IDM CAN2.0B (6)


82/119



CANIDM1


CANIDM2


CANIDM3

IDMSK3 IDMSK2 IDMSK1 IDMSK0 RTRMSK - IDEMSKIDMSK4

CANIDM4


RTMSK : remote transmission request mask value : 0 comparison true forced,1 bit comparison enable


comparison enable (detect CAN2.0A reception while CAN2.0B expected)CAN Registers



83/119


MSG6 MSG5 MSG4 MSG3 MSG2 MSG1 MSG0MSG7

CANMSG

Can Message . If auto increment is programmed in CANCONCH, the index

will be automatically incremented after each write or read intoCANMSG (count = 0 to 7)

CAN Registers

CAN TutorialC51 CAN Timer register (1)


84/119


CANTCON

TPRESC6 TPRESC5 TPRESC4 TPRESC3 TPRESC2 TPRESC1 TPRESC0TPRESC7

Prescaller for Timer Clock control (clock for CANTIMH/L)

The prescaller clock input is Fcan/6

CAN Registers

CAN TutorialC51 CAN timer register (2)


85/119


CANTIMH

CANGTIM14 CANGTIM13 CANGTIM12 CANGTIM11 CANGTIM10 CANGTIM9 CANGTIM8CANGTIM15

CANTIML


CAN general timer (16 bit) receives clock from the prescaller CANTCON

CAN Registers

CAN TutorialTimestamp register 1 per message object (3)


86/119


CANSTAMPH

TIMSTMP14 TIMSTMP13 TIMSTMP12 TIMSTMP11 TIMSTMP10 TIMSTMP9 TIMSTMP8TIMSTMP15

CANSTAMPL


CAN TIME STAMP (16 bit)

CANTIM value stored in CANSTAMP with TXOK or RXOK

One TimeStamp register per message object

CAN Registers

CAN TutorialC51 CAN TTC register General register


87/119


CANTTCH

TIMTTC14 TIMTTC13 TIMTTC12 TIMTTC11 TIMTTC10 TIMTTC9 TIMTTC8TIMTTC15

CANTTCL


CAN Time Trigger Communication TTC (16 bit)

CANTIM value stored in CANTTC at start of Frame if SYNCTTC=1 or EndOf Frame if SYNCTTC=0

Only one CANTTC register

CAN Registers

CAN TutorialC51 CAN Detail data Frame


88/119

16/03/2004CAN Tutorial 88CAN Registers

CAN TutorialDetail remote frame with automatic reply


89/119


CAN TutorialC51 CAN Detail remote frame


90/119


CAN TutorialC51 CAN How to start a CAN transmission

Reset CAN Controller CANGCON = 0x01


91/119



Disable CAN IT IE1.0=0

Disable CAN Timer IT (TTC) IE1.2=0

Initialize all Message Object (num = 0 to 14)

CANPAGE = num shl(4)

CANCONCH = 0 , CANSTCH=0, CANIDT(1:4)=0, CANIDM(1:4)=0

For n=1 to 8 do CANMSG=0

Initialize BIT timings: CANBT1, CANBT2, CANBT3

Enable CAN controller: CANGCON = 0x02

Configure one Message Object for TX

Select CANPAGE

Set CANIDT1 and CANIDT2

Set CANMSG with message content (Auto-increment)

Enable Message as Tx/6 Bytes/2.0B CANCONCH = 0x56

Enable interrupts

CAN Registers

CAN TutorialC51 CAN How to serve a CAN reception Interrupt


92/119


Read CANGIT for CANIT and possible errors

Read CANSIT1 & CANSIT2 to identify the channel (channel_I)

Program the CANPAGE with the CHNB=I, AINC and INDEX

Read CANSTCH for RXOK or a possible error

For n=0 to n=7 : read CANMSG to read the message.

Read CANSTMPH CANSTMPL (if time stamp is used)

Rewrite CANCONCH CONCH[1:0] = 10 to re-enable the channel for anew reception

CAN Registers

Atmel CAN controllers


93/119

CAN REGISTERSAVR base Core

CAN Registers

CAN TutorialAVR CAN Memory


94/119


CAN TutorialAVR CAN Registers map


95/119


CAN TutorialAVR CAN General registers (1)

CANBT1


96/119


BRP5 BRP4 BRP3 BRP2 BRP1 BRP0 --

CANBT2

SJW1 SJW0 - PRS2 PRS1 PRS0 --

CANBT3

PHS2-2 PHS2-1 PHS2-0 PHS1-2 PHS1-1 PHS1-0 SMP-

BRP = prescaller. Tscl = (BRP+1)/CLKIO_Freq

SJW = resynchronization Jump bit

PRS = propagation to compensate physical delayPHS2 = phase error compensation after sampling point

PHS1 = phase error compensation before sampling point

SMP = sample type : 0 for 1 sample, 1 for 3 samples (1/2Tscl apartfrom center)

CAN Registers

CAN TutorialAVR CAN General Registers (2)

CANGCON


97/119


CANGCONOVRQ TTC SYNCTTC LISTEN TEST ENA/STB# SWRESABRQ

General Control register

ABRQ : Abort request. An on going transmission or reception will becompleted before the abort.

OVRQ : Overload frame request (see frame format 4 page for details)TTC : Set to select the Time Trigger Communication mode

SYNCTTC : select Start of Frame or end of Frame for TTCsynchronization

LISTEN : listening mode only when set

Test : factory reserved bit

ENA/STB# : Enable CAN standby when bit=0

SWRES : CAN Software Reset

CAN Registers

CAN TutorialAVR CAN General Registers (3)

CANGSTA


98/119


OVFG - TXBSY RXBSY ENFG BOFF ERRP-

CANGSTA

General Status register

OVFG : Overload Frame Flag (set while the overload frame is sent.No IT)

TXBSY : Transmitter Busy (Set while a transmission is in progress)RXBSY : Receive Busy (set while a reception is in progress)

ENFG : Enable On Chip CAN controller Flag. Cleared aftercompletion of on going transmit or receive after ENA has beencleared in CANGCON

BOFF : Bus Off indication

ERRP : Error Passive indication

CAN Registers

CAN TutorialAVR CAN General Register (5)

CANGIT


99/119


BOFFIT OVRTIM BXOK SERG CERG FERG AERGCANIT

General Interrupt

CANIT : CAN General IT status

BOFFIT : Bus Off IT

OVRTIM : Overrun CAN TIMER (roll over FFFF to 0000) cangenerate an INT if ETIM bit in IE1 is set

BXOK : Frame Buffer receive Interrupt

SERG : Stuffing error detected

CERG : CRC error detected (the faulty MOB will also get a CRC

error in its CANSTMOB)FERG : Form error

AERG : Acknowledge error general : A transmit message has notbeen acknowledged (ACK bit was red at 1)

CAN Registers


CANGIE


100/119


ENBOFF ENRX ENTX ENERR ENBX ENERG ENOVRTENIT

General Interrupt enable register

ENIT : Enable all Interrupt except OVRTIM

ENBOFF : Enable Bus Off Interrupt

ENRX : Enable receive interruptENTX : Enable Transmit Interrupt

ENERR : Enable message error (SERR, CERR, FERR, AERR) coming fromany MOB (See ENERG below)

ENBX : Enable Frame Buffer Interrupt

ENERG : Enable general error

ENOVRT: Enable Timer Overrun Interrupt

CAN Registers

CAN TutorialAVR CAN General register (7)

CANEN1


101/119


ENMOB14 ENMOB13 ENMOB12 ENMOB11 ENMOB10 ENMOB9 ENMOB8-

ENMOB6 ENMOB5 ENMOB4 ENMOB3 ENMOB2 ENMOB1 ENMOB0ENMOB7

CANEN2

ENMOBi = 0 for unused MOB

ENMOBi = 1 for message enable (ready to send or ready to receive)

ENMOBi is set by rewriting the configuration in CANCDMOBi

CAN Registers


CANSIT1


102/119


SIT14 SIT13 SIT12 SIT11 SIT10 SIT9 SIT8-

SIT6 SIT5 SIT4 SIT3 SIT2 SIT1 SIT0SIT7

CANSIT2

Status Interrupt message object

SITi = 0 No Interrupt for MOBi

SITi = 1 Interrupt request from MOBi

CAN Registers


CANIE1


103/119


IEMOB14 IEMOB13 IEMOB12 IEMOB11 IEMOB10 IEMOB9 IEMOB8-

IEMOB6 IEMOB5 IEMOB4 IEMOB3 IEMOB2 IEMOB1 IEMOB0IEMOB7

CANIE2

Enable Interrupt message object

IEMOBi = Interrupt disable for MOBi

CAN Registers


CANTEC


104/119


TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0TEC7

REC6 REC5 REC4 REC3 REC2 REC1 REC0REC7

CANREC

CANTEC and CANREC : error counters

CAN Registers

CAN TutorialCAN MOB pointer and MOB priority pointer registers

CANPAGE


105/119


MOBNB2 MOBNB1 MOBNB0 AINC# INDX2 INDX1 INDX0MOBNB3

CANHPMOBHPMOBB2 HPMOB1 HPMOB0 CGP3 CGP2 CGP1 CGP0HPMOB3

MOBNB : Selection of the Message Object Buffer (MOB) : 0 to 14

AINC# : Auto-increment the index if AINC=0 . Successive access to CANMSGregister will read or write the successive bytes (up to 8)

INDX : Byte location (0 to 7) in the data buffer array pointed by CANMSG.

HPMOB : Give the highest priority MOB with Interrupt request

CGP : General Purpose bit

Upon CAN Interrupt, CANHPMOB can be copied in CANPAGE

CAN Registers

CAN TutorialAVR CAN Message object register (1)

CANCDMOB


106/119


CONMOB0 RPLV IDE DLC3 DLC2 DLC1 DLC0CONMOB1

CAN Message Object Configuration Register

CONMOB : 00 Disable

01 Enable Transmit

10 Enable Receive11 Enable Receive Frame Buffer

RPLV : Automatic reply (0 to reply not ready, 1 to reply ready)

IDE : 0 for CAN2.0A (11 bit Identifier)

1 for CAN2.0B (29 bit identifier)

DLC : Data length code (0 to 8) indicate the number of valid Bytesexpected from a received message. Give number of valid byte totransmit for a transmit message.

CAN Registers


CANSTMOB


107/119


TXOK RXOK BERR SERR CERR FERR AERRDLCW

Message Object status register

DLCW : Error number of receive byte is not equal to CANCDMOB DLC

TXOK : transmit OK

RXOK : receive OK

BERR : transmit bit error.

Recessive bit detected while a dominant bit was sent.

Or Dominant ack bit during an error frame transmission

SERR : Stuffing error

CERR : CRC error

FERR : Form error

AERR : Ack error : no detection of a dominant bit in the ack slot

CAN Registers

CAN TutorialMessage object register IDT CAN2.0A (3)


CANIDT1


108/119



IDT1 IDT0 - - - - -IDT2

CANIDT2

- - - - - - --

CANIDT3

- - - - RTRTAG - RB0TAG-

CANIDT4


RTRTAG : RTRbit of the Remote Data Frame to send

RB0TAG : RB0 bit of the of Remote Data Frame to send

CAN Registers

CAN TutorialMessage object register IDT CAN2.0B (4)


CANIDT1


109/119




CANIDT2


CANIDT3

IDT3 IDT2 IDT1 IDT0 RTRTAG RB1TAG RB0TAGIDT4

CANIDT4


RTRTAG : RTRbit of the Remote Data Frame to send

RB1TAG RB0TAG : RB1 RB0 bit of the Remote Data Frame to send

CAN Registers

CAN TutorialMessage object register IDM CAN2.0A (5)


CANIDM1


110/119



IDMSK1 IDMSK0 - - - - -IDMSK2

CANIDM2

- - - - - - --

CANIDM3

- - - - RTRMSK - IDEMSK-

CANIDM4


RTMSK : remote transmission request mask value : 0 comparison trueforced, 1 bit comparison enable


comparison enable (detect CAN2.0b reception while CAN2.0a expected)CAN Registers

CAN TutorialMessage object register IDM CAN2.0B (6)


CANIDM1


111/119




CANIDM2


CANIDM3

IDMSK3 IDMSK2 IDMSK1 IDMSK0 RTRMSK - IDEMSKIDMSK4

CANIDM4

IDM = Receive Identifier mask(see also IDT)RTMSK : remote transmission request mask value : 0 comparison true

forced, 1 bit comparison enable

IDEMSK : Identifier extension mask value : 0 comparison true forced 1comparison enable (detect CAN2.0A reception while CAN2.0B expected)

CAN Registers



CANMSG


112/119



Can Message . If auto increment is programmed in CANPAGE, the index willbe automatically incremented after each write or read into CANMSG (count

= 0 to 7, then roll-over from 7 back to 0)

CAN Registers

CAN TutorialAVR CAN Timer register (1)

CANTCON



113/119



Prescaller for Timer Clock control (clock for CANTIMH/L)

The prescaller clock input is CLKio_Freq/8

CAN Registers

CAN TutorialCAN timer register (2) AVR CAN

CANTIMH



114/119



CANTIML


CAN general timer (16 bit) receives clock from the prescaller CANTCON

CAN Registers

CAN TutorialTimestamp register 1 per message object (3)

CANSTAMPH



115/119


CANSTAMPL


CAN TIME STAMP (16 bit)

CANTIM value stored in CANSTAMP with TXOK or RXOK

One Time Stamp register per message object

CAN Registers

CAN TutorialAVR CAN TTC register General register

CANTTCH



116/119


CANTTCL


CAN Time Trigger Communication TTC (16 bit)

CANTIM value stored in CANTTC at start of Frame if SYNCTTC=1 or EndOf Frame if SYNCTTC=0

Only one CANTTC register

CAN Registers

CAN TutorialHow to start a CAN2.0B Transmission


Disable CAN IT CANGIE=0x00

I iti li ll M Obj t (MOB 0 t 14)


117/119


Initialize all Message Object (MOB = 0 to 14)

CANPAGE = MOBnum


118/119


py ( gpriority MOB requesting attention see note below)

Read CANSTMOB for RXOK or a possible error

Read CANIDT[4:1] to load the receive ID

Read DCLW in CANSTMOB to get the number of validbytes in the CAN data field (1 to 8)

For n=0 to n= DCLW : read CANMSG to read the Datamessage.

Read CANSTMPH CANSTMPL (if time stamp is used)

Rewrite CANCONCH CONCH[1:0] = 10 to re-enable the

channel for a new reception

See the AT90CAN128 Software driver for source code. Above is only acommented example.

CAN Registers

CAN TutorialConclusion

CAN: The most used protocol in industrial & automotive

applications strong support by many HLPs & CAN tool vendors


119/119


g y y

Atmel CAN unique feature in its range:

including an advanced powerful CAN Controller

In-System-Programming (ISP) of Program Flash via CANbus

separated Flash memories for Program & Boot functions

Atmel CAN: designed for industrial and automotiveapplications

Conclusion

Atmel CAN the ultimate CAN Controller

can tutorial.pdf

Documents

bus accessmethods

zerothe bus

fault detection

iso standard iso

used protocol

presentation layer

faulty node

node transmita dominant