cascode bjt circuit
TRANSCRIPT
Sheet 1 of 6
Cascode BJT Circuit A popular circuit for use at high frequencies is the cascode amplifier, as shown below:-
b1
e1
c1
Vin
Vout
Zin
Zout
RL
b2
e2 c2 Q2
Q1
B C
A
Gain of Q1 due to load of Q2
β- A
1 matched are stransistor assuming whichgm
1gm- A
gm1 ) stage (CB R Rgm- gain CE
I1
211V
2INL11
=
==∴
==
Miller capacitance
( ) ( ) BCSHUNTBCvBCSHUNT 2C C )1(1C A1C C =−−=−= The miller capacitance across the input of the CE stage is double the Base collector capacitance of Q1.
Sheet 2 of 6
Input Impedance of Q1 at point A is
(mS) ctanceTranscondu Kelvin in eTemperatur T
1.6022x10 charge Electron q
1.3807x10 constant Boltzmans k whereq
k.T V; VI whereβR
19-
123-T
T
CQIN
==
==
===== −
gm
C
JKgmgm
Voltage Gain Av Voltage gain of CE stage is ~ 1 (due to low output RL) so the voltage gain of the amplifier will be from the common-base stage:
)rgm1 (as
VV
IV.
VI
rR
1)r(βR.β
1)r(βiR.i.β
VVA ce
T
A
CQ
A
T
CQ
be
L
be22
L2
be22b2
Lb22
IN
OUTV ===≈
+=
+==
Current Gain Ai Current gain of CB stage is ~ 1 so the current gain of the amplifier will be from the common-emitter stage. Current gain (Ai) = Ai of the CE stage (Ai of CB stage = 1) = β Output Impedance ROUT = RL Of course as the voltage gain of the whole amplifier is dependant on the load resistor (and ultimately rce2), then adding an active load (eg current mirror) will allow high voltage gain.
Sheet 3 of 6
Cascode Simulation For comparison a common-emitter stage was simulated on ADS to measure voltage gain. Using the HF3127B transistor array we can calculate the voltage gain of the circuit at low frequencies. If we assume a supply voltage of 5V and a device current of 5mA, we can calculate the value of the load resistor (We also assume that we want half the supply voltage across the device so that VC = 2.5V).
Ω===
======
===
Ω===
36K /1005x100.7 - 2.5
/βI Vbe-Vc resistor bias collector Base
34dB log(2500)*10 sdB' in 2500 500.5x1025x10- R.
IV
- gm.R- AV
100 β ;25mV V;50V VData Device
500 5x10
2.5 - 5 I
V- V R
3-CQ
3-
3-
LCQ
TL
TA
3-CQ
CCCL
At low frequencies we would expect a voltage gain of 34dB rolling off to a gain of 0dB at the fT of the device (~ 8GHz). Below is shown the simulation and result from ADS.
HFA3127B_npnX2
B
C
E
V_ACSRC4
Freq=freqVac=1 V
DC_BlockDC_Block1
ACAC1
Step=Stop=9000 MHzStart=1.0 MHz
AC
RR4R=27000 Ohm
RR3R=500 Ohm
DCDC1
DC
I_ProbeI_Probe1
V_DCSRC1Vdc=5.0 V
Note a DC block is used as the AC source has a DC of 0V. During simulation the value of the base-collector resistor was reduced to ensure IC = 5mA. And the resulting data of voltage gain vs frequency for the single-stage common-emitter amplifier.
Sheet 4 of 6
m1freq=1.696GHzdB(AC.vc2)=15.335
m2freq=1.000MHzdB(AC.vc2)=35.944
0 1 2 3 4 5 6 7 8 9-10
0
10
20
30
40
freq, GHz
dB(A
C.v
c2)
m1
m2
DC.vc22.289 V
DC.I_Probe1.i5.423mA
The predicted low-frequency voltage gain agrees well with our initial calculation. However, we have not included a source resistance – this will effectively form a potential divider with the base bulk resistor rb, and lower the voltage entering the device and hence lowering the gain. Now a 50-ohm resistor has been added to the ideal input voltage source.
BJT_ModelBJTM2
AllParams=Lateral=noFfe=Fb=Ab=Kb=Af=1Kf=0Rc=1.14e1Re=1.848
RbModel=MDSRbm=1.974Irb=Rb=5.007e1Mjs=0Vjs=7.5e-1Cjs=1.15e-13Mje=5.1e-1Vje=8.69e-1Cje=2.4e-13Fc=5e-1Xcjc=9e-1Mjc=2.4e-1Vjc=9.7e-1Cjc=3.98e-13
Ns=Iss=Nk=Tnom=Xti=3Imax=Is=1.84e-16Eg=1.11Tr=4e-9Nr=Var=4.5Nc=1.8Isc=1.6e-14Ikr=5.4e-2Br=1e1
Approxqb=yesXtb=0Ptf=0Itf=3.5e-2Vtf=3.5Xtf=2.3Tf=10.51e-12Nf=Vaf=7.2e1Ne=1.4Ise=1.686e-19Ikf=5.4e-2Bf=1.036e2PNP=noNPN=yes
V_ACSRC4
Freq=freqVac=1 VVdc=0.817 V
DCDC1
DCACAC1
Step=Stop=4000 MHzStart=1.0 MHz
AC
BJT_NPNBJT2
Mode=nonlinearTemp=Region=Area=Model=BJTM2
V_DCSRC1Vdc=5 V
RR3R=500 Ohm
I_ProbeI_Probe1
RR5R=50 Ohm
Sheet 5 of 6
The resulting plot now shows how gain has rolled off faster due to the Miller effect.
m1freq=1.692GHzdB(AC.vc2)=8.738
m2freq=1.000MHzdB(AC.vc2)=34.820
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.00
10
20
30
40
freq, GHz
dB(A
C.v
c2)
m1
m2
DC.vc22.486 V
DC.I_Probe1.i5.028mA
To improve the high frequency response and stability we now add a common-base stage to form a Cascode amplifier. The common-base stage is biased in saturation and therefore there will be little voltage drop across the collector-emitter junction.
ACAC1
Step=Stop=4000 MHzStart=1.0 MHz
AC
DCDC1
DC
BJT_ModelBJTM2
AllParams=Lateral=noFfe=Fb=Ab=Kb=Af=1Kf=0Rc=1.14e1Re=1.848
RbModel=MDSRbm=1.974Irb=Rb=5.007e1Mjs=0Vjs=7.5e-1Cjs=1.15e-13Mje=5.1e-1Vje=8.69e-1Cje=2.4e-13Fc=5e-1Xcjc=9e-1Mjc=2.4e-1Vjc=9.7e-1Cjc=3.98e-13
Ns=Iss=Nk=Tnom=Xti=3Imax=Is=1.84e-16Eg=1.11Tr=4e-9Nr=Var=4.5Nc=1.8Isc=1.6e-14Ikr=5.4e-2Br=1e1
Approxqb=yesXtb=0Ptf=0Itf=3.5e-2Vtf=3.5Xtf=2.3Tf=10.51e-12Nf=Vaf=7.2e1Ne=1.4Ise=1.686e-19Ikf=5.4e-2Bf=1.036e2PNP=noNPN=yes
V_DCSRC1Vdc=5 V
RR3R=500 Ohm
I_ProbeI_Probe1
BJT_NPNBJT3
Mode=nonlinearTemp=Region=Area=Model=BJTM2
V_DCSRC5Vdc=3 V
V_ACSRC4
Freq=freqVac=1 VVdc=0.817 V
BJT_NPNBJT2
Mode=nonlinearTemp=Region=Area=Model=BJTM2
RR5R=50 Ohm
Sheet 6 of 6
The red plot shows the voltage gain of the CE stage showing that the gain of the first stage is now a lot lower than the single CE stage amplifier. The blue plot shows the new voltage gain response of the Cascode amplifier and at marker 2 (1.69GHz) the gain has improved from 8.7dB to 12.6dB, as the Milller effect has been reduced.
DC.vc22.528 V
DC.I_Probe1.i4.944mA
m1freq=1.000MHzdB(AC.vc2)=34.935
m2freq=1.692GHzdB(AC.vc2)=12.631
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.00
10
20
30
40
freq, GHz
m1
m2
dB(A
C.v
c2)
dB(A
C.v
c1)