ch4 minterm and maxterm expansions
TRANSCRIPT
CH04 Minterm and Maxterm Exansions 2005-10-14 v3.pptCH4 CH4
MintermMinterm and and MaxtermMaxterm ExpansionsExpansions
Lecturer: /
Date2005/10/14
pp. 2
Conversion of English Sentences to Conversion of English Sentences to Boolean ExpressionBoolean Expression
vMary watches TV if it is Monday night and she has finished her homework.
F=1 if “Mary watches TV”; otherwise F=0. A=1 if “It is Monday night”; otherwise A=0. B=1 if “Mary has finished her HW”; otherwise B=0.
=> F = A·B (Boolean Expression of above event)
F A
pp. 3
Conversion of English Sentences to Conversion of English Sentences to Boolean ExpressionBoolean Expression
vThe alarm will ring iff the alarm switch is turned on and the door is not closed, or it is after 6 p.m. and the window is not closed.
=> Z = AB’ + CD’ => (Boolean Expression)
(Realization) (Simplification)
Z A
C D’
pp. 4
4.2 Combinational Logic Design 4.2 Combinational Logic Design Using a Truth TableUsing a Truth Table
v Function: Input (A, B, C)2 denotes a binary number. If N= (A, B, C)2 ≥ 0112 , f = 1; otherwise f = 0.
(N ≥ 3)
f = A’BC+AB’C’+AB’C+ABC’+ABC = A’BC + AB’ (C’ + C) + AB = A’BC + AB’ + AB = BC + A (Simplify using Boolean Algebra)
0 1 2 3 4 5 6 7
(1) (2) (3)
pp. 5
Combinational Logic Design Combinational Logic Design Using a Truth TableUsing a Truth Table
v Counting 0’s: (A+B+C)=0 ó A=B=C=0 (A+B+C’)=0 ó A=B=C’=0
f = (A+B+C)(A+B+C’)(A+B’+C) = (A+B)(A+B’+C) = A+BC
v f ’ = A’B’C’+A’B’C+A’BC’ => f = [A’B’C’+A’B’C+A’BC’]’
= (A’B’C’)’ ·(A’B’C)’ ·(A’BC’)’ = (A+B+C)(A+B+C’)(A+B’+C)
000 A+B+C 001 A+B+C’ 010 A+B’+C
(POS)
Graduate Institute of Electronics Engineering, NTU
pp. 6
A’+B’+C’=M7ABC=m71 1 17
A’+B’+C=M6ABC’=m61 1 06
A’+B+C’=M5AB’C=m51 0 15
A’+B+C=M4AB’C’=m41 0 04
A+B’+C’=M3A’BC=m30 1 13
A+B’+C=M2A’BC’=m20 1 02
A+B+C’=M1A’B’C=m10 0 11
A+B+C=M0A’B’C’=m00 0 00
MaxtermsMintermsA B CRow NO.
vf = A’BC+AB’C’+AB’C+ABC’+ABC (Minterm Expansion) minterm: Each variable shows exactly once.
= Standard Sum of Products vm-notation: f = m3+m4+m5+m6+m7
= ∑m(3,4,5,6,7)
pp. 7
A’+B’+C’=M7ABC=m71 1 17
A’+B’+C=M6ABC’=m61 1 06
A’+B+C’=M5AB’C=m51 0 15
A’+B+C=M4AB’C’=m41 0 04
A+B’+C’=M3A’BC=m30 1 13
A+B’+C=M2A’BC’=m20 1 02
A+B+C’=M1A’B’C=m10 0 11
A+B+C=M0A’B’C’=m00 0 00
MaxtermsMintermsA B CRow NO.
vf = (A+B+C)(A’+B’+C)(A+B’+C) (Maxterm Expansion) maxterm
= Standard Product of Sums vM-notation: f = M0M1M2 = ∏M(0,1,2) (Note mi’=Mi)
Graduate Institute of Electronics Engineering, NTU
pp. 8
f ’ = M3M4M5M6M7 = ∏M(3,4,5,6,7)
f ’ = (f)’ = (M0M1M2)’ = M0’+M1’+M2’ = m0+m1+m2
= ∑m(0,1,2)
pp. 9
MintermMinterm and and MaxtermMaxterm ExpansionsExpansions v Ex: Find minterm expansion of f(a,b,c,d) = a’(b’+d)+acd’
f = a’b’+a’d+acd’ = a’b’(c+c’)(d+d’)+acd’(b+b’)+a’d(b+b’)(c+c’) = a’b’c’d’+a’b’c’d+a’b’cd’+a’b’cd+a’bc’d+a’bcd+abcd’+ab’cd’
0000 0001 0010 0011 0101 0111 1110 1010
=> f = ∑m(0,1,2,3,5,7,10,14) (Minterm Expansion)
pp. 10
MintermMinterm and and MaxtermMaxterm ExpansionsExpansions vEx: Show that a’c+b’c’+ab = a’b’+bc+ac’
a’c+b’c’+ab = a’c(b+b’)+(a’+a)b’c’+ab(c+c’) = m3+m1+m4+m0+m7+m6
=> m1+m0+m7+m3+m6+m4
apply
pp. 11
Example of page 93
pp. 12
v Truth Table:
Assume ABC = 001 110
11117
X0116
01015
00014
11103
00102
X1001
10000
FCBA
“don’t care” terms can be either “0” or “1”
Graduate Institute of Electronics Engineering, NTU
pp. 13
Incompletely Specified FunctionsIncompletely Specified Functions vImpact to Boolean Simplification
(A) Assign “0” to both “X” F = A’B’C+A’BC+ABC = A’B’C’+BC
(B) Assign “1” to 1st “X”, and “0” to 2nd “X” F = A’B’C’+A’B’C+A’BC+ABC = A’B’+BC
(C) Assign “1” to both “X” F = A’B’C’+A’B’C+A’BC+ABC’+ABC = A’B’+BC+AB
=> (B) is simplest form vNotation: F = ∑m(0,3,7) + ∑d(1,6)
F = ∏M(2,4,5) · ∏D(1,6)
Graduate Institute of Electronics Engineering, NTU
pp. 14
Graduate Institute of Electronics Engineering, NTU
pp. 15
Error detector to check Error detector to check valid 6valid 6--33--11--1 codes1 codes
v F=1 iff (A,B,C,D) denotes an invalid code combination
•Circuit realization using Basic gates
Graduate Institute of Electronics Engineering, NTU
pp. 16
Truth Table ConstructionTruth Table Construction v Ex: BCD Number: Z=1 iff BCD is divisible by 3
1 9 3 8
0001 1001 0011 1000
1. Z = ∑m(0,3,6,9)+ ∑d(10,11,12,13,14,15)
a3 BCD ÷3
a2 a1 a0
pp. 17
4.7 Binary Adders and 4.7 Binary Adders and SubtractersSubtracters v1-bit binary adder:
1 01 01 1
0 10 11 0
0 10 10 1
0 00 00 0
1 + 1 1 0
1 + 0 0 1
0 + 1 0 1
X Y
a b
pp. 18
Design of Binary Adders and Design of Binary Adders and SubtractersSubtracters v Design of 1-bit Full Adder (FA)
X Y
Truth Table
Sum = X’Y’Cin+X’YCin’+XY’Cin’+XYCin = X’(Y’Cin+YCin’)+X(Y’Cin’+YCin) = X’(Y Cin)+X(Y Cin)’ = X Y Cin
Cout = X’YCin+XY’Cin+XYCin’+XYCin = (X’YCin+XYCin)+(XY’Cin+XYCin)
+(XYCin’+XYCin) = YCin + XCin + XY Implementation of FA (1-bit)
Graduate Institute of Electronics Engineering, NTU
pp. 19
Binary Adders and Binary Adders and SubtractersSubtracters v 2-bit binary adder:
X Y ZC DA B
1 1 01 11 1
1 0 11 01 1
1 0 00 11 1
0 1 10 01 1
1 0 11 11 0
1 0 01 01 0
0 1 10 11 0
0 1 00 01 0
1 0 01 10 1
0 1 11 00 1
0 1 00 10 1
0 0 10 00 1
0 1 11 10 0
0 1 01 00 0
0 0 10 10 0
0 0 00 00 0
N3N2N1
2-bit binary adder
Y(A, B, C, D) = ∑m(2,3,5,6,8,9,12,15)
Z(A, B, C, D) = ∑m(1,3,4,6,9,11,12,14)
Graduate Institute of Electronics Engineering, NTU
pp. 20
Binary Adders and Binary Adders and SubtractersSubtracters vA = (A3 A2 A1 A0), B = (B3 B2 B1 B0)
A3 A2 A1 A0
+) B3 B2 B1 B0
ó A + B
Ex: ( 1 0 1 1 0 ) Carries 1 0 1 1 1 0 1 1
1 0 1 1 0 C0
Graduate Institute of Electronics Engineering, NTU
pp. 21
Ex: 1 1 1 1 +) 0 0 0 1
temp sum1 1 1 1 0 carry1 0 0 1 0 temp sum2 1 1 0 0
………… real sum 1 0 0 0 0
v Advantage: vSimple vScalable (4-bit, 8-bit,
16-bit) v Disadvantage: vSpeed is limited by
Carry Propagation vUsually used in low-
speed circuits or small wordlength adder designs.
Graduate Institute of Electronics Engineering, NTU
pp. 22
Design of Binary Adders and Design of Binary Adders and SubtractersSubtracters vBinary Full Subtracter
Xi
Yi
bi
0di
pp. 23
Design of Binary Adders and Design of Binary Adders and SubtractersSubtracters vEx: A = 0 1 1 0 (+6)
B = 0 0 1 1 (+3) ó 1 1 0 0 (-3) A 0 1 1 0
+ B 1 1 0 0 (1’s complement) 1 <= 0 0 1 0
Discard + 1 (carry-in pin to add 1) 0 0 1 1
vCheck overflow Overflow Detection
10 0 1
Graduate Institute of Electronics Engineering, NTU
pp. 24
Building Building SubtracterSubtracter using FAusing FA’’ss
A - B = A + (2’s complement of B) = A + B + 1 ß (add Cin =1)
Lecturer: /
Date2005/10/14
pp. 2
Conversion of English Sentences to Conversion of English Sentences to Boolean ExpressionBoolean Expression
vMary watches TV if it is Monday night and she has finished her homework.
F=1 if “Mary watches TV”; otherwise F=0. A=1 if “It is Monday night”; otherwise A=0. B=1 if “Mary has finished her HW”; otherwise B=0.
=> F = A·B (Boolean Expression of above event)
F A
pp. 3
Conversion of English Sentences to Conversion of English Sentences to Boolean ExpressionBoolean Expression
vThe alarm will ring iff the alarm switch is turned on and the door is not closed, or it is after 6 p.m. and the window is not closed.
=> Z = AB’ + CD’ => (Boolean Expression)
(Realization) (Simplification)
Z A
C D’
pp. 4
4.2 Combinational Logic Design 4.2 Combinational Logic Design Using a Truth TableUsing a Truth Table
v Function: Input (A, B, C)2 denotes a binary number. If N= (A, B, C)2 ≥ 0112 , f = 1; otherwise f = 0.
(N ≥ 3)
f = A’BC+AB’C’+AB’C+ABC’+ABC = A’BC + AB’ (C’ + C) + AB = A’BC + AB’ + AB = BC + A (Simplify using Boolean Algebra)
0 1 2 3 4 5 6 7
(1) (2) (3)
pp. 5
Combinational Logic Design Combinational Logic Design Using a Truth TableUsing a Truth Table
v Counting 0’s: (A+B+C)=0 ó A=B=C=0 (A+B+C’)=0 ó A=B=C’=0
f = (A+B+C)(A+B+C’)(A+B’+C) = (A+B)(A+B’+C) = A+BC
v f ’ = A’B’C’+A’B’C+A’BC’ => f = [A’B’C’+A’B’C+A’BC’]’
= (A’B’C’)’ ·(A’B’C)’ ·(A’BC’)’ = (A+B+C)(A+B+C’)(A+B’+C)
000 A+B+C 001 A+B+C’ 010 A+B’+C
(POS)
Graduate Institute of Electronics Engineering, NTU
pp. 6
A’+B’+C’=M7ABC=m71 1 17
A’+B’+C=M6ABC’=m61 1 06
A’+B+C’=M5AB’C=m51 0 15
A’+B+C=M4AB’C’=m41 0 04
A+B’+C’=M3A’BC=m30 1 13
A+B’+C=M2A’BC’=m20 1 02
A+B+C’=M1A’B’C=m10 0 11
A+B+C=M0A’B’C’=m00 0 00
MaxtermsMintermsA B CRow NO.
vf = A’BC+AB’C’+AB’C+ABC’+ABC (Minterm Expansion) minterm: Each variable shows exactly once.
= Standard Sum of Products vm-notation: f = m3+m4+m5+m6+m7
= ∑m(3,4,5,6,7)
pp. 7
A’+B’+C’=M7ABC=m71 1 17
A’+B’+C=M6ABC’=m61 1 06
A’+B+C’=M5AB’C=m51 0 15
A’+B+C=M4AB’C’=m41 0 04
A+B’+C’=M3A’BC=m30 1 13
A+B’+C=M2A’BC’=m20 1 02
A+B+C’=M1A’B’C=m10 0 11
A+B+C=M0A’B’C’=m00 0 00
MaxtermsMintermsA B CRow NO.
vf = (A+B+C)(A’+B’+C)(A+B’+C) (Maxterm Expansion) maxterm
= Standard Product of Sums vM-notation: f = M0M1M2 = ∏M(0,1,2) (Note mi’=Mi)
Graduate Institute of Electronics Engineering, NTU
pp. 8
f ’ = M3M4M5M6M7 = ∏M(3,4,5,6,7)
f ’ = (f)’ = (M0M1M2)’ = M0’+M1’+M2’ = m0+m1+m2
= ∑m(0,1,2)
pp. 9
MintermMinterm and and MaxtermMaxterm ExpansionsExpansions v Ex: Find minterm expansion of f(a,b,c,d) = a’(b’+d)+acd’
f = a’b’+a’d+acd’ = a’b’(c+c’)(d+d’)+acd’(b+b’)+a’d(b+b’)(c+c’) = a’b’c’d’+a’b’c’d+a’b’cd’+a’b’cd+a’bc’d+a’bcd+abcd’+ab’cd’
0000 0001 0010 0011 0101 0111 1110 1010
=> f = ∑m(0,1,2,3,5,7,10,14) (Minterm Expansion)
pp. 10
MintermMinterm and and MaxtermMaxterm ExpansionsExpansions vEx: Show that a’c+b’c’+ab = a’b’+bc+ac’
a’c+b’c’+ab = a’c(b+b’)+(a’+a)b’c’+ab(c+c’) = m3+m1+m4+m0+m7+m6
=> m1+m0+m7+m3+m6+m4
apply
pp. 11
Example of page 93
pp. 12
v Truth Table:
Assume ABC = 001 110
11117
X0116
01015
00014
11103
00102
X1001
10000
FCBA
“don’t care” terms can be either “0” or “1”
Graduate Institute of Electronics Engineering, NTU
pp. 13
Incompletely Specified FunctionsIncompletely Specified Functions vImpact to Boolean Simplification
(A) Assign “0” to both “X” F = A’B’C+A’BC+ABC = A’B’C’+BC
(B) Assign “1” to 1st “X”, and “0” to 2nd “X” F = A’B’C’+A’B’C+A’BC+ABC = A’B’+BC
(C) Assign “1” to both “X” F = A’B’C’+A’B’C+A’BC+ABC’+ABC = A’B’+BC+AB
=> (B) is simplest form vNotation: F = ∑m(0,3,7) + ∑d(1,6)
F = ∏M(2,4,5) · ∏D(1,6)
Graduate Institute of Electronics Engineering, NTU
pp. 14
Graduate Institute of Electronics Engineering, NTU
pp. 15
Error detector to check Error detector to check valid 6valid 6--33--11--1 codes1 codes
v F=1 iff (A,B,C,D) denotes an invalid code combination
•Circuit realization using Basic gates
Graduate Institute of Electronics Engineering, NTU
pp. 16
Truth Table ConstructionTruth Table Construction v Ex: BCD Number: Z=1 iff BCD is divisible by 3
1 9 3 8
0001 1001 0011 1000
1. Z = ∑m(0,3,6,9)+ ∑d(10,11,12,13,14,15)
a3 BCD ÷3
a2 a1 a0
pp. 17
4.7 Binary Adders and 4.7 Binary Adders and SubtractersSubtracters v1-bit binary adder:
1 01 01 1
0 10 11 0
0 10 10 1
0 00 00 0
1 + 1 1 0
1 + 0 0 1
0 + 1 0 1
X Y
a b
pp. 18
Design of Binary Adders and Design of Binary Adders and SubtractersSubtracters v Design of 1-bit Full Adder (FA)
X Y
Truth Table
Sum = X’Y’Cin+X’YCin’+XY’Cin’+XYCin = X’(Y’Cin+YCin’)+X(Y’Cin’+YCin) = X’(Y Cin)+X(Y Cin)’ = X Y Cin
Cout = X’YCin+XY’Cin+XYCin’+XYCin = (X’YCin+XYCin)+(XY’Cin+XYCin)
+(XYCin’+XYCin) = YCin + XCin + XY Implementation of FA (1-bit)
Graduate Institute of Electronics Engineering, NTU
pp. 19
Binary Adders and Binary Adders and SubtractersSubtracters v 2-bit binary adder:
X Y ZC DA B
1 1 01 11 1
1 0 11 01 1
1 0 00 11 1
0 1 10 01 1
1 0 11 11 0
1 0 01 01 0
0 1 10 11 0
0 1 00 01 0
1 0 01 10 1
0 1 11 00 1
0 1 00 10 1
0 0 10 00 1
0 1 11 10 0
0 1 01 00 0
0 0 10 10 0
0 0 00 00 0
N3N2N1
2-bit binary adder
Y(A, B, C, D) = ∑m(2,3,5,6,8,9,12,15)
Z(A, B, C, D) = ∑m(1,3,4,6,9,11,12,14)
Graduate Institute of Electronics Engineering, NTU
pp. 20
Binary Adders and Binary Adders and SubtractersSubtracters vA = (A3 A2 A1 A0), B = (B3 B2 B1 B0)
A3 A2 A1 A0
+) B3 B2 B1 B0
ó A + B
Ex: ( 1 0 1 1 0 ) Carries 1 0 1 1 1 0 1 1
1 0 1 1 0 C0
Graduate Institute of Electronics Engineering, NTU
pp. 21
Ex: 1 1 1 1 +) 0 0 0 1
temp sum1 1 1 1 0 carry1 0 0 1 0 temp sum2 1 1 0 0
………… real sum 1 0 0 0 0
v Advantage: vSimple vScalable (4-bit, 8-bit,
16-bit) v Disadvantage: vSpeed is limited by
Carry Propagation vUsually used in low-
speed circuits or small wordlength adder designs.
Graduate Institute of Electronics Engineering, NTU
pp. 22
Design of Binary Adders and Design of Binary Adders and SubtractersSubtracters vBinary Full Subtracter
Xi
Yi
bi
0di
pp. 23
Design of Binary Adders and Design of Binary Adders and SubtractersSubtracters vEx: A = 0 1 1 0 (+6)
B = 0 0 1 1 (+3) ó 1 1 0 0 (-3) A 0 1 1 0
+ B 1 1 0 0 (1’s complement) 1 <= 0 0 1 0
Discard + 1 (carry-in pin to add 1) 0 0 1 1
vCheck overflow Overflow Detection
10 0 1
Graduate Institute of Electronics Engineering, NTU
pp. 24
Building Building SubtracterSubtracter using FAusing FA’’ss
A - B = A + (2’s complement of B) = A + B + 1 ß (add Cin =1)