1

CHAPTER 2THE COMPUTER SYSTEM

2

INTRODUCTION

• The Architect views the machine as a collection of functional units and their interconnection

• The functional units include subsystems such as: -– Central Processing Unit (CPU)

– The system Memory, which might include high-speed semiconductor Random Excess Memory (RAM), as well as disk and tape drives

– input and output equipments e. g Keyboard and Printers

• All these functional units are interconnected by buses which are data pathways overwhich information passes.

3

Structure of Von Neumann – Revisited

I/O Equipment (I,O)

Main Memory (M)

Main Memory (M)

Central Processing Unit (CPU)

Program Control Unit (CU)

Arithmetic-Logic Unit (ALU)

CACHE

4

Central Processing Unit (CPU)

• Is the heart of any computer system• Controls the operation of the entire system,

performs the arithmetic and logic operations• It store and retrieves instructions and data in a

main memory• The Control Unit: -

– Fetches these instructions from memory, decode them, and directs the system to execute the operations indicated by the instructions

– Communicates with the output devices to transfer results from storage to the output device

– Communicates with the input devices in order to transfer program instructions and data into storage

5

CPU - Details

• Arithmetic Logic Unit (ALU): -– Carries all arithmetic and logic operations– It contains a great deal of mathematical

structure

• CPU works at a very high speed measured in MHZ (Mega Hertz)

6

CPU Internal Structure

7

Registers

• CPU uses Registers as its working space (temporary storage)

• Number and function vary between processor designs• User Visible Registers are: -

– General Purpose Registers: Accumulator (a), Base (b), Control (c) and Data (D)

– Data Registers (D7 – D0)– Address Registers (A7 – A0)– Condition Codes Registers

• Control & Status Registers– Program Counter– Instruction Decoding Register– Memory Address Register– Memory Buffer Register

• Status Registers are also called Flag Registers

8

Registers

• CPU uses Registers as its working space (temporary storage)

• Number and function vary between processor designs

• Some architectures provide a set of registers which can be used without restrictions as operands for any opcode and as address registers; these are so called general-purpose registers

• User Visible Registers are: -– Accumulator (a)

– General Purpose Registers:Base (b), Count (c) and Data (D)

– Data Registers (D7 – D0)

– Address Registers (A7 – A0)

– Condition Codes Registers

9

Register Organization• Control & Status Registers

– Program Counter– Instruction Decoding Register– Memory Address Register– Memory Buffer Register

• Status Registers are also called Flag Registers

• The set of registers within the CPU represents thetop level of the memory hierarchy inside the computer system

- User visible registers: can be accessed by assembly language programmers.

- Control and Status registers: used by the ControlUnit to control the operation of the CPU; not directly accessible by the programmer.

10

Control and Status Registers• Program Counter (PC): holds the address of the instruction

to be fetched.• Instruction Register (IR): holds the last instruction fetched.

• Memory Address Register (MAR): holds the address of a memory location that is to be read or written.

• Memory Buffer Register (MBR): holds the data to be written to memory or the data most recently read.

• Program Status Word (PSW): Condition Code Flags + other bits defining the status of the CPU (interrupt enabled/ disabled, supervisor, etc.)

11

Some Trade-offs• A large number of general purpose registers

large number of bits for encoding register operands;

specialization of registers reduces this need.

• Too small number of registers creates problems to

the programmer and leads to an increased memory

traffic.• The number of general-purpose or data registers is

often between 8 - 32.

12

Registers

• address registers: registers used only for address representation and computation:

base registers index registers stack pointer etc.

In some architectures address registers can be specialized for some of the previous functions.

13

Condition Code Registers

• Sets of individual bits– e.g. result of last operation was zero

• Can be read (implicitly) by programs– e.g. Jump if zero

• Can not (usually) be set by programs

14

Program Status Word

• A set of bits• Includes Condition Codes• Sign of last result• Zero• Carry• Equal• Overflow• Interrupt enable/disable• Supervisor

15

Example Register Organizations

16

CPU must• Generally CPU must:

– Fetch instructions• PC contains address of next instruction• Address moved to MAR• Address placed on address bus• Control unit requests memory read• Result placed on data bus, copied to MBR, then to IR• Meanwhile PC incremented by 1

– Interpret instructions– Fetch data

• IR is examined• If indirect addressing, indirect cycle is performed

– Right most N bits of MBR transferred to MAR– Control unit requests memory read– Result (address of operand) moved to MBR

– Process data– Write data

17

Fetch execute cycle

Instruction Fetch

Instruction Decode

Next Instruction

Operand Fetch

Execute

Result Store

18

19

Data Flow (Fetch Diagram)

20

Data Flow (Indirect Diagram)

21

Data Flow (Execute)

• May take many forms

• Depends on instruction being executed

• May include– Memory read/write– Input/Output– Register transfers– ALU operations

22

MEMORY

• Is the section where information is stored. • The information could be: -

– Programs– Data to be processed– Results of computation

• Two types of memories– Main memory

• Random Access Memory (RAM)• Read Only Memory (ROM)

– Auxiliary or external memory• Hard disks• Magnetic tapes/disks• Floppy diskettes• Compact disks (CDs)

23

MEMORY Characteristics

• Location• Capacity• Unit of transfer• Access method• Performance• Physical type• Physical characteristics• Organisation

24

MEMORY Characteristics 1• Location; [CPU, Internal, External]• Capacity;

– Word size (The natural unit of organisation)– Number of words (or Bytes)

• Unit of transfer– Internal; (Usually governed by data bus width)– External; (Usually a block which is much larger than a

word)– Addressable unit

• Smallest location which can be uniquely addressed• Word internally• Cluster on M$ disks

25

MEMORY Characteristics 2• Access method

– Sequential• Start at the beginning and read through in order

• Access time depends on location of data and previous location

• e.g. tape

– Direct• Individual blocks have unique address

• Access is by jumping to vicinity plus sequential search

• Access time depends on location and previous location

• e.g. disk

26

MEMORY Characteristics 3• Access method

– Random• Individual addresses identify locations exactly

• Access time is independent of location or previous access

• e.g. RAM

– Associative• Data is located by a comparison with contents of a

portion of the store

• Access time is independent of location or previous access

• e.g. cache

27

Performance• Access time

– Time between presenting the address and getting the valid data

• Memory Cycle time– Time may be required for the memory to

“recover” before next access– Cycle time is access + recovery

• Transfer Rate– Rate at which data can be moved

28

Physical Types• Semiconductor

– RAM

• Magnetic– Disk & Tape

• Optical– CD & DVD

• Others– Bubble– Hologram

29

Physical Characteristics• Decay

• Volatility

• Erasable

• Power consumption

30

Organisation

• Physical arrangement of bits into words

• Not always obvious

• e.g. interleaved

31

Memory Hierarchy• Programmers want unlimited amount of fast

memory• An economic solution to that desire is a memory

hierarch, which takes advantage of locality and cost/performance of memory– Locality principle says: most programs do not access

all code or data uniformly

• Locality principle plus the concept that smaller hardware is faster led to the hierarchy based on memories of different speeds and sizes. The fast memory is expensive.

32

The Memory Hierarchy

Increasing access time, Increasing capacity

33

A CACHE– Is a small, fast memory located close to the CPU that

holds the most recently accessed code or data

– It is capable of keeping up with the CPU

– It act as a buffer between the CPU and the slower Main Memory. ( A buffer is a temporarily storage area)

– Traffic to and from CPU is in the form of words

– Traffic between the cache and the main memory is in the form of blocks referred to as cache lines

– ** The Cache Mapping Function Diagram

34

Cache operation - overview

• CPU requests contents of memory location• Check cache for this data• If present, get from cache (fast)• If not present, read required block from

main memory to cache• Then deliver from cache to CPU• Cache includes tags to identify which block

of main memory is in each cache slot

35

Cache Mapping Function• Cache mapping function is responsible for all

cache operations• It is implemented in hardware because of the

required high-speed operation• The mapping function determines the following

– Placement strategy: where to place an income block in the cache

– Replacement strategy: which block to replace when a miss occurs

– Read and write policies: how to handle reads and writes upon cache hits and misses

• What is cache hits and cache miss?

36

Cache Design

• Size

• Mapping Function

• Replacement Algorithm

• Write Policy

• Block Size

• Number of Caches

37

Types of mapping Function• Types of mapping Function commonly used

in placement policy– Associative mapping:

• if a block can be placed anywhere

– Direct mapping• If each block has only one place it can appear in the

cache

– Block-set-associative or Set associative• Is a combination of the two above• If a block can be placed in a restricted set of places

in a cache• A set is a group of blocks in the cache• A block is first mapped onto a set, and then the

block can be placed anywhere within that set

38

Placement Policies

• How is a block found if it is in the cache?– Cache has an address tag on each block from

that gives the block address– The tag of every cache block that might contain

the desired information is checked to see if it matches the block address from CPU

– To know that a cache does not have a valid information, valid bit is added to tag ta say whether or not this entry contains a valid address

– If the bit is not set, there cannot be a match on this address.

39

Memory Field• Block offset field selects the desired data

from the block

• The index field selects the set

• The tag field compared against it for a hit

Block Address Block offsetTag Index

40

REPLACEMENT POLICIES– Which block should be replaced on a cache

miss?

• When a miss occurs, the cache controller must select a block to be replaces with the desired data

• It is used for associative and set-associative mapping schemes, and also for virtual memory

41

REPLACEMENT POLICIES• Strategies employed for selecting which block to

replace– Random: To spread allocation uniformly, candidates

blocks are randomly selected

– Least Recently Used (LRU): • To reduce the chance of throwing out information that will be

needed soon, accesses to blocks are recorded

• If recently used blocks are likely to be used again, then the best candidate for disposal is the least recently used block

– First-in First-Out (FIFO): replace block that has been in cache longest

– Least Frequently Used (LFU): replace blocks which had fewest hits

42

Write Policy

• Must not overwrite a cache block unless main memory is up to date

• Multiple CPUs may have individual caches

• I/O may address main memory directly

43

Write Policies upon a Cache Hit• Write through

– All writes go to main memory as well as cache– Multiple CPUs can monitor main memory traffic to

keep local (to CPU) cache up to date– Lots of traffic– Slows down writes

• Write back– Updates initially made in cache only– Update bit for cache slot is set when update occurs– If block is to be replaced, write to main memory only if

update bit is set– Modified cache block is written to the main memory

only when it is replaced

44

Write back• To reduce the frequency of writing back

blocks on replacement a feature called dirty bit is employed

• When dirty bit is set indicates that the block has been modified while is in the cache, and the block is written back to main memory

• Otherwise the block has not been modified

45

Read and write miss policies• Read miss

– Block is brought in from main memory

– The desired word may be forwarded immediately as the block is being updated

– It may be delayed until the entire block has been stored in the cache

• Write miss– The block may be brought into the cache, and then

updated, termed write allocate

– The block may be updated in main memory and not brought into the cache, termed write-no-allocation

46

Cache Read and Write Policies

47

Hit Ratios and Effective Access Times

48

Table of Events for Example Program

49

Calculation of Hit Ratio and EffectiveAccess Time for Example Program

50

MEMORY UNIT• Two types of memories

– Main memory (also called internal memory or primary memory)

• Random Access Memory (RAM)

• Read Only Memory (ROM)

– Secondary memory (also called auxiliary or external memory)

• Hard disks

• Magnetic tapes/disks

• Floppy diskettes

• Compact disks (CDs)

51

MAIN MEMORY

– Is a smaller segment of memory used for temporary storage of programs, data and information.

– Are made using electronic elements which uses materials called semiconductor: hence referred to as SEMICONDUCTOR MEMORIES

– Is divided into elementary units called cells or location

– They are two-state devices having ‘1’ and ‘0’: Binary scheme

– Measured in Bytes: a byte hold one character

52

Internal Memory Types

53

RAM• Is a Random access memory

– Read/Write memory: data can be read and written from this memory

– Running programs, data to be processed and results are held here

– Volatile: data stored are normally lost with the loss of power

– It is referred as the memory capacity of the computer e. g 1 MB, 32 MB

– Temporary storage– Static or dynamic

54

Memory Cell Operation

55

Dynamic RAM (DRAM)• Bits stored as charge in capacitors• Charges leak• Need refreshing even when powered• Simpler construction• Smaller per bit• Less expensive• Need refresh circuits• Slower• Main memory• Essentially analogue

– Level of charge determines value

56

Dynamic RAM Structure

57

DRAM Operation• Address line active when bit read or written

– Transistor switch closed (current flows)

• Write– Voltage to bit line

• High for 1 low for 0

– Then signal address line• Transfers charge to capacitor

• Read– Address line selected

• transistor turns on

– Charge from capacitor fed via bit line to sense amplifier• Compares with reference value to determine 0 or 1

– Capacitor charge must be restored

58

Static RAM (SRAM)• Bits stored as on/off switches• No charges to leak• No refreshing needed when powered• More complex construction• Larger per bit• More expensive• Does not need refresh circuits• Faster• Cache• Digital

– Uses flip-flops

59

Static RAM Structure

60

Static RAM Operation• Transistor arrangement gives stable logic state• State 1

– C1 high, C2 low

– T1 T4 off, T2 T3 on

• State 0– C2 high, C1 low

– T2 T3 off, T1 T4 on

• Address line transistors T5 T6 is switch

• Write – apply value to B & compliment to B• Read – value is on line B

61

SRAM v DRAM• Both volatile

– Power needed to preserve data

• Dynamic cell – Simpler to build, smaller– More dense– Less expensive– Needs refresh– Larger memory units

• Static– Faster– Cache

62

ROM

• Is a Read-Only-Memory

• Programs and data are permanently stored and can only be read

• Nonvolatile: information cannot lost with the lost of power

• Information cannot be erased, changed or altered through regular program instruction

• Information and data can only be changed or altered by changing the circuitry

• Programs are written at the factory

63

Types of ROM• Written during manufacture

– Very expensive for small runs

• Programmable (once)– PROM– Needs special equipment to program

• Read “mostly”– Erasable Programmable (EPROM)

• Erased by UV

– Electrically Erasable (EEPROM)• Takes much longer to write than read• Not used for storage of data• Used for calibration

– Flash memory• Erase whole memory electrically

64

SECONDARY MEMORY• Large quantities of information can be stored

permanently, although they can be erased when desired

• Used for long term storage of information that is not in use, e. g. it holds programs, files of data and files of information

• Employs storage on magnetic media such as magnetic tapes, magnetic disks and magnetic drums.

• Examples are: • Magnetic Disks• Magnetic Tapes• Hard Disks• Floppy Diskette• Compact Disks (CDs)

65

Types of External memories

• Magnetic Disk– Hard Disk

• Optical– CD – Compact Disk

• Magnetic Tape

66

Magnetic disks - detail• Consists of a collection of platters (1-20),

rotating on a spindle• Platters are metal disks covered with

magnetic recording materials on both sides.• The disk surface is divided into concentric

circles designated tracks, typically 500-2500 tracks on each

• Each track is divided into sectors that contains information: 64 sectors per track

• A sector is the smallest unit that can be read or written

• All tracks have the same number of sectors

67

Magnetic disks - detail

• The movable arm contain a READ/WRITE head which either reads or writes information in a sector.

• The arm of each surface are connected together and move in conjunction, so that every arm is over the same track of every surface.

68

Magnetic disks

69

Organization of a Disk Platter

70

Disk Layout Methods Diagram

71

Magnetic Disks Characteristics

• Fixed (rare) or movable head

• Removable or fixed

• Single or double (usually) sided

• Single or multiple platter

• Head mechanism– Contact (Floppy)– Fixed gap– Flying (Winchester)

72

Fixed/Movable Head Disk

• Fixed head– One read write head per track– Heads mounted on fixed ridged arm

• Movable head– One read write head per side– Mounted on a movable arm

73

Removable or Not

• Removable disk– Can be removed from drive and replaced with

another disk– Provides unlimited storage capacity– Easy data transfer between systems

• Nonremovable disk– Permanently mounted in the drive

74

Multiple Platter

• One head per side

• Heads are joined and aligned

• Aligned tracks on each platter form cylinders

• Data is striped by cylinder– reduces head movement– Increases speed (transfer rate)

75

Multiple Platters

76

Magnetic Tape Drive• Widely used as backing storage for

programs and master files, and for storing transactions data output to the computer.

• Serial access, slower, very cheap• Use the same technology as Magnetic disk• What are the differences between Magnetic

tape drive and Magnetic Disks?• Draw back:

– They wear out– Have long rewind, eject, load and spin-up time

for helical scan tape

77

Floppy Disk

• 8”, 5.25”, 3.5”

• Small capacity– Up to 1.44Mbyte (2.88M never popular)

• Slow

• Universal

• Cheap

• Obsolete?

78

Optical Disk System• They utilize a laser reading and writing

optical disk device to store data• Stores large amount of data which will

remain constant and does not need to be changed

• Compact Disk read-only memory ( CD-ROM) which are just 11.8 cm in diameter can store up to 600 MB

• Many companies distribute their softwares and reference materials on these materials