Introduction to VLSI Circuits and Systems, NCUT 2007

Chapter 00

Preface

Introduction to VLSI Circuits and Systems積體電路概論

賴秉樑Dept. of Electronic Engineering

National Chin-Yi University of Technology

Fall 2007

Introduction to VLSI Circuits and Systems, NCUT 2007

Goal, Grading and Textbook

Equip students with basic VLSI design capability» Design and analyze digital VLSI chips using CMOS technology» Understand design issues at the layout, transistor, logic and register-tr

ansfer levels An Overview of Full Custom IC Design Flow, Cell-based IC Design Flow, and

FPGA Design Flow SPICE Simulation and Physical Layout Full Custom IC Design using Cadence, Hspice Simulation, and Calibre Verific

ation

Grading» Homework & Project: 30%» Midterm exam: 35%» Final exam: 35%

Textbook » John P. Uyemura, “Introduction to VLSI Circuits and Systems”, John

Wiley & Sons, Inc. (全華代理 ), ISBN 0-471-12704-3

Introduction to VLSI Circuits and Systems, NCUT 2007

Course Outline

Chapter 01: An Overview of VLSI Chapter 02: Logic Design with MOSFETs Chapter 03: Physical Structure of CMOS Integrated Circuits Chapter 04: Fabrication of CMOS Integrated Circuits (surpass) Chapter 05: Elements of Physical Design Chapter 06: Electrical Characteristics of MOSFETs Chapter 07: Electrical Analysis of CMOS Logic Gates Chapter 08: Designing High-Speed CMOS Logic Networks Chapter 09: Advanced Techniques in CMOS Logic Circuits Chapter 10: System Specifications Using Verilog HDL Chapter 11: General VLSI System Components (surpass) Chapter 12: Arithmetic Circuits in CMOS VLSI Chapter 13: Memories and Programmable Logic Chapter 14: System-Level Physical Design (surpass) Chapter 15: VLSI Clocking and System Design

Introduction to VLSI Circuits and Systems, NCUT 2007

The Integrated Circuit

1959: Jack Kilby, working at TI, invented a monolithic “integrated circuit”» Components connected by hand-soldered wiresand isolated by “shaping”, PN-diodes

used as resistors (U.S. Patent 3,138,743)

Figure 0.1 Diagram from patent application

Introduction to VLSI Circuits and Systems, NCUT 2007

Integrated Circuits

1961: TI and Fairchild introduce the first logic ICs ($50 in quantity)

1962: RCA develops the first MOS transistor

Figure 0.2 Fairchild bipolar RTL Flip-Flop Figure 0.3 RCA 16-transistor MOSFET IC

Introduction to VLSI Circuits and Systems, NCUT 2007

Computer-Aided Design

1967: Fairchild develops the “Micromosaic” IC using CAD» Final Al layer of interconnect could be customized for different applications

1968: Noyce, Moore leave Fairchild, start Intel

Introduction to VLSI Circuits and Systems, NCUT 2007

RAMs 1970: Fairchild introduces 256-bit Static RAMs

1970: Intel starts selling1K-bit Dynamic RAMs

Figure 0.4 Fairchild 4100 256-bit SRAM Figure 0.5 Intel 1103 1K-bit DRAM

Introduction to VLSI Circuits and Systems, NCUT 2007

The Microprocessor

1971: Intel introduces the 4004» General purpose programmable computer instead of custom chip for Japanese calcula

tor company

Figure 0.6 Intel 4004 Microprocessor

Introduction to VLSI Circuits and Systems, NCUT 2007

Type of IC Designs

IC Designs can be Analog or Digital

CMOS design methods» Microprocessor/DSP» Programmable Logic

Fast prototyping with FPGA or CPLD chips

» Gate Array and Sea of Gates Design» Cell-based Design

Designs synthesized automatically from a high-level language description

» Full-custom Design Every transistor designed and laid out by hand

» Platform-based Design System on a chip

Full Custom Design Flow

Cell Based Design Flow

Composer

Hspice

SBTSPICE

Virtuoso

Circuit-Level Design

Pre-Layout Circuit-Sim

Physical Layout

Physical Verification& RC Extraction Dracula

Post-Layout Sim Hspice

SBTSPICE

Tape OutTape Out

Spice Model

Spice Model& RC

SPW

BONeS

Matlab

Specification

System-Level Design & Sim

Visual Architect

Verilog-XL Synopsys VCS

Design-Compiler

Ambit

RTL-Level Sim

RTL Synthesis

MathWork RTW

BehaviorSynthesis

Cell Library

Verilog-XL

Synopsys VCS Cell Library

Model

Gate-Level Sim

Silicon Ensemble Ultra / Dracula

Apollo/HerculesPhysical Verification

RC ExtractionDraculaStar-RC

Post-Layout SimStar-timeTimeMill Star-sim

Tape OutTape Out

Cell-BasedFull-Custom FPGA

ASIC

Advanced VLSI Research CenterAdvanced VLSI Research Center

ASIC Design Flow

Introduction to VLSI Circuits and Systems, NCUT 2007

System-on-Chip

Introduction to VLSI Circuits and Systems, NCUT 2007

Systematic Design Flow

Introduction to VLSI Circuits and Systems, NCUT 2007

MOS Technology Trends

Introduction to VLSI Circuits and Systems, NCUT 2007

Silicon in 2010

Density Access Time

(Gbits/cm2) (ns)

DRAM 8.5 10

DRAM (Logic)

2.5 10

SRAM (Cache)

0.3 1.5

Die Area: 2.5 x 2.5 cmVoltage: 0.6 VTechnology: 0.07 m

Density Max. Ave. Power Clock Rate

(Mgates/cm2) (W/cm2) (GHz)

Custom 25 54 3

Std. Cell 10 27 1.5

Gate Array 5 18 1

Single-Mask GA 2.5 12.5 0.7

FPGA 0.4 4.5 0.25