chapter 17 microprogrammed control - computer systems...

YonseiYonsei UniversityUniversity

Chapter 17Chapter 17

MicroprogrammedMicroprogrammedControlControl

YonseiYonsei UniversityUniversity17-2

ContentsContents

• Basic Concepts• Microinstruction Sequencing• Microinstruction Execution• TI 8800• Applications of Microprogramming


IntroductionIntroduction• An alternative to a hardwired control unit is

a microprogrammed control unit(specified by a microprogram)

• Microprogrammed control unit– Sequencing through microinstructions– Generating control signals to execute each

microinstruction• A control signals are used to cause register

transfers and ALU operations• An approach to control unit design that was

organized and systematic and avoid the complexities of a hardwired implementation

Basic Concepts


• To implement a control unit as an interconnection of basic logic elements is no easy task

• An alternative, which is quite common in contemporary CISC processors, is to implement a microprogrammed control unit

• Microprogramming language• Microinstruction

– A sequence of instructions is a microprogram, or firmware

– Easier to design in firmware than hardware– More difficult to write a firmware than a software

MicroinstructionsMicroinstructions Basic Concepts


• All that the control unit is allowed to do is generate a set of control signals

• This condition(either on and off) can be represented by a binary digit for each control line

• So we construct a control word in which each bit represents one control line

MicroinstructionsMicroinstructions Basic Concepts


• A sequence of control words to represent the sequence of micro-operations

• The sequence of micro-operations is not fixed.• Put our control words in a memory(with

unique address)• Add an address field to each control word.(the

location of the next control word to be executed)

• Add a few bits to specify the condition

Horizontal MicroinstructionHorizontal Microinstruction Basic Concepts


Microinstruction AddressJump Condition-Unconditional-Zero-Overflow-Indirect Bit

System Bus Control Signals

Internal CPU Control Signals

(a) Horizontal Microinstruction

Microinstruction Address

Jump ConditionFunction Codes(b) Vertical Microinstruction

Typical Microinstruction FormatsTypical Microinstruction Formats Basic Concepts


• One bit for each internal processor control line

• One bit for each system bus control line• Condition field(to be executed next)

Format of MicroinstructionFormat of Microinstruction Basic Concepts


• To execute this microinstruction, turn on all the control lines indicated by a 1 bit; leave off all control lines indicated by a 0 bit. -> one or more micro-operations to be performed

• If the condition indicated by the condition bits is false, execute the next microinstruction in sequence

• If true, the next microinstruction to be executed is indicated in the address field.

Interpretation of MicroinstructionInterpretation of Microinstruction Basic Concepts


Jump to Indirect or Execute

Jump to Execute

Jump to Fetch

Jump to Opcode Routine

Jump to Fetch or Interrupt



Fetch Cycle Routine

Interrupt Cycle Routine

AND Rou Routine

ADD Routine

IOF Routine

Indirect Cycle Routine

Execute Cycle Beginning

Organization of Control Memory Basic Concepts


• A concise description of the complete operation of the control unit

• The sequence of micro-operations to be performed during each cycle (fetch, indirect, execute, interrupt)

• It specifies the sequencing of these cycles

Control MemoryControl Memory Basic Concepts


• The control memory contains the set of microinstructions

• The control address register contains the address of the next microinstruction to be read

• When a microinstruction is read from the control memory, it is transferred to the control buffer register

• Reading a microinstruction from the control memory is the same as executing that microinstruction

MicroprogrammedMicroprogrammed Control UnitControl Unit Basic Concepts


Control Unit Control Unit MicroarchitectureMicroarchitecture Basic Concepts


• To execute an instruction sequencing logic unit issues a READ command to the control memory

• The word whose address is specified in the control address register is read into the control buffer register

• The content of the control buffer register generates control signals and next-address information for the sequencing logic unit

• The sequencing logic unit loads a new address into the control address register based on the next-address information from the control buffer register and the ALU flags

• All this happens during one clock pulse

Control Unit FunctionsControl Unit Functions Basic Concepts


• Depending on the value of ALU flags and the control register, one of the three decisions are made

• Get the next instruction– Add 1 to the control address register

• Jump to a new routine based on a jump microinstruction– Load the address field of the control buffer register into the

control address register

• Jump to a machine instruction routine– Load the control address register based on the opcode in the IR

Three DecisionsThree Decisions Basic Concepts


Functioning of MCUFunctioning of MCU Basic Concepts


• The upper decoder– Translate the opcode of the IR into a control memory

address• The lower decoder

– Used for vertical microinstructions (not for horizontal microinstructions)

• The advantage of vertical microinstruction– More compact (fewer bits) at the expense of a small

additional amount of logic and time delay

DecoderDecoder Basic Concepts


Wilkes’s Control Unit Basic Concepts


Wilkes ControlWilkes Control

• Matrix partially filled with diodes• During a machine cycle, one row of the matrix

is activated with a pulse• This generates signals at those points where a

diode is present• Each row of the matrix is one microinstruction,

and the layout of the matrix is the control memory

Basic Concepts



• The difference with horizontal microprogramming– In the previous description, the control address register

could be incremented by one to get the next address– The next address is contained in the microinstruction– To permit branching, a row must contain two address

parts, controlled by a conditional signal

Basic Concepts



• The processor of the hypothetical machine includes the following registers– A : multiplicand– B : accumulator(least-significant half)– C : accumulator(most-significant half)– D : shift register

• Three registers– E : serves as both a MAR and temporary storage– F : program counter– G : another temporary register; used for counting

Basic Concepts


C(Acc) + C(n) to Acc1C(Acc) – C(n) to Acc1C(n) to Acc2C(Acc2) × C(n) to Acc, where C(n) ≥ 0C(Acc1) to n, 0 to AccC(Acc1) to nC(Acc) × to Acc C(Acc) × to AccIF C(Acc) < 0, transfer control to n; if C(Acc) ≥ 0, ignore(I.e.,proceed serially) Read next character on input mechanism into nSend C(n) to out put mechanism

Effect of order

Notation Acc = accumulatorAcc1 = most significant half of accumulatorAcc2 = least significant half of accumulatorn = storage location nC(X) = contents of X (X = register or storage location)

AnSnHnVnTnUnRnLnGnInOn

Order

)1(2 +− n

12 +n

Machine Instruction Set for Wilkes Machine Instruction Set for Wilkes Basic Concepts


Microinstruction for WilkesMicroinstruction for Wilkes Basic Concepts


Microinstruction for WilkesMicroinstruction for Wilkes

The addressof each micro-instruction

The action ofto be taken bythe ALU

The action ofto be taken bythe control unit

the settingof the twoflag(flip-flop)

the usingof the twoflag(filp-flop)

address of the next micro-instruction to be fetch

Basic Concepts


Microinstruction for Wilkes Microinstruction for Wilkes • Column 1

– The address of each micro-instruction• Column 2

– The actions to be taken by the ALU• Column 3

– The actions to be taken by the control unit• Column 4

– specifies the signal that sets the flag• Column 5

– use of the two flags(flip-flop)• Columns 6 and 7

– The address of the next microinstruction to be fetched

Basic Concepts


Advantages and DisadvantagesAdvantages and Disadvantages

• Advantages– Simplifies the design of the control unit

• Cheaper and less error-prone to implement– The decoders and sequencing logic unit of a

microprogrammed control unit are very simple pieces of logic

• Disadvantages– Slower than a hardwired unit of comparable technology

Basic Concepts


• Despite this, microprogramming is the dominant technique for implementing control units in contemporary CISC, due to its ease of implementation

• RISC processors typically use hardwired control units

Advantages and DisadvantagesAdvantages and Disadvantages Basic Concepts


• The two basic task(microprogrammed control unit)– Microinstruction sequencing : Get the next

microinstruction from the control memory– Microinstruction execution : Generate the control

signals needed to execute the microinstruction• Design Consideration

– The address of the next microinstruction to be executed• Determined by instruction register – occurs once

per instruction cycle • Next sequential address – most common• Branch – necessary part of a microprogram

Design ConsiderationDesign Consideration MicroinstructionSequencing


• Condition flags, the contents of the instruction register and a control memory address must be generated for the next microinstruction

• Based on the format of the address information– Two address fields– Single address field– Variable format

Sequencing TechniquesSequencing Techniques MicroinstructionSequencing


• The simplest approach is to provide two address fields in each microinstruction

• A multiplexer is provided that serves as a destination for both address fields plus the instruction register

• This scheme requires more bits in the microinstruction than other approaches

Two Address FieldsTwo Address Fields MicroinstructionSequencing


BCL Two Address FieldsBCL Two Address Fields MicroinstructionSequencing


• A common approach is to have a single address field– Options for next address are as follows

• Address field• Instruction register code• Next sequential address

• The address-selection signals determine which option is selected– Reduces the number of address fields to one– The address field often will not be used– There is some inefficiency in the microinstruction

coding scheme

Single Address FieldSingle Address Field MicroinstructionSequencing


BCL Single Address FieldBCL Single Address Field MicroinstructionSequencing


• Two entirely different microinstruction formats– The first format

• The next address is either the next sequential address or an address derived from the instruction register

– The second format• Either a conditional or unconditional branch is being

specified– One disadvantage of this approach is that one entire

cycle is consumed with each branch microinstruction

Variable FormatVariable Format MicroinstructionSequencing


BCL Variable FormatBCL Variable Format MicroinstructionSequencing


Address GenerationAddress Generation• Various address-generation techniques

– Explicit– Implicit

• Conditional branch instruction depends on the following information– ALU flags– Part of the opcode or address mode fields of the

machine instruction– Parts of a selected register, such as the sign bit– Status bits within the control unit

MicroinstructionSequencing


MappingAddition

Residual control

Two-fieldUnconditional branch

Conditional branch

ImplicitExplicit

Variable Address GenerationVariable Address Generation MicroinstructionSequencing


BA (8)BC (4)

BB (4)BE (4)

BD (4) BF (4)

IBM 3033 Control Address RegisterIBM 3033 Control Address Register MicroinstructionSequencing


• The opcode portion of a machine instruction must be mapped into a microinstruction address

• A common implicit technique– One that involves combining or adding two portions of

an address to form the complete address – IBM 3033, IBM S/360

– Residual control • The use of a microinstruction address that has

previously been saved in temporary storage within the control unit

Address GenerationAddress Generation MicroinstructionSequencing


• Microcomputer version of a PDP-11• Use a 22-bit microinstruction and a control

memory of 2K22-bit words

LSILSI--11 Microinstruction Sequencing11 Microinstruction Sequencing MicroinstructionSequencing


• The next microinstruction address is determined in one of five ways– Next sequential address : In the absence of other

instructions, the control unit’s control address register is incremented by 1

– Opcode mapping : At the beginning of each instruction cycle, the next microinstruction address is determined by the opcode

– Subroutine facility : One level– Interrupt testing : Certain microinstructions specify a

test for interrupts. If an interrupt has occurred, this determines the next microinstruction address

– Branch : Conditional and unconditional branch microinstructions are used

LSILSI--11 Microinstruction Sequencing11 Microinstruction Sequencing MicroinstructionSequencing


Microinstruction ExecutionMicroinstruction Execution

• The microinstruction cycle is the basic event• Each cycle is made up of two cycle

– Fetch and execute• This section deals with the execution of a

microinstruction

MicroinstructionExecution


Control Unit OrganizationControl Unit Organization MicroinstructionExecution


• Vertical/horizontal• Packed/unpacked• Hard/soft microprogramming• Direct/indirect encoding

Taxonomy of MicroinstructionTaxonomy of Microinstruction MicroinstructionExecution


• We can do better than Wilkes’s scheme if we observe that not all of the possible combinations will be used– Two sources cannot be gated to the same

destination– A register cannot be both source and destination– Only one pattern of control signals can be presented

to the ALU at a time– Only one pattern of control signals can be presented

to the external control bus at a time

5C 12C



• Given some number Q < possibilities– These could be encoded with bits, with

( < K )– Tightest possible form – not used

• It is as difficult to program as a pure decoded (Wilkes) scheme.

• It requires a complex and therefore slow control logic module.

K2Q2log

Q2log



• Some compromises are made– More bits than are strictly necessary are used to

encode the possible combinations– Some combinations that are physically allowable are

not possible to encode• Reduce the number of bits• The net result is to use more than bitsQ2log



PackedVerticalSoft

UnpackedHorizontalHard

Terminology

Highly encodedFew bitsAggregated view of hardwareEasy to programConcurrency not fully exploitedComplex control logicSlow executionOptimize programming

UnencodedMany bitsDetailed view of hardwareDifficult to programConcurrency fully exploitedLittle or no control logicFast executionOptimize performance

Characteristic

The Microinstruction SpectrumThe Microinstruction Spectrum MicroinstructionExecution


• As the bits become more packed, a given number of bits contains more information

• The term horizontal and vertical relate to the relative width of microinstructions

• The term hard and soft microprogramming are used to suggest the degree of closeness to the underlying control signals and hardware layout– Hard microprograms are generally fixed and

committed to read-only memory– Soft microprograms are more changeable and are

suggestive of user microprogramming



(a) Direct Signals

Microinstruction EncodingMicroinstruction Encoding MicroinstructionExecution


(b) Indirect Encoding



• The design of an encoded microinstruction format– Organize the format into independent fields. Each field

depicts a set of actions such that actions from different fields can occur simultaneously

– Define each field such that the alternative actions that can be specified by the field are mutually exclusive

– Only one of the actions specified for a given field could occur at a time



• Functional encoding – Identify functions within the machine and designates

fields by function type– For example, if various sources can be used for

transferring data to the accumulator, one field can be designated for this purpose

• Resource encoding – View the machine as consisting of a set of

independent resources and devotes one field to each.(e.g., I/O, memory, ALU)



• Another aspect of encoding– Whether it is direct or indirect– With indirect encoding, one field is used to

determine the interpretation of another field• For example

– ALU with eight different arithmetic operation and eight different shift operations

– A 1-bit field could be used to indicate whether a shift or arithmetic operation is to be used; a 3-bit field would indicate the operation

– This technique generally implies two levels of decoding, increasing propagation delay



(a) Vertical Microinstruction Repertoire

Alternative Microinstruction FormatsAlternative Microinstruction Formats MicroinstructionExecution


(b) Horizontal Microinstruction Format

Alternative Microinstruction FormatsAlternative Microinstruction Formats MicroinstructionExecution


• LSI-11 Control Unit Organization• LSI-11 Microinstruction Format

LSILSI--11 Microinstruction Execution11 Microinstruction Execution MicroinstructionExecution


• The board contains three LSI chips, an internal bus known as the microinstruction bus(MIB), and some additional interfacing logic

• The organization of the LSI-11 processor• The control store chip or chips contain the 22-

bit-wide control memory• MIB ties all the component together

LSILSI--11 Control Unit Organization11 Control Unit Organization MicroinstructionExecution


Block Diagram of the LSIBlock Diagram of the LSI--1111 MicroinstructionExecution


Organization of LSIOrganization of LSI--11 Control Unit11 Control Unit MicroinstructionExecution


• The Translation array– The opcode us used to determine the start of a

microroutine– At appropriate times, address mode bits of the

microinstruction are tested to perform appropriate addressing

– Interrupt conditions are periodically tested– Conditional branch microinstructions are evaluated

LSILSI--11 Microinstruction Execution11 Microinstruction Execution MicroinstructionExecution


Complement word (byte)

Shift word (byte) right (left) with (without) carry

Bit clear word (byte)

Exclusive-OR word (byte)

OR word (byte)

Output word (byte, status)Test word (byte)

Read (write) acknowledgeAND word (byte, literal)

Read (write) and increment word (byte) by 2Logical Operations

Read (write) and increment word (byte) by 1Decrement word(byte) by 1

WriteSubtract word(byte) with carry

ReadCompare word(byte, literal)

Input status word (byte)Subtract word(byte)

Input word (byte)Conditionally add digits

Input/Output OperationsAdd word(byte) with carry

Conditionally MOV word (byte)Conditionally add word(byte)

Load G lowConditionally increment (decrement) byte

Set (reset) flagsNegate word (byte)

Conditional jumpIncrement word (byte) by 2

ReturnIncrement word (byte) by 1JumpTest word (byte, literal)

MOV word (byte)Add word (byte, literal)

General OperationArithmetic Operations

Some LSISome LSI--11 Microinstruction11 Microinstruction MicroinstructionExecution


• LSI uses an extremely vertical microinstruction format, which is only 22 bits wide

• Optimize the performance of the control unit within the constraint of a vertical, easily programmed design

• The high-order 4bit control special functions on the processor board

LSILSI--11 Microinstruction Format11 Microinstruction Format MicroinstructionExecution


(a) Format of the Full LSI-11 Microinstruction



(b) Format of the Encoded Part of the LSI-11 Microinstruction



• The Control memory consists of 4K words• The first half of these (0000-07FF) contain 108-

bit microinstruction• The remainder (0800-0FFF) are used to store

126-bit microinstruction• Although this is a rather horizontal format,

encoding is still extensively used• The ALU operates on inputs from four

dedicated, non-user-visible registers A, B, C, D

IBM 3033 Microinstruction ExecutionIBM 3033 Microinstruction Execution MicroinstructionExecution


IBM 3033 Microinstruction FormatIBM 3033 Microinstruction Format MicroinstructionExecution


IBM 3033 Control FieldsIBM 3033 Control Fields MicroinstructionExecution


Texas Instrument 8800 Texas Instrument 8800

• The 8800 SDB consists of the following components– Microcode memory– Microsequencer– 32-bit ALU– Floating-point and integer processor– Local data memory

TI 8800


TI 8800 Block DiagramTI 8800 Block Diagram TI 8800


• The microinstruction format for the 8800 consists 128 bits broken down into 30 functional fields

• The fields are grouped into five major categories– Control of board– 8847 floating-point and integer processor chip– 8832 registered ALU– 8818 microsequencer– WCS data field

Microinstruction FormatMicroinstruction Format TI 8800


TI 8800 Microinstruction FormatTI 8800 Microinstruction Format TI 8800


• To generate the next microinstruction address for the microprogram

• This 15-bit address is provided to the microcode memory

• Five source – Microprogram counter(MPC) register– Stack– DRA and DRB port– Register counters RCA and RCB– External input onto the bidirectional Y port

MicrosequencerMicrosequencer TI 8800


• Principal functional groups– 16-bit microprogram counter(MPC)– Two register counters, RCA and RCB– 65-word by 16-bit stack– Interrupt return register and Y output– Y output multiplexer by which the next address can be

selected from MPC, RCA, RCB, external buses DRA and DRB, or the stack

MicrosequencerMicrosequencer TI 8800


TI 8800 TI 8800 MicrosequencerMicrosequencer TI 8800


• Registers RCA and RCB may be loaded from the DA bus

• The values may be used as counters to control the flow of execution and may be automatically decremented when accessed

Registers/CountersRegisters/Counters TI 8800


• The stack allows multiple levels of nested calls or interrupts and it can be used to support branching and looping

• Six stack operation are possible– Clear– Pop– Push– Read– Hold– Load stack pointer

StackStack TI 8800


• The microsequencer is controlled by the 12-bit field of the current microinstruction, field 28

• Subfield– OSEL (1bit)– SELDR (1bit)– ZEROIN (1bit)– RC2-RC0 (3bits)– S2-S0 (3bits)– MUX2-MUX0

Control of Control of MicrosequencerMicrosequencer TI 8800


• As an example, the instruction INC88181 is used to cause the next microinstruction in sequence to be selected, If the currently selected condition code is 1

• INC88181 = 000000111110– Decode directly into

• OSEL = 0• SELDR = 0• ZEROIN = 0• R = 000• S = 111• MUX = 110

Control of Control of MicrosequencerMicrosequencer TI 8800


MicrosequencerMicrosequencer Microinstruction BitsMicroinstruction Bits TI 8800


TI 8832 ALU Instruction FieldTI 8832 ALU Instruction Field TI 8800


• The set of current applications for microprogramming includes the following– Realization of computers– Emulation– Operating system support– Realization of special purpose devices– High level language support– Microdiagnostics– User tailoring

Applications of MicroprogrammingApplications of Microprogramming Applications of Microprogramming

chapter 17 microprogrammed control - computer systems...

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