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Fundamental of Computer Architecture By Panyayot Chaikan [email protected] 240- 208 November 01, 2003

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Chapter 6 สถาปัตยกรรมไมโครโพรเซสเซอร์แบบต่างๆ Processor Architectures. เนื้อหา. Von-Neumann Architecture Harward Architecture CISC(Complex Instruction Set computer) Architecture RISC(Reduced Instruction Set computer) Architecture VLIW(Very Long Instruction Word) Architecture. - PowerPoint PPT Presentation

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Fundamental ofComputer Architecture

By Panyayot [email protected]

240-208

November 01, 2003

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 2

Chapter6สถาปั�ตยกรรมไมโคร

โพรเซสเซอร�แบบต�างๆProcessor

Architectures

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 3

เนื้��อหา

Von-Neumann ArchitectureHarward ArchitectureCISC(Complex Instruction Set computer) ArchitectureRISC(Reduced Instruction Set computer) ArchitectureVLIW(Very Long Instruction Word) Architecture

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 4

How to classify processors

Categorized by memory organization Von-Neumann architecture Harvard architecture

Categorized by instruction type CISC RISC VLIW

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 5

Harvard architecture Separate memory into 2 types Program memory Data memory

Used in MCS-51, MIPS etc.

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 6

Harvard architecture

P rogramD ata

A ddress

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P rocessorR ead

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240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 7

Harvard Architecture

From http://www.ee.nmt.edu/~rison/ee308_spr00/supp/000119/harvard.gif

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 8

Von-Neumann architecture

Combine program and data in 1 chunk of memory

Example : 80x86 architecture

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 9

Von-Neumann architecture

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240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 10

Von-Neumann architecture

From http://www.ee.nmt.edu/~rison/ee308_spr00/supp/000119/princeton.gif

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 11

CISC Feature Complex instruction set computer Large number of instructions

(~200-300 instructions) Specialized complex instructions Many different addressing modes Variable length instruction

format Memory to memory instruction For Example : 68000, 80x86

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 12

RISC Feature Reduced instruction set computer Relatively few number of instructions (~50)

Basic instructions Relatively few different addressing modes

Fixed length instruction format Only load/store instructions can access memory

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 13

RISC Feature: continued

Large number of registers

Hardwired rather than micro-program control

For Example : MIPS, Alpha, ARM etc.

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 14

RISC vs CISC CISC -- High Code Density

Fewer instructions needed to specify the algorithm

RISC -- Simpler to Design & Faster to Silicon Higher Performance -- smaller die size

Lower power consumption Easier to develop compilers to take advantage of all features

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 15

Example of CPU Architectures

Intel: 80x86 Motorola: 680x0 Sun : Sparc Silicon Graphics : MIPS HP : PA-RISC IBM: Power PC Compaq: Alpha

CISC

RISC

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 16

VLIW Very Long Instruction Word

One instruction contains serveral independent operations that are executed in parallel

LOAD R4,R2

ADD R1,R2

OR R5,R2

INVERT R7

OR R5,R2

INVERT R7

LOAD R4,R2

ADD R1,R2

1 Instruction

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 17

VLIW ProcessorP rocessor

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240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 18

VLIW

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 19

VLIW Instruction level parallelism rely on the compiler to determine which instruction may be executed in parallel

The number of operations in VLIW instruction is equal to the number of execution units in the processor

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 20

VLIW : Pros and cons Advantage

Simpler and Faster than RISC

Disadvantage Incremental in execution unit=> the program must be recompiled

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 21

VLIW Widely used in DSP(Digital Signal processing) applications high performance and low cost

Less successful in general-purpose computer customers demand software compatibility between generations of a processor

240-208 Fundamental of Computer Architecture Chapter 6 – Processor Architectures 22

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