Chapter 6:Chapter 6:Computer ComponentsComputer Components

Dr Mohamed MenacerDr Mohamed MenacerTaibah UniversityTaibah University

2007 - 20082007 - 2008

Computer ComponentsComputer Components

The Control Unit and the Arithmetic and The Control Unit and the Arithmetic and Logic Unit constitute the Central Logic Unit constitute the Central Processing UnitProcessing Unit

Data and instructions need to get into the Data and instructions need to get into the system and results outsystem and results out Input/outputInput/output

Temporary storage of code and results is Temporary storage of code and results is neededneeded Main memoryMain memory

Computer Components: Top Level ViewComputer Components: Top Level View

Instruction CycleInstruction Cycle

Two steps:Two steps: FetchFetch ExecuteExecute

Fetch CycleFetch Cycle

Program Counter (PC) holds address of next Program Counter (PC) holds address of next instruction to fetchinstruction to fetch

Processor fetches instruction from memory Processor fetches instruction from memory location pointed to by PClocation pointed to by PC

Increment PCIncrement PC Unless told otherwiseUnless told otherwise

Instruction loaded into Instruction Register (IR)Instruction loaded into Instruction Register (IR)

Processor interprets instruction and performs Processor interprets instruction and performs required actionsrequired actions

Execute CycleExecute Cycle

Processor-memoryProcessor-memory data transfer between CPU and main memorydata transfer between CPU and main memory

Processor I/OProcessor I/O Data transfer between CPU and I/O moduleData transfer between CPU and I/O module

Data processingData processing Some arithmetic or logical operation on dataSome arithmetic or logical operation on data

ControlControl Alteration of sequence of operationsAlteration of sequence of operations e.g. jumpe.g. jump

Combination of aboveCombination of above

Example of Program ExecutionExample of Program Execution

Instruction Cycle State DiagramInstruction Cycle State Diagram

InterruptsInterruptsMechanism by which other modules (e.g. Mechanism by which other modules (e.g. I/O) may interrupt normal sequence of I/O) may interrupt normal sequence of processingprocessing

Program (e.g. overflow, division by zero)Program (e.g. overflow, division by zero)

TimerTimer Generated by internal processor timerGenerated by internal processor timer Used in pre-emptive multi-taskingUsed in pre-emptive multi-tasking

I/OI/O from I/O controllerfrom I/O controller

Hardware failureHardware failure e.g. memory parity errore.g. memory parity error

Program Flow ControlProgram Flow Control

Interrupt CycleInterrupt Cycle

Added to instruction cycleAdded to instruction cycle

Processor checks for interruptProcessor checks for interrupt Indicated by an interrupt signalIndicated by an interrupt signal

If no interrupt, fetch next instructionIf no interrupt, fetch next instruction

If interrupt pending:If interrupt pending: Suspend execution of current program Suspend execution of current program Save contextSave context Set PC to start address of interrupt handler routineSet PC to start address of interrupt handler routine Process interruptProcess interrupt Restore context and continue interrupted programRestore context and continue interrupted program

Transfer of Control via InterruptsTransfer of Control via Interrupts

Instruction Cycle with InterruptsInstruction Cycle with Interrupts

Instruction Cycle (with Instruction Cycle (with Interrupts) - State DiagramInterrupts) - State Diagram

Multiple InterruptsMultiple InterruptsDisable interruptsDisable interrupts Processor will ignore further interrupts whilst Processor will ignore further interrupts whilst

processing one interruptprocessing one interrupt Interrupts remain pending and are checked Interrupts remain pending and are checked

after first interrupt has been processedafter first interrupt has been processed Interrupts handled in sequence as they occurInterrupts handled in sequence as they occur

Define prioritiesDefine priorities Low priority interrupts can be interrupted by Low priority interrupts can be interrupted by

higher priority interruptshigher priority interrupts When higher priority interrupt has been When higher priority interrupt has been

processed, processor returns to previous processed, processor returns to previous interruptinterrupt

Multiple Interrupts - SequentialMultiple Interrupts - Sequential

Multiple Interrupts – NestedMultiple Interrupts – Nested

Time Sequence of Multiple Time Sequence of Multiple InterruptsInterrupts

ConnectingConnecting

All the units must be connectedAll the units must be connected

Different type of connection for different Different type of connection for different type of unittype of unit MemoryMemory Input/OutputInput/Output CPUCPU

Computer Computer ModulesModules

Memory ConnectionMemory Connection

Receives and sends dataReceives and sends data

Receives addresses (of locations)Receives addresses (of locations)

Receives control signals Receives control signals ReadRead WriteWrite TimingTiming

Input/Output Connection(1)Input/Output Connection(1)

Similar to memory from computer’s Similar to memory from computer’s viewpointviewpoint

OutputOutput Receive data from computerReceive data from computer Send data to peripheralSend data to peripheral

InputInput Receive data from peripheralReceive data from peripheral Send data to computerSend data to computer

Input/Output Connection(2)Input/Output Connection(2)

Receive control signals from computerReceive control signals from computer

Send control signals to peripheralsSend control signals to peripherals e.g. spin diske.g. spin disk

Receive addresses from computerReceive addresses from computer e.g. port number to identify peripherale.g. port number to identify peripheral

Send interrupt signals (control)Send interrupt signals (control)

CPU ConnectionCPU Connection

Reads instruction and dataReads instruction and data

Writes out data (after processing)Writes out data (after processing)

Sends control signals to other unitsSends control signals to other units

Receives (& acts on) interruptsReceives (& acts on) interrupts

Further ReadingFurther Reading

In fact, read the whole site!In fact, read the whole site!

www.pcguide.com/www.pcguide.com/