chess review november 21, 2005 berkeley, ca edited and presented by experimental research alberto...

Chess ReviewNovember 21, 2005Berkeley, CA

Edited and presented by

Experimental Research

Alberto Sangiovanni-VincentelliUC Berkeley

Chess Review, Nov. 21, 2005"Experimental Research", ASV 2

Overview

• Experimental research is an essential component of CHESS– Feedback on approach– Inspiration for new theory– Impact

• Wide range– Industrial and Government test cases

• Automotive (safety-critical distributed systems) to be covered in the afternoon

• System-on-Chip (high-complexity platforms) • Signal Processing Applications• Hierarchical and Distributed Control

– Internal experimental test benches• Wireless Sensor Networks (security, low power)• UAVs (complex control, sensor integration)

– New domains:• Hybrid Systems in Systems Biology


Overarching Criteria

• An application should exercise – Theory: hybrid models, Models of

Computation, control algorithms– Tools and Environments– Path to implementation

• An application should be relevant for industry or for government agencies


Some Applications Addressed

Automotive

Avionics: UAVs

Networked Embedded Systems

Systems Biology


Outline

• Industrial cases– System-on-Chip (high-complexity platforms)– Signal Processing Applications – Hierarchical and Distributed Control

• Internal experimental test benches– UAVs (complex control, sensor integration)

• New domains:– Hybrid Systems in Systems Biology


Metropolis and Xilinx Characterization Environment

AbstractModular Model

Real Performance

Data

Narrow the Gap

Xilinx Virtex II

ML310

Synthesis File

Metropolis currently has a flow to automatically generate sample architectures, extract performance information, and use that information dynamically during simulation.

D. Densmore, A.Donlin, A. Sangiovanni-Vincentelli, “FPGA Architecture Characterization for System Level Performance Analysis”, Design Automation and Test Europe (DATE), 2006. (to appear)


Metropolis Xilinx Design Environment

Metropolis currently has a library of Xilinx based components which a designer can instantiate as an architecture instance. When composed their structure can be extracted for performance data or structural synthesis flows.

AbstractModular Model

Real Performance

Data

Narrow the Gap

Xilinx Virtex II

ML310

Synthesis File


Xilinx Example Designs

Metropolis and Xilinx flow highlights:

• Produces accurate simulation results with fidelity.

• Can capture structural effects like clock cycle and resource usage.

• Large portions automatic, independent, and one time cost operations.


Intel JPEG Encoder Application

Pre-processing

DCT Quantization Huffman

ScanColorConv.

1D-DCTTrans-pose

1D-DCTTrans-pose

ZigZag Mult RLE Lookup

Shift-128

Add4

Sub4

Mult1

Mult2

Merge

Add2

Sub2


Intel MXP5800 Architecture

• Designed for Imaging Applications• Highly Heterogeneous Programmable Platform• Top Level: 8 Image Signal Processors with Mesh


Design Space Exploration

• Replication of scenarios from Intel library

• Accurate Performance Modeling

• Easy implementation of additional scenarios

Cycles for different scenarios

0

500

1000

1500

2000

2500

Hardware Balanced OPE emphasis OPE Heavy

Scenario

Cycl

es

Metropolis ScenariosIntel Software Library

[A. Davare, Q. Zhu, J. Moondanos, ASV, “JPEG Encoding on the MXP5800: A Platform-based Design Case Study,” Proceedings of EstiMedia 2005]


Picoradio Baseband System-Level Design

Early-Late Gate synchronization algorithm (timing recovery)

Explored the different partitioning between analog and digitalExplored the different partitioning between analog and digital

FPAA FPGA

Predominantly analog processing


Design Space Exploration for Integrator

– Define configuration space• different biasing, different device

sizings, etc.

– Impose constraints• bounding ranges for devices size,

biasing conditions, etc.

– Characterization framework• Matlab client: generates

configurations, and the configuration space is statistically sampled

• Ocean server: manages circuit simulation in Spectre and extracts performance figures

– Generate feasible performance space

Explore the Analog PlatformsExplore the Analog Platforms


Outline





Modeling Environment

Signal Processing Platform (SPP) Toolchain:Supported Activities (1)

System Modeling

ConfigurationTranslation

GenerateConfiguration

GenerateConfiguration

Analysis/SimulationTranslation

Component Modeling

BuildBuild

TestTest

GenerativeModeling

GenerativeModeling

Data-TypeDependencyData-Type

Dependency

DataflowDependency

DataflowDependency

PlatformModelingPlatformModeling

HW/SWPartitioning

HW/SWPartitioning

ComponentAllocation

ComponentAllocation

StructuralOptimization

StructuralOptimization

FunctionalValidationFunctionalValidation

LatencyLatency

TimingTiming

Design SpaceModeling

Design SpaceModeling

ModelComponents

ModelComponents

Metamodel VerificationMetamodel Verification

ComponentCore Modeling

ComponentCore Modeling

Platform IntegrationModeling

Platform IntegrationModeling

Platform WrapperSynthesis

Platform WrapperSynthesis

Analysis Interchange

Format (xAIF)

CoActive Platform Configuration

Instrumentation

SPML/GME TranslatorsSPML/GME Builder,Translator

Goal:Component-based development of large-scale, hard real-time embedded signal processing systems

Used by:Raytheon, for embedded DSP applications

Available via:ESCHER


TargetHW

TargetHW

S2C

Analysis ToolsAnalysis ToolsD

2S

SPML/GMESystem Design

Space

CO-ActiveExecution Platform

MATLABFunctional Validation

DESERTDesign space exploration

S2D

SPML/GMEPoint-Design Configuratio

n

S2A

AIRESSchedulability

VHDL CONFCommInterf

Libraries

Signal Flow Modeling

Signal Flow Modeling

Simulink/Stateflow

Ptolemy

Signal Processing Platform (SPP) Toolchain:Tool Components (2)

Optimization Tools


Large-scale, real-time embedded system architecture modeling and analysis

10

0 100Time (in ms)

15 1510 10 15 10 15

MFDFDDM

PCMFMIO

Typical LatencyWC Latency

RELEX Fault Trees

Safety Models

ARINC 653 “Partitioned” Processor Utilization

Software Component Model

Network Connectivity Model

ARV-A(L) SW Services Model MCS SW

AiTR Service Workflow Model

w/Fault Info

Scenario Net Conditions

DESModels

SafetyModels

Network Utilization

Performance AnalysisC4ISRSIM

C4ISR-FPFT

Goal:Architectural modeling and analysis of very large-scale, distributed real-time embedded systems.

Used by:Boeing and SAIC, for analysis of embedded systems architectures. Anticipated code size: 30M SLOC


Model-based Tools for Embedded Fault Diagnostics and Reconfigurable Control

Run-time Platform (RTOS)

Interface & Controllers

Hybrid Observer

Hybrid Diagnostics

Failure Propagation Diagnostics

Active Model

Controller Selector

Reconfiguration Manager

Fault Detector Plant

Models

PlantModels

Visual modeling tool for creating:

•Physical models of the “plant”

•Controller models (incl. reconfiguration)

ControllerModels

ControllerModels Strategy

Models

StrategyModels

Modular run-time environment contains:•Hybrid observer and fault detectors•Hybrid and Discrete diagnostics modules•Controller model library •Reconfigurable controller

Used by:Boeing for autonomous vehicles.


Outline

• Industrial cases– System-on-Chip (high-complexity platforms)– Signal Processing Applications – Hierarchical Distributed Control




Hierarchical Distributed Control

• Model-based approach using Limited Lookahead Methods• Application: Complex systems made up of interacting

subsystems; Challenge: Hierarchical control of Advanced Life Support (ALS) Systems for NASA – regenerative systems

• Problem Specification:– Dynamic model of subsystems expressed as hybrid

discrete-time equations– Controller input discretized to finite number of values, i.e.,

control input – finite space– There exist buffers (real or virtual) between subsystems– Individual independent controllers for subsystems,

interactions handled through higher level controllers– Modeling abstractions that focus on buffer input/output

relations provide the framework for building models at higher levels.

– Design model-based controllers with limited look-ahead schemes that search for optimal control input in finite space.


Distributed Control applied to Advanced Life Support (ALS) Systems

Controller

AESSystem

Controller

Global ControllerUtility-basedOptimizeperformance

Constraint-basedDistribution of

resourcesWeekly crew

schedule

WRS System

WRSController

ARSSystem

AESController

Supervisory Controller

Power Generation

CrewChamber

SABATIERCDRARO AES OGS

LC-BWP LC-RO LC-AES LC-CDRA LC-SAB LC-OGS

WRS System

BWP

CrewScheduler

Set pointcontrol


ALS: Data flow + Control

O2 Reg.

WRS Controller

Supervisory Controller

WWT CWT

AES RO

BWP PPS

RO_mode,RO_time

AES_mode,AES_time

CW_FO_WRSWW_FI_WRS

Crew Controller

Crew Chamber

Crew

WW_L_WRS CW_L_WRSday_schedule

Estimation module

eCW_FI_CRWeWW_FO_CRW

eCW_FO_ARSeWW_FI_ARS

CW_FI_CRW

CRW_state

CCH_state

week_scheduleWRS_mode

ARS Controller

CDRA

SABATIER

OGSCW_FI_ARS

H2TO2T

CO2

WW_FO_CRW

WW_FO_AES

ARS_mode

O2T_L_ARS

CO2T_L_ARS

H2T_L_ARS

HCA_FO_CRW

LCA_FO_ARS

System Resources

Monitor

CDRM_mode,CDRM_time

OGS_mode,OGS_time

PA_FI_CRW

O2_FO_ARS

H2_FO_ARS

water_level

O2_level

power_level

Measurement

Command

Mass Flow

Measurement

Command

Mass Flow

CO2_FI_ARS

CO2_FO_ARS

H2_FI_ARS


Results

• Evaluate controller performance for 90 day challenge mission – 4 astronauts in lunar habitat

Potable water: Initial: 650 liters; End: 200 liters

Energy stored: Min: 200 kW-hour; Max: 1300 kW-hour

Oxygen tank: Initial = 9.9 kg; Max = 10 kg; Min = 9.9 kgCO2 tank: Initial = 0 kg; Max = 2.6 kg; Min = 1.4 kg


Stability Analysis for Limited Lookahead Control

• System Dynamics• Single-Mode Discrete-Time

• One-step online control policy

))(),(()1( kukxfkx

||),(||minmax: sUuQx

xuxfr

• Objective• For a domain D and an initial

state • xsD, decide if there is a

neighbor-• hood B(r,xs) D of xs such that:• B(r,xs) is finitely reachable from

any point in D

• The system remains in B(xs) under the online control law

• Technical Results To find B(xs) find (NLP) where

Theorem: B(r,xs) is the minimal containable region of xs

To determine finite reachability

Theorem: B(r,xs) Q B(r,xs) is finitely reachable from xRn

Uu

ssn xxxuxfRxQ

||||||),(||: |

||),(||minmax: sUuQx

xuxfr

Q

set of all states from which a control action is available to move the system closer to xs

Qxs

B(r,xs)


Outline





Time-Triggered Software for UAV

• Real-time systems, e.g., automobile control system, flight control system, air traffic control system etc, must produce their results within specified time intervals.

• Real-time systems can be classified to event-triggered systems and time-triggered systems.– In the event-triggered system, all tasks are initiated by an

event which can be sensor inputs or results of other tasks etc. It may be hard to specify precise time for any action due to variance of time of an event, which results in jittering of the system.

– In the time-triggered system, all tasks are initiated by predetermined points in time.

• A missed instant of any action can result in a catastrophe, possibly including the loss of human life, in hard real-time system.

• A hard real-time application demands a predictable, reliable and timely operation which a time-triggered system is able to guarantee.


Plant : Berkeley Autonomous Helicopter

• Radio controlled helicopter from YAMAHA• Control software was originally designed based on an event-triggered

architecture• We have decided to design and implement time-triggered embedded

control software for the UAV as above

Actuator

ESTIMATE

GPS

INS

200ms

10ms

20ms

10ms

Time-triggered Embedded Control S/W

HOVER

CRUISE

bu

ffer

INITIALIZE


Time-triggered executing sequence

10ms

servos

gpsinswaypoint

task1 task1

position

10ms

Hover mode

10ms

servos

gpsins

task2 task2

gpsins

position

position

10ms

Mode switch Cruise

modewaypoint waypoint

gpsinswaypoint

position

• Reading sensor inputs, writing actuator outputs and changing mode are happening at points of predetermined real time

• The time-triggered embedded architecture provides predictable (deterministic) operations of software


Test Results: Hovering and Cruising


Summary

• Time-triggered embedded control software was designed and implemented for the Berkeley autonomous helicopter system

• Embedded control software was implemented with modularity in mind to keep the software clean and make it easy to read and enhance

• Software is structured to have multi-mode and mode switches among modes. New modes can be added and the current mode can be modified or removed with relative ease

• Designed software was mounted and tested on the safety critical helicopter system


Outline

• Industrial cases– System-on-Chip (high-complexity platforms)– Signal Processing Applications – Hierarchical Distributed Control




Antibiotic biosynthesis in Bacillus subtilis

SpaI

signaltransduction

spaK

spaR

spaG

spaE

spaF

spaI

spaS

spaC

spaT

spaB

subtilinprecursor

SpaK

SpaR~p

SpaT

SpaE+SpaG

SpaF

SpaB

SpaC

p

mature subtilin

modificationtransportcleavage

immunitySigH

SigH

spaRK SpaRK SpaSspaSS1

S2

= discrete states (with randomness)

= continuous statesmodeling with hybrid systeminput

output


Planar cell polarity in Drosophila

phenotype

cell model proteins feedback network

•Simulations•Parameters estimation

•Study of mutants


Box Invariance for biological reactions systems

• Concept of “Set Invariance” around the system equilibrium/a• Naturally prone to describe biological systems (modeled via rate equations)• More flexible than classical notion of (Lyapunov) stability• Yields itself to describe robustness properties• Closely related to lots of concepts from linear algebra and systems theory• Can specify logical conditions for verification purposes

Claim : most of the stable biological reactionssystems are indeed “box invariant”

Very descriptive concept.

A dynamical system is said to be box invariant if there exist a box-shaped invariance set around its equilibrium point(s)

In Collaboration with the A. Tiwari, SRI International


Quantitative and Probabilistic Extensions of Pathway Logic

Pathway Logic (SRI Int.): tool for symbolic modeling of biological pathways

based on formal methods and rewriting logic

• Protein functional domains and their interactions • Queries performed through formal methods

Extensions:1. reasoning with quantitative data2. probabilistic interactions between different domains

In Collaboration with the PL team, SRI International

chess review november 21, 2005 berkeley, ca edited and presented by experimental research alberto...

Documents

chess review

hybrid systems

ml310 synthesis file

library of xilinx

gap xilinx virtex

xilinx flow highlights

asv8 xilinx example

asv6 metropolis