choosing the right processor

Choosing the Right Processor for your Application

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Technology beyond the Dreams™ Copyright © 2006 Pantech Solutions Pvt Ltd.

AgendaChoosing the right processor for your applicationHardware design flowSoftware design flowVarious design phasesRecap of product life cycle


Choosing the right Processor


Microprocessor, by-itself, completely useless – must have external peripherals toInteract with outside world

CPU

CONTROL

ADDRESS

DATA

BOOTROM

Used at startup

Instruction(program)

ROMTransducers

KeyboardScreenUARTParallelinterface

etc

DataRAM

Microprocessor Basic


CPU

Micro controller


CPU121416

Memory(Data) 8

Memory (Program)

CPUMemory

(Program&Data)

Von Neumann Harvard

Von Neumann VS Harvard


Why do we need DSP Processor?


CPLD Vs FPGA


CPLDs have the advantage of virtually “instant-on” functionality

CPLDs can be lower cost than FPGAs, especially if a configuration source is required for the FPGA*

CPLDs typically use the same manufacturer tool suite as FPGA components*

CPLDs tend to have simpler architectures / structures and fewer I/O and registers than FPGAs*

In some applications CPLDs can have superior performance to FPGAs* (ex: timing and I/O levels)

CPLD Vs FPGA


Logic blocks I/O blocksClock routingRouting matrix

CPLD Architecture


I/O blocksClock routingRouting matrixMemoryMultipliers /DSP blocksProcessor core

Logic blocks

FPGA Architecture


FPGA Technologies


No need for logic optimization using Karnaugh map.

Design is portable from one vendor application to the another.

Technology Independent.

Design cycle time reduces dramatically.

Provides concise representation of the design in contrast to logic diagrams

Why HDL?


VHDLAda-like –Highly structuredNo case sensitivityEncapsulation –Architecture –Entity

Verilog Vs VHDL


DSP Vs FPGA


Higher PerformanceParallel algorithm implementation

Customizable DesignOptimize for speed and cost

System IntegrationLess board real estateLess chips could mean less system cost

When to use DSP in FPGA


Power SupplyCLKCLK

CLKcustomIF-logic

SDRAM SDRAMSRAM SRAMSRAM

Memory Controller

UART LC

DisplayController

InterruptController Timer

AudioCodec

CPU(uP / DSP) Co-

Proc.

GP I/O

AddressDecode

Unit

EthernetMAC

Traditional embedded system design using DSP


Next Step...Next Step...

FPGACLKCLK

CLKcustomIF-logic


Memory Controller

UART

DisplayController

Timer

Power Supply

LC

AudioCodec

CPU(uP / DSP) Co-

Proc.

GP I/O

AddressDecode

Unit

EthernetMAC

InterruptController


Power Supply


LC

AudioCodec EPROM

Configurable system on Chip-CSoC


2 or More Independent Processors in 1 Package

Symmetric Multiprocessing Number of Identical Processors Common Shared Memory One Operating System

Asymmetric Multiprocessing Different Processors, Instruction Sets Different Operating Systems Possibly Without Shared Memory

Multicore Processor


•Identical Cores•Identical access to all System Resources•Memory, Disk, UARTs, Communication Controllers,•Examples: Analog Devices Blackfin 561

SMP-BF561


Processors Need Not be IdenticalProcessor Specialization May Increase Performance.T.I.’s OMAP•General Purpose Processor+Digital Signal Processor(“DSP”)

AMP-TI OMAP


AgendaProcessor selection CriteriaChoosing the right processor for your applicationHardware design flowSoftware design flowVarious design phasesRecap of product life cycle


QFP

SOLDERINGIRON

SOLDERING

STATION

OVEN

Selection of packages

DIP SOIC

BGAPLCC


Hardware Design Flow

SCHEMATIC DESIGN LAYOUT DESIGN

ASSEMBLY & TESTING


Software Design Flow


GenerateNetlist

ISE

Platform Ext.Proj.Nav. / VHDL

*.mhs

*.elf

*.c *.asm

Compile &Link

UpdateBitstream

*.bit

*.h

Gen.Libs

Platform Definition(peripherals, configuration, connectivity, address space)

EDK: Embedded Development Kit XPS: Xilinx Platform Studio ISE: Integrated Software Environment MHS: Microprocessor Hardware Specification

*.bit

XPS

GenerateBitstream

*.ucf

Hardware Software

*.bmm

Software Design Flow -FPGA


Data2MEM

Download Combined Image to FPGA

Compiled ELF Compiled BIT

RTOS, Board Support Package

EmbeddedDevelopment Kit

Integrated HW/SW/FPGA Flows

Instantiate the ‘System Netlist’ and Implement

the FPGA

?

HDL Entry

Simulation/Synthesis

Implementation

Download BitstreamInto FPGA

Chipscope

Standard FPGAHW Development Flow

VHDL or Verilog

System NetlistInclude the BSPand Compile theSoftware Image

?

Code Entry

C/C++ Cross Compiler

Linker

Load SoftwareInto FLASH

Debugger

Standard EmbeddedSW Development Flow

C Code

Board SupportPackage

12 3 Compiled BITCompiled ELF

Xilinx Platform Studio SDK

Xilinx Platform Studio


FPGA Design Flow


Design Compilation Simulation Verification

Graphical Entry

HDL Entry

Compiler

Timing Diagram

Timing Analysis

Program CPLD

Development Board

FPGA Design Flow


Unified Tool Releases, All Tools Available for Evaluations

Verilog VHDL C/C++ MATLAB Simulink 3rd Party

Unified Design Environment The Ultimate System Integration Design Tools

New !New !

HW D

esign

ers

SW D

evelo

pers

Archite

cts

Verific

ation

Team Syst

em

Integ

rator

s. . . .


Programmable

technologyGate countNumber of

I/O’S

Manufacturer

Family

Device

Power Consumption

Speed,voltage

Packaging

Design Decision in Choosing an FPGA


Processor selection Criteria

Development tools Performance Cost Operating systems Hardware tools Peripherals Power consumption Supplier reputation


SW DEVELOPMENT

HW DEVELOPMENT

SW SELECTION

HW SELECTION

INTEGRATION TESTING & TUNING DEPLOYMENT

Compiler RTOSs

Networking Protocols Java

SupportGraphics Support Project

& Code Mgmt.

RTOS

Simulation

Rapid Prototyping

Real-time Data

Visualization

Memory Leak

Detection CPUProfiling

Post-mortem Debug

Semiconductor Co-funded

Development Hardware Coverage

Board Bring-Up

Board Diagnostics & Manufacturing

Test

Source-level

Debugging

Real-time System

Analysis & Triggering

Execution Tracing Code

Coverage Analysis

In-field Debugging

© 2008 Pantech Solutions™ | All rights reserved

Embedded Development using FPGA


Simulation Evaluation

Emulation


Recap of Designing an Embedded System


http://nptel.iitm.ac.in/videocourselist.phphttp://youtube.com/iit

Website and Resources

http://nptel.iitm.ac.in/videocourselist.php

http://youtube.com/iit


http://www.esacademy.com/8051

(Philips Flash ISP software)

http://www.keil.com/demo/ Evaluation version for 8051 and ARM

http://www.microchip.comPIC

FPGAhttp://www.xilinx.com/support/download/index.htm

https://www.altera.com/support/software/download/sof-download_center.html

http://www.analog.com/en/embedded-processing-dsp/content/blackfin_bold_training/fca.html

DSP

www.ti.com/




Questions ?

choosing the right processor

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