36 High Frequency Electronics

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CIRCUIT ENVELOPE

Circuit Envelope Simulation:A Powerful Resource for4G Power Amplifier Design

By Josh MooreAWR Corporation

Designers of RFpower amplifiersfor 3G and 4G

wireless systems faceconflicting challengesunlike those they haveencountered before. Forexample, while today’shigher-order modulation

schemes require exceptional linearitythroughout both transmit and receive signalpaths, wireless carriers require the highestpossible efficiency at the system level.Optimizing a circuit for one parameter invari-ably requires sacrificing performance of theother. Combine this and other unavoidabledesign conflicts with demands for greaterinstantaneous bandwidth and designersindeed have a conundrum. Achieving accept-able solutions requires not just standard time-domain and frequency-domain simulators butthe unique contributions of circuit envelopesimulation as well. This tool is seamlesslyintegrated within AWR 2011, and togetherwith Microwave Office™ and Visual SystemSimulator™ (VSS) software, it can shave timefrom the design process while producing high-performance, manufacturable products.

The appeal of circuit envelope simulationresults from its ability to more efficiently sim-ulate complex digital waveforms than cantime-domain and frequency-domain simula-tors such as harmonic balance (HB) andSPICE. The technique does not disregard theinherent advantages of these venerable simu-lators but rather builds on their unique char-acteristics by combining modulation data inthe time domain and carrier signals in the fre-quency domain. It delivers a spectrum that

gives designers access to the modulation infor-mation (i.e. amplitude and phase) of everyharmonic of the signal as they evolve overtime. The result is the ability to analyze com-plex digitally-modulated waveforms fast andwith greater accuracy than with the afore-mentioned simulators alone.

The further advantages provided by AWR’scircuit envelope simulation result from itssynergy with the other tools within the AWR2011 Design Suite. That is, Microwave Officehigh-frequency design software incorporatesthermal device effects and captures distribut-ed design elements in a complete linear andsteady-state nonlinear design suite. Its circuitrepresentation flows seamlessly into the sys-tem-level environment of VSS, where circuitenvelope simulation is then employed to mon-itor voltage and current waveforms in secondsrather than the minutes or hours required bytransient solvers. With access to DC dissipat-ed power as an output and any number of DC

This issue’s cover featuresAWR’s circuit envelope

simulation, which allowsdesginers to analyze how

circuit design choicesaffect performance with

modulated signals

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CIRCUIT ENVELOPE

input pins to an underlyingMicrowave Office power amplifier cir-cuit, VSS and circuit envelope simu-lation can enable complex activefeedback, dynamic biasing, orMAC/PHY layer simulation scenar-ios.

Beyond Harmonic Balance Harmonic balance is the basic

nonlinear simulation engine for RFand microwave design, solving fornonlinear, steady-state voltages andcurrents in the frequency domain. Aslong as the signals of interest areperiodic, HB engines are computa-tionally efficient, very fast, and pro-duce excellent results when providedwith good models.

Harmonic balance, howeverassumes that the data stream is peri-odic. So, when simulating a complexmodulated signal (common to moderndigital communication systems) withan arbitrary bit stream, the period ofthe input signal must be at least aslong as the stream of input data.When sampled appropriately, thisleads to a huge number of spectralfrequencies that must all be solvedfor simultaneously via HB tech-niques. Likewise, when simulatingmemory effects using HB simulationtechniques for example, their aperi-

odicity must first be reformulated asa predictable signal. Corre-lationeffects, not part of the actual physicalphenomena, can then creep into theresults and cause inaccuracies.

Another limitation of HB pertainsto circuit/system-level co-simulation.When it is advantageous to includefeedback within the system simula-tion—where the circuit simulation iscontrolled by the system simulationusing previous circuit simulationtime samples—this type of co-simula-tion simply cannot be performed witha steady state HB circuit simulator.

Enter Circuit Envelope SimulationTo capture dynamic operating

phenomena such as memory effects,time-domain simulation is required,usually in the form of a transient,SPICE-type solver which, unlike HB,requires the entire waveform to besampled. A 5 MHz-wide modulatedsignal on a 2 GHz carrier, for exam-ple, would require an integer multi-ple (N) of 2 GHz as a sampling fre-quency. If the simulated signal frameis 10 ms long, the simulation enginemust simulate N × 2 GHz × 10 ms =N × 2e7 samples to achieve results.While this will produce a solution, somany time steps are required thatsimulation speed slows to a crawl.

Circuit envelope simulationassumes that the input waveform hassomewhat different characteristics.Unlike HB, time-domain techniquessuch as SPICE and circuit envelopecan capture non-periodic dynamicoperating-point information requiredfor simulating memory effects.Rather than sampling the RF carrier,circuit envelope simulation samplesonly the modulation envelope. In theexample above, this translates intoN × 5 MHz × 10 ms samples which isa 400x reduction in the number oftime steps. Each time sample in a cir-cuit envelope simulation is effectivelysolving the harmonic balance equa-tions at the modulation carrier andrelated harmonic frequencies, so asingle time sample in envelope ismore expensive than a single SPICEtransient time point (typically 10 to100x slower) and thus a 400x reduc-tion in time samples would result ina 4 to 40x improvement in circuitenvelope simulation time versus thatof SPICE. As the modulation band-width increases, the benefits of cir-cuit envelope simulation willdecrease, and for very wide bandmodulation, a SPICE type simulationwill more than likely be faster.

Circuit envelope simulation is aperfect co-simulation match for VSS,which also samples the modulationenvelope while creating, demodulat-ing, and analyzing modulated wave-forms such as GSM, EDGE, WCDMA,and LTE. Circuit envelope simulationlets designers place N-port Micro-wave Office circuit schematics direct-ly into VSS system diagrams andsimulate them to see how theybehave in the presence of modulatedwaveforms. Dynamic voltages andcurrents and thus power-added effi-ciency can be of value weighted aswell. The AWR software environmentmakes it possible to easily movebetween simulators and analysistechniques. Schematic elements cor-responding to analyses and measure-ments can have multiple roles allow-ing linear, HB, transient, and circuit

Figure 1 · Infineon power amplifier viewed within AWR 2011 (circuit enve-lope schematic, layout, 3D view and simulation results).

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envelope simulation to coexist in thesame schematic.

As circuit envelope (Figure 1) is atime-domain technique, it is neces-sary to specify voltage and currentprobe-points on the schematic.Traditional input/output ports for thedesign are handled by PORT ele-ments. Additional probes are alsoplaced at the drain and in the DCbias path to supply DC voltage andmonitor RF and DC voltage and cur-rent. Furthermore, since circuit enve-lope simulation is not restricted tothe DC, fundamental, and harmonic

elements of an HB analysis, the deci-sion about where to place probes canbe made based on much broader setof design criteria than signal sourcesand paths. The time-domain aspect ofcircuit envelope simulation allowsdesign criteria like dynamic biasamplifiers, bias turn-down, or activeequalization to be incorporated intothe simulation as well.

Prior to incorporating the poweramplifier in a circuit envelope testbench in VSS software, a hierarchicalelement must be created withinMicrowave Office. The “subckt” ele-

ment representing the power amplifi-er design (Figure 2) has a typicalPORT input driven by a source and acorresponding PORT output, but theelement is augmented by five addi-tional pins defined by the (NCONN)-named connectors: two voltage sup-ply lines, one RF voltage monitor, oneRF current monitor, and one DC cur-rent monitor.

Moving on to the envelopeschematic, the complete power ampli-fier can be assembled from its con-stituent parts. The device withinMicrowave Office software can becombined with other elements suchas digital pre-distortion, filtering,and antenna and channel models.Port definitions are added to the ele-ment to describe port functionalityrelative to the circuit simulation sothe input port or ports, output ports,and DC or bias input lines can be con-trolled and monitored. Total DCpower dissipation can be monitoredas a separate port, calculated withinthe Microwave Office simulation, andthen ported to VSS and circuit enve-lope for analyses of power-added effi-ciency and other DC-related parame-ters. The FCOUTSPEC parameterspecifies the harmonic around whichthe envelope is to be simulated. BothRF and DC can be indicated for eachof the output ports.

RF source and signal blocks com-bined with a Vector Signal Analyzer(VSA) block determine the simula-tion criteria. A voltage source isadded to control the DC bias into thepower amplifier, which in a moreadvanced design could be dynamicbiasing, active time-domain circuitry,or MAC or PHY layer control, andeven including feedback, because thevoltage pin is within the VSS/circuitenvelope time-domain environment.This is not available in linear or HBanalyses alone. In Figure 3, a digitalpredistortion circuit precedes thepower amplifier in the signal path tocreate a more efficient, highly-lineardesign solution that could not bedesigned with only a time-domain or

Figure 2 · Circuit envelope nonlinear simulation-based instance ofInfineon power amplifier

Figure 3 · Complete VSS diagram with circuit envelope co-simulation andpredistortion.

October 2011 43

HB simulator.The analysis results provide all

the information required for systemand circuit co-design without con-straints on the simulation techniquesused (Figure 4). Harmonic content,spectral masks, Pin-versus-Poutcurves, and gain all can be analyzedwith AWR’s new circuit envelopetechnology. Additionally, theseresults can now be combined withtime-domain analyses, such as collec-tor current and voltage waveformsand RF perturbations of DC biaslines. Active turn-down through sim-ulated control of DC pins can also beexplored and analyzed. Waveformsand outputs are continually updatedbased on user-specified sampling andaveraging criteria and can run real-time, which allows tuning and opti-mization within both MicrowaveOffice and VSS software.

SummaryThe stringent demands of the

higher-order modulation schemesemployed in today's leading-edgewireless systems make it essentialthat all ASP banks of RF poweramplifier performance be taken intoconsideration. The integration of cir-cuit envelope simulation within the

AWR 2011 design suite and its seam-less interaction with VSS allowdesigners to create amplifiers thatdeliver both high linearity and effi-ciency are of broad bandwidths thatcould not otherwise be achieved.

AcknowledgementsAWR would like to thank Infineon

for their assistance with the testingof this new feature from AWR. Thedesign shown in all figures is cour-tesy of Infineon Technologies and cor-responds to their ELMO models forLD9-based smart discrete devices.

Author InformationJosh Moore, a University of

Illinois Engineering alumnus, ispresently a Solution Architect withAWR. Before joining AWR, Josh spentseveral years at Nokia as an RFdesign engineer working on base sta-tion and mobile device receivers, andat Agilent Technologies as an ADSApplication Engineer.

For more information contact:

AWR Corporationwww.awrcorp.comTel: 310-726-3000E-mail: info@awrcorp.com

Figure 4 · Multi-carrier spectrum, time domain waveforms, as well as draincurrent and voltage for Infineon PA as simulated by AWR 2011 softwarefeaturing circuit envelope technology.

Engineers:

SSttaayy IInnffoorrmmeedd!!

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