circuitree - 07 jul 2009

July 2009July 2009

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PhotovoltaicsThe Sky is Just the Beginning

In This Issue Organic Photovoltaics (OPV) Wet Chemistry for

Silicon Solar Cells

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2 July 2009 • circuitree.com

www.circuitree.com • Circuitree July Issue, 2009, Volume 22, Number 7

CIRCUITREE (ISSN 1059-843X) is published 12 times annually, monthly, by BNP Media II, L.L.C., 2401 W. Big Beaver Rd., Suite 700, Troy, MI 48084-3333. Telephone: (248) 362-3700, Fax: (248) 362-0317. No charge for subscriptions to qualifi ed individuals. Annual rate for subscriptions to nonqualifi ed individuals in the U.S.A.: $104.00 USD. Annual rate for subscriptions to nonqualifi ed individuals in Canada: $137.00.00 USD (includes GST & postage); all other countries: $154.00 (int’l mail) payable in U.S. funds. Printed in the U.S.A. Copyright 2009, by BNP Media II, L.L.C. All rights reserved. The contents of this publication may not be reproduced in whole or in part without the consent of the publisher. The publisher is not responsible for product claims and representations. Periodicals Postage Paid at Troy, MI and at additional mailing offi ces. POSTMASTER: Send address changes to: CIRCUITREE, P.O. Box 2147, Skokie, IL 60076. Change of address: Send old address label along with new address to CIRCUITREE, P.O. Box 2147, Skokie, IL 60076. Canada Post: Publications Mail Agreement #40612608. GST account: 131263923. Send returns (Canada) to Bleuchip International, P.O. Box 25542, London, ON, N6C 6B2. For single copies or back issues: contact Ann Kalb at (248) 244-6499 or [email protected].

features

16 An Overview of Wet Chemistry Processing for the Manufacture of Silicon Solar CellsMatt MoynihanThe PV industry remains one of the few industries with sustainable long-term growth opportunity because drivers such as concerns over imported oil dependence and global warming remain strong even during the current economic situation.

22 Organic Photovoltaics Offer Promise for Future DevelopmentJim Handy and Alain HarrusThere are several new technologies in development, any of which may ultimately displace today’s conventional technologies. Perhaps one of the most promising is organic PV (OPV).

Web Exclusive: Tapping Into PCBs for PV Thermal Issues Zulki KhanRead it at www.circuitree.com/CDA/Articles

departments

5 Lead Wire

6 The Wire

34 Technical Product Spotlights

37 Classifi ed Ads

40 Upcoming Events

40 Ad Index

columns

14Tech TalkKarl DietzFine Lines in High Yield (Part CLXVI) - Through-Silicon-Via Technology — Part A.

15Flexible ThinkingJoe Fjelstad Bending and Flexing Design Concerns III - Back to Basics, Part 25.

26Ask the FlexpertsMark VerbruggeTreat Me Gently…Treat Me Kind.

27BPA Growth CurvesMark Hutton Where Are We on the Business Cycle?

28Intelligent DesignLee W. Ritchey On the Use of Blind and Buried Vias.

29Environmentally SpeakingFern Abrams Change in Climate for Climate Change Regulation.

30Market OutlookWalt Custer and Jonathan Custer-Topai Ever Increasing (But Still Restrained) Optimism.

16 22

July 2009 • Vol. 22, No. 7 • www.circuitree.com

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Lead Wire

T o say that photovoltaics (PV) is a hot topic could very well be an under-statement. While it started as a practical way to power satellites and other spacecraft, a majority of PV modules are used for power-grid energy production. In fact,

according to statistics for sustainable investing (socialfunds.com), photovoltaic produc-tion has doubled every two years since 2002 and is currently the fastest growing energy technology in the world. Moreover, PVs and solar energy are actively talked about as part of the solution to a wide array of political and economic concerns—the environment, developing countries, trade, terrorism, war, and, of course, energy—all for one big reason: it will reduce the world’s dependence on oil for its energy needs.

The new White House Administration has stated many times that it believes the future of our economy and national security relies heavily on the challenges of developing new, cleaner forms of energy. Some of these challenges, particularly with solar energy and PVs, are grid parity and the effi ciency of the technology. Grid parity is the point at which photovoltaics can provide energy equal to or cheaper than the traditional power grids that commonly run on fossil fuels or nuclear power. Some of the largest users of photovoltaics—Germany, Japan, and the U.S.—offer fi nancial incentives to help spark investment and usage, but what it comes down to is improving the technology. And that’s where the PCB industry comes in. Read this month’s features, dedicated entirely to the topic of photovoltaics, and fi nd out how. Discover the environmental and technological benefi ts of organic PVs in “Organic Photovoltaics Offer Promise for Future Development,” and get “An Overview of Wet Chemistry Processing for the Manufacture of Silicon Solar Cells.” Also, learn how PCB technology can help tackle heat dissipation in CircuiTree’s Web-exclusive article, “Tapping Into PCBs for PV Thermal Issues.”

Enjoy and thanks for reading!

Hot, Hot, Hot By Dar ryl Seland

Group Publisher • Tom Esposito (610) 436-4220 x 8530, [email protected]

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circuitree.com • July 2009 5

7 circuitree.com • July 2009

Ningbo Solar Extends Manufacturing Capability With DEK Metallization LinesNingbo Solar has purchased eight metal-lization lines from DEK Solar in a bid to extend its capacity to deliver high quality

solar cells to the global marketplace. One of the world’s leading photovoltaic manu-facturers, Ningbo Solar decided to imple-ment the DEK PV1200 lines following an extensive evaluation period which yielded impressive results.

Ningbo Solar purchased its fi rst PV1200 line in Q2 2008 for installation in Q3. In fact, led by DEK’s China Service Manager Speed Yan with the backing of the company’s global engineering team, installation was so effi cient that DEK was able to hand over the line in the second week. Soon after the fi rst line installation, Ningbo Solar placed an order for a further seven lines which were delivered later in the year.

Calumet Electronics Announces Acquisition of Laser Direct Imaging CapabilityLaser Direct Imaging (LDI) of printed cir-cuit boards uses a laser to image a pattern directly onto a photoresist-coated panel, completely eliminating the production and use of a traditional photo tool. The most obvious benefi ts of LDI are the time and handling defects associated with the cre-ation, use, handling and storage of photo tools.

Calumet is now operating an Orbotech DP-100 Direct Imaging System and off ers a video presentation on the application on its Web site. For more information, visit http://www.calumetelectronics.com/PCB_University.htm.

Richter Elektronik Awards Orders to Höllmüller EquipmentHerrenberg — Richter Elektronik GmbH’s requirement for a new SES machine (for stripping-etching-stripping) and a Solder-mask Developer has been met by HMS Höllmüller with its new ComTech EVOLU-TION designs. Based on results with thin laminate trans-port and the ability to produce extremely fi ne pattern structures, the design features of the newly developed ComPlate and ComTech EVOLUTION modules were critical factors for the awarding of the contract. The customer became convinced of the advantages of this technology during a visit


to the HMS Roth facility. The completed machines will be deliv-ered to Richter s facilities in Summer 2009.

Digi-Key Corporation, EnerSys Ink Distribution DealThief River Falls, Minn. — Electronic com-ponents distributor Digi-Key Corporation announced the companies have entered into a global distribution agreement. Digi-

Key is stocking EnerSys’ 2-, 4-, and 6-volt Cyclon® batteries. These products, slated to be featured in future print and online catalogs, are now available for purchase on Digi-Key’s global web sites.

Ucamco Launches New PCB CAM Productivity Enhancement ServiceUcamco (formerly Barco ETS) reports that their new online PCB CAM productivity

service is increasing front-end engineering throughput up to 30 percent. The new service is based around advanced remote-access software. This gives Ucamco’s software support engi-neers in Ghent, Belgium, secure access to a customer’s workstation anywhere in the world. The Ucamco engineer observes and records the complete data prepara-tion process for two to three jobs. Working offl ine, he can then prepare a free report, based on his knowledge of UCAM soft-ware and industry best practice, recom-mending changes to the customer’s pro-cess and itemizing the time savings which can be gained. If the customer agrees, the Ucamco engineer will prepare offl ine new set-ups, new software modules, targeted scripts, and/or a customer-specifi c training program. At a time convenient to the cus-tomer he will use the remote-access soft-ware to download the new features and provide the training fully online. For more information contact Filip at [email protected].

Koh Young Europe Celebrates Grand OpeningSeoul, South Korea – 3D inspection leader Koh Young Technology Inc. celebrated the offi cial Grand Opening of its European offi ces on May 14 with an ‘open house’ and program for customers, distributors, and staff . The event, complete with a ribbon-

cutting ceremony at the Alzenau, Germany facility, marked the offi cial opening of two Koh Young Europe offi ces in Germany and Ireland, respectively. The new offi ces are strategically intended to serve the needs of customers in continental Europe as well as in the UK and Ireland and to facilitate sales and support in this growing area of Koh Young’s global reach. Koh Young Europe

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Ltd. in Dublin, Ireland functions as the tech-nical service and support and administra-tion offi ce. Koh Young Europe GmbH in Alzenau, Germany is the European demo and training center. The German offi ce is located in close proximity to Frankfurt Airport and features an equipment demonstration and sales center, plus seminar and training facilities in the same building. A screen printer in the facility allows hands-on process training with customers. Harald Eppinger, European Sales Manager, has been appointed Man-aging Director for the German offi ce, while Thorsten Niermeyer, Global Sales Director, has been appointed Managing Director for the Dublin offi ce.

Insulectro Launches New WebsiteLake Forest, Calif. — Insulectro, a leading North American supplier of materials used to manufacture printed circuit boards, announced the launch of a new website

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Henkel Appoints Wise to Lead Global Sales Efforts for Electronics Assembly Business

In a move designed to further expand the company’s market and sales leadership, Henkel Corporation has selected Mr. Jim Wise to direct

the global sales eff ort for its electronics assembly business. With over 23 years of chemical industry experience, the last 20 of which have been spent with Henkel businesses, Wise brings unique perspective and expertise to his new role. Providing a rare combina-tion of both scientifi c understanding and management skill, Wise’s background includes positions in chemistry R&D,

technical service, applications, manufac-turing, sales and new business develop-ment. Wise formerly held top-level posi-tions with Nacan, Acheson and Emerson & Cuming and was an asset gained through Henkel’s acquisition of National Starch and Chemical’s Adhesives and Electronics Materials business. As manager of the global sales eff or t, Wise has several business development priorities, the fi rst of which is to address current and emerging customer require-ments, delivering robust, yet cost-eff ec-tive materials solutions that enable competitiveness for today’s and tomor-row’s assembly technologies. In addition, eff ectively communicating the breadth of the organization to customers is top on Wise’s list, as Henkel now success-fully delivers materials solutions and an unmatched depth of knowledge for numerous product classes that include solder materials, conductive adhesives, circuit board protection materials, inks

and coatings, underfi lls and thermally conductive materials, just to name a few. A native of Canada, Wise is a graduate of McMaster University in Hamilton Ontario, Canada, where he received a Bachelors of Science in Chemistry, minored in Physics and Mathematics and graduated with honors. As leader of Henkel’s global sales initiatives, Wise will be based in the com-pany’s Billerica, Massachusetts facility and will report to Henkel’s electronics assembly group Senior Vice-President and General Manager, Joseph DeBiase.

Huntsman Advanced Materials Announces New Global Management TeamBasel, Switzerland – Advanced Mate-rials, a division of Huntsman Corporation, announces a new leadership team, eff ective immediately. Reporting to André Genton, President of Advanced Materials are:• Harald Wiedemann Vice President, Europe

Middle-East & Indian subcontinent

ect o cs s

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• James Huntsman Vice President, Am ericas• Steen Weien Hansen Vice President, Asia

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Finance

Rehm Thermal Systems Signs Distribu-tion Agreement with Altus GroupRehm Thermal Systems continued their global expansion program with the announcement of a new partnership agreement. Altus Group will now handle the distribution of Rehm’s diverse line of soldering products in the United Kingdom and Ireland.

3M Announces Management Changes St. Paul, Minn.— (Business Wire) — 3M announced changes to its senior man-agement team following the retire-

ment of Dr. Moe S. Nozari, executive vice president, Consumer and Offi ce Business, eff ective July 1. Nozari, 67, has been with 3M since 1971. Joe E. Harlan has been elected executive vice president, Consumer and Offi ce Busi-ness, eff ective July 1. Harlan came to 3M from GE in 2001 and in that time has served as vice president, Financial Planning and Analysis; president and chairman of the board, Sumitomo 3M Limited; and, since 2004, as executive vice president, Electro and Communications Business. Joaquin Delgado has been elected executive vice president, Electro and Communications Business, eff ective July 1. Delgado, who holds a Ph.D. in Polymer Science and Engineering, joined 3M in 1987 and served in numerous technical capacities before being named managing director, 3M Korea, in 2003. He was named vice president, Research and New Business Ventures, Consumer and Offi ce Business in 2005 and in 2007 was named vice presi-

dent and general manager, Electronics Markets Materials Division.

Bare Board Group is Supplier of the Year for National InstrumentsLargo, Fla. — Bare Board Group, Inc. (BBG), a U.S. supplier of quality printed circuit boards, has earned top honors as Supplier of the Year for National Instruments, an internationally known company with more than 5,000 employees. The award recog-nizes BBG as the supplier that consistently performs beyond expectations throughout the year, delivering world-class perfor-mance within NI’s global supply chain. BBG has demonstrated the commitment, innovation and results that set it apart from the rest of the industry, according to Christman, who congratulated BBG for its “outstanding accomplishments.” For the second year in a row, BBG was recently named to the Inc. 5000 list of fastest growing companies in the United States, as well as to the Tampa Bay Business

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Journal’s Fast 50 list. An ISO-9001 certi-fi ed company, BBG was named Tampa Bay International Business of the Year in 2007.

Cobar BV Appoints Accomplished New Chemist

The Balver Zinn Group announces the appoint-ment of Tim Lawrence PhD, a Product Develop-ment Manager with a consistent track record of

process and product innovation, as well as patent coverage and commercialization. Dr. Lawrence received his PhD in Phys-ical Chemistry from Leicester University, UK. In 1992, having worked as a Senior Colloid Chemist for 10 years at the BP Research Centre in Sunbury on methods of exploiting crude oil reserves, Dr. Lawrence joined Multicore Solders Ltd, Hemel Hemp-stead as a Product Development Manager. In this role, he worked on all types of sol-

dering consumables, liquid fl ux, cored wire, solder paste and tacky fl ux.

N Amer Semiconductor Equipment Industry Posts April 09 Book-to-Bill Ratio of 0.65San Jose, Calif. — North America-based manufacturers of semiconductor equip-ment posted $253 million in orders in April 2009 (three-month average basis) and a book-to-bill ratio of 0.65 according to the April 2009 Book-to-Bill Report pub-lished today by SEMI. A book-to-bill of 0.65 means that $65 worth of orders were received for every $100 of product billed for the month. The three-month average of worldwide bookings in April 2009 was $253 million. The bookings fi gure is three percent greater than the fi nal March 2009 level of $245.6 million, and about 77 percent less than the $1.09 billion in orders posted in April 2008.

The three-month average of worldwide billings in April 2009 was $389.9 million. The billings fi gure is 11 percent less than the fi nal March 2009 level of $438.3 mil-lion, and about 71 percent less than the April 2008 billings level of $1.34 billion.

Isola Grants Square Weave Patent License to Sanmina – SCI CorpChandler, Ariz. – Isola Group, SARL, a leading designer, developer and manu-facturer of high performance base mate-rials for the printed circuit board industry, today announced they have entered into a non-exclusive license agreement with Sanmina – SCI Corp (Sanmina) that grants Sanmina the right to practice under US Patent Nos. 5,350,621 and 5,464,658 for the terms of the patents. These patents are directed generally to laminates and printed circuit boards that incorporate square weave fabric materials.

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STI Celebrates “Take Your Child to Work Day” with Three Generations of RabysMadison, Ala. — STI Electronics Inc., a full service organization providing training, electronic and industrial product distri-bution, consulting, laboratory analysis, prototyping, and small- to medium-volume PCB assembly, announces that three generations of Rabys — Jim, David, and Ashley — gathered at the new facility at the end of April to celebrate “Take Your Child to Work Day.”

Jim Raby, founder of STI, has more than 50 years of experience in the industry, including development of the NASA and Department of Defense Soldering Schools. He initiated the Zero Defect Program for Wave Soldering in addition to developing and imple-menting WS-6536D and the DoD-Std-2000 Specifi cation programs. Jim’s experience, expertise, and industry leadership are the foundation on which all STI products and services are devel-oped and produced. David Raby, President and CEO of STI Electronics, Inc., is a key factor in the growth of the company. David has greatly expanded the services and prod-ucts provided and continues to direct the overall focus of the company. Ashley Raby is 11 years old and will soon be making the transition from ele-mentary school to middle school. Ashley is on her school’s Math team, competi-tively shows Tennessee Walking Horses and is in her ninth year of dance. ■■

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For the latest daily news affecting the PCB Industry,

visit the Breaking News page on Circuitree.com.


By Kar l DietzTech Talk

T he Tech Talk column, now in its 15th year, has mainly focused on circuit board fabrication issues. But over the years, related topics

from fi rst-level packaging and other inter-connect technologies have also been increas-ingly covered. Discussing through-silicon-via (TSV) technology in this column is a bit of a stretch. But it might be of interest to look at processes such as hole formation, insula-tion, metallization, and etching and check for similarities and differences between TSV processing and fi rst- and second-level packaging. Part A of this two part series is focusing on via formation, while Part B will deal with metallization processes. The motivation to create conductive paths through chips comes, in part, from the fact that there are applications that require a lot of memory in close proximity to a logic chip, such as multi-core proces-sors, and this, in turn, requires that memory chips are stacked on top of each other and interconnected. There is also a form factor that plays a role: there may not be enough room in small, high-end, hand-held devices to allow the arrangement of memory chips in one plane. Furthermore, in a single plane interconnect platform, the connec-tions between chips will be longer, which is undesirable for high-speed applications. Given the options for interconnecting stacked chips, the TSV option is the best one from an electrical performance view point because it offers lower loop induc-tance and impedance than wire bonding or a combination of wire bonding and solder joints. Through-chip-vias are also found in CMOS imagers. One distinguishes between “via-fi rst” and “via-last” TSV processes. In most cases, “fi rst” and “last” makes reference to the chronology of semiconductor formation and TSV for-mation. “Via-fi rst” means the TSV is formed before the semiconductors are formed on the silicon, and conversely, “via-last” means TSV formation after semiconductor formation. Occasionally, the “fi rst” and “last” is used to denote that TSVs are formed either before or

after back-grinding (wafer thinning), but we shall adhere to the fi rst defi nition. The TSVs can be formed by laser drilling or dry etching. RIE, reactive ion etching, is one form of dry etch, typically done in a diode-type reactor. The aggressive ion bom-bardment of the surface results in a high etch rate, but care needs to be taken to avoid damage to the substrate. The DRIE pro-cess (deep reactive ion etching) is a dry etch process that either uses inductively couples plasma (ICP) or ECR (electron cyclotron resonance). Compared to RIE, this process has a slower etch rate, can achieve higher aspect ratio holes, but requires high initial investment.

Figure 1 shows the high aspect ratio DRIE etched blind TSVs. One special version of the DRIE process is the Bosch etching process, named after the German automotive electronics com-pany that holds the patents for this tech-nology (see Figure 2). Part of the process is the deposition of a polymer on the etched side wall to protect it from over-etching.

An etch-mask defi nes the positions where the TSVs are to be etched. A portion of the hole is then etched. Since etching is not perfectly anisotropic, i.e. selective down-etching, the etched hole sidewall needs to be protected from excessive lateral etching, which is done by depositing a protective polymer on the hole sidewall. Etching and polymer deposition steps alternate until the TSV formation is complete. The result is a hole sidewall that has a scalloped appear-ance. The process is slow, but achieves high aspect ratio holes. C4F8- plasma is used to form the protective fl uoropolymer. SF6- plasma is used in the etch cycle. The pro-tective polymer needs to be removed after the hole formation is complete. The plasma can be formed in the same chamber in which the wafer is placed or it may be formed in a separate chamber (“de-coupled” system, Ref. 1) from where it dif-fuses in the wafer chamber. P. Garrou (Ref. 2) describes the TSV for-mation with lasers: the laser is typically a 355nm UV, Q-switched, diode-pumped solid-state (DPSS) source. The laser via can be as close as 2 microns from the active device with no degradation of the device. The sidewall natural slope is 1.3 to 1.6 degrees and controllable. There is a question if laser drilling can yield TSVs with smaller than 25 micron diameters.

Acknowledgment Illustrations and technical information pro-vided by my colleague, Toshiaki Itabashi, are gratefully acknowledged. ■■

References

Via Hole Formation by Precision DRIE for Through Wafer

Interconnects, Leslie Lea, Surface Technology Systems, Pro-

ceedings, 3D/SiP Advanced Packaging Symposium, May 9-10,

2007, Research Triangle Park, NC

Wafer Level 3D Integration: a Status Report, P. Garrou, Pro-

ceedings, 3D/SiP Advanced Packaging Symposium, May 9-10,

2007, Research Triangle Park, NC

Karl H. Dietz is CircuiTree’s technical editor.

Email [email protected]

Fine Lines in High Y ield (P art CLXVI)Through-Silicon-Via (TSV) Technology – Part A

Fig 1 Etched TSVs Before Plating (Source: STS)

Fig 2 Principle of Bosch Etching Process

Flexible Thinking


By Joe Fjelstad

T he last installment of this review of design issues related to bending and fl exing addressed the I-Beam effect and looked at some of the

many ways that a fl exible circuit can be fl exed, folded, and shaped. This installment will provide some simple “rules of thumb” for fl exing, both statically and dynamically. A fi rst recommendation is to design fl ex dynamic areas with the copper grain direc-tion. The orientation of the grain of the copper foil has a defi nite effect on fl ex-ural life of a design and it has been proven many times in testing. However, grain direc-tion is of greatest importance for fl ex circuit designs that are fabricated using rolled and annealed (RA) or traditional electrodeposited (ED) copper foil. Both of these types of foil have historically shown a marked difference in fl exural endurance between machine and transverse or cross directions. In contrast, grain refi ned electroplated copper on sput-tered fi lm does not appear to have any partic-ular or specifi c grain direction, thus laminate orientation for processing is not as critical. When it comes to bending, it is best to keep any fl exural arc as small as practical for maximum fl ex life. In disc drive fl ex cir-cuit design, it has been demonstrated that a smaller fl exural arc or total angle of fl exure of the circuit in dynamic designs will pro-vide the best performance as small as possible (that is, fl ex the circuit over the smallest pos-sible distance). This is a key technique used in later model disk drive applications to allow them to achieve the high fl ex life cycling they presently obtain that are more than one order of magnitude greater than earlier designs. The next concern is the bend radius, which should be kept as large as possible. The designer has always been advised to always provide the largest practical radius through bend areas. This design approach or attribute is especially important, even critical, for dynamic fl ex. And as pointed out in the previous installment, it can also be important in fl ex applications that are designed for static applications, but which can potentially be subjected and must there-

fore endure millions, or even billions, of low amplitude, high frequency fl exing cycles. When it comes to bending design, fi nite element modeling can be extremely useful and the method is recommended as it can provide excellent predictive data for sug-gesting limits for bending. On the other hand, there are some long standing and commonly accepted guidelines that have served the industry over the years to keep the design inside the limits. For a rough, fi rst order approximation of where the limits are, the industry has a long standing practice of looking at the application and predeter-mining how much strain will be induced on the circuit during bending. This is determined by the radius and the distance to the outer surface of the copper foil. Figure 1 and its simple equation will help to determine the need. As, can be con-cluded by calculation, the elongation require-ments for the copper foil rise signifi cantly as bend radii decrease. Beyond this simplistic but instructional analysis, there are a few commonly used guidelines that have served well for many years.

For normal bending of different fl exible circuit constructions, those guidelines are as follows: for single metal layer, the minimum bend radius is 3 to 6 times circuit thickness; for double-sided fl ex, the minimum bend radius is 6 to10 times circuit thickness; for multilayer fl ex, the general rule is a radius greater than 10 to15 times circuit thickness or more. For dynamic applications, only a single metal layer is recommended, especially for high cycle applications and the minimum radius should be 20 to 40 times circuit thick-ness or more. Two metal layer circuits can be fl exed dynamically, but there is a need to look closely at the application. For very high fl ex life dynamic fl ex circuit designs, fabrication and testing of prototype circuits remains the preferred method of design verifi cation for a great many applications. In spite of these guidelines, rules are often bent (both literally and fi gurative). For example, creasing and hard folding of fl ex, while not a preferred practice, can be suc-cessfully accomplished with some attention to certain details. When required or desired, the circuit should be permanently bonded to itself to prevent it from bending back at the crease or fold line. A small dowel pin might be advisable to hold a small radius, or a sepa-rating base, such as shown in Figure 2, can be used. The ideal copper for such high strain bending applications will be a low strength, high elongation copper. Fully annealed soft copper is normally a good choice for applica-tions requiring a small radius bend. In summary, the fl exing and bending of fl exible circuits is fundamental to the tech-nology and there is a need to understand some of the basic rules and practices to assure design quality. This topic will con-tinue in the next installment. ■■

Joseph Fjelstad, founder and president of

Verdant Electronics and co-founder of Silicon-

Pipe, is an author and innovator in electronic

interconnection and packaging technologies.

Download his fl ex circuit book free at

www.fl exiblecircuittechnology.com.

E-mail: jfj [email protected]

Bending and Flexing Design Concerns III - Back to Basics, Part 25

Fig 1 Small Diameter Bend Radii Demand Greater Elongation From the Materials Used in Flex Circuit Construction, Especially Copper Foil

Fig 2 Very Small Bends in the Flex Circuit are Possible as Demonstrated by This Disc Drive Application


T he solar cell industry has been truly remarkable to observe over the past ten years. During this time, the industry has sus-tained a CAGR of more than 40

percent in cell production. Silicon consump-tion is currently twice that of the much more mature semiconductor industry.1 Up until the fi rst half of 2008, attractive operating mar-gins were sustained throughout most of the supply chain. However, since the second half of 2008, like most other industries, the Pho-tovoltaic (PV) industry is experiencing signif-icant challenges. The current credit crisis has impacted initiation of new PV projects and module supply is currently exceeding that of demand. New manufacturing capacity, which was being added to meet the growth frenzy during the fi rst half of 2008, is making a bad situation worse. Companies that entered into long term silicon contracts at the peak of last year are scrambling to renegotiate their con-tracts to more accurately refl ect the signifi -cant drop in silicon prices. Some sources are

predicting module prices will decrease from $3.80/watt to between $2.50 and $3.00/watt during 2009.2

Despite these troubled times, the PV industry remains one of the few indus-tries with sustainable long-term growth opportunity. Macroeconomic drivers such as concerns over imported oil dependence and global warming remain strong even during the current economic situation. Oil prices appear to have hit bottom and will likely increase again as the world economy recovers. Although some countries like Spain are reducing government subsidies, other countries like the United States, Japan, and South Korea are showing indications of increasing incentives to create future demand for solar energy. The anticipated sharp drop in the $/watt is a necessary and positive step for the industry to achieve grid parity, which will make solar generated power com-petitive with power received from the grid independent of government subsidies. As a result, those companies that have managed

the growth wisely over the past years should be able to weather the storm and are likely to emerge even stronger than before. One of the key factors for any solar cell manufacturer to survive during such dif-fi cult times is the ability to achieve high device performance at a low cost. Wet chemical processing has been adopted from other more mature industries such as the semiconductor and printed circuit board industries and plays a key role in solar cell manufacturing. The purpose of this article is to highlight the areas where wet chemical processing is being utilized in the solar cell manufacturing process while giving some insight of how it can further improve cell effi ciency and overall costs.

OverviewSimplistically stated, a solar cell is a semicon-ductor device that creates electricity from the sun by utilizing the photovoltaic effect (see Figure 1). Photons are absorbed from the sun by the silicon layer and excite nearby elec-

An Overview of Wet Chemistry Processing for the Manufacture

of Silicon Solar Cells

Matt Moynihan

Imag

e Co

urte

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trons suffi ciently enough to create a current in an electrical circuit. The most common metric to quantify performance is cell effi -ciency, which represents the ability of the solar cell to convert sunlight into electricity. An increase in cell effi ciency yields more power per device. Depending upon the tech-nology, cell effi ciencies can range anywhere from 8 percent to as much as 22 percent in production settings. At the highest level, the solar market can be split into two segments: crystalline silicon and thin fi lm. Within each of these segments, there are numerous sub-segments, which are described in more detail in Table 1. The focus of this article will be on the crystalline Si market segment as this comprises over 80 percent of the total PV market. Figure 2 shows a generic process fl ow for the manufacture of a silicon solar cell. The key steps that currently utilize wet chemistry processing include: post-wafering cleaning, texturing, edge isolation, phosphor silicate glass (PSG) remove/clean, and plated metal-lization. Table 2 outlines some of the main market drivers for each of these process steps. Depending upon the process line confi gura-tion, production throughput for any one of these steps can be in the range of 1500-2800 wafers per hour. Wafers can be loaded into cas-settes for batch/vertical processing or loaded onto a conveyor belt for continuous/hori-zontal processing. Both equipment confi gura-tions are currently commercially available on the market from a number of vendors.

Wafer cleaningMost silicon used for the solar cell industry is grown and/or machined to produce blocks called ingots. Due to the different growth processes used, multi-crystalline ingots are square, while mono-crystalline ingots are square with rounded corners. They are typi-cally about 0.54 m. long and have x-y dimen-sions of 15.6cm x 15.6cm. The wafering process is accomplished by use of a wire saw,

which is comprised of a series of very thin stainless steel wires (0.12-0.15mm in diam-eter) that are wound on two spools. Glycol, oil, or water based lubricants dispersed with silicon carbide abrasives provide the primary cutting action as the wire passes through the ingot. Typical wafer thickness after sawing is about 180-200µm, although thinner wafers have been demonstrated. After the wafering step, the sliced ingot is placed into a spray chamber to remove the bulk of the silicon carbide slurry. The sliced ingot is then placed in a dip tank with a solvent that can loosen the adhesive (typi-cally an organic acid) and releases the wafers from the mounting plate. Wafers are then loaded into cassettes for vertical/batch mode cleaning or arranged on a conveyor belt for horizontal/continuous processing. A successful cleaning process, regardless of whether it is in the vertical or horizontal confi guration, should have the following attributes:

1. Ability to produce wafers visually free of any lubricant, abrasive, or metal ion residues

2. Ability to work on mono-crystalline and multi-crystalline wafers

3. Wide process latitudes to handle signifi -cant variation of incoming wafer cleanli-ness quality

4. Provide a uniform surface compatible with subsequent texturing/saw damage removal

5. Meet demanding waste stream regulations

Many types of chemistries are used for the cleaning process and include water, surfac-tants, solvents, acids, and alkalis. However, not all materials clean with the same degree of effectiveness. Figure 3 shows a compar-ison of how long it takes to clean off pencil lead from a silicon substrate using three dif-ferent alternatives. It is also quite common to see varying degrees of contamination on the wafers prior to cleaning. Contamination can range from excessive dried SiC slurry to residual metal and metal oxides from the wire during wafering. Contamination from metal oxides can be enhanced visu-ally if they are not removed prior to any sil-icon etching/removal. Figure 4 shows wafers with different contamination levels pre- and post-cleaning. As a result, it’s important to understand the origin of the incoming wafer contamination so that the proper cleaning process can be optimized to produce a uni-form appearance.

Table 1 PV Market Segmentation

Segment Technology Typical Efficiency % 2008 Market Share3

Silicon

Multi-Crystalline 14-17 38.30%

Mono-Crystalline 17-22 47.70%

Ribbon 13-16 1.50%

Thin Film

Cd-Te 10-15 6.40%

CIGS 10-15 1.00%

a-Si/u-Si 8-12 5.10%

Table 2 c-Silicon Market Drivers and Associated Technology Development Areas

Driver How Material Play

Improved Efficiency Value Proposition:

0.1% efficiency improvement =

~$550K for 50MWp production

Improved conductivity Electroplated contacts

Improved ohmic contact Metallization directly on silcon

Improved reflectivity Micro texturing

New cell designs Finer feature resolution and

backside contacts

Lower Costs Value Proposition: 0.5% reduction in breakage/yield =

~$670K for 50MWp production line

Replace Ag Cu shows similar electrical properties

and is 10-20x less

Higher Yields Cleaners can repaire grain boundary damage

Higher Throughput Process developed for horizontal

inline production processes

Fig 1 Basic Solar Cell Operating Principle

Fig 2 Overview of Wet Chemistry Processing Steps Used in c-Si Solar Cell Manufacturing


As advanced solar cell designs emerge, more cell producers are concerned about residual metal contamination. As a result, wafers need to emerge from the cleaning process with very low trace metal contaminant levels. Figure 5 shows typical metal levels through various parts of the cleaning process.

TexturingThe next step after cleaning is wafer texturing. The texturing step has two primary purposes:

1. Etch the wafer to remove any residual saw damage

2. Provide a matte surface to minimize light refl ection

For mono-crystalline wafers, a blend of

potassium hydroxide (KOH) and isopro-panol (IPA) are typically used to achieve the purposes described above.4 Concentrations of each component can vary depending

upon the process but are typically less than 10 percent for each. Process temperatures are between 80oC to 90oC. The KOH provides the anisotropic etching along the <100> plane of the silicon crystal, which exposes the <111> plane. The role of the IPA is to help control KOH etch rate (~1-2 µm/min) and selectivity to the <111> crystal plane, which leads to the random pyramid struc-ture as shown in Figure 6. Balancing the etch rate with pyramid formation is impor-tant to ensure that enough silicon is removed to optimize saw damage removal (typically >6µm per side), while maintaining the cor-rect peak density to minimize refl ection. Figure 6 also shows how the substrate can be polished etched if the KOH concentration is not kept within the desired range. Due to the volatility of the IPA, alkaline texturing is typically conducted in vertically confi gured wet chemical equipment to allow for lower processing temperatures (typically 80oC) while accommodating longer process times (typically 20-30 minutes). However, novel processes are being developed, which can replace the IPA and will enable higher operational temperatures and shorter process times. Such systems also are compatible with inline horizontal equipment confi gurations. To achieve uniform texturing across a multi-crystalline wafer, an etching solution that provides an isotropic etch to the dif-ferent silicon crystal orientations must be used. Typically a blend of nitric acid (HNO3) and hydrofl uoric acids (HF) are used to tex-turize multi-crystalline wafers. The role of the nitric acid is to oxidize the silicon while the hydrofl uoric acid is responsible for the bulk etching. Silicon etch rates for acidic tex-turing are usually in the range of 2-4 µm/min. Due to the exothermic nature of this reaction, process temperatures are typically < 10oC range. Figure 7 shows the resulting topography of a multi-crystalline wafer after being texturized with HNO3/HF process. Equipment confi guration with the acidic texturing process is typically in the hori-zontal mode. Volatile organic species are less of a concern, but generation of nitrogen oxide gases and safe handling of the acids (especially the hydrofl uoric) needs to be considered carefully. Alternative wet chem-istries that can minimize or even replace the use of hydrofl uoric acid are currently being researched. For either alkaline or acidic processes, a fi nal hydrochloric rinse step is used to

Fig 4 Various Wafer Appearances Before and After Clean

0

5

10

15

20

25

30

35

40

Copper 35.5 1.26 0.22

Iron 8.27 1.53 0.6

Lead 0.5 0.32 0

Zinc 2.41 1.77 0.53

Bare Wafer 5% Dow alkaline detergent cleaner 5% Dow Acid Precleaner, 5% Dow alkaline detergent cleaner

0

5

10

15

20

25

30

35

40

Copper 35.5 1.26 0.22

Iron 8.27 1.53 0.6

Lead 0.5 0.32 0

Zinc 2.41 1.77 0.53

Bare Wafer 5% Dow alkaline detergent cleaner 5% Dow Acid Precleaner, 5% Dow alkaline detergent cleaner

Met

al R

esid

ues

(ppb

)

Fig 5 Metal Ion Contamination as a Function of Different Cleaning Chemistries

0

200

400

600

800

1000

1200

1400

12 ml/l 30 82 420 120025 ml/l 24 70 420 1200

50ml/l 18 57 420 1200

PV Customized Dow Detergent +

Etch

PV Customized Dow Detergent

Only

General Purpose Cleaner Water OnlyC

lean

ing

Tim

e R

equi

red

(sec

)

Fig 3 Comparisons of Time to Remove Graphite from Silicon Surface. All Chemistries Shown Were Processed at 50ºC

An Overview of Wet Chemistry Processing for the Manufacture of Silicon Solar Cells


remove any metal ion contamination prior to the p-n junction formation step.

Doping/PSG etch/edge isolationThe next step in the manufacturing pro-cess is to create the p-n junction through a doping step. Dopant chemistry is depos-ited and diffused into the solar cell to create a thin layer called an emitter layer. Most of today’s crystalline silicon solar cells start off as a p-type doped wafer and the emitter layer is n-type doped. The most common n-type source is phosphorous, which can be applied

using chemical vapor deposition or by use of spray/mist application. Phosphoric acid based solutions are used as the doping source for spray applications. The wafers are then fi red to peak temperatures of over 850oC to diffuse the phosphorus into the silicon. The resistance of the emitter layer can be adjusted by varying the amount of material sprayed onto the wafers and/or by changing the fi ring temperature/time. During the diffusion step, a phosphor silicate glass (PSG) is formed on the surface and must be removed. Typically this step is achieved using a glass etch step, which is comprised of a dilute hydrofl uoric acid solu-

Fig 7 Resulting Wafer Topography After Acidic Texturing Step on Multi Crystalline Wafer

Fig 8 Examples of Front and Rear Side Metallization on Two Types of Wafers Used in PV Industry

Fig 6 Pyramid Formation as a Function of KOH Concentration. All Conditions Were Etched for 10 minutes @ 90ºC

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tion.5 Unlike the texturing step, the PSG etch step does not contain any oxidizers so that the selectivity of the HF to the under-lying emitter layer is quite good. Subsequent cleaning of the wafers surface may be fol-lowed to ensure the surface is completely removed of any residual PSG. The emitter layer is now present on both sides (and/or on edges) of the wafer and must be isolated to prevent short circuiting the solar cell. Edge isolation can be accomplished using laser ablation, plasma etching, or wet chemical etching. Wet chemistry isolation is accomplished by immersing the rear side and edges of the wafer in an HF-based chemistry. Due to surface tension effects between the substrate and chemistry, the emitter layer on the front side is not exposed to the etchant. Wafers are then coated with a thin layer of silicon nitride, which improves device reli-ability and serves as an anti refl ection layer.

MetallizationThe purpose of metallization on solar cells includes the following:

1. Provides a means of collecting electrons from the front side of the cell

2. Creates a back surface fi eld that improves the electron migration properties within the bulk silicon

3. Creates a mirror on the backside of the wafer to refl ect light back into the wafer

4. Provides a means for connecting numerous cells to create a working module

Figure 8 shows some examples of multi-crystalline and mono-crystalline silicon solar cells that have been metallized on the front side and rear side, respectively. Tradition-ally, the front side grid (FSG) metallization is accomplished by using fritted silver pastes

while the backside of the wafer is metallized with a combination of silver and aluminum fritted pastes. In order to make contact through the silicon nitride layer to the under-lying silicon layer, the pastes are fi rst dried at temperatures around 150oC and then fi red at temperatures over 850oC for a few seconds. Recently, plating of wafers in combina-tion with, and/or in replacement of, screen printed metallization has been getting increased attention. Plating of solar cells can be done with electro-less or electrolytic techniques. For some applications, such as depositing a thin seed layer that is less than 1µm thick, electro-less plating can provide suffi cient plating rates to fi t into produc-tion requirements. Electro-plating is used to build thicker deposits, but making contact to the front side of the wafer can be chal-lenging as the wafers are only 180-200 µm thick and can break easily. An alternative method called Light Induced Plating (LIP) has been developed that takes advantage of the current genera-tion properties of the solar cells.6 As Figure 9 shows, the wafers are placed faced down and travel across a series of lights, which creates a localized electric fi eld on the front side of the wafer. Contact is made on the backside of the wafer with specially designed contact rollers. The voltage of the roller can be con-trolled to minimize anodic dissolution and attach on the backside of the wafer, thereby creating preferential plating of the desired metal on the front side. One of the primary improvements wafer plating offers over existing paste technology is through improved deposit conductivity. Figure 10 shows a picture of a silver plated deposit over screen printed silver paste. Note the porosity in the paste deposit as compared to the plated deposit. This porosity decreases the overall conductivity of the deposit, which in turn creates a collection fi nger that is higher in resistance as compared to a plated feature that is solid. The data in Figure 11 shows the decrease in series resistance and corresponding increase in cell effi ciency as a result of the LIP silver plating process (Enlight 620) versus using paste alone. As with most plating processes, the depo-sition process is isotropic in nature, which means that the line width is increasing as thickness increases. Although this effect can have a small impact on increasing the degree of shadowing, it also can help to improve yield distributions by mending discontinuous

Fig 10 Micrograph Showing LIP Plated Ag Metal Deposited Onto a Silver Paste Grid Line Seed Layer

Fig 11 Solar Cell Performance Improvement Due to LIP Ag Plating Process

Light Source

Ag Paste Seed

Ag Anode

Ag +

Power Supply

Contact Roller

Silicon Nitride

-+P

Al Back Contact

Light Source

Ag Paste Seed

Ag Anode

Ag +

Power Supply

Contact Roller

Silicon Nitride

-+P

Al Back Contact

Fig 9 Schematic of Basic Operating Theory for Light Induced Plating

An Overview of Wet Chemistry Processing for the Manufacture of Silicon Solar Cells


seed layers that result from wetting problems/defects from the screen print process. New cell designs are emerging that uti-lize much thinner fi nger designs to improve the overall electron collection effi ciency and to reduce shadowing effects. Unfortunately, screen print technology has limited resolu-tion below 80µm. Recent advancements with inkjet and aerosol deposition technology are allowing for seed layers to be deposited with resolution in the 30-40µm range. Plating is required because these seed layers are typi-cally quite thin and would result in very high resistance values of the fi nal collection fi nger. Recent cost pressures have created the demand for lower cost materials that can be used for metallization such as copper. It is well published that copper has the ability to migrate through bulk silicon, which can compromise the p-n junction and ruin cell performance. If copper is to be used for met-allization purposes, then a barrier layer such as nickel must be used. It is important to note that the silicon nitride layer should be suffi ciently dense enough so as to not expose the underlying silicon layer, which would

result in background plating and increased copper migration. Screen print technology is not conducive to depositing nickel or copper deposits and, therefore, most of the attention is being placed on using plating technology to realize copper metallization.

SummaryDespite going through some growing pains, the photovoltaic industry is well posi-tioned to continue growing over the long term. Wet chemical processing technology from the semiconductor and printed cir-cuit board industries have successfully been adopted in most crystalline silicon manufac-turing lines. The technology is being used in a number of different process steps with various equipment confi gurations and pro-cess chemistries. In order to meet future demand for improved cell performance at lower costs, continued improvement in the process capabilities will be required. As new processes are introduced, it will be impor-tant to consider the impact they may have on subsequent processing steps and overall cell performance.

AcknowledgementsThe author would like to thank Tony Ridler, George Allardyce, Bob Barr, and Yili Guo for thoughtful feedback and discussions on the content of this article. ■■

Matt Moynihan is R&D Director, Photovoltaic

Business Interconnect Technologies, for Dow

Electronic Materials.

E-mail: [email protected]

References

1. Photon International, March 2009, p 88

2. Solar Market: Dip in 2008, Rise by 2011, Retrieved on

4/13/2009 from http://www.redherring.com

3. Photon International, March 2009, p 190

4. Sparber et al, Comparison of Texturing Methods for

Monocrystalline Silicon Solar Cells Using KOH and Na2CO3,

Conference on Photovoltaic Energy Conversion, 2003

5. Wet Chemical Edge Isolation for Solar Cells, Euro-Asia

Magazine, September 2007, Retrieved on 4/12/2009 from

http://www.euroasiasemiconductor.com/euroasia-magazine/

online-midseptember2007

6. Allardyce et al, The Commercial Application of Light Induced

Electroplating for Improving the Effi ciency of Crystalline Silicon

Solar Cells, 22nd EU PVSEC, Milano, Section 2-2.2

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Photovoltaic (PV) cells are expected to be a large part of the solution to wean developed countries from their dependence on fossil fuels.

Once used primarily for power generation in space and other remote locations, they

are now increasingly used to meet com-mercial, industrial, and household energy needs. While PV technology presently supplies a relatively small fraction of total energy production, it is a rapidly growing source of renewable and sustainable energy,

as shown in Table 1. Today, two fundamental technologies are utilized to produce most photovoltaic cells — crystalline silicon, which accounts for roughly 90 percent of all solar cells pro-duced, and thin fi lms, which include amor-phous silicon (aSi or a-Si), cadmium tellu-ride (CdTe), and copper indium gallium (di)selenide (CIGS). The commercial PV industry is rapidly evolving, however, and it is diffi cult to predict which technology may ultimately prevail. There are several new technologies in development, any of which may ultimately displace today’s conventional technologies. Perhaps one of the most prom-ising is organic PV (OPV). There are three “major classes” of PV materials: (1) inorganic semiconductors; (2) organic semiconductors; and (3) hybrid solar cells, which are a combination of

ORGANIC PHOTOVOLTAICS Offer Promise for Future Development

Jim Handy and Alain Harrus

Table 1 Global Installed Capacity of PV Generated Energy

2003 2004 2005 2006 2007 2008 CAGR

Gigawatts of production 1.65 2.40 3.78 5.25 7.42 10.50 45%(Source: Objective Analysis)

Hole Transport Layer (HTL)

Transparent Anode

Cathode

Photoactive Layer (PL)

Transparent Substrate

SunlightSunlight

Sunlig

ht A

bsorb

ed

Charge

Separation

Hole

Transport

+

+

-

Holes to

Anode

Electronics to Cathode Fig 1 OPV Cell Structure (Source: Plextronics)


organic and inorganic systems. The inor-ganic PV cells are comprised of the previ-ously mentioned crystalline silicon wafers and thin fi lm (a-Si, CdTe and CIGS) mate-rials, while the OPV devices encompass the two families of small molecule and polymer semiconductors. Since the organic semi-conducting materials can be formulated as inks, a major advantage of OPV cells is that they can be manufactured via printing technologies. Polymer PV cells have a structure similar to polymer organic light emitting displays (OLEDs), and use similar materials. The active polymer layer is sandwiched between two conducting electrodes. One of the elec-trodes is transparent to let the light in (for PV operations) or out (for display applica-tions), depending on the required function. In the case of a PV cell, light absorbed in the polymer layers creates a pair of negative (elec-trons) and positive (holes) electric charges. These charges are collected by the electrodes, forming an electric current, which can be used to drive an electronic device. An example of an OPV cell construction is depicted in Figure 1. The hole transport layer (HTL) and the photoactive layer (PL) perform the same functions as the inorganic semiconducting materials do to transform sunlight into electrical energy. The transparent substrate, which can be fabricated from glass or transparent poly-meric materials, and the transparent anode permit sunlight to impact upon the HTL and PL semiconducting structures. The transparent anode — for example, indium-tin-oxide (as is used in conventional PV cells) — also lets sunlight through and col-lects holes generated in the photoactive layer. The cathode, which can be a metal (e.g. alu-

minum), is used to collect electrons gener-ated in the photoactive layer. There are three basic types of OPV cells: (1) standard organic cells, typically made from semiconducting small molecules or polymers (e.g. pentacene); (2) cells that harness nanostructures to achieve higher effi ciencies than standard cells (as illus-trated in Figure 2); and (3) dye-sensitized solar cells (e.g. Gratzel cells), which use dyes to enable absorption of a broader set of light wavelengths (much like photosyn-thesis in plants).

Cell efficiencyOPV technology had a slow start because the fi rst materials showed effi ciencies below 0.1 percent. Organic compounds have a rela-tively narrow absorption spectra, which has been (to date) a signifi cant limiting factor for OPV performance. A more effi cient cell can produce more power from a given area of active material and the effi ciency of the cell is tied to the material from which it is manufactured. Today, silicon cells typically deliver the greatest effi ciency, as shown in Table 2. Inor-ganic thin fi lms still lag behind, the excep-

tion being multijunction cells. These cells use multiple junctions to generate electricity from different wavelengths of light. (This technology could also be used with organic materials to boost effi ciency.)

Cost and flexibilityEffi ciency, however, is not the whole story. More important is cost per watt, which improves with increasing effi ciency and declining manufacturing costs (materials and processes). This is where OPVs offer a signifi cant advantage. Despite the fact that the effi ciency of OPV cells still lags behind silicon devices, their cost, fl exibility, and weight make them attractive and worth pur-suing. For example:• They can be manufactured using conven-

tional screen printing processes or even inkjet printers. These processes, used for high-volume printing applications, have been highly refi ned and are relatively low in cost.

• Organic materials can be printed onto fl exible substrates. This allows the use of very inexpensive substrates, simplifi es handling, and enables reel-to-reel pro-cessing. It also allows a fl exible solar cell to be integrated into a device’s packaging or case.

• Organics can be used to make a light-weight power source for portable prod-ucts. Mobile phones, laptop computers, and the information appliances of the future may all have solar cells to supple-ment their batteries.

One source1 estimates that, with a power conversion effi ciency of only 10 percent, the cost per watt for OPVs could beat both thin fi lm and crystalline silicon. Since organic PV technology is still very new, there is reason to hope that effi ciencies will continue to increase and costs to drop.

Since the organic semiconductingmaterials can be for mulated

as inks, a major advantage of OPV cells is that the y can be manufactured via

printing technologies.

Table 2 Efficiency of PV Cell Technologies

Technology Efficiency

Crystalline silicon Monocrystalline silicon 16-23%

Polycrystalline or multicrystalline silicon 15-20%

Thin film Amorphous silicon 5-12%

Cadmium telluride 8-12%

CIGS 10-14%

Multijunction 6-30%

Organic Standard organic cells ~ 5%

Nanostructured material cells 3-5%

2005 2010 2020

Dye-sensitized 2% 5% 15%(Sources: Objective Analysis (2008), PIRA/BPA, Science Daily)


Materials One of the attractive aspects of OPVs is that they do not compete with the semi-conductor market for materials. To date, the vast majority of photovoltaic devices employ some sort of silicon-based technology, put-ting the market on a collision course with the semiconductor industry since both markets demand large quantities of silicon. However, market forces can change this situ-ation, as recent increases in silicon produc-tion and the depressed business climate have resulted in a signifi cant drop in silicon wafer prices for PV applications. Organic materials are abundant and provide a broad range of materials for potential OPV solutions. There is always the possibility that some new material will be developed that will

signifi cantly improve performance and lower processing costs. In the meantime, there are a number of options being pursued to increase OPV effi ciency. These include nanomaterials to improve light collection, more transparent thin fi lms, improved light-trapping schemes, and multijunction topologies. The use of nanostructured material cells has led to more effi cient charge separation and effi ciencies are currently in the 3 to 5 percent range. Work in this area is still pri-marily a research-based focus for universities and institutes, and for some companies, such as Cambridge Display Technology (CDT). A wide variety of materials and struc-tures is being studied. For example, Konarka and Sustainable Technologies International (STI) are working on Gratzel cells, which use a dye-sensitized nanostructured titanium oxide. In Japan, the National Institute of

Advanced Industrial Science and Technology (AIST), Mitsubishi Corp., and Tokki Corp. have jointly developed an organic thin-fi lm solar cell, shown in Figure 2, based on a plastic substrate. The active elements consist of three layers — phthalocyanine, fullerenes (a nanomaterial), and lithium fl uoride — between two electrodes. In addition to effi ciency and manufac-turing process optimization, there are other issues to address in order to develop a sustain-able OPV industry. A key issue is the estab-lishment of viable supply chains to supply the raw materials used to manufacture OPVs with the purity required by such systems. Presently, OPV devices have shorter oper-ational lifetimes than do conventional PV devices. The majority of near-term PV appli-

cations lies outside of consumer applications, with the greatest opportunities being the gen-eration of electricity for domestic and indus-trial purposes (grid electricity), and these applications have a required lifetime of 20 to 30 years. Organic materials degrade more rapidly over time than inorganic materials. The high levels of exposure to sun that solar cells must endure not only cause degrada-tion but — in the case of dye-sensitized cells — fading. There are also concerns about the effects of sunlight and heat on lightweight fl exible substrates, especially plastics.

Applications Military and remote services are expected to be initial key drivers for the development and deployment of OPV devices. Lightweight, roll-up power sources would be ideal for people requiring electricity in remote locations, such

as fi eld researchers, mountaineers, and mili-tary personnel. For example, tents made from large-area, fl exible solar panels could be used by aid agencies to power vaccine refrigerators or other vital medical equipment. The technology’s promise of low cost also makes organic PV cells well-suited as power sources in a range of toys, novelties, greeting cards, and small portable products such as elec-tronic calculators. This market is already estab-lished and can use a product that has a rela-tively short lifetime, especially if the cells are printable, inexpensive, lightweight, and fl ex-ible. A key high-volume application is as a sup-plemental power source for point-of-sale dis-plays, both as packaging and at a shelf level. On the other hand, the economics of such a system rely heavily on the effi ciency of the OPV cells.

ConclusionOrganic PV has many technical hurdles to overcome. Improving cell effi ciency and life-time are the keys to expanding the range of potential products that can use the tech-nology. Most leading developers are concen-trating on these issues. Applications are cur-rently aligned with opportunities where the use of a fl exible cell offsets its lack of effi -ciency. The fi rst wave of applications is for consumer-type products such as battery char-gers and integration of PV cells into textiles and clothing. In time, technology improve-ments will open up new applications. ■■

References

1) Organic Photovoltaic Solar Cells: Recent Advancements in

Effi ciency. Christopher J. Musto. Literature Seminar, November

15, 2007. www.chemistry.illinois.edu/research/materials/sem-

inar_abstracts/2007-2008/Musto.pdf

Jim Handy is a director at market research fi rm

Objective Analysis and is co-chair of the Photo-

voltaics chapter for the 2009 iNEMI Roadmap.

http://objective-analysis.com/Contact_

Us.html#Jim_Handy

Alain Harrus is a partner with Crosslink Capital

and co-chair of the Photovoltaics chapter for the

2009 iNEMI Roadmap.

E-mail: [email protected]

For more information about the 2009 iNEMI

Roadmap, visit http://www.inemi.org/cms/road-

mapping/2009_Roadmap.html.

Additional resources for information on PV technology:http://www.doe.gov/energysources/solar.htmhttp://www.solarbuzz.com/http://www.jema-net.or.jp/English/07eij2002.htmlhttp://www.greentechmedia.com/http://www.epia.org/

Plastic Substrate

ITO Electrode

Phthalocyanine Evap Film

Fullerene Evaporated Film

LiF Layer

Aluminum ElectrodeAluminum Electrode

Hermetic Seal

Light

CathodeAnode

Fig 2 The AIST Organic Photovoltaic Cell (Source: Objective Analysis, 2008)


Ask the Flexper ts By Mark Verbrugge

We are losing a fair number of our flex assemblies during assembly. How can we prevent the heavy connectors from damaging circuits leaving deep scratches?

Proper circuit handling is a big issue, both for the manu-facturer during the build process and for the end user at assembly. Damage due to improper transport and assembly

is an issue for the PCB “hardboard” industry, but is magnifi ed when handling a “softer” fl ex-circuit. Polyimide and Mylar are easily dam-aged when they come in contact with a sharp connector pin or other metal component. Sometimes the best efforts to handle circuits in a “one up” confi guration go awry during the many processing steps involved in fi nal assembly. It has been my experience that damage to the fl ex is most likely to occur during pre-heating and cleaning operations. Note the glass transition temperature of acrylic adhesive is 103°F (39.4°C). When pre-heating a fl ex for component assembly (typically around 225°F/107.2°C), the circuit softens making it extremely prone to sur-face damage from poor handling. Often, I see that the “common” practice during degreasing operations is to “dump” circuits en masse for ultrasonic cleaning, a clear foul leading to severe cover scratches and gouging. The most common method of shipping a fl ex circuit to an end user is in a heat sealed bag. The bags are then grouped in larger numbers and placed into a secondary bag prior to boxing. For smaller robust circuits, this method provides adequate protection while keeping ship-ping and handling costs low. As circuit size and complexity rise, this method becomes less effective. Here is where the proverbial “ounce of protection” can indeed provide a “pound of cure.” Custom packaging is the answer. When my own company experienced increasing returns for “damaged circuits,” we quickly realized most were due to follow-up processing at our customers facility. No one wants to point a finger at their customer, so we looked for an answer that would benefit both parties. By designing custom trays for handling raw flex circuits and follow-up assembly we can gain significant reductions in scrap. A custom tray not only protects better during transit but we also find our customers really like them on the pro-duction floor. A properly designed tray should be able to support both shipping and assembly needs. Space considerations should not only be made for the fl at circuit, but also allow for components that may be installed after arrival at the customer’s facility. Trays can be manufactured from a variety of plastics, each offering unique advantages. Figure 1 shows a “stackable” tray utilizing a static preventative coating, critical for circuits with active components. The clear tray allows for individual inspection without the need for circuit removal. This cuts down on inspection handling. Figure 2 shows a more typical “black plastic,” anti-static tray with an integral cover. This can be a good solution for

larger, heavier parts. In summary, while a custom shipping tray can add a signifi cant layer of protection, proper handling during assembly cannot be under-stated. Protection from damage falls to both the fl ex manufacture and the end user. A careful review of incoming inspection and assembly procedures can signifi cantly reduce scrap from poor handling. Pack-aging of raw PCBs is often over looked, but can be an important step in assuring a quality part reaches your end customer. ■■

The Flexperts are Mark Finstad and Mark Verbrugge of Minco.

Email: [email protected]

Treat Me Gently…T reat Me Kind

BPA Growth Cur ves By Mar k Hutton

Headline


Where Are W e on the Business Cycle?

W e hear plenty about the disas-trous situation “sub primes” got us into and we have felt the effect very severely in our

industry. The downturn is into its second year, the really crucial questions are, “Where are we on the cycle?” and “When will things pick up?” At BPA, we have been facing these issues head on for the last thirty years. We have been moni-toring the industry cycles for electronics equip-ment, semiconductors, and PCBs, and making some pretty accurate forecasts. (Download a companion article on the accuracy of BPA’s fore-casts at www.bpaconsulting.com.) Let’s take a look. Comparing the World PCB forecast with the Semiconductor fore-cast in Figure 1, it can be seen that, indeed, where the PCB trough falls to -20 percent, the Semiconductor trough has fallen further to -25 percent. We can also see that this decline in growth started from a peak that was lower than the 2001 decline. At that time, inventory levels were at an all-time high in anticipation of orders for com-puters and networking infrastructure equipment that never came. You will remember the dotcom boom that did not materialize. The circumstances are not the same this time around. As can be seen from Figure 1, we believe the contraction will not be as great as it was in 2001. Why? Three major reasons,

• The growth rates did not reach the extraordi-nary high peak as those in 2001

• The levels of inventory are not of the same magnitude

• The slowdown was seen over a longer period of time before demand went negative

On the demand side, semiconductor manu-facturers late in the fi rst quarter reported minor improvements in order rates and capacity utiliza-tion rising above the 50 percent levels, the fi rst quarter-on-quarter increase since the second quarter of 2008. Typical utilization rates are 85 percent or above during a normal growth phase (e.g. UMCs utilization rate for Q308 was reported to be 85 percent).

Responses to BPA’s quarterly survey1 indicate that output from many Asian and Euro-pean fabricators has declined by more than 40 percent in Q109. North America has been in slow decline for more than a year and its fi rst quarter revenues have not been hit quite as badly. High-volume manufacturing has disappeared from North America and Europe, with the exception of the latter case for automotive PCBs, which have still been made in mid-sized volumes in Germany. Indeed, it is estimated that between 40 and 50 percent of the country’s output is in this sector, compared to a worldwide sector fi gure of approxi-mately 4 percent of total PCB shipments. Surplus inventory is now all but used up, with laminators in particular reporting a slight increase in demand. However, this is coming from a level that is only half of what it was a year ago. The quarterly results indicate that there has been no signifi cant overall increase in the order books for the second quarter (where some companies have won, others have lost) and so Q2 is expected to remain dampened to the same level as Q1. From such a low base, even with recovery in Q3 and Q4, it will be impossible for the industry to stage a full recovery in 2009 and only low growth is expected for 2010. To further compound the fabricators misery, the competitive marketplace has put intense pressure on prices, which have been forced down by 5-10 percent at a time when most fabricators were hoping to push prices up a bit to compensate for the higher raw material costs experienced in 2008 as fuel prices surged. This has resulted in BPA reducing its value forecast made in November 2008 for 2009 from just under -10 percent to around -16 percent for this year. A small percent growth is predicted in 2010 as the trend line emerges past the 0 line by the end of the fi rst half of 2010. By 2012, BPA’s Forecast PCB demand will be back to 2007’s level of just over USD49 billion. 1. The PCB service includes a regular quarterly survey of the PCB Industry and the supply industries worldwide. ■■

Mark Hutton is managing director and senior consultant, BPA Consulting Ltd. His areas of expertise

include IC packaging, advanced substrates, assembly materials, and processes.


Fig 1 Comparison of PCB and Semiconductor Growth 12/12

-40%

-30%

-20%

-10%

0%

10%

20%

30%

40%

50%

1990

1993

1996

1999

2002

2005

2008

2011

% G

row

th

Semis

PCB


Intelligent Design By Lee W . Ritche y

On the Use of Blind and Buried V ias

I n recent months, I have encountered a number of high-layer-count PCB designs with high-pin-count BGAs, such as FPGAs with 1 mm pitch con-

tacts, designed with blind and buried via technology. Using this technology, these PCBs have been diffi cult to design, diffi -cult to manufacture, more expensive than their through-hole counterparts, and diffi -cult to test and troubleshoot. At the same time, PCBs of similar complexity and den-sity were being done in the same number of layers using standard through-hole tech-nology with none of these drawbacks, and at lower overall cost.

Two specifi c cases were eighteen-layer PCBs used in networking products. The same basic circuit was being manufactured using standard through-hole technology with all of the advantages of low cost, ease of layout, and ease of test. The fabrication drawing consisted of only one page and had a single drill fi le. At the same time, a second PCB using the blind and buried via approach cost 20 percent more to build, took twice as long to layout, was very diffi cult to test, and had an eight-page fabrication drawing, four drill fi les, and still required eighteen layers. I was curious as to why these designs were being done this way when it was not an improvement over the standard through-hole method normally used for such designs. Upon investigation, I discovered that there are presentations being made at conferences and some classes being taught that claim that combining blind and buried vias on this class of design saves layers by allowing many of the signals to be routed on layer two of

the PCB. From practical experience, this has turned out not to be true. There are places where combining blind and buried via technology serves a very important role. Among these are cell phone PCBs and high-pin-count BGA packages. In these cases, the motivation isn’t to save layers. Rather, it is to make possible designs that would otherwise have no solution. Cell phones, due to their compact size, have fi ne pitch components mounted on both sides of a single PCB. If standard through-hole tech-nology were employed, component holes from components mounted on one side of the PCB would penetrate mounting pads of

components mounted on the other side. In order to avoid this problem, blind vias are used to reach into the second or third layer of the PCB where connections are made to other circuit pins or power rails. This is done on both sides of the PCB connecting to a common core in the center that contains the power distribution networks. The result is a core with four or more layers built with con-ventional through-hole technology that has built-up layers on both sides, which are con-nected to the core using blind vias. This is often referred to as build-up technology. It is easy to see that this process will cost more than a like number of layers using standard through-hole technology. This is the price paid for miniaturization. Dense, high-pin-count BGA packages use blind and buried vias in a build-up process much like that used for cell phone PCBs, but for another reason. The balls or bumps on the BGA die are usually placed on an 8 mil (.203 mm) pitch. This pitch is far too

fi ne to allow through-hole vias. As a result, tiny, blind vias are used to penetrate to layer two and three of the package where very fi ne traces fan out to the 1mm or 50 mil pitch balls on the bottom of the package that fi nally interfaces with the main PCB. In neither of these cases was the moti-vation to save layers, save design time, or improve testability. In fact, the opposite is usually true. The use of blind and buried vias was to make the product possible at all! Testability is compromised in the case of the cell phone PCB due to the fact that few, if any, of the component pins are accessible for conventional in-circuit testing. As a result, the components used in such a design must contain special test circuits such as boundary scan or JTAG that allow testing from a few test pins that access each IC from a special test connector. When a design is done with through-hole technology, all device pins are accessible from the back side of the PCB making it easy to do in-circuit test, as well as allowing easy attachment of oscilloscope probes during troubleshooting. After much review, I have determined that those giving the advice to use blind and buried via technology on PCBs where it is not the best solution are well intentioned. However, those who follow this misplaced advice are paying a very high price. When a technology that works in one area is trans-ferred without adequate qualifi cation, the results can be mixed at the very least and disappointing at the worst. Those giving the advice owe it to their audience to make sure that, in their enthusiasm to promote a concept, it fi ts where it is being offered. Not doing so can result in some very bad end results that are not cost competitive or timely. ■■

Lee W. Ritchey is currently president of Speeding

Edge, a leading training and consulting company

specializing in the design of high speed PCBs

and systems. He has spent his 40-year career

designing high-speed PCBs for supercomputers

and high-performance Internet products.


Environmentally Speaking


By Fern Abrams

Change in Climate for Climate Change Regulation

A new wind has blown into town and it is hot. Already the new administration (100 days old when I wrote this) and Demo-

cratic Congress have signaled their intent to take action on climate change and the regu-lation of greenhouse gases (GHGs). Before you think to yourself that the electronics industry doesn’t have a stake in climate change, think again. At the end of April, the House Energy and Commerce Committee held hearings on the Waxman-Markey discussion draft of “The American Clean Energy and Secu-rity Act of 2009.” Environmental Protection Agency (EPA) analysis of the draft estimates that implementation of the bill would cost households less than $150 a year, while esti-mates produced by the Republican leader-ship in the House of Representatives indicate a cost to families of about $3,000 a year. If that’s what the bill would cost a household, imagine what it would cost your business! A committee markup of the bill scheduled for the last week of April was abruptly can-celed amidst rumors that the conservative Democrats on the committee could not sup-port the bill. If you think this is clearly good news, think again and keep reading. After a thorough scientifi c review ordered in 2007 by the U.S. Supreme Court, on April 17, the EPA issued a proposed fi nding that GHGs contribute to air pollution that may endanger public health or welfare. The proposed endangerment fi nding, which now moves to a public comment period, identi-fi ed six GHGs that pose a potential threat. Supporters of the House bill said the EPA endangerment fi nding has increased pres-sure on Congress to act. If Congress does not pass climate change legislation, the EPA will have to regulate greenhouse gases using its authority under the Clean Air Act (CAA). Because the CAA is designed to address local and regional levels of air pollutants, it is ill-suited to manage GHG regulation. Regula-tion of GHGs under the CAA would likely require more than 100 separate regulations covering various parts of the economy.

California (CA) is not waiting for Con-gress or the EPA to act. Under the CA Global Warming Solutions Act (AB 32) that was enacted in 2006, California will cut GHG emissions to 1990 levels by 2020. Current emission levels need to be cut by 15 percent in order to reach 1990 levels. Under a plan approved earlier this year, California plans to reduce GHGs requiring vehicles, businesses, and households to be more energy effi -cient, relying on more renewable energy and implementing a multi-sector cap-and-trade program. One of the draft measures requires the reduction of GHG emissions from Cali-fornia semiconductors operations that emit fl uorinated gases equivalent to 800 metric tons of carbon dioxide per year. Smaller semiconductor operations must monitor and report their emissions. In the meantime, the EPA has a draft regu-lation to require the reporting of GHG emis-sions by major sources, “Regulation to Estab-lish Mandatory Reporting of Greenhouse Gases from Upstream Fuel and Chemical Producers and Importers and Downstream Emitters.” The draft regulation proposes to implement a national, mandatory GHG emissions reporting system. Facilities that emit GHGs, including carbon dioxide, in excess of 25,000 metric tons per year would be required to monitor, document and report. Policymakers consider GHG reporting and inventory as critical components to eventu-ally developing a federal cap-and-trade pro-gram. The inventory will provide policy-makers with the necessary data to determine the feasibility of emissions reductions. Even in the absence of regulation, leading manufacturers are increasing pressure on their supply chain to quantify and reduce their emissions of carbon dioxide, a major GHG. The most recent annual report from the Carbon Disclosure Project (CDP) concluded that of the top 500 companies worldwide, 74 percent have set emission reduction targets and 65 percent have an executive body with overall responsibility for climate change. A report by Ceres Inc., a coalition of investors, environmental groups, and public interest

groups, recently assessed 11 industry sectors, including technology and semiconductors, on a range of climate change related perfor-mance measures. Of the sixty-three compa-nies assessed, IBM Corp., Tesco plc, Dell Inc., Intel Corp., and Johnson & Johnson ranked the highest in terms of a sustained commit-ment to controlling GHG emissions. As I write this column in early May, many things remain up in the air. One thing is clear though — it’s going to be a busy spring and

summer here in Washington. The electronics industry, along with all manufacturing industries and the American public, has a lot at stake. Whether or not you believe in cli-mate change and the human ability to affect it, you will be affected by the legislation and regulations currently being debated. For more information on climate change, visit www.epa.gov; www.house.gov; and www.ipc.gov/ehs. ■■

Fern Abrams is IPC’s director of government

relations and environmental policy. She is based

in Washington, D.C. Fern can be reached by

phone at 703-522-0225 or by email at

[email protected].


T he U.S. economic outlook continues to brighten (modestly). Stock prices, consumer and business confi dence, the ISM “Pur-chasing Managers” index, and even auto sales were up as we wrote this column in early June. Although we are clearly still in a reces-

sion, a more optimistic tone is emerging. The Wall Street Journal’s panel of “Blue Chip” economists recently modifi ed its U.S. GDP growth forecast - with Q209 still projected to decline (but at a lesser amount than forecasted earlier) and then growth resuming in the third quarter (Chart 1). Globally, we appear to have passed the bottom of this current elec-tronics business cycle (Chart 2). Although actual Q/Q growth won’t resume until the 3/12 growth rates exceed 1.0, we are clearly seeing an improved outlook. For PCBs, SE Asia, of course, dominates world production. Per Chart 3, Europe and N America continue to experience eroding sales. Japan took “a large hit” beginning in late 2008 (but recently resumed growth). In total, world PCB production is again expanding based upon SE Asia’s huge monthly revenues.

From a regional PCB growth perspective (Chart 4) SE Asia, and more recently Japan, now have 3/12 growth rates heading “north” toward their “breakeven” values of 1.0. Unfortunately, N America and Europe have yet to reach the low points of this current cycle. Looking forward, we still see about a 25 percent global decline in PCB shipments this year vs. 2008. Per Chart 5, we entered 2009 in a deep trough and it will take time to “dig ourselves out.” The forecasted “recovery path” (red line in Chart 5) that we published in December 2008 seems to be holding true as we log each month of 2009’s actual data. Chart 6 is our colleague Ed Henderson’s most recent forecast for global electronic equipment production growth by region. 2009 still looks like the “bottom,” with recovery in all major geographic areas likely in 2010 and 2011. See www.hendersonventures.com for more details.

PCB fabricationALR Services began PCB prototype service. AT&S launched a new Online Ordering System at www.ats.net.

Chart 1

Chart 2Chart 4

Chart 3

Ever Increasing (But Still Restrained) Optimism

By Walt Custer and Jonathan Custer-T opai


Bare Board Group received Supplier of the Year award from National Instruments. Career Technology and Merry settled an FPCB shipment lawsuit. Cicor Technologies appointed Roland Küpfer CEO. Coretec CFO Andre Kern left the company; CEO Paul Langston assumed interim (added) responsibilities of CFO. Dynamic acquired 59.93 percent of touch panel maker Abon Touch. Elprinta implemented Polar Instruments’ “Speedstack” software. Eltek received a USD1.2 million order from a U.S. medical equip-ment manufacturer. Endicott Interconnect Technologies eliminated 240 jobs. Eurocircuits added a second European production plant in Aachen, Germany. Fundação CERTI (Florianopolis, Brazil) purchased and imple-mented Valor’s Trilogy DFM, vPlan, vManage, and solutions. Hapro added a Teknek SMT-Cleaner for its PCB ID-marking line. Harbor Electronics (Santa Clara, Calif.) added a Bacher OptiFlex Post-Etch Punch for its innerlayer registration process. Hi-Tech installed Höllmüller and Schmid horizontal copper plating lines in Skopje, Macedonia. K&F Electronics acquired Ultima Circuits (Sacramento, Calif.). Kyoden postponed opening its automobile multilayer circuit board plant in Thailand. Lenthor Engineering installed an ESI Flex5530 UV Laser Drilling system. Merix:• extended its Bank of America credit availability to USD8 million.• strengthened its defense and aerospace capabilities. Murrieta Circuits integrated “SolidWorks” 3D mechanical CAD (MCAD) software. PNC added a new quickturn prototyping division. Printca separated from GPV and become an independent company called Printca ApS. Richter Elektronik installed a Strip-Etch-Strip line and a solder-mask developer from HMS Höllmüller. Saturn Electronics added two Mania T8T AOI machines. Schweizer Electronic suspended “short work” in June. Somacis pcb industries and Graphic appointed Jukka Risto to

enhance sales in Scandinavia. Teknofl ex received AS9100 certifi cation. Ulf Andersson Electronics began marketing PCBs with up to 500 micron copper layers from Zot. Materials and process equipmentAlpha - Cookson Electronics Assembly Materials opened a new SMT Print Technology center in Woking, Surrey. Atotech & SEMATECH partnered on process solutions for 3D ICs. Balver Zinn Group:• appointed Tim Lawrence, Ph.D., to Product Development

Manager.• named EMS Partners as its representative for Minnesota and North

and South Dakota and Luff Tool and IMK as North American rep-resentatives.

Bliss Industries reduced prices by 30 percent (the fi rst price reduc-tion in company history). BTU International appointed Jan-Paul van Maaren, Ph.D., to VP Marketing. Cadence Design Systems introduced a “scalable FPGA-PCB co-design solution.” Camtek acquired Printar Ltd. China-Kinwa High Tech is building a RMB 3 billion electronic material base in Qinghai Province, Northwest China. Columbus Chemical Company had a chemical plant fi re in Elba, Wisc. CyberOptics:• opened a new sales, service, and training center in Shanghai.• promoted Dennis Rutherford to VP of Global Sales & Marketing. Danutek appointed Istvan Nagy Sales Manager. Data I/O named:• West Tech as its sales representative in Colorado, Utah, and

Wyoming.• Process Automation & Tool, LLC, its sales representative in Georgia,

Alabama, Tennessee, and Mississippi electronics assembly market. DEK launched its Verifi cation & Traceability Software Suite. DfR Solutions was selected by the Korea Testing Laboratory to develop PCB plating QC standards.

Chart 5

Chart 6


DMRPCB.COM released a new additive printed electronics tech-nology, Silver Bullet, for Green PCB manufacturing. ESI purchased all intellectual property rights and certain hardware and software components from XSiL (Dublin, Ireland). Essemtec and Promass Assembly Systems began jointly developing board handling systems for SMT, AOl, marking, coating, refl ow, wave solder, and fi nal assembly lines. Essemtec Benelux began supplying stencils and accessories pro-duced by Christian Koenen. Goepel and iSystem formed a test and measurement partnership. Helmut Fischer Institute developed a new X-Ray technique for coating thickness analysis. Henkel:• appointed Jim Wise to lead global sales for Electronics Assembly

Business.• was recognized as one of “World’s Most Ethical Companies” by the

Ethisphere Institute and Forbes Magazine.• is investing more than USD23.7 million to expand its Salisbury,

NC, operations over the next three years. Honeywell opened a USD50 million R&D centre in Bangalore. Indium appointed Ostec Enterprises as its sales channel partner in Russia, Belarus, and the Ukraine. Indium VP of Technology Dr. Ning-Cheng Lee:• selected by SMTA International Technical Committee as a Distin-

guished Author and Distinguished Lecturer.• IEEE’s Components, Packaging, and Manufacturing Technology

Society approved Dr. Lee to be a CPMT Distinguished Lecturer. Indium Applications Development Program Manager Dave Sbiroli received IPC’s Distinguished Committee Service award. Insulectro launched its new information web site at www.insulectro.com. Isola:• European president Augusto Meozzi resigned.• granted a “square weave” patent license to Sanmina-SCI. Koh Young Technology opened its Alzenau, Germany, facility. Lincoln International was named “International M&A Advisory Firm of the Year” by ACQ Finance Magazine. Micronic Laser Systems AB acquired MYDATA automation AB. MIRTEC Europe formed distribution partnership with pb tec for Austria, Germany, and Switzerland. Multiline International Europa and mie GmbH’s General Manager Dr. Konrad Wundt retired. Neways received a cable loom systems order from VDL Groep. Oxford Advanced Surfaces Group developed a 1nm thick, environ-mentally friendly Onto coating to protect silver against tarnishing. Photo Stencil celebrated its 30th anniversary. Rehm Thermal Systems:• hired and appointed Robert Mihalyi Sales Manager for Central

Eastern Europe (CEE).• signed a soldering product distribution agreement with Altus Group

in UK and Ireland. Rogers acquired MTI Global’s silicones business assets. Savcor Group acquired a majority shareholding in Cencorp. Siemens Electronics Assembly Systems introduced a placement machine with rail-mounted gantries that can be moved into use in

only minutes. Teradyne and OptimalTest agreed to jointly market-test operations optimization solutions. ThreeBond began marketing its 3373E screen-printed anisotropic conductive adhesive with low halogen content for fi lm substrate bonding. Tridak launched a new information web site for dispensing and fi lling equipment. Valor appointed Hitech Eletronica its exclusive representative in Brazil. Ventec Electronics (Suzhou): • and TMT formed a strategic partnership agreement for Germany,

Austria, and Switzerland markets.• appointed Pietro Cucciati its representative for the Italian market.Vi Technology appointed iNETest Technologies its distributor in

India.

EMS and assemblyEastern Europe had EMS revenues of USD10.0 billion in 2008 and is expected to reach USD21.1 billion in 2013. - Frost & Sullivan EMS sector’s M&A activities declined in 1Q09 to six transactions. – Lincoln International Hungary is largest electronics manufacturing market in CEE with 60 percent market share. Russian electronics manufacturing market will grow from $1.85 billion in 2008 to $4.91 billion in 2015. - Frost & Sullivan Applied Kilovolts added a MYDATA MY15 pick-and-place machine in Worthing, West Sussex. Asteel laid-off 44 employees in Douarnenez, France. AU Optronics added a TV assembly line in China. AVerMedia Technologies began construction of a NT 1.1 billion (USD33 million) TV tuner card factory in northern Taiwan. Benchmark Electronics named CEO Cary Fu Chairman of the Board. Celestica’s former Outsourcing Director Rajeev Thakur was ordered to pay more than $1 million in restitution for insider trading. Chemigraphic installed a second Juki SMT line. China Great Wall Computer and Algerian broadband network operator EEPAD are jointly investing USD 4 million to set up a man-ufacturing joint venture in Algeria. CIL installed a DEK Horizon 02i screen printer. Cirtronics:• celebrated its 30 year anniversary.• is expanding its Milford, NH, manufacturing facility by 75,000 sq. ft. Corvalent opened its new 24,000 sq. ft. headquarters in Cedar Park, Texas. CTS was awarded four production programs for electronic throttle control accelerator pedal modules and a production contract for a pre-cision oven-controlled crystal oscillator. Delta Group Electronics achieved ISO 13485 medical product assembly certifi cation. Deutsche Mechatronics received a 5-year manufacturing contract from Proton Motor for fuel cell hybrid systems. EC moved its Romanian operations to a new 12,000 sq. ft. manu-


facturing plant in Petrasani, UK. Elcoteq:• Beijing obtained satellite television reception equipment manufac-

turing license from Ministry of Commerce of China.• renewed its membership in the Kempen/SNS Smaller SRI (Socially

Responsible Investment) Europe Index. Enics:• became a preferred supplier for Danfoss.• terminated 101 workers in Finland.• plans to close its Vaasa operations in 2009. Exception EMS laid-off 50 employees in Calne, UK. Flextronics: • partnered with Freescale Semiconductor on a reference design for

the Enterprise WLAN access point market.• installed RedPrairie’s warehouse management and transportation

management systems across its global network of facilities.• received a manufacturing contract from Oerlikon for thin-fi lm PV

equipment.• became a global manufacturing partner for Enphase Energy for

solar microinverter systems. Foxconn/Hon Hai:• increased staff in 1Q by 5 percent (25,000 workers).• plans to transform itself into an IDM (Integrated Device Manufac-

turer) in 5-10 years.• Chairman Terry Guo is investing 30 billion Yuan (USD4.4 billion)

to build an optoelectronics business industrial park in Xiamen, China.

• is spending NT 1.9 billion (USD58 million) to build a R&D center in the Kaohsiung Software Park (Taiwan).

• delayed its fi nal $45 million investment in its new Juarez, Mexico, facility.

• affi liate Advanced Optoelectronic Technology (AOT) withdrew an application to list on the local emerging stock market after profi t failed to reach listing requirements.

• Quellan entered a low power active interconnect strategic alliance for consumer, desktop, and data center markets.

Globetronics plans to invest RM30 million in CAPEX and hire 400 people in 2009.Incap completed construction of its new building in Tumkur, India.Jabil will establish a €16 million production center for solar panels in Kwidzyn, Poland. Kimball Electronics:• Jasper, Indiana, facility received a 3-year manufacturing contract for

automotive Bluetooth hands-free radio devices.• received lead free automotive order from Eldor. Kitron cut 120 workers in Norway. LG Electronics closed its mobile handset manufacturing facility in Mexico and transferred production to Brazil. LST électronique entered liquidation. Microdis Poland added a fully-automated Schleuniger Crimp-Centre 63 at its harness production facility in Suchy Dwór. Mikroelektronika installed a PillarHouse Orissa 600 fully auto-mated selective soldering line. NexLogic Technologies installed a MyData MY15, Fuji XPF, and a

Speedline MPM125 stencil printer. PartnerTech received a manufacturing contract for Hydra ink supply system from Xaar. PKC laid-off 87 workers in Kempele, Finland, and expects to cut an additional 41 by October. Plexus:• received a contract from QIAGEN to develop a next generation

automated screening system for the pre-processing of human papil-lomavirus DNA samples.

• pushed back occupancy for its global headquarters in Neenah, Wis-consin, to summer 2010.

Quanta and Pou Chen Group jv, Techview International, relocated its LCD factory in Huangjiang, China, to Changshu. S and Y Industries purchased 12,000 sq. ft. of additional space to expand engineering and manufacturing activities. Samsung moved its fl at screen TV manufacturing from Slovakia to Hungary. Sanmina-SCI:• cut 155 workers in Haukipudas, Finland.• Newark, California, facility received AS9100 aerospace

certifi cation. Scanfi l EMS cut 31 workers and transferred part of electronics pro-duction in Sievi to Parnu, Estonia. Seidel Electronics laid-off 48 workers in Deutschlandsberg, Austria. Sibex Electronics began construction of its 52,500 sq. ft. contract manufacturing facility in Homosassa, Florida. SiMS added a JUKI FX-3 high-speed chip shooter. Soyo fi led Chapter 7 bankruptcy protection. Sparton:• appointed Drew Richmond deputy general director of Spartronics

Vietnam.• closed its Jackson, Mich., plant and transferred work to Vietnam

and Brooksville, Fla. Stadium Electronics appointed Tony Inskip Sales Director for its EMS business. Sumitomo Electric Wiring Systems Polska plans to close its wire harness facility in Rawicz in October 2009 and transfer all production to Romania. Teac increased fl oor space at Dongguan Teac Electronics by 60 per-cent in anticipation of beginning PC, Info equipment production in autumn 2009. TT electronics received a £2.5 million/year PCB manufacturing agreement with Crowcon Detection Instruments. Universal Electronics added SMT equipment from Universal and Automated Optical Inspection machines from YesTech. Vierling Production added a DEK Horizon 03i soldering paste printer and a DD500 dispenser in Ebermannstadt, Germany. ■■

Walt Custer and Jonathan Custer-Topai’s column is sponsored by Dow

Electronic Materials. Custer Consulting Group provides market research,

business analysis, and forecasts for PCB fabrication and assembly,

passive components, semiconductors, and the electronic equipment end

markets. You can reach Walt by phone at 707-785-1777, email at walt@

custerconsulting.com, or visit his Web site: www.custerconsulting.com.


Technical Product Spotlights

3M LC, LC/APC No Polish Connectors Further expanding its No Polish Connector line, 3M has introduced the new No Polish LC Connector for both multimode and sin-glemode fi ber ap plications an d th e N o Polish C onnector L C/APC f or sin glemode fi ber applications. Both e nable fa st o n-site i nstallation of 250 micro n an d 9 00 micro n te rmina-tions utilizing a one-piece, pre-assembled design. Like other members of the 3M No Polish Connector f amily, th e n ewest con-nectors are des igned t o s ave i nstallation technicians tim e w hile h elping to mini -mize capital investment. The LC NPC is tested for FTTP and prem-ises applications for both indoor and out-door locations and is available in SM, 62.5 micron, 5 0 micron and also 5 0 micron LOMMF (laser optimized multimode fi ber) for 10 Gb applications. More information, visit www.3mtelecommunications.com/.

Ucamco Integr8tor v4.1.2Ucamco (formerly Barco ETS) have launched version 4.1.2 of th eir Inte gr8tor au tomatic data inp ut an d anal ysis to ol. Inte gr8tor is a powerful tool to e nhance customer rela-tions and increase front-end throughput by up to 30 p ercent. Its automatic data input and d esign anal ysis c apability p rovides the j ob p arameters n eeded f or f ast, a ccu-rate quotations and for higher throughput through the front-end tooling process. The lates t re lease b rings a numb er of n ew inte resting f eatures an d o ff ers improved p erformance and s tability. Inte-gr8tor runs equally well in a Ucamco UCAM or Frontline Genesis environment.For more information, visit www.ucamco.com.

3M EM Eye Meter Series for EMI, RF, ESD Detection 3M has re leased a n ew, universal test and measurement platform that off ers a highly expandable, c ost-reducing sol ution t o manufacturers l ooking f or a ccurate e lec-trical event detection. The new 3M EM Eye M eter from the 3M Electronic Solutions Division provides three devices in one unit. The meter consists of a base u nit a nd t hree sepa rate sen sors for electromagnetic in terference ( EMI), radio

frequency (RF) and electrostatic discharge (ESD) d etection. T he m odular d esign c an save manu facturers m oney by all owing them to p urchase th e f unctionality th ey need, when they need it. The EM Eye M eter ins tantly disp lays information on its color touch screen and logs data on an SD c ard. The 3M meter is the o nly k nown o ne of it s k ind cur rently on th e mar ket that off ers a to uch s creen display, off ering inc omparable c onve-nience and ease of use. The meter’s hand-held size p rovides p ortability an d all ows manufacturers to check their control plans more o ften, p otentially r educing p roduc-tion disruptions.

Bliss Industries Rack to Support All Juki FeedersBliss In dustries In c., p rovider of han dling carts an d r acks f or e lectronics ass embly, announces that it now provides a rack to support all Juki feeders.

With J uki b eing th e numb er o ne p ick-and-place ma chine c ompany in th e world, it w as o nly natur al f or B liss In dus-tries to ann ounce th e re lease of s everal new mo dels of fe eder rac ks t o s upport Juki’s 700 NF & FF, 2000 CTF feeders. Bliss’ engineering team designed a rack to sup-port all t ypes of J uki feeders in o ne rack. Bliss off ers a setup rack, along with 22, 36 and 6 0” r acks. All of th ese r acks fi t Bliss’ standard o pen s tyle c arts, al ong w ith two oth er f eeder r acks. B liss n ow sup -ports all th e J uki an d p revious Zev atech feeders.For m ore inf ormation, v isit w ww.blissindustries.com.

Juki Introduces Feeder Refurbishment ProgramJuki C orporation ann ounces that , in a continuing e ff ort t o off er th e Lowes t Cost of Ownership to its customers, it has started a F eeder R efurbishment Pro gram

designed t o i nspect, r epair a nd ca librate existing feeders at minimal cost and quick turn around for its customers. As part of this program the company also will off er fully refurbished Juki feeders for s ale at a ve ry c ompetitive mar ket price. Top feeder performance is essential to running production at peak effi ciency. Properly maintained feeders will improve line performance and reduce changeover time by increasing th e capability to gang pick parts, reducing the number of com-ponent misp icks, e liminating th e n eed to manually teach feeder pick positions, and c orrecting fe eder advanc ement problems. F or more i nformation, e -mail [email protected].

Harvard Apparatus PHD ULTR Syringe Pump The PHD ULTRA™ provides maximum ver-satility for confi gurations and applications. It c an han dle fl ow r ates f rom p icoliter to 220 ml /min w ith th e high est a ccuracy, precision and s moothness of fl ow. This pump c an b e s tood o n e nd to ma ximize performance for certain applications, and the s creen tur ns w ith th e p ump, s o yo u can always read it. Models are a vailable i n i nfusion only , infuse/withdraw, programmable and push pull. Multiple syringe holders can accom-modate 2 to 1 0 s yringes f or multi chan -nels or larger res ervoir c apacities. B oth standard and remot e mo dels are a vail-able. R emote m odes ha ve th e p umping mechanism up to 30 ft away from the con-trol unit . T hese f eatures an d m ore mak e the P HD U LTRA™ th e ultimate p roblem solver f or yo ur m ost d emanding fl uidics applications. Fo r m ore inf ormation, v isit www.harvardapparatus.com.

SiSoft Support for Netro-nome’s NFP-32xxSignal Integrity Software, Inc. ™ announced support for the NFP-32xx from Netronome Systems, a l eading d eveloper of highl y programmable semic onductor pr oducts that p rovide inte lligent an d s ecure fl ow processing f or v irtualized s ervers an d network e quipment. Si Soft has wo rked closely w ith N etronome to anal yze an d ensure th e signal inte grity o n all th e



NFP-32xx high -speed net work i nterfaces including PCIe, 25Gbps Interlaken, SPI-4.2, 10Gbps X AUI, Q DR, an d D DR3. T he wo rk performed by Si Soft has resulte d in a s et of layout guidelines that can be used by NFP-32xx u sers t o ac celerate implemen -tation. SiSoft can enable users to anal yze their des igns t hrough c ustomized NF P-32xx k its f or Q uantum-SI™ an d Q uantum Channel D esigner™ as we ll as thro ugh consulting services. The N FP-32xx f amily of N etwork F low Processors™ i s t he i ndustry’s fi rst mer-chant silicon to re move th e p erformance barriers i n u nifi ed c omputing a rchitec-tures by inte grating high -performance networking, s ecurity p rocessing an d I /O virtualization with general -purpose com-puting. Ad ditionally, th e N FP-32xx is th e only l ine of pr ocessors bac kward-com-patible w ith th e mar ket-leading Inte l® IXP28XX, protecting customers’ immense investment in fi eld-proven and net work-hardened software.

Henkel Multicore LF700 Solder Paste With th e majo rity of th e e lectronics industry fully on board with lead-free man-ufacturing, solder paste materials require-ments are now moving beyond basic func-

tionality and toward more advanced, truly enabling c apabilities. Addressing these needs, He nkel h as e ngineered M ulti-core® LF700™, a new lead-free, halide-free solder paste that has b een formulated to deliver a wider range of benefi ts and per-formance char acteristics than o lder-gen-eration and competitive products. While conferring the necessary require-ments f or hali de-free, n o cl ean, l ead-free p rocesses, Multic ore LF7 00 als o delivers uniq ue a ttributes t hat fur ther advance m odern manu facturing. T he material re duces vo iding in B GA s older

joints, delivers a high tack force to pro-vide sta bility d uring h igh-speed c ompo-nent plac ement and off ers l ong p rinter abandon times of up to 4 hours even when printed o nto e xtremely fi ne-pitch 0.4mm CSP apertures. Process versatility is at th e foundation of Multicore LF700, as it off ers excellent s olderability ove r a w ide r ange of refl ow p rofi les in b oth air an d nitrogen and is eff ective on several surface fi nishes including Ni/Au, Immersion Sn, Immersion Ag an d OSP c opper. Fo r m ore inf orma-tion, visit www.henkel.com/electronics.

SPR-45VA SMTru Vision Assist Automated Stencil Printer

APS N ovastar, LLC, a gl obal l eader in th e design, d evelopment an d manu facture of O EM s olutions f or sh ort to m edium run S MT an d PCB ass embly is p leased to announce the availability of the SPR-45VA Automated Stencil Printer. With its SMTrue Vision A ssist alignm ent s ystem, n ew quick chan ge d ouble-sided n esting k it, and e nhanced a xial an d th eta alignm ent system, us ers w ill e njoy b enefi ts usually relegated t o much m ore e xpensive s ys-tems wit hout c ompromise t o pre cision and repeatability. The APS N ovastar SP R-45VA w ith it s SMTrue V ision A ssist alignm ent s ystem provides S MT an d PCB ass emblers w ith the speed, ease-of-use and reproducibility they re quire f or s older p aste p rinting applications down to 12 mil pitch com-ponents. T he SP R-45VA p rovides a xial stencil to b oard re gistration w ith dual o r single c amera assis t to all ow for accurate printing of 0 201s, ultra micro B GAs, CSPs, and 1 5 mil p itch Q FPs w ith eas y a djust-ment f or b oard to lerance v ariation in X , Y an d T heta. T he SPR-45VA o perates in a

user-friendly en vironment addres sing a wide variety of screen printing alignment mark re gistrations. P neumatic c ontrol of p ressure, sp eed an d an gle-of-attack dual squeegee system delivers consistent results for the most taxing production or prototyping printing applications.

Techcon Systems 700 Series Syringe BarrelsTechcon S ystems, a p roduct gro up of O K International and a leading provider of fl uid dispensing s ystems and pr oducts, debut s the 700 Series Premier Dispensing Syringe Barrels as ideal quality syringes that feature the same look, fi t and function as a recently discontinued i ndustry sta ndard syr inge, with a substantial cost savings. Techcon S ystem’s 7 00 S eries s yringe barrels are silic one- an d chl oride-free, and are design ed t o work w ith indus try standard e quipment. T he s yringe b ar-rels are made f rom lo w f riction p olypro-pylene t o ensure ac curacy, rep eatability and p roductivity. T he 7 00 S eries b arrels feature a double Helix Luer lock for secure dispense tip at tachment, an d als o are available in thre e colors: natural for most generic ap plications, amb er to p rovide protection of UV/visible light block (up to 520 nm), but with the ability to see mate-rial inside the syringe barrel, and black for total light b lock. Fo r m ore inf ormation, visit www.techconsystems.com.

Aries Fine Pitch Bump AdaptersAries El ectronics has laun ched a n ew series of adapters that enable the use of virtually an y S MT I C d evice o n a p itch of 0.4 mm or higher to PC boards on 0.5 mm pitch. These are ideally suited to adapting an IC device to some of the more popular TSSOP and QFP packages on 0.5 mm pitch. The unique Fine Pitch Bump Adapters, an expansion to Aries’ line of Correct-A-Chip Adapters, sa ve d esigners s ignifi cant time and m oney by e liminating th e n eed f or costly engineering rework. This a dapter w ill e nable th e us er to solder a BGA or other SMT device to p ads on th e c omponent si de of th e a dapter, which w ill th en c onnect thro ugh th e adapter to th e 0. 5 mm p itch r aised c on-



nection pads (up to 0.010”) on the bottom. The c onnection s cheme c omes s tandard in a p in 1-to-pin 1 ro uting, but can easily be customized to accommodate vi rtually any c onnection re quirement. Fo r m ore information, visit www.arieselec.com,

KD Scientific EZFlow 2010The EZFlow 2010 is a sin gle syringe pump designed to enhance quick effi c ient opera-tion while maintaining simplicity. It meets the CE 0 197 directive and is EC 9 3/42 EEC Annex II, Article 3. The E ZFlow 2010 c an b e us ed f or inf u-sions from 0.1 to 300 ml/hr with 2.5% accu-racy. It has an easy to read LED display and is v isible f rom many an gles an d w ill con-tinuously show the fl ow rate in ml/hr. The display c an als o b e to ggled to sh ow th e total volume delivered in ml. It features automatic syringe detection and has a fast purge feature. It can be bat-tery operated and AC powered. It works

with a w ide r ange of s yringes 2 0/30 ml 50/60 ml an d 1 00 ml s yringes. T he unit automatically detects the syringe size and adjusts th e s elected fl ow r ate au tomati-cally for the syringe size. The unit has four audible alarms, occlu-sion d etection, l ow b attery, n ear e nd of dispense and complete. KD Scientifi c designs , manuf actures and sells a range of quality fl uidics equip-ment used by research laboratory markets worldwide. F or more informa tion, vi sit www.kdscientifi c.com.

BEST Inc Rework Stencils from PolyimideBEST Inc. has re leased a n ew line of s ten-cils for PCB rework. These polyimide sten-cils are designed to be stay-in-place sten-cils an d c an a ccommodate sp ace/traces down to less than 1mm. Standard stencil thicknesses are ( 4) an d ( 8) mils w ith an aspect ratio of 1:1. They are designed to

peeled away from their adhesive backing and permanently placed onto the PCB site area to b e rewo rked. T he s tencils are cu t with high precision lasers. These s tencils e liminate s everal p rob-lems of m etal s tencils inclu ding: k eeping

the s tencil in intimate contact with the PCB f or the high est print quality, the releasing of the stencil from t he

board w hich creates p roblems in s older paste p rint qualit y an d th e tim e-con-suming nature of cl eaning th e s tencils. The polyimide stencils, since they remain on the b oard and have 1:1 asp ect ratios, print solder paste consistently for higher rework y ields. Fo r m ore inf ormation, visit www.solder.net ■■

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[ Classif eds ]

1 or 2 Hitachi ND-4P250E 100,000 spindles

1 of 4 Orbotech Blaser

Hitachi ND-1W212E/10P 120,000 Spindle Fuji FT-303-3 laser photo plotter

OEM press hot and cold with auto load 6 opening 24X30

1 of 2 ATG A2 -12 head and 15 head flying probe

2 COMPLETE PRINTED CIRCUIT BOARD SHOPSBidding Begins July 16 Please Visit www.dispositionservices.com for more info

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LPI / SCREENING / PHOTO (2) Circuit Automation DP-10, 4 screening tables, PQ and proheco ovens, (2) DuPont ASL cut sheet laminator, Maintek 30” 2001 Spartanic 83 VM

MULTILAYER Layup station, Burkle 4 opening hot and cold press 24X30 vacuum, PHI 4 opening 24X30 hot and cold, OEM 140-6-E 6 24X30 hot and cold press vacuum, TMP 4 opening 24X24 hot and cold, TMP 4 opening 24x30 hot and cold separate press vacuum, J&J spot facer

DRILLER / ROUTER (2) power shears Wysong, Hitachi drill router, Hitachi ND-SP1805E mark 10D, Hitachi ND-4K180E, Mark VI drill router CNC-6, Mark V drill router, Nicolet NXR1002, Multiline Optiline PL, (2) Multiline post etch punch with 3000 controller, Multiline artwork punch 300 controller AAP-0048, Glenbrook RTX-113real time x ray, Lohr Hermann LH-312 with jump score, Barnaby 505 scoring machine, (2) Barnaby stackmaster, Carbine product edgemate and bevlester, (2) Excellon EX-300 3 spindle drill router CNC-6

QC & TEST CMI PTH-100 thickness machine, CMI RX Series-SD, Acu Gauge, Alpen inspection system (2) Orbotech VRS-4i, (4) Orbtech Blaser 309 VO and VI, LIoyd Doyle Excalibur 4000XM AOI, Fuji FT-303 3 laser plotter, ATG tester A2- 12 head and 16 head flying probe tester, Everett Charles 9090 tester, CMI X ray fluorescence, (3) complete labs, Tektronix 11801, (2) Orbotech 5008 express plotters

FACILITIES Air compressor Kaiser DS 140 100 HP and BS60 50 hp Atlas copco 25 HP, Forklift Mitsubishi FBC15 3000 LBs, Spencer vacuum 15 hp and 2 IR T30, Backup generator Bypass BS40D diesel with switching system, 3 JWI filter press

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[ Classif eds ]

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Events

Advertiser Page No.

3M Scotchgard Phototool Protection System .............................. 1

Chemcut Corporation ............................................................. 9

CPCA Show 2010 ................................................................. 12

Gebr. Schmid GmbH + Co ...................................................... 13

IPC Midwest ........................................................................ 8

M&B Plating Racks ................................................................ 7

Metrohm Ltd. ....................................................................... 9

Microtek Laboratories ......................................................... IBC

Productronica 2009 .........................................................10-11

Wise Software Solutions Inc. .................................................. 6

July 2009 • circuitree.com

46th Design Automation Conference

Jul 26, 2009 - Jul 31, 2009

San Francisco, California

http://www.dac.com/46th/index.aspx

2009 Medical Electronics Symposia

Sep 16, 2009 - Sep 17, 2009

Hosted by SMTA and MEPTEC

Phoenix, Arizona

http://www.smta.org/education/symposia/sympo-

sia.cfm#medical

IPC Midwest 2009

Sep 23, 2009 - Sep 24, 2009

Schaumberg, Illinois

http://www.IPCMidwestshow.org

[ Classif eds ]

G L O B A L C A R E E R O P P O R T U N I T I E SP R I N T E D C I R C U I T A N D S P E C I A LT Y E L E C T R O N I C M AT E R I A L S

W W W. C I R C U I T- S E A R C H . C O MKEVIN M. STACK, President - [email protected] Eva Chen - [email protected]

Additional Openings Listed on Web Site

VP Sales - PCB Commodities – International

Director - Process Engineer Technical Marketing ManagerProduct Development Engineer - Materials

RoHS CO MPLIANT PROCESSESTO DATE: Over 1,200,000 panels EN/Imm. Au plated

Over 225,000 panels Electrolytic Nl/Au plated

INCOMING INSP ECTION Gold Plating Services

UNITECH INDUSTRIES INC1461 ELMHURST ROAD, ELK GROVE VILLAGE, IL 60007P: (847) 357-8800 • F: (847) 357-8804 E: [email protected] • www.unitechindustriesinc.com

• Providing Excellent Plating Services since 1988.• No voice mail. Always talk to a live associate.• Consistantly delivering flawless plated parts• Electroless Palladium• Immersion gold/Electroless palladium/

Electroless nickel• Electroless Nickel/Immersion Gold.• Electrolytic gold. Hard gold and soft gold.• Plating to a wide variety of standards eg. - Military, ASTM, AMS, Rockwell, Motorola, IPC, Automotive or other applicable standards• Immersion Silver• Electrolytic Silver. QQ-S-365• Immersion tin-White tin.

• Electrolytic tin. -Bright and dull.• Rhodium• Tin-Nickel alloy. 65%Sn-35%Ni.• Auto tab line.• Specialize in plating on Aluminum, SS, Nickel alloys and many hard to plate processes as well as delicate parts.• Rack and barrel plating.• Capacity and capability to plate very short runs as well as large runs.• Can plate larger than 24" x 24" panels.• Our customers compliment us on our excellent quality and prompt delivery as promised

0709-CT_Classifieds.indd 40 6/17/09 3:51:00 PM

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08 ❏ Printed Circuit Board Manufacturer 09 ❏ Electronic Manufacturing Services 05 ❏ Original Equipment Manufacturer 02 ❏ Supplier to Fabricator (Equipment, Material, Services, etc.) 89 ❏ Other ______________

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circuitree - 07 jul 2009

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