CMPUT 229 - Computer Organization and Architecture I

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CMPUT229 - Fall 2003

Topic6: Logic, Multiply and Divide Operations

José Nelson Amaral

CMPUT 229 - Computer Organization and Architecture I

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Reading Assignment

Appendix A: Section A.9Chapter 4: Section 4.2, 4.3, 4.4

parts of sections of 4.5-4.7

CMPUT 229 - Computer Organization and Architecture I

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Operating with Unsigned Numbers

If a byte is loaded into a register using the lb instruction,the byte will be sign-extended to 32 bits before it is writteninto the destination register.

For instance, if the byte 0x84 is stored in position 0x10008000and the following instruction is executed:

lb $t0, 0($gp) # $gp = 0x1000 8000What is the value of $t0 after this instruction is executed?

$t0 = 0xFFFFFF84

How could we get 0x00000084 loaded into $t0 from position 0x10008000?

We need to use the load byte unsigned instruction for that effect:

lbu $t0, 0($gp)

CMPUT 229 - Computer Organization and Architecture I

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sltu and sltiuSometimes when comparing two values, we want to treat themas unsigned numbers. For this situation MIPS offers two instructions:set less than unsigned (sltu) and set less than immediate unsigned (sltiu)

Example: Assume that the following values are stored in $s0 and $s1

$s0 = 0xFFFF FFFF$s1 = 0x0000 0001

What are the values of $t0 and $t1 after the following instructions areexecuted?

slt $t0, $s0, $s1sltu $t1, $s0, $s1

$t0 = 1 $t1 = 0

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addu, addiu, and subuMIPS also offers unsigned arithmetic operations that do notcause exceptions on overflow:

addu: add unsignedaddiu: add immediate unsignedsubu: subtract unsigned

The only difference between the signed instructions add,addi and sub, and the unsigned ones addu, addiu, and subu,is that the unsigned ones do not generate overflow exceptions.

The immediate fields of addiu and sltiu are sign-extended!

Pat-Hen. pp. 222 and pp. 230

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Logical ShiftsMIPS provides bit shifting operations such as shift left logical (sll),and shift right logical (srl).

When a logical shift occurs, the new bits introduced in the wordare always zeros.

Example: Assume that

$s0 = 0000 0000 0000 0000 0000 0000 0000 1101

What would $t2 contain after the following instruction is executed?

sll $t2, $s0, 8 # $t2 $s0 << 8

$t2 = 0000 0000 0000 0000 0000 1101 0000 0000

Pat-Hen. pp. 226

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Example of logical shifts

Propose a sequence of two MIPS instructions that performs the following binary transformation in $s0 (without affecting any other register):

Before: $s0 = bbbb bbbb bbbb bbbb bbbb bbcc cccc ccbb After: $s0 = 0000 0000 0000 0000 0000 0000 cccc cccc

Solution:sll $s0, $s0, 22 # $s0 $s0 << 22# $s0 = cccc cccc bb00 0000 0000 0000 0000 0000srl $s0, $s0, 24 # $s0 $s0 >> 24# $s0 = 0000 0000 0000 0000 0000 0000 cccc cccc

Pat-Hen. pp. 229

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Integer Multiplication and Division using Shifts

Shift operations can be used to perform integer multiplication and divisionby powers of 2.

For example to multiply the integer stored in $t1 by 4, we could usethe following instruction:

sll $t1, $t1, 2 # $t1 $t1 << 2 = 4$t1

If $t1 contained, for instance 0x00000008:

Before: $t1 = 0000 0000 0000 0000 0000 0000 0000 1000 = 23 = 810

After: $t1 = 0000 0000 0000 0000 0000 0000 0010 0000 = 25 = 3210

Similarly, a shift right by 2 is equivalent to an integer division by 4.

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Arithmetic Shifts

What happens if we shift the number -16 to the right by 2?

1111 1111 1111 1111 1111 1111 1110 1111 + 0000 0000 0000 0000 0000 0000 0000 0001-16 = 1111 1111 1111 1111 1111 1111 1111 0000

After a shift right logical of 2 we get:0011 1111 1111 1111 1111 1111 1111 1100

What is the decimal value represented by this binary number?

+16 = 0000 0000 0000 0000 0000 0000 0001 0000

001111 1111 1111 1111 1111 1111 1111 00 = +1,073,741,820

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Something is amiss!

-16 = 1111 1111 1111 1111 1111 1111 1111 0000

Thus our logical right shift of -16:

by 2 resulted in:

+1,073,741,820 = 001111 1111 1111 1111 1111 1111 1111 00

If we want to use shift right as a fast alternative to division by powers of two, we need a different shift operation!

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Shift Right ArithmeticMIPS provides a shift right arithmetic (sra) operation thatpreserves the sign of the number shifted.

If $t0 = 0xFFFF FFF0 = -1610

The following instruction:

sra $t0, $t0, 2 # $t0 $t0 >>a 2 = $t0/4

will produce:$t0 = 0xFFFF FFFC = -410

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A Note in Binary-to-Decimal Conversion

When converting a positive binary number that has a longsequence of 1’s into decimal, is it useful to use the following observations:

We wanted to convert the following binary number to decimal:

X = 0011 1111 1111 1111 1111 1111 1111 1100

0011 1111 1111 1111 1111 1111 1111 1111- 0000 0000 0000 0000 0000 0000 0000 0011

0011 1111 1111 1111 1111 1111 1111 1100

0100 0000 0000 0000 0000 0000 0000 0000- 0000 0000 0000 0000 0000 0000 0000 0001

0011 1111 1111 1111 1111 1111 1111 1111

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A Note in Binary-to-Decimal Conversion

When converting a positive binary number that has a longsequence of 1’s into decimal, is it useful to use the following observations:

We want to convert the following binary number to decimal:

X = 0011 1111 1111 1111 1111 1111 1111 1100

0011 1111 1111 1111 1111 1111 1111 1111 = Y- 0000 0000 0000 0000 0000 0000 0000 0011 = 30011 1111 1111 1111 1111 1111 1111 1100 = X

0100 0000 0000 0000 0000 0000 0000 0000 = 230

- 0000 0000 0000 0000 0000 0000 0000 0001 = 1 0011 1111 1111 1111 1111 1111 1111 1111 = Y

X = Y - 3 = 230 -1 - 3 = 210 210 210 -4 X = 102410241024 - 4 = +1,073,741,820

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Variable ShiftsSometimes we want to shift a value by a variable number of bits(computed by an algorithm, for instance). For this cases, MIPS provides the shift left logical variable (sllv), shift right logical variable (srlv),and shift right arithmetic variable (srav) instructions

Example: What is the value stored in $s1 after the following instructions are executed?

addi $t0, $zero, 4addi $s0, $zero, -128srav $s1, $s0, $t0

$s1 = -128/16 = -8

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Bitwise Logic OperationsBitwise logic instructions cause the values stored in two registersto be combined, bit by bit, by a logic operator.

MIPS implements or, and, not, nor, xor. It also has immediate versions: andi, ori, xori

Example:

or $t0, $t1, $t2 # $t0 $t1 | $t2

Pat-Hen. pp. 227

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Logic FunctionsX X’0 11 0

If X=0 then X’=1If X=1 then X’=0

NOT

A B C0 0 00 1 01 0 01 1 1

If A=1 AND B=1 then C=1 otherwise C=0

AND

A B C0 0 00 1 11 0 11 1 1

If A=1 OR B=1 then C=1 otherwise C=0

OR

Pat-Hen. pp. 231

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Logic Functions

X Y C0 0 00 1 11 0 11 1 0

If X=1 OR Y=1, butnot both of them, then C=1

XOR

X Y C 0 0 1 0 1 0 1 0 0 1 1 0

If X=0 AND Y=0, then C=1

NOR

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Bitwise logic example

Example: The following is the code of a leaf procedure. How would you describe what this procedure does?

add $v0, $zero, $zeroandi $t1, $a0, 3beq $t1, $zero, endadd $v0, $zero, 1

end: jr $ra

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Multiply in MIPSMultiplication in Decimal:

88 x45

440 352

3960

two digits operands

four digit product

Similarly, the binary multiplication of two 32-bit operands produces a 64 bit product.

The MIPS has two special register, Hi and Lo, to store the high andlow parts of the 64 bit product generated by a multiply operation.

Pat-Hen. pp. 264

The multiplication of two 2-digitoperands resulted in a 4-digit product.

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Multiply in MIPSMIPS has a multiply instruction, mult, and a multiply unsigned, multu,instruction.

MIPS also provides two special instructions to move data fromHi and Lo to the general purpose registers: move from Lo, mflo,and move from Hi, mfhi.

Neither the mult nor the multu instruction detects overflow.

Example:mult $s0, $s1 # Hi high[$s0$s1]; Lo low[$s0$s1];

MIPS assembler implements a pseudo assembly instructionthat moves the values from Hi and Lo into a register:

mul $s0, $s1, $s2 # $s0 $s1$s2

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Integer Division

Pat-Hen. pp. 273

2327

323

Quotient

Remainder

The divide, div, instruction produces the quotientof the division in Lo and the remainder in Hi.

The MIPS divide instruction ignores overflow.

The MIPS assembler also provides a three register pseudodivide instruction to place the quotient in an specified register.