coen3114_intro_to_assembly_language_programming.pdf
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COEN3114
INTRODUCTION TO ASSEMBLY
LANGUAGE
5.1 Introduction5.2 The Computer Organization - Intel PC
5.3 Instruction Format
5.4 Addressing Mode
5.5 DEBUG program
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Introduction
Levels of Programming Languages1) Machine Language
Consists of individual instructions that will be executed by the CPUone at a time
2) Assembly Language (Low Level Language) Designed for a specific family of processors (different processorgroups/family has different Assembly Language)
Consists of symbolic instructions directly related to machine languageinstructions one-for-one and are assembled into machine language.
3) High Level Languages e.g. : C, C++ and Vbasic
Designed to eliminate the technicalities of a particular computer.
Statements compiled in a high level language typically generate many
low-level instructions.
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Advantages of Assembly Language
1. Shows howprograminterfaces with theprocessor, operating system, and BIOS.
2. Shows howdata is represented and stored
in memory and on external devices.3. Clarifies howprocessoraccesses and
executes instructions and how instructionsaccess and process data.
4. Clarifies how a programaccesses externaldevices.
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Reasons for using Assembly Language
1. A program written in Assembly Language requires
considerably less memory and execution time than onewritten in a highlevel language.
2. Assembly Language gives a programmer the ability toperform highly technical tasks that would be difficult, if
not impossible in a high-level language.3. Although most software specialists develop new
applications in high-level languages, which are easier towrite and maintain, a common practice is to recode in
assembly language those sections that are time-critical.4. Resident programs (that reside in memory while otherprogram execute) and interrupt service routines (thathandle input and output) are almost always develop in
Assembly Language.
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The Computer Organization - INTEL PC
In this course, only INTEL assembly language will be learnt.
Below is a brief description of the development of a few
INTEL model.
(i) 8088 Has 16-bit registers and 8-bit data bus
Able to address up to 1 MB of internal memory
Although registers can store up to 16-bits at a time but the
data bus is only able to transfer 8 bit data at one time
(ii) 8086
Is similar to 8088 but has a 16-bit data bus and runs
faster.
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(iii) 80286 Runs faster than 8086 and 8088
Can address up to 16 MB of internal memory multitasking=> more than 1 task can be ran
simultaneously
(iv) 80386 has 32-bit registers and 32-bit data bus
can address up to 4 billion bytes. of memory
support virtual mode, whereby it can swap portions ofmemory onto disk: in this way, programs running concurrentlyhave space to operate.
(v) 80486 has 32-bit registers and 32-bit data bus
the presence of CACHE
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(vi) Pentium
has 32-bit registers, 64-bit data bus
has separate caches for data and instruction
the processor can decode and execute more than one
instruction in one clock cycle (pipeline)
(vii) Pentium II & III
has different paths to the cache and main memory
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In performing its task, the processor (CPU) is partitioned into two
logical units:
1) An Execution Unit (EU)
2) A Bus Interface Unit (BIU)
EU
EU is responsible forprogram execution Contains of an Arithmetic Logic Unit (ALU), a Control Unit (CU) and a
number of registers
BIU
Delivers data and instructions to the EU.
manage the bus control unit, segment registers and instruction queue.
The BIU controls the buses that transfer the data to the EU, to memory
and to external input/output devices, whereas the segment registers control
memory addressing.
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EU and BIU work in parallel, with the BIU keeping
one step ahead. The EU will notify the BIU when itneeds to data in memory or an I/O device or obtain
instruction from the BIU instruction queue.
When EU executes an instruction, BIU will fetch the
next instruction from the memory and insert it into
to instruction queue.
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AH AL
BH BL
CH CL
DH DL
SP
BP
SI
DI
AX
CX
DX
BX
EU : Execution Unit BIU : Bus Interface Unit
CS
Program Control
DS
SS
ES
ALU
CU
Flag register
1
2
3
BusControl
Unit
4
n
Bus
Instruction Pointer
Instruction
Queue
(Program Counter)
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Addressing Data in Memory
Intel Personal Computer (PC) addresses its
memoryaccording to bytes. (Every byte has a
unique address beginning with 0)
Depending to the model of a PC, CPU can access
1 or more bytes at a time
Processor (CPU) keeps data in memory in reverse
byte sequence (reverse-byte sequence: low order byte in thelow memory address and high-order byte in the high memory
address)
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Example : consider value 052916 (0529H)
register
memory
When the processor takes data (a word or 2 bytes),it will re-reverse the byte to its actual order 052916
05 29
29 05
Address 04A2616(low-order/least significant byte)
Address 04A2716(high-order/most significant byte)
2 bytes 05 and 29
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Segment And Addressing
Segments are special areas in the memory that is defined in aprogram, containing the code, data, and stack.
The segment position in the memory is not fixed and can bedetermined by the programmer
3 main segments for the programming process:
(i) Code Segment (CS)
Contains the machine instructions that are to execute.
Typically, the first executable instruction is at the start of this
segment, and the operating system links to that location tobegin program execution.
CS register will hold the beginning address of this segment
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(ii) Data Segment (DS)
Contains programs defined data, constants and works
areas. DS register is used to store the starting address of the DS
(iii) Stack Segmen (SS)
Contains any data or address that the program needs tosave temporarily or for used by your owncalledsubroutines.
SS register is used to hold the starting address of this
segment
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Address
Address
Address
Stack segment
Data segment
Code segment
Contains the beginning
address of each segment
Segment register
(in CPU)
memory
(MM)
SS Register
DS Register
CS Register
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Segment Offsets
Within a program, all memory locations within asegment are relative to the segments starting address.
The distance in bytes from the segment address toanother location within the segment is expressed as an
offset (or displacement). Thus the first byte of the code segment is at offset 00,
the second byte is at offset 01 and so forth.
To reference any memory location in a segment (theactual address), the processor combines the segmentaddress in a segment register with the offset value ofthat location. actual address = segment address + offset
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Eg:
A starting address of data segment is 038E0H, so the value in
DS register is 038E0H. An instruction references a locationwith an offset of 0032H bytes from the start of the data
segment.
the actual address = DS segment address + offset
= 038E0H + 0032H
= 03912H
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Registers
Registers are used to control instructions beingexecuted, to handle addressing of memory, and to
provide arithmetic capability
Registers of Intel Processors can be categorized into:
1. Segment register
2. Pointer register
3. General purpose register
4. Index register5. Flag register
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i) Segment register
There are 6 segment registers :(a) CS register
Contains the starting address of programs code segment.
The content of the CS register is added with the content in
the Instruction Pointer (IP) register to obtain the addressof the instruction that is to be fetched for execution.
(Note: common name for IP is PC (Program Counter))
(b) DS register
Contains the starting address of a programs data segment. The address in DS register will be added with the value in
the address field (in instruction format) to obtain the realaddress of the data in data segment.
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(c) SS Register
Contains the starting address of the stack segment.
The content in this register will be added with thecontent in the Stack Pointer (SP) register to obtain therequired word.
(d) ES (Extra Segment) Register
Used by some string (character data) operations tohandle memory addressing
ES register is associated with the Data Index (DI)register.
(e) FS and GS Registers
Additional extra segment registers introduced in80386 for handling storage requirement.
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(ii) Pointer Registers
There are 3 pointer registers in an Intel PC :
(a) Instruction Pointer register
The 16-bit IP register contains the offset address
or displacement for the next instruction that willbe executed by the CPU
The value in the IP register will be added into thevalue in the CS register to obtain the real address
of an instruction
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Example :
The content in CS register = 39B40HThe content in IP register = 514H
next instruction address: 39B40H
+ 514H. 3A054H
Intel 80386 introduced 32-bit IP, known as EIP
(Extended IP)
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(b) Stack Pointer Register (Stack Pointer (SP))
The 16-bit SP register stores the displacement value that
will be combined with the value in the SS register to
obtain the required word in the stack Intel 80386 introduced 32-bit SP, known as ESP (Extended
SP)
Example:
Value in register SS = 4BB30HValue in register SP = + 412H
4BF42H
(c) Base Pointer Register
The 16-bit BP register facilitates referencing parameters, which
are data and addresses that a program passes via a stack
The processor combines the address in SS with the offset in BP
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(iii) General Purpose Registers
There are 4 general-purpose registers, AX, BX, CX, DX:
(a) AX register Acts as the accumulator and is used in operations that involve
input/output and arithmetic
The diagram below shows theAX register with the number of bits.
8 bit 8 bit
32 bits
AH AL
AX
EAX
EAX : 32 bit
AX : 16 bit (rightmost 16-bit portion of EAX)
AH : 8 bit => leftmost 8 bits of AX (high portion)
AL : 8 bit => rightmost 8 bit of AX (low portion)
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(b) BX Register
o Known as the base register since it is the only this general
purpose register that can be used as an index to extend addressing.
o This register also can be used for computationso BX can also be combined with DI and SI register as a base
registers for special addressing like AX, BX is also consists of EBX,
BH and BL
8 bit 8 bit
32 bits
BX
EBX
BH BL
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(d) DX Register
Known as data register
Some I/O operations require its use
Multiply and divide operations that involve large values assume
the use of DXandAXtogether as a pair to hold the data or
result of operation.
Number of bits and the fractions of the register is as below :
8 bit 8 bit
32 bits
DX
DH DL
EDX
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(iv) Index Register
There are 2 index registers, SI and DI
(a) SI Registero Needed in operations that involve string (character) and is
always usually associated with the DS register
o SI : 16 bit
o ESI : 32 bit (80286 and above)
(b) DI Register
o Also used in operations that involve string (character) and it
is associated with the ES register
o DI : 16 bit
o EDI : 32 bit (80386 and above)
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(v) FLAG Register
o Flags register contains bits that show the status of some
activitieso Instructions that involve comparison and arithmetic will
change the flag status where some instruction will refer to
the value of a specific bit in the flag for next subsequent
action
- 9 of its 16 bits indicate the current status of the computer
and the results of processing
- the above diagram shows the stated 9 bits
O D I T S Z A P C
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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O D I T S Z A P C
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF (overflow): indicate overflow of a high-order (leftmost) bit following arithmeticDF (direction): Determines left or right direction for moving or comparing string
(character) data
IF (interrupt): indicates that all external interrupts such as keyboard entry are to be
processed or ignored
TF (trap): permits operation of the processor in single-step mode. Usually used indebugging processSF (sign): contains the resulting sign of an arithmetic operation (0 = +ve, 1 = -ve)ZF (zero): indicates the result of an arithmetic or comparison operation (0 = non
zero; 1 = zero result)AF (auxillary carry): contains a carry out of bit 3 into bit 4 in an arithmetic
operation, for specialized arithmetic
PF (parity): indicates the number of 1-bits that result from an operation. An even
number of bits causes so-called even parity and an odd number causes odd parity
CF (parity): contains carries from a high-order (leftmost) bit following an arithmetic
operation; also, contains the content of the last bit of a shift or rotate operation.
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Instruction Format The operation of CPU is determined by the instructions it
executes (machine or computer instructions)
CPUs instruction setthe collection of different instructionsthat CPU can execute
Each instruction must contain the information required by CPUfor execution :-
1. Operation code (opcode) -- specifies the operation to be performed (eg:
ADD, I/O)do this2. Source operand reference -- the operation may involve one or more
source operands (input for the operation)to this
3. Result operand reference -- the operation may produce a resultput theanswer here
4. Next instruction reference -- to tell the CPU where to fetch the nextinstruction after the execution of this instruction is complete do thiswhen you have done that
opcode
1
2 3 4
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Operands (source & result) can be in one of the 3 areas:-
Main or Virtual Memory
CPU register
I/O device
It is not efficient to put all the information required by CPU in a machineinstruction
Each instruction is represented by sequence of bits & is divided into 2 fields;opcode & address
Processing become faster if all information required by CPU in oneinstruction or one instruction format
Problems instruction become long (takes a few words in main memory tostore 1 instruction)
Solution provide a few instruction formats (format instruction); 1, 2, 3 andaddressing mode.
Instruction format with 2 address is always used; INTEL processors
opcode address
opcode address for Operand 1 address for Operand 2 address for Result address for Next instruction
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Opcodes are represented by abbreviations,
called mnemonics, that indicate theoperation. Common examples:ADD Add
SUB Subtract
DIV Divide
LOAD Load data from memory
STOR Store data to memory
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Instruction-3-address
Example : SUB Y A B Y = A - B
Result Y
Operand 1 A
Operand 2 B
Operation = subtracts
Address for Next instruction? program counter (PC)
opcode address for Result address for Operand 1 address for Operand 2
opcode address for Operand 1 & Result address for Operand 2
Instruction-2-address
Example : SUB Y B Y = Y - B
Operand 1 Y
Operand 2 B
Result replace to operand 1
Address for Next instruction? program counter (PC)
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Instruction-1-address
Example :
LOAD A
ADD B AC = AC + B
or
SUB B AC = AC - B
Operand 1 & Result in AC (accumulator), a register
SUB B B subtracts from AC, the result stored in AC
Address for Next instruction? program counter (PC)
Short instruction (requires less bit) but need more instructionsfor arithmetic problem
opcode address for Operand 2
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Y = (A-B) / (C+D x E)
Instruction
SUB Y, A, B
MPY T, D, E ADD T, T, C
DIV Y, Y, T
Three-address
instructions
Comment
Y A - B
T D x E T T + C
Y Y / T
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Y = (A-B) / (C+D x E)
MOVE Y, A
SUB Y, B
MOVE T, D MPY T, E
ADD T, C
DIV Y, T
Two-address instructions
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Y = (A-B) / (C+D x E)
INSTRUCTIONS LOAD D
MPY E
ADD C
STOR Y
LOAD A
SUB B
DIV Y
STOR Y
Comment AC D
AC AC x E
AC AC + C Y AC
AC A
AC ACB AC AC / Y
Y ACOne-address Instructions
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Utilization of Instruction Addresses
** Zero-address instructions are applicable to a special memory organisation,
called a stack.
Add i M d
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Addressing Mode
Address field address for operand & result
Number of bit required to store data (operand &
result)Eg: field size for an operand = 4 bit, 24=16 space for
address can be used to store an operand
How is the address of an operand specified? Addressing mode - A technique to identify
address to access operands
opcode address
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The most common addressing modes are:
Immediate
Direct
Indirect
Register
Register Indirect
Displacement
Stack
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Immediate Addressing Mode
The data or operand is contained in the instruction
address field
Eg:ADD 20 Operand = 20
add 20 to contents of accumulator (AC)
If value in AC = 10, the result 30
No memory reference to fetch data Fast
Limited address space
opcode address
Instruction
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Address field address of operand
E.g. ADD A Add contents of cell A to accumulator (AC) Look in memory at address A for operand
One memory reference to access data
No additional calculations to work outA(effective address)
Limited address space
Direct Addressing Mode
Address AOpcode
Instruction
Memory
Operand
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Memory cell pointed to by address field contains the address of
the operand E.g. ADD A Look in A, find address (A) and look there for operand
Add contents of cell pointed to by contents of A to accumulator (AC)
Multiple memory accesses to find operand
Slower
Indirect Addressing Mode
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
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Register Direct Addressing Mode the operand is held in register named in address field
Small address field is needed
No memory references are required
Fast execution
But, address space is limited
opcode Register address
Register Address ROpcode
Instruction
Registers
Operand
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using a register as a pointer to memory
Operand is in memory cell pointed by contents ofregister
Dis/advantages the same as indirect addressing
Register Indirect Addressing Mode
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
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Displacement Addressing Mode Combines the capabilities of direct addressing & register indirect
addressing. Address field = A + (R)
Address field hold two values
A = base value
R = register that holds displacement
or vice versaRegister ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
+
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Common uses of displacement addressing:
Relative Addressing R = Program counter, PC
EA = A + (PC) i.e. get operand from A cells from current location pointed to
by PC
Base-Register Addressing A holds displacement
R holds pointer to base address R may be explicit or implicit
e.g. segment registers in 80x86
Indexed Addressing A = base
R = displacement EA = A + R
Good for accessing arrays
EA = A + R
R++
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Displacement Addressing
Address AOpcode
Instruction
Memory
OperandPC
Program Counter
+
Relative Addressing
Base-Register Addressing
Address AOpcode
Instruction
Memory
OperandBase Register
Registers
+
Address AOpcode
Instruction
Memory
OperandIndex Register +
Indexed Addressing
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Better distinction of the base and indexing
might be who/what does the reference.
Examples:
Indexing is used within programs for accessing data
structures
Base addressing is used as a control measure by the
OS to implement segmentation
St k Add i M d
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StackAddressing Mode
Operand is (implicitly) on top of stack
e.g.ADD Pop top two items from stack and
add
OperandOpcode
Instruction
Top of stack
Top of stack register
implicit
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There are 3 types of addressing for INTEL processor:
Immediate addressing
Register addressing
Memory addressing
Memory addressing 6 types :
Direct memory addressing
Direct-offset addressingsame as direct memory addressing but
use arithmetic operation to edit address. Indirect memory addressing
Base displacement addressingcontent in base registers (BX &BP) & index registers (DI & SI), plus with displacement value ininstruction format to get the correct address for the data.
Base index addressingcontent in base registers, plus with thecontent in index registers to get the correct address.
Base index with displacement addressingcontent in baseregisters, plus with the content in index registers & displacement
value to get the correct address.
General Purpose Registers
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General Purpose Registers
(continue)
Are available for addition and subtraction of 8-, 16- or 32-bits
values:
MOV EAX, 225 ;Move 225 to EAX
ADD AX, CX ; Add CX to AX (words)
SUB BL, AL ; Subtract AL from BL (bytes)
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5.5.1) DEBUG Commands
- The following are some DEBUG commands :A : Assemble symbolic instructions into machine code
D : Display the contents of an area of memory in hex
format
E : Enter data into memory, beginning at a specific
location
G: Run the executable program in memory (G means
go)H : Perform hexadecimal arithmetic
N : Name a program
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P : Proceed or execute a set of related instructions
Q : Quit the DEBUG sessionR: Display the contents of one or more registers in
hex format
T : Trace the execution of one instruction
U : Unassemble (or disassemble) machine code intosymbolic code
Note : referappendix C(from main reference) pg
513-519 for complete DEBUG commands
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5.5.2) Rules of DEBUG Commands
- DEBUG does not distinguish between
lowercase and uppercase letters.
- DEBUG assumes that all numbers are in
hexadecimal format
- Spaces in commands are used only to
separate parameters
- Segments and offset are specified with a
colon, in the form segment:offset
Example :
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Example :
To display the content in segment FE0016 beginning from the first
byte of the segment, in the DEBUG mode, type:
D FE00:0
or
d fe00:0
first byte of the segmentsegment fe00
display command, can use lowercase or uppercase letter
- the command d or D (D Display) will display 8 rows of dataand each row contains 16 bytes (32 digit hex) which adds up to a
total of 128 bytes (8 rows), beginning from the address given
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c:\>DEBUG
-d fe00:0
FE00:0000 41 77 61 72 64 20 53 6f-66 74 77 61 72 65 49 42 Award SoftwareIB
FE00:0010 4D 20 43 4F 4D 50 41 54-49 42 4C 45 20 34 38 36 M COMPATIBLE 486
FE00:0020 20 42 49 4F 53 20 43 4F-50 59 52 49 47 48 54 20 BIOS COPYRIGHTFE00:0030 41 77 61 72 64 20 53 6F-66 74 77 61 72 65 20 49 Award Software I
FE00:0040 6E 63 2E 6F 66 74 77 61-72 65 20 49 6E 63 2E 20 nc.oftware Inc.
FE00:0050 41 77 03 0C 04 01 01 6F-66 74 77 E9 11 14 20 43 Aw.....oftw... C
FE00:0060 18 41 77 61 72 64 20 4D-6F 64 75 6C 61 72 20 42 .Award Modular B
FE00:0070 49 4F 53 20 76 36 2E 30-00 A6 32 EC 33 EC 35 EC IOS v6.0..2.3.5.
Address Hexadecimal Representation ASCII Code
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5.5.3) Machine Language Example: Using
Immediate Data (Immediate Mode)
- the DEBUG program can also be used to enter the
program code into the memory and trace its
execution
- Below is an example of a program in machine
language (written in hexadecimal) and assembly
language (symbolic code) together with
description about the instructions
M hi S b li C d E l i
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Machine
Instruction
Symbolic Code
(Assembly Language)
Explanation
B82301
052500
8BD8
03D8
8BCB
2BC8
2BC0
EBEE
MOV AX,0123
ADD AX,0025
MOV BX,AX
ADD BX,AX
MOV CX,BX
SUB CX,AX
SUB AX,AX
JMP 100
Move value 0123H to AX
Add value 0025H to AX
Move contents of AX to BX
Add contents of AX to BX
Move contents of BX to CX
Subtract contents of AX from CXSubtract AX from AX
Go back to the start
- - The first and second instructions in the program above use immediate
addressing mode where the real data value is in the address field
MOV AX, 0123
ADD AX, 002
Other instructions use register addressing mode (general purpose registers)
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To enter instructions in machine language into the memory
(code segment), the e or E command is used followed by
the address of the segment code at 100 (beginning addess ofinstructions in a code segment (100H = 256B)) - refer to Table 1
below. (E Enter)
To trace the execution of the program, use r orR first toview the content in the CPU registers followed by the command
t orT. - refer to Table 2 below. (R Register; T Trace)
-e CS:100 B8 23 01 05 25 00
-e CS:106 8B D8 03 D8 8B CB-e CS:10C 2B C8 2B C0 EB EE
Table 1
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- to view the instruction that is entered in the
code segment, use the d command
followed by cs:100 (100 is the word bytestarting address that is allowed in the code
segment) - refer Table 3 below
-d cs:1002090:0100 8B 23 01 05 25 00 8B D8-03 D8 8B CB 2B C8 2B C0 .#..%.......+.+.
2090:0110 EB EE E8 59 00 5F 5E 59-5B 58 5A 1F 34 00 7F 20 ...Y._^Y[Xz.4..2090:0120 D5 E2 00 74 F7 1E 0E 1F-BE D5 E2 E8 98 02 2E A1 ...t............
2090:0130 2F E7 BB 40 00 BA 01 00 33 FF CD 21 1F 72 0B 8B /[email protected]..!.r..
2090:0140 D8 B0 FF 86 47 18 A2 18-00 C3 0E 1F E8 D2 00 3D ....G..........=
2090:0150 41 00 74 07 0B FF 74 06-BA 39 82 E9 CD FC 2E C6 A.t...t..9......
2090:0160 06 67 E1 01 BA 69 E1 2E-A3 69 E1 E9 BD FC 80 3E .g...i...i.....>
2090:0170 E7 04 00 75 03 E9 9A 00-BE E7 04 E8 48 02 80 3E ...u........H..>
Table 3
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5.5.4) Machine Language Example : Using
Defined Data (Direct Addressing Mode)
- Example above uses immediate addressingmode for the MOV and ADD instructions(first 2 instructions). The following is an
example of entering program in machinelanguage using direct addressing mode (dataare in main memory (Data Segment)). Inthis case, data needs to be entered into theData Segment first. Assume the dataposition in the Data segment is as below:
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DS Offset Contents (Hex)
0200H 2301H
0202H 2500H
0204H 0000H
0206H 2A2A2AH
Table 4
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- Example of machine instructions for this mode :
Instruction Description
A10002 Move the word (two bytes) beginning at DS offset 0200H into AX
03060202 Add the content of the word beginning at DS offset 0202H into AX
A30402 Move the contents of AX to the word beginning at DS offset 0204H
EBF4 Jump to start of program
Table 5
- Enter instructions (Table 5) and data (Table 4) above usingthe E ore command.refer to Table 6 below.
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-E CS : 100 A1 00 02 03 06 02 02
-E CS : 107 A3 04 02 EB F4
-E DS : 200 23 01 25 00 00 00
-E DS : 206 2A 2A 2A
Table 6
- The first 2 rows are the instructions to enter the program
which start at byte 100H in a Code Segment (CS) whereas
the last 2 rows are instructions to enter data which start atbyte 200 in a Data Segment (DS).
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- To view the instructions and data that are already entered,
use the d orD command.refer to Table 7 below.
-D CS : 100, 10B
2090 : 0100 A1 00 02 03 06 02 02 A304 02 EB F4
-D DS : 200, 208
2090 : 0200 23 01 25 00 00 00 2A 2A2A
Table 7
Note: Row 1 and 3 above is typed by the programmer
whereas row 2 and 4 is what is displayed by the
computer
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- To run the above program, use the r orR command
followed by t orT
- Once the program is being run, the content in the data
segment will change. To view it, use the d or D
command.
-D DS : 200, 208
2090 : 0200 23 01 25 00 48 01 2A 2A2A
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5.5.5) Assembly Language Example
- Assembly Language program can be written orentered into the memory using the DEBUGcommand ofA ora. (A Assemble)
- Example:
MOV CL, 42 (enter the value of 42H into the CL register)
MOV DL, 2A (enter the value of 2AH into the DL register)
ADD CL, DL (add the value in the CL register with
the value in the DL register and keep the result in theCL register)
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-U 100, 107
2090 : 0100 B142 MOV CL, 42
2090 : 0102 B22A MOV DL, 2A
2090 : 0104 00D1 ADD CL, DL
2090 : 0106 EBF8 JMP 0100
the machine code for the instruction entered
- To execute the above program, as usual, use the r or
R command followed by the T ort command.
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5.5.5) Using the INT instruction
- DEBUG program also can be used to requestinformation about system by using INT
(interrupt) instruction.
- INT instruction will exit from a program, enter a
DOS or BIOS routine, performs the requestedfunction, and return to a program.
E l 1 G tti th C t D t d Ti
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Example 1: Getting the Current Date and Time
- the instruction to access the current date is INT21H function code 2AH. The function code 2AHmust be moved to AH register. The instructionsare as the following:
MOV AH, 2AINT 21
JMP 100
- use command A to enter the above instructions
into the code segment.
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- type R to display the registers and T to execute the
MOV.
- type P to proceed directly through the interrupt
routine; the operation stops at the JMP.
- - the registers contain the following information inhex format:
AL: Day of the week, where 0 = Sunday
CX: Year (for example, 07D4H = 2004)DH: Month (01H through 0CH)
DL: Day of the month (01H through 1FH)
Example 2: Displaying
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Example 2: Displaying
- to display data on screen.
- enter the following instructions using A 100 command.
100 MOV AH, 09
102 MOV DX, 109 Starting address of the105 INT 21 data to display
107 JMP 100
109 DB MY NAME IS YANI, $
- key in R to display the registers and first instruction, and key in
T commands for the two MOVs. Key in P to execute INT 21 and
MY NAME IS YANI will display on the screen.
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Example 3: Keyboard Input
- to accept characters from the keyboard.- Type in the DEBUG command A and then these
assembly instructions:
100 MOV AH, 10102 INT 16
104 JMP 100 twice
- the first instruction, MOV, provides function code10H that tells INT 16H to accept data from the
keyboard.
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- The operation delivers the character from the
keyboard to the AL register.
- Key in R to display the registers and first instruction
and key in a T command to execute the MOV.
- Type P for INT 16H, the system waits for you to pressa key.
- If you press the number 1, the operation delivers
31H (hex for ASCII 1) to AL.
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