combinational logic - washington university in st. louis

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Combinational Logic Combinational Logic Design Process, Three State Buffers, Decoders, Multiplexers, Encoders, Demultiplexers, Other Considerations Copyright (c) 2012 Sean Key

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1. Capture the behavior
1. Original can be in the form of a truth table or equations
2. Convert to equations

Combinational Logic Design
Process Example
Using the following truth table Determine the canonical sum of products equation
Simplify the equation
Draw the circuit
equation, you can create an equation from
a circuit
This can be useful when
optimizing a design

circuit:
AND3
AND3
OR
NOT
NOT
ABC
Z
NOT

Demux

Buffers
A buffer is like an inverter, but does not invert the signal Buffers “strengthen” a signal to remove loss
Can also be used to change between signal levels
i.e. from a 3.3V HIGH to a 5V HIGH
Three state buffers are special buffers that can drive a signal HIGH or LOW, but also to a third high impedance (aka. High Z) state to prevent the output from being driven. This allows for multiple circuits to drive a single output, BUT
ONLY ONE AT A TIME.
Multiple buffers driving an output may fight each other.

Three State Buffer
EN A F
0 0 Z
0 1 Z
1 0 0
1 1 1
F = A EN
Note: Any design using 3 state buffers must ensure that ONLY ONE buffer is
driving the bus at a time.
A
EN
F
and multiple output devices that convert an input
code into a different output code.
We will examine a binary decoder
Binary Decoder converts n bit number to a 2n
output where only the output whose number matches
the input code is a 1. All other outputs are 0.
Can be thought of as a minterm or maxterm generator.

output D0 is 1
output D1 is 0.
output D0 is 0
D0
Using Decoders as Minterm
Generators Any POS or SOP function can be implemented with a decoder
Each input code corresponds with a line of the truth table.
To implement a SOP, OR all decoder outputs that correspond with a 1 output in the truth table
To implement a POS, negate the outputs that correspond with a 0 in the truth table and AND them together.
Example: Using an 8 output decoder, implement the function
F = ABC + AB’C + A’B’C
F = SUM(7, 5, 1)
Example 2: Using an 8 output decoder, implement the function
F = (A’+B’+C)•(A’+B+C’)•(A+B+C’)•(A+B+C)
By inverting all of the outputs, the decoder is made into a maxterm generator
A B C
If the previously mentioned decoders input
is set to 0101, what would the outputs be
set to?

Encoder
An encoder has the opposite function of a decoder. In general, encoders and decoders do the same thing T convert
one code to another.
Decoders generally have more outputs than inputs.
Encoders generally have fewer outputs than inputs.
In the case of a binary encoder, a 2n bit input code is converted to an n bit output code We assume that only one input is equal to 1 at a given time.
What would happen if more than one input were 1?
To solve this situation, we use priority encoders

Priority Encoder
Priority encoders handle the case where more than one input is a 1 by assigning a priority to each input.
The highest priority input with a 1 is treated as if it is the only input that is set to 1.
E2
D1
D0
D2
D3
D4
D5
D6
D7
E0
E1

Priority Encoder Questions
If a priority encoder has 32 inputs, how many outputs are required?
If an encoder has inputs I0 through I31, with the higher numbered input having higher priority, what would the output be if I8 = I4 = 1 and all other inputs are equal to 0?

Multiplexer
Multiplexers are digital switches that select 1 of N inputs to be assigned to a single output. The value of the binary
select signal determines which numbed input has it’s value provided at the output.
Often called a Mux
A Mux can be implemented using standard gates or decoders combined with 3 state buffers
I2
I3
State Buffers
S0 S1
How many select bits are required for a 8:1 mux?
What is the output value of a mux that has inputs I15 (MSB) through I0 with the input value 0xB15F the select signal is set to 0x5?
Build a 4:1 mux using 2:1 muxes.

Muxes can also be used to implement simple logic functions
Use function input bits as selects
Wire MUX inputs to the output values of the truth table.
Example 1: Implement the function F = A + B using a 4:1 mux
Example: Implement the function F = A•B + B•C’

Demultiplexer
A Demultiplexer implements the opposite functionality of a Mux 1:M demux takes the
one input value and assigns it to the output determined by the select signal.
All other outputs are 0.
S 0S 1
Active Low Inputs
So far we have considered circuits that are active HIGH (logic 1) The circuit is considered to be
turned on and doing it’s intended purpose when the input is HIGH
It is also possible to use negative logic with active low inputs The circuit is considered to be
turned on and doing it’s intended purpose when the input is LOW.
Active low inputs are indicated by the use of an inversion bubble.
Active LOW decoder