CombinatorialLogicDesignMultiplexersandALUs

CS64:ComputerOrganizationandDesignLogicLecture#13

ZiadMatni

Dept.ofComputerScience,UCSB

Administrative

•  Re:MidtermExam#2– Graded!

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12

2021

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CS64,Spring18,Midterm#2ExamAverage=85.6%,Median=87.5%

LectureOutline

•  SelectionusingMultiplexers

•  BasicALUDesign

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Multiplexer•  Alogicalselector:–  SelecteitherinputAorinputBtobetheoutput

//ifs=0,outputisa//ifs=1,outputisbintmux(inta,intb,ints){if(!s)returna;elsereturnb;

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Multiplexer(Muxforshort)

•  Typicallyhas3groupsofinputsand1output–  IN:2data,1select–  OUT:1data

•  1oftheinputdatalinesgetsselectedtobecometheoutput,basedonthe3rd(select)input–  If“Sel”=0,thenI0getstobetheoutput–  If“Sel”=1,thenI1getstobetheoutput

•  TheoppositeofaMuxiscalledaDemulitplexer(orDemux)

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MuxConfigurations

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MuxescanhaveI/Othataremultiplebits

Ortheycanhavemorethantwodatainputs

2:1

A0A1B0B1SEL

O0O1

Thisiscalleda2-bit,2-to-1mux

6:1

ABCDEFSEL

O

Thisiscalleda1-bit,6-to-1mux

TheUseofMultiplexers

•  Makesitpossibleforseveralsignals(variables)toshareoneresource– Verycommonlyusedindatacommunicationlines

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ux Dem

ux

… …DataLines

DataLines

Select

Shareddataline(“trunk”)

Select

MuxTruthTableandLogicCircuit1-bitMux

I0 I1 S O0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1

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00 01 11 10

0

1

I0I1S

1

11

1

O=S.I1+S’.I0

I0I1

S

O

=linesarephysicallyconnected

00011011

Beyond1-bitMuxes•  Generalmuxform:N-bit,M-to-1•  Where: N=howwidethedatabusis(inbits,min.1)

M=howmanyinputstothemux(min.2)

•  The“select”input(S)hastobeabletoselect 1outofMinputs–  So,ifM=2,Sshouldbeatleast1bit(S=0foroneline,S=1fortheother)–  ButifM=3,Sshouldbeatleast2bits(why?)–  IfM=4,Sshouldbeatleast???

•  Atleast2bits–  IfM=5,Swillhavetobe???

•  Atleast3bits

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...

S

Minputs

WhatDoesThisCircuitDo?

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101010(akasynchronousclock)

01S

a0a1a2a3a4a5

b0b1b2b3b4b5

time

time

a0 a1 a2 a3 a4 a5

1 0 1 0 1 0

b0 a1 b2 a3 b4 a5

b0 b1 b2 b3 b4 b5

b0a1b2a3b4a5

WhatDoesThisCircuitDo?

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S0

AB 0

1S

01S

RCo

RCo

S0

1bAdder

1bAdder

01

01S

S1

F

I0I1Ci

I0I1Ci

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S0

AB 0

1S

01S

RCo

I0I1Ci

RCo

S0

1bAdder

1bAdder

01

01S

S1 S0F0 0 A&&B0 1 A||B1 0 A+B1 1 A–B

S1

F

Forsimplicity,theCarryOutandOverflowbitsarenotshown

I0I1Ci

WhatDoesThisCircuitDo?

SimulationofCombinatorialLogic

•  Goto:https://logic.ly/demo/

IN-CLASSDEMONSTRATION

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Arithmetic-LogicUnit(ALU)

•  Recall:theALUdoesallthecomputationsnecessaryinaCPU

•  ThepreviouscircuitwasasimplifiedALU:– WhenS=00,R=A+B– WhenS=01,R=A–B– WhenS=10,R=AANDB– WhenS=11,R=AORB

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SimplifiedALU

•  Wecanstring1-bitALUstogethertomakebigger-bitALUs(e.g.32bALU)

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1bitALU

…

A31B31S

R0 R1 R2 R3 R31

1bitALU

Co

RABS

Ci

1bitALU

1bitALU

1bitALU

1bitALU

A0B0S A1B1S A2B2S A3B3S

CoCi

AbstractSchematicoftheMIPSCPU

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Combinatorialvs.SequentialLogic

•  TheCPUschematicshows bothcombinatorialandsequentiallogicblocks

•  CombinatorialLogic–  Combiningmultiplelogicblocks–  Theoutputisafunctiononlyofthepresentinputs–  Thereisnomemoryofpast“states”

•  SequentialLogic–  Combiningmultiplelogicblocks–  Theoutputisafunctionofboththepresentinputsandpastinputs–  Thereexistsamemoryofpast“states”

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TheS-RLatch

•  Onlyinvolves2NORs

•  Theoutputsarefed-backtotheinputs

•  Theresultisthattheoutputstate(eithera1ora0)ismaintainedeveniftheinputchanges!

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HowaLatchWorks•  NotethatifoneNORinputis0,theoutput

becomestheinverseoftheotherinput

•  So,ifoutputQalreadyexistsandifS=0,R=0,thenQwillremainatwhateveritwasbefore!(holdoutputstate)

•  IfS=0,R=1,thenQbecomes0(resetoutput)

•  IfS=1,R=0,thenQbecomes1(setoutput)

•  MakingS=1,R=1isnotallowed(undeterminedoutput)5/22/18 20

S R Q0 Comment0 0 Q* Holdoutput0 1 0 Resetoutput1 0 1 Setoutput1 1 X Undetermined

Consequences?

•  AslongasS=0andR=0,thecircuitoutputholdsmemoryofitspriorvalue(state)

•  Tochangetheoutput,justmakeS=1(butalsoR=0)tomaketheoutput1(set)ORS=0(butalsoR=1)tomaketheoutput0(reset)

•  JustavoidS=1,R=1…

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S R Q0 Comment0 0 Q* Holdoutput0 1 0 Resetoutput1 0 1 Setoutput1 1 X Undetermined

AboutthatS=1,R=1…•  Whatifweavoideditonpurposebymaking

R=NOT(S)?–  Where’stheproblem?

•  This,byitself,precludesacasewhenR=S=0–  You’dneedthatifyouwantto

preservethepreviousoutputstate!

•  Solution:theclockedlatchandtheflip-flop– Moreonthatcomingup…!

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S/R’

YOURTO-DOs

•  FinishLab#7byFriday!

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