commissioning, operation and first physics results of the cdf run2a silicon and
DESCRIPTION
Commissioning, operation and first physics results of the CDF Run2a Silicon and status of its future upgrade for Run2b Gino Bolla Purdue University For CDF RUN2 Silicon Group. CDF RunII (The need for a strong tracker). Physics with 2-9 fb-1 Precise Measurements of M top and M W - PowerPoint PPT PresentationTRANSCRIPT
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Commissioning, operation and first physics results of the CDF Run2a Silicon
and status of its future upgrade for Run2b
Gino BollaPurdue University
ForCDF RUN2 Silicon Group
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
CDF RunII (The need for a strong tracker)
Physics with 2-9 fb-1Precise Measurements
of Mtop and MW
CP violation, Bs mixingMore …
B,C quarks tagging is crucialLong lifetime (mm to
cm) Vertex finding
High impact parameter resolution
Efficient triggerSVT (secondary Vertex
Trigger)Fast (@L2) displaced
tracks trigger.
COT30240 ch, 96 layer drift chamber(1/pT) ~ 0.1%/GeV(hit) ~ 150m
SVXII + ISL + L007-8 silicon layers722000 chr, rz viewsz0
max=45 cm, max=21.3<R<30cm
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
A top candidate
Typical travel distances:Bottom: 5 mmCharm: 1 mm
Impact parameter resolution~35 m in Will improve by
using L00
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
CDF Silicon (What does it look like)
• 1 layer (L00) very close to the beam: improve IP res. & b-tagging
Use L00/SVXII for vertexing & trigger: high density & precise alignment crucial!
Use ISL for tracking: simpler design; precise alignment not so important
x [cm]
y [
cm]
HIGHLIGHTS:
•High speed
•Dead-timeless operation
•Displaced track trigger
L00ISL
SVXII
•1 central / 2 forward layers (ISL) at large radius: tracking
•5 layers (SVXII) very compact in r,,z: 3D vertexing & tracking
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
6 electrical barrels
Z
SVXII the center piece
5 double sided layers 3 x 90o and 2 x 1.2o
Very compact Tight alignment tolerances
For the trigger Very symmetric Many (maybe too many) different
components
2.5 cm
10.6 cm
x
y
Note “wedge” symmetry
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
ISL on the outside and L00 on the inside
One central layerLink tracks from COT to SVXII
Two forward layers (~2 m long)Extend tracking up to ||=2 (COT stops at 1)
Simpler designNot used on the trigger (relaxed alignment)Hybrids mounted OFF siliconA single flavorLot of space (compared to SVXII)
lightweight signal & bias cables (Kapton)
sensors
cooling tube
SVXII inner bore
2.3cm4.2cm Be beampipe
Precision position measurement before scatteringOne SS layer on the Beam pipe
25 m pitch (50 m readout)Low material budget
High RadiationActively cooled LHC-like sensorsElectronic at larger radii
ISL L00
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
The heart of it all (the SVX3d chip)
128 channels
46
pip
el in
e c
ell s
Fabricated in the Honeywell 0.8m rad.hard process
Analog Front End (FE) and Digital Back End (BE):- Compatible with 396/132
nsec bunch spacing
- FE has relatively low noise integrator with 128 channels and 46 cell analog pipeline with 4 buffer cells
- BE has comparator, 8-bit Wilkinson ADC, and sparse readout with neighbors logic
Dead-timeless: Capable of analog
operations during digitization and readout
Dynamic pedestal subtraction:- Enables on-chip common
mode noise suppression
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Same data but different code
Integration and Commissioning
0%
20%
40%
60%
80%
100%
Ap
r-01
Oct-01
Ap
r-02
Oct-02
Ap
r-03
SVX
ISL
L00
A long list of troubles to deal with Most of them specific to the CDF system Others are of common interest
A good monitoring strategy First look at the whole thing as a piece of
hardware Second look at it as a particle detector
Now 90+% is producing good data for physics
Large effort on the offline as well Clustering Alignment Tracking algorithms
Wire-bonds with current in the 100 mA range if pulsed at the right frequency can oscillate due to small (10-50 mg) Lorentz forces because resonance behaviors can be excited. Fatigue induces cracks on the heel and the electrical continuity is lost
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Performance (1)
resolution
9m
Residual [m]
Charge [ADC]
charge collection
z s
ide c
harg
e
[AD
C]
side charge [ADC]
charge correlation
Single hit Efficiencies~99 %
S/N >10
dE/dx particle identification
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Performance (2)
• Measurements using triggered J/Psi candidate events since January 2003 shutdown.
• No background subtraction is performed. • A further 3 % increase on efficiency is expected
• Performing a background subtraction (about 1%). • Improvements of ISL alignment and retuning of the the tracking
road sizes (about 2 %)Average tracking Efficiency is 87.8 ± 0.1 (stat)%
Average fake rate is 1.7 ± 0.4 (stat)%
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Performance (3)
At a higher level things get more complicated B-tagging efficiencies in the 40-50 %
Visible degradation of performances in the regions between barrels
Will improve in the future Adding L00 will help in between barrels coverage will increase by using ISL
Lots of CDF physics talks at this conference
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
SVT (Secondary Vertex Trigger)
Input (L1A ~10-40 KHz)Outer drift chamber trajectoriesSilicon pulse height for each channel
Output (~ 20 s later)Trajectories that use silicon hits
150 VME boardsFind and fit silicon tracks with ~ offline
accuracy In 15 microseconds
look for 2 tracks with impact parameters > 120
m
primary vertexsecondary vertex
impact parametera few mm
2.5 MHz
25 kHz
250 Hz
50 Hz
L1: 5.5s, synchronous, fast programmable logic (CAL, , COT tracks)
L2: ~30s, asynchronous, programmable logic + CPU (jets, silicon tracking)
L3: ~200 PCs spend ~1s/event on ~full reco (full-precision tracking, form masses, etc.)
~140 separate trigger paths (e, , , , , jet, displaced track, b-jet, …)
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
SVT performance
-500 -250 0 250 500SVT impact parameter (m)
35m 33mresol beam = 48m
0 10 20 30 40 50
SVT latency (s)
24 s
0 2
+500
-500
0
d (m) vs (raw)
d (m) vs (subtracted)+500
-500
0
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
A paper with only 12 pb-1
Results: M(Ds) – M(D+) 99.41 + 0.38 + 0.21 MeV/c2
PDG: 99.2+0.5 MeV/c2
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
What is there ahead of us
Until the LHC turn-on, the Fermilab Tevatron has the highest energy collisions and is the only place to search for the Higgs and other new particles.
The Run II Physics Program extends to 5-15 fb-1.
Expected life of the Run IIa Silicon detector ~ 4-5 fb-1 .
Run IIb Silicon Detector replaces the inner 6 layers with an improved and radiation tolerant detector.
Need to be built in a very tight schedule
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
The CDF Run2b Silicon
Layer 0: 12 fold AxialLayer 1: 6 fold Axial-AxialLayer 2: 12 fold Axial-Stereo (1.2o)Layer 3: 18 fold Axial-Stereo (1.2o)Layer 4: 24 fold Axial-Stereo (1.2o)Layer 5: 30 fold Axial–Axial
Improvements in RunIIb Design:
Rad hard RO chips (0.25m technology)
• Extension of the “contained b-jets” region (active length = 1.2 m vs 0.9m in RunIIa)
• larger and more uniform radial distribution (R= 2.1 – 16.4 cm compared to 1.3-10.6cm in RunIIa)
• Good impact parameter resolution with low mass L0 design
• Strengthened inner tracking - redundant axial layers at L1
• Larger radius outer staves - better connection to ISL
• Fewer component parts: 4-chip hybrids used on 93% of staves
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Run2b Silicon
prototype stave
prototype barrel
Well advanced project• the SVX4 chip works!
• the stave concept works!
• prototyping of most components ~finished
• most parts well in time
Laser testped+signal
pedestal subtracted signal
Channel #
A
DC
CDF
G. Bolla, Purdue University for the CDF RUN2 SiliconEPS (July 17th-23rd 2003), Aachen, Germany
Summary
The CDF silicon detector is doing its job and produces good data necessary for the physics program of the experimentA lot of struggling during the commissioningA well organized maintenance plan in place
The innovative Fast displaced tracks trigger is enhancing the experiment capabilities
Still work to be done to fully exploit the Si capabilities (L00 and ISL on the offline analysis)
The TeV program extends over the lifetime of the existing hardware
To fully explore the potential for new physics at CDF the RUN2b silicon is approaching its production phase.