comp541 video monitors
DESCRIPTION
COMP541 Video Monitors. Montek Singh Oct 1, 2014. Outline. Last Friday ’ s lab Tips/discussion How to generate video signal. How about making a BCD stop watch?. Each digit counts 0 to 9, and then wraps around i.e., display is decimal number, not hex Do the following: - PowerPoint PPT PresentationTRANSCRIPT
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COMP541
Video Monitors
Montek Singh
Oct 1, 2014
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Outline Last Friday’s lab
Tips/discussion How to generate video signal
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How about making a BCD stop watch? Each digit counts 0 to 9, and then wraps
around i.e., display is decimal number, not hex
Do the following:Separate the 16-bit number into four 4-bit numbers
reg [3:0] A3, A2, A1, A0;For A0: on each clock tick…
– if this digit is 9, change it to 0, else add 1 to itFor A1, A2, A3: on each clock tick…
– if all lower A’s are at 9, then» if this digit is 9, change it to 0, else add 1 to it
– else this digit does not change
Slow it down to tick once per 1/100 secondhave a separate counter to count 220 clock ticks (~1/100th
sec)update the 4-digit number only whenever this counter fills
up!
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Reminder: Good Verilog Practices Best to use single clock for all FFs
Make all signals synchronous to one clockNo: @(posedge button) etc.Yes: @(posedge clock)
Avoids “weird” and frustrating problems Multiple modules
Tested individuallyTop level has input and outputs
One module per file Just to make it easier to follow and test
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VGA Monitors
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How Do Monitors Work? Origin is TV, so let’s look at that
LCDs work on different principle, but all signaling still derived from TV of 1940s
Relies on your brain to do two things Integrate over space Integrate over time
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Many Still Images Video (and movies) are a series of stills
If stills go fast enough your brain interprets as moving imagery50-60 Hz or more to not see flicker
– “1 Hz” means once per second
In fact, even if the scene does not change…… a single “still” image is displayed repeatedly over timeWhy? Phosphor persistence varies
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Cathode Ray Tube (CRT)
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From wikipedia: http://en.wikipedia.org/wiki/Cathode_ray_tube
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Deflection Coils
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Simple Scanning TV Electron beam scans across Turned off when
Scanning back to the left (horizontal retrace ----)Scanning to the top (vertical retrace ____)
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Scanning: Interlaced vs. Progressive (Some) TVs use interlacing
Every other scan line is swept per fieldTwo fields per frame (30Hz)Way to make movement less disturbing
Computers use progressive scanWhole frame refreshed at once60Hz or more, 72Hz looks better
Similar notation used for HD i = interlaced (1080i)p = progressive (1080p)which better?
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Color Three colors of phosphor
three beams, one each for the three phosphorsBlack: all beams offWhite: all beams on
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Picture is a bit misleading. Mask (or aperture grill) ensures beams hit only correct color phosphor.
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What about LCD? How do LCD monitors work?
internals are very differentno beams, tubesmade up of tiny LCD cells
However, external signaling is the same!for compatibility
Same goes for micro-mirror projectors
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VGA Signaling Timing signals
horizontal sync (hsync) & vertical sync (vsync) Color values: R, G, B
total 8 bits for Nexys 3 (rrrgggbb), 12 bits for Nexys 4 (rrrrggggbbbb)
Nexys 3 Nexys 4
digital to analog converter
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VGA Timing You supply two pulses
hsync and vsyncallow the monitor to lock onto
timing
One vsync per frameOne hsync per scan line
hsync does not stop during vsync pulse
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Image from dell.com
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Horizontal Timing Terms Horizontal timing:
hsync pulse Back porch (left side of display) Active Video
Video should be blanked (not sent) at other times Front porch (right side)
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Picture not accurate for our case; just for illustration.
Video and HSYNC not on same wire
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Horizontal Timing
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640 Horizontal Dots Horiz. Sync Polarity NEG Scanline time (A) 31.77 usSync pulse length (B) 3.77 usBack porch (C) 1.89 usActive video (D) 25.17 us Front porch (E) 0.94 us
Image from http://www.epanorama.net/documents/pc/vga_timing.html
This diagram shows video as a digital signal. It’s not – video is an analog level.
us = microsecond
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Vertical Timing (note ms, not us)
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Vert. Sync Polarity NEGVertical Frequency 60HzTotal frame time (O) 16.68 ms Sync length (P) 0.06 msBack porch (Q) 1.02 msActive video (R) 15.25 msFront porch (S) 0.35 ms
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Timing as Pixels Easiest to derive all timing from single-pixel
timing
How “long” is a pixel?Active video / number of pixels25.17 us / 640 = 39.32nsConveniently close to 25 MHz – just use thatActual VESA spec is 25.175 MHz
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Standards 640 x 480 (sometimes x 60Hz) is “VGA”
I will give you spec sheets in lab
You can try for 800x600 at 60 Hz (40 MHz exactly) or 800x600 at 72 Hz (50 MHz exactly)
Note that some standards have vsync and hsync positive true, some negative truechoose correct polaritydetermine by experimentation!
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Color Depth Voltage of each of RGB determines color
Nexys 3: 3-bit for red and green, 2-bit for blue
Nexys 4: 4-bit for red, green and blue
All on for white
21Nexys 3
Nexys 4
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What To Do Friday1. Show previous lab’s demo2. Make Verilog module to generate
hsync, vsync, horizontal count, vertical count, and signal to indicate active video
3. Use higher-level module to drive RGB using counts gated by active Just do something simple (stripes, checkerboard,
diagonals)
4. Later we will use memory addressed by counts to make terminal
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What do you Need for VGA? Think first
Need counter(s)?Will you need a state machine?
Sketch out a designBlock diagram
Test individually in lab Keep in mind
Verilog has all these operators (and more; see Verilog ref.)
==, <, >, <=, >=
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VGA Links VGA Timing
Recommended: http://tinyvga.com/vga-timing http://www.epanorama.net/documents/pc/vga_timing.html
Interesting http://www.howstuffworks.com/tv.htm http://computer.howstuffworks.com/monitor.htm http://www.howstuffworks.com/lcd.htm http://plc.cwru.edu/
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