computer architecture challenges shriniwas gadage

Computer Architecture Challenges

Shriniwas Gadage

Computer Architecture• Computer architects design computer systems

– Processors: Intel Pentium 4, IBM PowerPC– Also: memory systems, interconnections, ???

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Pentium

cachememory

memory(DRAM) bridge to I/O

disk ethernetcard

3

Computer Architecture• If the Intel Pentium4 has a faster clock speed than the IBM Power4, does it execute your programs faster?

Completing instruction

Clock tick

Case 1:

Case 2:

Time

Microarchitecture

• Micro-Architects design processors

• Goals for processors:– Faster!!!!– Higher bandwidth communication with memory system– Backward-compatible with previous models

• How do we make processors faster? – Faster clocks (>2 GHz)– Do more work (execute instructions) at same time

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5

A Typical Microprocessor

BranchPredictor

Decode &Rename Issue Logic

ALUALU ALU ALU

L2 Cache

L1 InstrCache

L1 DataCache

RegisterFile

Multiprocessor Architecture

• Computer systems with multiple processors

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Node Node Node

InterconnectionNetwork

InterconnectionNetwork

Pentium

cache memory(DRAM) bridge to I/O

disk ethernetcard

Node

Multiprocessor Architecture

• How do we make processors work together?– Exploit parallelism in applications

• Example: web server– Each processor handles different requests– Processors communicate occasionally to synch up

• Some challenges:– Interconnection network design– Protocols for communicating and sharing data– Scalability– Reliability

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Computer Architecture

• To a large extent, computer architecture determines:

• the number of instructions used to execute a program

• the time each instruction takes to execute

• the idle cycles when no work gets done

• the number of instructions that can execute in parallel

Technology Trends

• We design an architecture for a given technology• Technology parameters:

– Number of transistors on a chip– Transistor speed– Amount of memory– Memory speed– Bandwidth between components– Power usage– Applications to be run on system

• All of these change dramatically over time!slide 9

time

parameter

Technology Trends

• Performance was the ultimate metric

• Transistors were a limiting factor

• As on-chip transistors became available in the 90s,

• more functionality and complex circuitry was added to boost performance

Technology Trends – A Few Examples

• Number of transistors – Doubles every 18 months (Moore’s Law)

• Memory size– 1992: We bought extra 512Kbytes for desktop– 2002: Desktop came with 512 Mbytes– 2012: Desktop comes with 2GB

• Power usage– Pentium 4 can draw 50 amps of current and burn 50 W

• Important applications– Word processing, spreadsheets multimedia, web surfing

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Technology Trends – Good or Bad?

• Pessimist: trends make designs obsolete– But now I have to re-think everything I’d already solved!

• Optimist/Architect: trends offer opportunities– What can we do with a billion transistors?

• Good design ideas Bad design ideas

• E.g., It was good idea to scale up processor sizes– But, it now uses too much power and is too complex

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What To Do With a Billion Transistors?

A. Make the processors bigger

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Proc

B. Make more little processors

Proc

chip

chipProc Proc

Hitting the Wall: Architecture Challenges

• Single core performance

• Memory

• Complexity

• Power and temperature-efficient designs

Hitting the Wall: Architecture Challenges

• Functionalities in multi-core chips

• Simplifying the programmer’s task

• Efficient interconnects

• Designs tolerant of errors

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Hitting the Power Wall

Power is as important a metric today as performance

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The Advent of Multi-Core Chips

• In the past, performance magically increased by 50% every year• In the future, this improvement will be only ~20% every year … unless … the application is multi-threaded!

Core

Cache bank

Interconnects as a Bottleneck• In the past, on-chip data transmission on wires cost almost

nothing

• Interconnect speed and power has been improving, but not at the same rate as transistor speeds

• Hence, relative to computation, communication is much more expensive

• In the near future, it will take 100 cycles to travel across the chip

• 50% of chip power can be attributed to interconnects

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Interconnects in Multi-Core Chips

A

L1

A

CPU 3

CPU 1 CPU 2

L2cache

L2control

AA

A

A

A

L2control

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Not all Wires are Created Equal

B-Wires L-Wires W-Wires PW-Wires

Relative latency 1x 0.5x 1.6x 3.2xRelative area 1x 4x 0.5x 0.5xDynamic power (W/m) 2.65a 1.46a 2.9a 0.87aStatic Power (W/m) 1.02 0.57 1.16 0.31

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Data Transfers have Varying Needs

• Example of a cache coherence transaction: Read exclusive request for a shared block

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Other Interconnect Choices

• Optical interconnects: speed of light, cost in converting between optical and electrical domains

• 3D chips: reduces communication distances, low cost for vertical signal transmission, increase in power density

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3D Layouts

Cluster

(a) Arch-1 (cache-on-cluster) (b) Arch-2 (cluster on cluster) (c) Arch-3 (staggered)

Cache bank Intra-die horizontal wire Inter-die vertical wire

Die 1

Die 0

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Upcoming Architecture Challenges

• Improving single core performance






Clustered architectures: relatively low complexity scalable solution easily handles multiple threads

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Heterogeneous perf/powerCores that execute the OSCores that verify results

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Hardware to supporttransactional memory

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Faults are caused by high energy particles that deposit enough charge to toggle bits

Variations in conditions may cause a circuit to not produce its result in time

Ways to Evaluate New Architectures

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Simulati

ng

Modeling

Building

Tradeoff between three desired features

Building

• Construct a hardware prototype

• Advantages+ Way cool to show off hardware+ Runs quickly

• Disadvantages– Takes long time to build– Expensive– Not flexible

Generally too labor intensive for research studiesslide 29

Modeling

• Mathematically model the system– Use probabilities and/or queuing models

• Advantages+ Very flexible+ Very quick to develop+ Runs quickly

• Disadvantages– Cannot capture effects of system details– Architects are skeptical of models

Generally OK for back of the envelope estimates

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mem time = hit time + miss rate*penalty

Simulating

• Write a program that mimics system behavior

• Advantages+ Very flexible+ Relatively quick to develop

• Disadvantages– Runs slowly (e.g., 30,000 times slower than hardware)

Method of choice for most architectural research

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Simulation Challenges

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SimulatorApplication

System description

Performance results

Tough problems associated with each arrow!

Describing Simulated System

• How detailed must our simulator be?• Model every transistor in the processor?

– Would take too long• Abstract away details of processor organization?

– Could miss important effects of processor features– Could achieve wrong conclusion

• Need balance– Model in detail only where necessary– E.g., Model memory system in detail, but abstract disks

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Why Architects Need Friends

• Architecture is considered both computer engineering and computer science

• Architects interact with other areas– Circuit design (Electrical Engineering)– Transmission lines (EE)– Power (EE, Mechanical Engineering)– Compilers (Comp Sci)– Operating systems (CS)– Networking (EE, CS)– Databases (CS)– Queuing theory (CS, EE, Industrial Engineering)

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How Architecture Relates to Other Areas

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Operating Systems, Compilers, Networking Software

Circuits, Wires, Network Hardware

Application Software

• Besides these interactions, also global issues!

– Power, system verification, performance analysis, etc.

How Architecture Relates to Hardware (EE)

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• Architecture should enable efficient hardware design

– Avoid huge hardware structures

– Avoid cross-chip wires

How Architecture Relates to System Software

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• Architecture should support system software

– Provide good target for compiler

– Support important OS features (such as synchronization)

How Architecture Relates to User Software

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• Architecture should efficiently run important apps

• Intel added MMX hardware to support media apps

• Sun & IBM design multiprocessors for commercial apps

computer architecture challenges shriniwas gadage

Documents

time slide

multiple processors

processors biggerslide

chip transistors

examplesnumber of transistors

memory systems

technology trends good

number of instructions