Computer Organization and Computer Organization and DesignDesign

Arithmetic CircuitsArithmetic Circuits

Montek SinghMontek Singh

Wed, Mar 23, 2011Wed, Mar 23, 2011

Lecture 10Lecture 10

Arithmetic CircuitsArithmetic Circuits

01011+0010110000

Didn’t I learn howto do addition inthe second grade?

Finally; time to

build some serious

functional blocks

We’ll need a lot of boxes

Review: 2’s ComplementReview: 2’s Complement

8-bit 2’s complement example:8-bit 2’s complement example:11010110 = – 128 + 64 + 16 + 4 + 2 = – 4211010110 = – 128 + 64 + 16 + 4 + 2 = – 42

Beauty of 2’s complement representation:Beauty of 2’s complement representation: same binary addition procedure will work for adding both same binary addition procedure will work for adding both

signed and unsigned numberssigned and unsigned numbersas long as the leftmost carry out is properly handled/ignoredas long as the leftmost carry out is properly handled/ignored

Insert a “binary” point to represent fractions too:Insert a “binary” point to represent fractions too:1101.0110 = – 8 + 4 + 1 + 0.25 + 0.125 = – 2.6251101.0110 = – 8 + 4 + 1 + 0.25 + 0.125 = – 2.625

20212223…2N-2-2N-1 ……

N bits

“sign bit” “binary” pointRange: – 2N-1 to 2N-1 – 1

Binary AdditionBinary Addition Example of binary addition “by hand”:Example of binary addition “by hand”:

Let’s design a circuit to do it!Let’s design a circuit to do it!Start by building a block that adds Start by building a block that adds one columnone column::

called a “full adder” (FA)called a “full adder” (FA)Then cascade them to add two numbers of any size…Then cascade them to add two numbers of any size…

A: 1101B:+ 0101 10010

1011Carries fromprevious columnAdding two N-

bit numbers produces an (N+1)-bit result

A BCO CI S

FA

A3 B3 A2 B2 A1 B1 A0 B0

S4 S3 S0 S1 S0

A BCO CI S

FA A BCO CI S

FA A BCO CI S

FA A BCO CI S

FA

Designing an AdderDesigning an Adder Follow the step-by-step Follow the step-by-step

methodmethod1.1. Start with a truth table:Start with a truth table:

2.2. Write down eqns for the “1” Write down eqns for the “1” outputs:outputs:

3.3. Simplifying a bit (seems hard, Simplifying a bit (seems hard, but experienced designers are but experienced designers are good at this art!)good at this art!)

Ci A B Co S

0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1

€

Co = C iAB + C i AB + C iAB + C iAB

S = C i AB + C iAB + C i AB + C iAB

€

Co = C i A + B( ) + AB

S = C i ⊕ A ⊕B

For Those Who Prefer Logic For Those Who Prefer Logic DiagramsDiagrams A little tricky, but only 5 gates/bit!A little tricky, but only 5 gates/bit!

CI

A B

S

CO

“Sum”Logic

“Carry”Logic

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Co = C i A + B( ) + AB

S = C i ⊕ A ⊕B

Subtraction: A-B = A + (-B)Subtraction: A-B = A + (-B) Subtract B from A = add 2’s complement of B Subtract B from A = add 2’s complement of B

to Ato A In 2’s complement: –B = ~B + 1In 2’s complement: –B = ~B + 1

Let’s build an arithmetic unit that does Let’s build an arithmetic unit that does both both add add and suband suboperation selected by operation selected by control inputcontrol input::

But what about the “+1”?

A BCO CI S

FA A BCO CI S

FA A BCO CI S

FA A BCO CI S

FA

A3 A2 A1 A0

S4 S3 S0 S1 S0

B3 B2 B1 B0

Subtract

~ = bit-wise complementB0

B B1

B

Condition CodesCondition Codes One often wants 4 other bits of One often wants 4 other bits of

information from an arith unit:information from an arith unit: Z (zero): result is = 0Z (zero): result is = 0

big NOR gatebig NOR gate N (negative): result is < 0N (negative): result is < 0

SSN-1N-1

C (carry): indicates that most C (carry): indicates that most significant position produced a carry, significant position produced a carry, e.g., “1 + (-1)”e.g., “1 + (-1)” Carry from last FACarry from last FA

V (overflow): indicates answer doesn’t V (overflow): indicates answer doesn’t fitfit precisely:precisely:

To compare A and B, perform A–B and usecondition codes:

Signed comparison: LT NV LE Z+(NV) EQ Z NE ~Z GE ~(NV) GT ~(Z+(NV)) Unsigned comparison: LTU C LEU C+Z GEU ~C GTU ~(C+Z)

To compare A and B, perform A–B and usecondition codes:

Signed comparison: LT NV LE Z+(NV) EQ Z NE ~Z GE ~(NV) GT ~(Z+(NV)) Unsigned comparison: LTU C LEU C+Z GEU ~C GTU ~(C+Z)

€

V = Ai−1Bi−1N +A i−1B i−1N

€

V =COi−1⊕CIi−1

-or-

TTPDPD of Ripple-Carry Adder of Ripple-Carry Adder

Worse-case path: carry propagation from LSB to MSB, e.g., when adding 11…111 to 00…001.

tPD = (tPD,XOR +tPD,AND + tPD,OR) +(N-2)*(tPD,OR + tPD,AND) + tPD,XOR

(N)

CI to CO CIN-1 to SN-1

(N) is read “order N” and tells us that the latency of our adder grows in proportion to the number of bits in the operands.

A BCO CI S

FA A BCO CI S

FA A BCO CI S

FA

An-1 Bn-1 An-2 Bn-2 A2 B2 A1 B1 A0 B0

Sn-1 Sn-2 S2 S1 S0

A BCO CI S

FA A BCO CI S

FAC…

CI

A B

S

COA,B to CO

(What is TPD?? See Lec. 8-9)

Can we add faster?Can we add faster? Yes, there are many sophisticated designs that Yes, there are many sophisticated designs that

are faster…are faster…Carry-Lookahead Adders (CLA)Carry-Lookahead Adders (CLA)Carry-Skip AddersCarry-Skip AddersCarry-Select AddersCarry-Select Adders

Adder SummaryAdder Summary Adding is not only common, but it is also tends Adding is not only common, but it is also tends

to be one of the most time-critical of to be one of the most time-critical of operationsoperationsAs a result, a wide range of adder architectures have As a result, a wide range of adder architectures have

been developed that allow a designer to tradeoff been developed that allow a designer to tradeoff complexity (in terms of the number of gates) for complexity (in terms of the number of gates) for performance.performance.

RippleCarry

CarrySkip

CarrySelect

CarryLookahead

Smaller / Slower Bigger / Faster

Add

A B

S

Add/Sub

A B

S

sub

At this point we’ll define a high-level functional unit for an adder, and specify the details of the implementation as necessary.

Shifting LogicShifting Logic Shifting is a common operationShifting is a common operation

applied to groups of bitsapplied to groups of bitsused for alignmentused for alignmentused for “short cut” arithmetic operationsused for “short cut” arithmetic operations

X << 1 is often the same as 2*XX << 1 is often the same as 2*XX >> 1 can be the same as X/2X >> 1 can be the same as X/2

For example:For example:X = 20X = 201010 = 00010100 = 0001010022

Left Shift:Left Shift: (X << 1) = 0010100(X << 1) = 00101000022 = 40 = 401010

Right Shift:Right Shift: (X >> 1) = (X >> 1) = 000001010000101022 = 1010 = 1010

Signed or “Arithmetic” Right Shift:Signed or “Arithmetic” Right Shift: (-X >>> 1) = (11101100(-X >>> 1) = (1110110022 >>> 1) = >>> 1) = 111110110111011022 = -10 = -101010

01

01

01

01

01

01

01

01

R7

R6

R5

R4

R3

R2

R1

R0

X7

X6

X5

X4

X3

X2

X1

X0“0”

SHL1

Boolean OperationsBoolean Operations It will also be useful to perform logical It will also be useful to perform logical

operations on groups of bits. Which ones?operations on groups of bits. Which ones?ANDing is useful for “masking” off groups of bits.ANDing is useful for “masking” off groups of bits.

ex. 10101110 & 00001111 = 00001110 (mask selects last ex. 10101110 & 00001111 = 00001110 (mask selects last 4 bits)4 bits)

ANDing is also useful for “clearing” groups of bits.ANDing is also useful for “clearing” groups of bits.ex. 10101110 & 00001111 = 00001110 (0’s clear first 4 ex. 10101110 & 00001111 = 00001110 (0’s clear first 4

bits)bits)ORing is useful for “setting” groups of bits.ORing is useful for “setting” groups of bits.

ex. 10101110 | 00001111 = 10101111 (1’s set last 4 bits)ex. 10101110 | 00001111 = 10101111 (1’s set last 4 bits)XORing is useful for “complementing” groups of bits.XORing is useful for “complementing” groups of bits.

ex. 10101110 ^ 00001111 = 10100001 (1’s invert last 4 ex. 10101110 ^ 00001111 = 10100001 (1’s invert last 4 bits)bits)

NORing is useful for.. uhm…NORing is useful for.. uhm…ex. 10101110 # 00001111 = 01010000 (0’s invert, 1’s ex. 10101110 # 00001111 = 01010000 (0’s invert, 1’s

clear)clear)

Boolean UnitBoolean Unit It is simple to build up a Boolean unit using It is simple to build up a Boolean unit using

primitive gates and a mux to select the primitive gates and a mux to select the function.function.Since there is no interconnectionSince there is no interconnection

between bits, this unit canbetween bits, this unit canbe simply replicated at eachbe simply replicated at eachposition.position.

The cost is aboutThe cost is about7 gates per bit. One for 7 gates per bit. One for each primitive function,each primitive function,and approx 3 for the and approx 3 for the 4-input mux.4-input mux.

This is a straightforward, but not too elegant of This is a straightforward, but not too elegant of a design.a design.

Ai Bi

Qi

Bool

00 01 10 11

This logic block is repeated for each bit (i.e. 32 times)

An ALU, at LastAn ALU, at Last Now we’re ready for a big one!Now we’re ready for a big one!

An Arithmetic Logic Unit!An Arithmetic Logic Unit!

That’s a lot of

stuff

FlagsV,C

A B

R

BidirectionalShifter

BooleanAdd/SubSub

Bool

Shft

Math

1 0

1 0 …

NFlag

ZFlag