conformal lec training basic advance

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Basic Training material for conformal LEC

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  • CADENCE CONFIDENTIAL1 CADENCE DESIGN SYSTEMS, INC.

    Conformal LECLogic Equivalence CheckerBasic Training Manual

    Verplex Systems, Inc.

  • 2 CADENCE CONFIDENTIAL

    Getting Help

    You can get help with Cadence software from the following sources: Education Services training materials SourceLink service on the Internet:

    sourcelink.cadence.com OR go to the Cadence home page

    (http://www.cadence.com). Select the Customer Support link. You must have a maintenance contract to log in (authorization

    number).

    Customer Response Center (CRC) or send your request to support@cadence.com

  • 3 CADENCE CONFIDENTIAL

    Agenda of Conformal LEC Basic Training

    Overview of Verplex formal verification tools Conformal LEC usage Introduction to LEC A typical session (flat compare)Hierarchical compare

  • 4 CADENCE CONFIDENTIAL

    Overview of Verplex formalverification tools

  • 5 CADENCE CONFIDENTIAL

    Formal verification

    A systematic method that uses mathematical proof to check the designs properties

    Advantages of formal verification Enable "White box" verification No test vectors required Exhaustive verification Find bugs earlier Speed

  • 6 CADENCE CONFIDENTIAL

    Functional ClosureVerplex enables you to obtain the Golden

    RTL that meets the functional specificationsVerplex ensures that the functionality of the final layout matches that of the Golden RTL

    FinalLayout

    GoldenRTL

    RTLBlocksRTL

    Blocks

    FunctionalSpecification

    RTLBlocks

    Property Checking

    Logical consistency

    Structural consistency

    Clock synchronization

    Structural consistency

    Semantic consistency

    Clock synchronization

    ImplementationVerification

    Our formal technology enables you to catch bugs

    Earlier Target a class of bugs typically found withsimulation late in the design cycle

    Faster Formal is magnitudes faster than simulation Easier No test vectors required, easy debugging

  • 7 CADENCE CONFIDENTIAL

    VERPLEX Conformal Solution Overview

    Conformal CustomExtends EC to Cust. Log &

    memory

    Extends EC to custom logic and memory

    Conformal ASICProperty Checking

    Verifies Clock domain

    crossings Semantic

    consistency Structural

    consistency

    Design it golden - keep it golden.TM

    Conformal UltraExtends EC to Datapath

    RTL-gateEquivalence Checking

    (EC)

    Conformal ASICEquivalence Checker

    RTL-gate Equivalence Checking

    (EC)

    Verifies Clock domain

    crossings Structural

    consistency

    RTL GDSIIGateDesignImplementationPhysical

    ImplementationRTL GDSIIGateDesign

    Creation

    Design Flow

    FunctionalSpecification

  • 8 CADENCE CONFIDENTIAL

    Assertion Based Property Checker

    Pre-Defined Checks

    (automatic)

    DoneDone

    Pass

    HDLdesign

    Fail DebugProofProofengineengine

    Verplex Formal Verification Solution

  • 9 CADENCE CONFIDENTIAL

    Assertion Based Functional Checker

    Pre-Defined Checks (PDC) Automatically checks for

    Asynchronous clock domain crossing Clock domain analysis Structural checks for metastability prevention Functional checks for data stability

    Semantic inconsistency full_case/parallel_case range-overflow conditions X-assignment

    Structural inconsistency Tri-state enable stuck-at conditions Simultaneous set-reset conflict Conflicting values on multi-port latches Bus contention and bus floating

    Verplex Formal Verification Solution

  • 10 CADENCE CONFIDENTIAL

    Conformal LTX Logic Transistor Extraction

    Module xor(y, a, b)input a,b;output y;

    y = (~a&b) | (a&~b);endmodule

    RTL Abstract transistor-level circuitry into gate-level

    Enable equivalence checking

    Conformal LEC

    Conformal LTX

    Gate-Level

    SPICEVerilog

    or CDL

    Verplex Formal Verification Solution

  • 11 CADENCE CONFIDENTIAL

    Conformal LEC Logic Equivalence Checker

    Largest designs with the highest completion rate Handles even complex logic Verifies any step back to original

    RTL Accommodates any combination:

    RTL and gate, flat or hierarchical Easiest to use

    Annotated error patterns RTL-gate cross highlighting Logic cone schematic display

    Highest performance Flat R2G compare: 1hr / 1M gates Flat G2G compare: 20min / 1M

    gates

    Verplex Formal Verification Solution

  • 12 CADENCE CONFIDENTIAL

    Conformal LEC Usage

  • 13 CADENCE CONFIDENTIAL

    LEC usage

    Introduction to LEC

    Getting familiar with LEC

    LEC modes of operation

    LEC flow

    A typical session (flat compare)

    Hierarchical compare

  • 14 CADENCE CONFIDENTIAL

    Getting familiar with LEC

    Starting and exiting LEC LEC GUI environment LEC command conventions 3-2-1Add/Delete/Report

    Convenient featuresOnline help and documentation

  • 15 CADENCE CONFIDENTIAL

    Starting and exiting LEC Starting LECGUI mode: UNIX% lec Non-GUI mode: UNIX% lec -nogui Switch GUI & non-GUI modes (anytime during LEC session)

    LEC> set gui [on | off] Batch mode:

    UNIX % lec -dofile -nogui LEC> dofile

    Exiting LEC LEC> exit -force LEC automatically closes all windows upon exit

  • 16 CADENCE CONFIDENTIAL

    GUI environment

    ModeRead lib Read design

    Golden Revised

    Design hierarchy

    Messages

    Command Entry window

    Read Designwindow

    File list area

    Selected file area

    Browser

    Filefilter

    Design type

    LECwindow

    Transcriptwindow

  • 17 CADENCE CONFIDENTIAL

    Command: 3-2-1 convention

    Most three-word commands can be abbreviatedExample:SETUP> add pin constraint 0 scan_encan be written as:SETUP> add pi c 0 scan_en

    If 3-2-1 convention does not produce unique command, more letters may be added

    add in cADD INstance Constraintadd pi cADD PIn Constraintset lo fSET LOg File

    3-2-1 conventionCommands

  • 18 CADENCE CONFIDENTIAL

    Add/Delete/Report convention

    For every ADD command, there is a corresponding REPORT and DELETE command

    For example, if you specify:SETUP> ADD PIn Constraint 0 scan_en

    To report all pin constraints:SETUP> REPort PIn Constraint

    To remove the added constraint:SETUP> DELete PIn Constraint scan_en

  • 19 CADENCE CONFIDENTIAL

    Convenient features

    Rerun previous command Up and down arrow keys help avoid retyping previous

    commands

    Alias Alias command usage: add alias Example alias in .conformal_lec file:add alias setup set system mode setup

    Initial command file, .conformal_lec, executed in the following order (3.4.0.a or later ): a. Verplex install directory: $VERPLEX_HOME/lib/.conformal_lec b. Home directory: ~/.conformal_lec c. Current working directory: ./.conformal_lec

  • 20 CADENCE CONFIDENTIAL

    Online help and documentation

    Access location of the PDF format manuals:

    Commands: List of all command options, usage, examples, and related commands

    Reference Manual: PDF format file of command reference with detailed command usage and definitions

    User Manual: PDF format file with information related to the product (for example; installation, process flow, and GUI)

    Directory location of the PDF format manuals: $VERPLEX_HOME/doc

  • 21 CADENCE CONFIDENTIAL

    LEC usage

    Introduction to LEC

    Getting familiar with LEC

    LEC modes of operation

    LEC flow

    A typical session (flat compare)

    Hierarchical compare

  • 22 CADENCE CONFIDENTIAL

    Modes of operation SETUP mode Saving LEC transcript to a log file Specifying black boxes Reading libraries and designs Specifying design constraints Specifying modeling directives

    LEC mode Mapping process

    Resolving unmapped key points Compare process

    Debugging non-equivalent key points Report run statistics

  • 23 CADENCE CONFIDENTIAL

    Switching modes of operation

    GUI: click

    Command: set system mode [lec | setup]

  • 24 CADENCE CONFIDENTIAL

    LEC usage

    Introduction to LEC

    Getting familiar with LEC

    LEC modes of operation

    LEC flow

    A typical session (flat compare)

    Hierarchical compare

  • 25 CADENCE CONFIDENTIAL

    NoEquivalenceEquivalenceestablishedestablished

    Differences ?Differences ?

    Yes

    All mapped ?All mapped ?

    Specify constraintsSpecify constraints& other parameters& other parameters

    GoldenGolden

    AnalyzeAnalyze

    YesDebugDebug

    Fix designFix design

    No

    RevisedRevised

    Map key pointsMap key points

    Compare key pointsCompare key points

    ASICLib

    ASICASICLibLib

    LEC flow

    Setupmode

    LECmode

  • 26 CADENCE CONFIDENTIAL

    LEC usage

    Introduction to LEC

    Getting familiar with LEC

    LEC modes of operation

    LEC flow

    A typical session (flat compare)

    Hierarchical compare

  • 27 CADENCE CONFIDENTIAL

    A typical session (flat compare)

    Saving LEC transcript to a log file Specifying black boxes Reading libraries and designs Specifying design constraints Specifying modeling directives Switching to LEC mode Mapping process

    Resolving unmapped key points Compare process

    Debugging non-equivalent key points Report run statistics

    LEC

    SETUP

  • 28 CADENCE CONFIDENTIAL

    Saving LEC transcript to a log file

    Example 1:

    Speci

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