Constant Duty Cycle Sinusoidal Output Inverter with

Sine Amplitude Modulated High Frequency Link

Gustavo C. Knabben, Dominik Neumayr and Johann W. KolarPower Electronic Systems Laboratory

ETH Zurich, Switzerlandknabben,neumayr,kolar@lem.ee.ethz.ch

Abstract—Despite the increasing performance of power semi-conductors and passives components, limited timing resolutionin off-the-shelf available digital control hardware often preventsthe switching frequency in kW-scale dc/ac power conversionto be increased above several MHz for the sake of extremepower densities. In this paper an alternative approach to gen-erate a sinusoidal output voltage, based on constant duty cyclefrequency shift control of a high frequency resonant inverterstage and a subsequent synchronous cycloconverter, is analyzed.The design of the presented converter is facilitated by meansof a derived mathematical model. A novel closed-loop controlsystem is proposed which achieves tight regulation of the outputvoltage by means of controlling the switching frequencies of theinvolved bridge legs operated in resonant mode. Characteristicwaveforms of the dc/ac converter during steady-state and loadtransients are presented. Two distinct implementations of theresonant inverter stage, constituting an intermediate voltage orintermediate current link, are analysed and compared.

Index Terms—Dc/Ac Inverter, Soft-Switching, Resonant Con-verter, Cycloconverter, Frequency Shift, Phase Shift.

I. INTRODUCTION

Extremely compact power conversion systems are a keytechnology in the automotive and telecom industry and the de-sign of compact power electronics has recently been promotedby Google and IEEE in the Little Box Challenge, an opencompetition to build the world’s smallest 2 kW PV inverter.As can be seen from the technical documentation of the LBCfinalists [1], [2], the majority of approaches relied on a single-stage full-bridge based PWM inverter topology with time-varying duty cycle for sinusoidal output voltage generation.A constant or variable switching frequency in the range of0.1 MHz – 1 MHz was selected by the finalists, where severalteams employed sophisticated triangular current mode (TCM)control to enable soft-switching and push the frequency upto the MHz. Apart from the residual switching loss, despiteemploying latest GaN semiconductor technology and zerovoltage switching (ZVS) [3], and the limited performanceof magnetics at high frequency (HF), today’s existing off-the-shelf digital control hardware (microcontrollers, FPGAs,PWM controller ICs) prevents the switching frequency to beincreased above 2 MHz – 3 MHz due to unacceptably low

(c) (d)

v2/i2HFinverter

2

Vdc

v1/i1

v3/i3 vr/ir

ω1

ω2

(a)

HFinverter

1 vf/if voac

acω

v2/i2HFinverter

2

v1/i1

v3/i3

(b)

HFinverter

1 vo

ω

vr/ir

ω1

ω2

Cyclo-converter

Vdc

2φ(t)

t

t

t

v2/i2

v1/i1

v3/i3f2

f1

t

t

t

v2/i2

v1/i1

v3/i3

Fig. 1: (a) Generic concept of a voltage- or current-based sine ampli-tude modulation (SAM) high frequency (HF) link dc/ac converterwith diode rectification, low-pass filter and unfolding stage. Thediode rectifier and LF unfolding stages can also be replaced witha cycloconverter (b). The HF inverter stages are controlled by meansof either (c) sine-wave frequency shift (ωFS

1,2 = ωst±ωot) or (d) phaseshift (ωPS

1,2 = ωst± φ(t)), generating an intermediate HF voltage orcurrent link (depending on the selected inverter implementation) withsinusoidally varying amplitude (SAM).

duty cycle resolution. Now, keeping the expected performanceimprovement of WBG semiconductors and magnetic corematerials [4] in mind, a dc/ac conversion topology whichsupports switching frequencies up to ten MHz, while achievingboth a low THD and tight regulation of the ac voltage withreasonable digital control effort, is needed.

Two alternative concepts to generate a low frequency (LF)sinusoidal voltage from a dc source are schematically shownin Fig. 1 (a) (b). Two resonant inverter stages, HF inverter 1and 2, are controlled such that the respective sinusoidal outputvoltages, v1 and v2, exhibit either (i) a slight difference in

frequency or (ii) a time-varying phase-shift. The voltage dif-ference of v1 and v2 constitutes the voltage v3 of a HF voltagelink which exhibits a sine amplitude modulation (SAM), i. e.the envelope of v3 changes over time and resembles a rectifiedsinusoid with the desired output frequency. As shown inFig. 1 (a) the SAM voltage link is rectified and the HF contentremoved by a subsequent low-pass filter. The sinusoidal outputvoltage is then obtained by means of a |ac|/ac unfoldingstage. This three-stage approach has been proposed in [5]–[7]. The diode rectifier and LF unfolder can also be replacedwith a cycloconverter as depicted in Fig. 1 (b). This two-stageapproach with resonant link has been studied by the authorsin [8]–[10]. It should be noted that, depending on the selectedtopology to implement the HF inverter stages, the generatedHF link can also feature impressed currents (i1,i2,i3) ratherthan voltages (v1,v2,v3). A similar dc/ac conversion approachincluding a HF current link with fixed amplitude and a half-wave cycloconverter is described in [11]. By means of phase-control of the cycloconverter with respect to the resonantcurrent a very efficient power delivery to the mains is achieved.The modulation concept of operating the HF resonant inverterswith constant 50 % duty cycle but slightly different frequency,termed sine-wave frequency shift (FS) in literature [9], isdepicted in Fig. 1 (c) showing two sine waves v1 and v2 ofsame amplitude V but different angular frequencies,

v1 = V sin (ω1t) = V sin (ωst+ ωot) ,

v2 = V sin (ω2t) = V sin (ωst− ωot) .(1)

The difference between v1 and v2 then forms the SAM HFvoltage link,

v3 = v1 − v2 = 2V sin (ωot) cos (ωst) , (2)

with center frequency ωs = 2πfs and with ωo = 2πfo

sinusoidally varying amplitude, where fo is the desired fre-quency of the ac output. Although the duty cycle can be keptconstant in case of FS, there is still a high requirement onthe available resolution of the modulator. Given the ratio ofswitching frequency and clock frequency of the implementedmodulator (microcontroller or FPGA),

N =fclk

fs, (3)

the smallest difference in frequency which can be set is

∆fs =fclk

N(N + 1). (4)

For a clock frequency of 150 MHz and ∆fs = 0.5 Hz Eq. (4)can be solved to find N = 17320. Thus, a frequency resolutionof 0.5 Hz can only be achieved if the switching frequency ofthe HF inverter stage is kept below roughly 8.7 kHz. However,this apparent limitation to use FS modulation for above MHz

operation can be resolved if dedicated clock generation ordirect digital synthesis (DDS) ICs are employed in additionto standard microcontroller or FPGA hardware. By means ofsuch frequency and/or phase shift programmable ICs, controlsignals up to hundreds of MHz with frequency resolutionbetter than 0.1 Hz can be generated [12], [13]. Another optionto generate a voltage link with sinusoidally varying envelope isto operate both HF inverters with identical frequency but applya time-varying phase shift (PS), φ(t), between the respectivecontrol signals such that,

v1 = V sin (ωst+ φ(t)) ,

v2 = V sin (ωst− φ(t)) ,

v3 =v1 − v2 = 2V sin (φ(t)) cos (ωst) ,

(5)

as analyzed thoroughly in [8]. Compared to FS, sine-wave PSis a more generic method which allows to generate envelopesof arbitrary shape and frequency and is the preferred techniqueby the authors in [6], [7], [14]–[21]. Nevertheless, since PSmodulation at very high frequency also requires dedicatedICs for control signal generation and because the phase shiftbetween the control signals must be continuously updated overtime, sine-wave FS is the preferred choice in this work.

In this paper a two-stage HF resonant link based dc/acconverter employing sine-wave FS control is analysed in detail.Two variants of the HF inverter stage, a SAM voltage andcurrent link, are introduced in Sec. II and the basic operationof the topology is explained. A comprehensive mathematicalmodel of the converters is derived in Sec. III in order toidentify optimal values for the passive components. Moreover,a novel control system is proposed for tight regulation ofthe output voltage by means of FS. Section IV presentstypical waveforms of the converter with proposed FS control atstationary operation and during load transients obtained fromsimulations. Furthermore, the studied HF voltage and currentlink converters are compared to a single-stage TCM inverterby means of several performance indicators, highlighting thebenefits and drawbacks of the respective topologies.

II. SAM HF LINK CONVERTER

The dc/ac converter topologies analyzed in this paper areshown in Fig. 2. The SAM voltage link based converteris depicted in Fig. 2 (a), where the HF inverter stage isimplemented by means of two parallel resonant converters(PRC). Each PRC is formed by a bride-leg with a LC resonanttank connected between the respective switch node (A or B)and the split dc-link midpoint O. Bridge-leg A and B areoperated with 50 % duty-cycle and frequencies ω1 and ω2

slightly above the resonance frequency of the resonant tankto reduce load dependency of the voltage gain, as discussedin Sec. III-A, and to enable ZVS.

(a)

(b)

Lo,p

S5 S6

S7 S8

Co,s

v3

vo

S5 S6

S7 S8

vo

S1

S2

S3

S4

L1,p

C2,p

L2,p C1,p

2

Vdc

S1

S2

S3

S4

L1,s

C1,s

L2,s C2,s

v1v2

vri3

v3

A

BO

A

BO iL2

iL1

i1

i2

i3

ir

2

Vdc

2

Vdc

2

Vdc

Co,p

Fig. 2: Voltage- (a) and current-based (b) SAM HF link convertertopologies with isolation transformer and center-tapped cyclocon-verter.

As described in the introduction, ω1 and ω2 differ preciselyby twice the output frequency in order to establish the SAMvoltage link v3 which is constituted by the difference of v1 andv2. For increased conversion efficiency and to support reactivepower transfer, a two-stage approach with cyclcoconverter(cf. Fig. 1 (b)) is preferred. Although galvanic isolation mightnot be required by the application, the transformer turns-ratiointroduces an additional degree of freedom in the design ofthe respective inverter stage which helps to reduce the currentsin the resonant tank (cf. Sec. III-A). Among several optionsto implement the cycloconverter, the double-winding center-tapped realization allows full-wave cycloconversion (powertransfer in the positive and negative half-wave of v3) withonly two four-quadrant power switches. Zero current switching(ZCS) applies to the cycloconverter (synchronous cycloconver-sion) as long as the control signals are well synchronized tothe voltage link v3. The output inductor behaves as a currentsource, which requires a commutating strategy to ensure apath for the impressed current in Lo,p during switching stagetransitions. One possible strategy is to keep S6 and S8 turned-off when the current in Lo,p is positive and to operate S5 andS7 at high frequency. During the pos. half-wave of v3, S5 isturned-on and S7 is off. Slightly after the zero-crossing of v3,S7 is turned-on, initiating a current commutation between S5

and S7 and allowing S5 to be turned on subsequently withzero current. The switching frequency of the cycloconverter isset to the center frequency obtained from the output voltagecontroller (cf. Sec. III-B) and, in order to synchronize, thecarrier signal of the modulator is reset at the start of every newv3 period. This can be achieved in practice by detecting thezero-crossing of v3 by means of a high-bandwidth comparatorcircuit. To facilitate swift current commutation between theswitches, the reset of the carrier signal is slightly delayed withrespect to the v3 zero crossing.

The second analysed topology in this paper is shown in

Fig. 2 (b) where the HF inverter stage is implemented bymeans of two series resonant converters (SRC) which consti-tute a SAM current link i3 and require an impressed voltageat the output of the cycloconverter (Co,s). The SRCs are alsooperated slightly above resonance frequency to achieve ZVSin all operating points. Now, the control of the cycloconvertermust be synchronized to the current link i3 to achieve ZVSin S5-S8. Since detecting the zero crossing of a current ismore challenging at very high frequency, the SAM currentlink based topology with cycloconverter has a clear downsidecompared to the voltage link based topology.

In the next section a mathematical model of the convertersis presented which allows to identify optimal values for theresonant tank elements and transformer turns-ratio.

III. CONVERTER DESIGN AND CONTROL STRATEGY

A. Mathematical Model and Converter Design Procedure

Applying the first harmonic approximation (FHA), the cy-cloconverter and the low-pass filter (cf. Fig. 2 (a) and (b))can be represented by a single resistor R3 as indicated inFig. 3 (a) and (b) [22], [23]. R3 is calculated according to

R3,p =π2

8n2pR, R3,s =

8

π2n2sR, (6)

where subscripts (p) and (s) denominate the parallel (volt-age HF link) and series (current HF link) resonant circuits,R = V 2

o /Po represents the load connected to the output ofthe converter and np/ns is the turns-ratio of the employedtransformer.

The equivalent circuits depicted in Fig. 3 (a) and (b) arefurther simplified as shown in Fig. 3 (c) and (d) by meansof introducing a time-variant resistance R1(t). In case of thePRC, the instantaneous power p1,p = v1i3 = v1

v3R3,p

providedto the output can be written as

p1,p = 2V 2

R3,pcos (ωot) sin (ωst) sin (ωst+ ωot) , (7)

substituting v3 with Eq. (2). The time variant resistance shownin Fig. 3 (c) is calculated by means of averaging p1,p over theresonant period

P1,p = 〈p1,p〉Ts=

1

Ts

∫ Ts

0

p1,pdt =V 2

R3,psin2 (ωot) , (8)

and then substituting (8) in R1,p = V 2

2P1,pwhich leads to

R1,p(t) =R3,p

2

1

sin2 (ωot). (9)

It can be inferred that R1,p(t) varies periodically with theoutput frequency fo between a nominal value R3,p/2 and open-circuit.

(a) (c)

(b) (d)

C1,p C2,p

L1,p L2,p

vAO,1 vBO,1R3,p

C1,p

L1,p

vAO,1v2v1

v3

R1,p

v1

L1,s L2,s

vAO,1 vBO,1

R3,si3

C1,s C2,s

i1 i2

L1,s

vAO,1

R1,s

i1

C1,s

Zi

Zi

Fig. 3: Simplified circuits that facilitate mathematical analysis andpassive component design. Equivalent resistance R3,p/R3,s repre-sents both cycloconverter and load resistor R. Circuits in (a) and (b)can be further simplified as shown in (c) and (d) by introducing atime-variant resistance R1,p(t)/R1,s(t).

Following the same line of thought, Eq. (10) results for theequivalent resistance of the SRC model shown in Fig. 3 (d),

p1,s = i1i3R3,s = 2I2R3,s cos (ωot) sin (ωst) sin (ωst+ ωot) ,

P1,s(t) = 〈p1,s〉Ts=

1

Ts

∫ Ts

0

p1,sdt = I2R3,s cos2 (ωot) ,

R1,s(t) = 2R3,s1

cos2 (ωot).

(10)

Using the basic expression for quality-factor and naturalfrequency of the series and parallel resonant circuit, thecomponent values of the resonant tank elements are given byEq. (11) for the PRC and by Eq. (12) for the SRC, where in aworst-case consideration, the minimum value of R1,p and R1,s

over time was selected,

L1,p =R3,p

2ωnQp=

π2R

16n2pωnQp,

C1,p =2Qp

ωnR3,p=

16n2pQp

ωnπ2R,

(11)

L1,s =Qs2R3,s

ωn=

16QsR

π2n2sωn,

C1,s =1

ωnQs2R3,s=

π2n2s16ωnQsR

.

(12)

Now, the required transformer turns-ratio to meet the outputvoltage requirement for given dc input voltage and resonanttank parameters is calculated for the HF voltage link dc/acconverter (cf. Fig. 2 (a)). The peak value of the envelope ofthe rectified HF voltage at the output of the cycloconverter isrelated to the output voltage according to

Vr =π√

2

2Vo. (13)

Reflecting Vr to the primary side of the transformer and

observing from Eq. (2) that V = V3

2 yields

V =π√

2

4npVo. (14)

Introducing the voltage gain of the parallel resonant tank,

|Hp| =1√[

1−(ωsωn

)2]2+(

ωsωnQp

)2 , (15)

and considering the expression for the first harmonic of vAO,VAO,1 = 2

πVDC, allows to relate the peak value of the resonantcapacitor voltage to the dc-link voltage,

V = |Hp| VAO,1 = |Hp|2Vdc

π. (16)

Substituting Eq. (14) in Eq. (16) and rearranging results in anexpression for the turns-ratio,

np =π2√

2Vo

8 |Hp|Vdc. (17)

The same analysis is applied to find ns, in which

I =nsπ√

2

4Io, I = |Hs|

2Vdc

π, (18)

and the series resonant tank gain is written as

|Hs| =1

R1

ωsωnQs√[

1−(ωsωn

)2]2+(

ωsωnQs

)2 , (19)

resulting in the desired turns-ratio expression

ns =8 |Hs|Vdc

π2√

2Io. (20)

Now according to the technical specification given in Tab. I(Po,Vo,Vdc,fo,fs), the resonant tank parameters L1,p/L1,s andC1,p/C1,s can be computed depending on the design-spacevariables fn and Q. In a next step, the occurring resonanttank current and voltage are computed depending on fn andQ. Then, for a maximal allowed voltage across the resonantcapacitor, the optimal value of fn and Q is determined byminimizing the resonant tank current. Based on the equivalentcircuits in Fig. 3 (a) and (b), analytical expressions for the peakcapacitor voltage and peak inductor current (VC1,IL1) of bothparallel and series resonant converters can be derived. For thePRC, voltages v1 and v2 can be related to the sinusoidal ex-citations vAO,1 and vBO,1 according to Eq. (21) and Eq. (22),[

k1 k2k2 k1

] [v1v2

]=

[vAO,1vBO,1

], (21)

k1 = 1− ωs2L1C1 +

jωsL1

R3,pand k2 = −jωsL1

R3,p. (22)

2000

4045

4.5

0

35 30fn (kHz)

1500

1000

500

3.52.5

1.50.5

Q

10IL1,p (A)

VC1,p/VC1,s (V)

10IL1,s (A)

(a)

4.5

3.5

2.5

1.5

0.5

Q

454035fn (kHz)

1200

900

0454035

fn (kHz)4.52.50.5

Q

600

300

1200

900

0

600

300

(b)

VC

1 (V

)

I II I III,II

ˆˆ

ˆ

ˆ VC

1 (V

)ˆ

ˆ

Fig. 4: (a) Resonant tank capacitor peak voltage VC1 and inductorpeak current IL1 as a function of fn and Q for both voltage (p)and current (s) SAM HF links. VC1 surfaces for both topologies areidentical (VC1,p = VC1,s = VC1). The current-based link presents lessinductor peak current if compared to the voltage-based link for thesame capacitor peak voltage. (b) Intersection curves where (I) VC1 =10 Ω·IL1,p and (II) VC1 = 15.6 Ω·IL1,s, exhibiting a common optimumpoint of fn = 38.9 kHz and Q = 1.81.

Solving the linear system for v1 and v2 results in[v1v2

]=

[k3 k4k4 k3

] [vAO,1vBO,1

], (23)

where k3 =k1

k21 − k22and k4 =

−k2k21 − k22

. (24)

This allows to express the capacitor voltage and the inductorcurrent,

vC1 = k3vAO,1 + k4vBO,1, (25)

iL1 =vAO,1 − vC1

jωsL1= vAO,1

1− k3jωsL1

− vBO,1k4

jωsL1, (26)

which can be rewritten using VAO,1 = VBO,1 = 2Vdc/π in orderto find the maximum value of the involved quantities,

VC1,p =2VDC

π(|k3|+ |k4|) (27)

andIL1,p =

2VDC

π

(∣∣∣∣1− k3jωsL1

∣∣∣∣+

∣∣∣∣ k4jωsL1

∣∣∣∣) . (28)

The same analysis is applied to compute the peak capacitorvoltage

VC1,s =2VDC

π

(∣∣∣∣ k3jωsC1

∣∣∣∣+

∣∣∣∣ k4jωsC1

∣∣∣∣) , (29)

20

-20

100

-10

0

-180

-45-90

-135

Mag

(dB

)P

ha

(deg

)

-10

-50

-20-30-40

90

-90

450

-45

Mag

(dB

)P

ha

(deg

)

40

0

302010

90

-90

450

-45

Mag

(dB

)P

ha

(deg

)

50

10

403020

90

-90

450

-45

Mag

(dB

)P

ha

(deg

)

(a) (c)10 100Frequency (kHz) 10 100Frequency (kHz)

(b) (d)10 100Frequency (kHz) 10 100Frequency (kHz)

R1 2R1 10R1

Fig. 5: Transfer function (a,c) and input impedance (b,d) Bode plotsof the parallel (a,b) and the series (c,d) resonant converter dependingon the equivalent resistance R1.

and peak inductor current

IL1,s =2VDC

π(|k3|+ |k4|) (30)

of the SRC.The derived expressions allow to plot VC1,p/VC1,s and

IL1,p/IL1,s for several values of fn and Q. The plot of Fig. 4 (a)reveals the trade-off between VC1 and IL1 for the voltage andthe current link based topology and shows that the peak currentis substantially lower in the current link based converter.

TABLE I: Technical specifications.

Output power (Po) 2 kW

Output RMS voltage (Vo) 230 V

DC-link voltage (Vdc) 450 V

Output frequency (fo) 50 Hz

Switching frequency (fs) 50 kHz

Nominal output load resistance (R) 26.5 Ω

The optimal resonant tank parameter fn and Q are listed inTab. II and have been obtained from the intersection curvesplotted in Fig. 4 (b). The shown intersection curves are VC1 =

10 Ω · IL1,p in case of the PRC and VC1 = 15.6 Ω · IL1,s in caseof the SRC, where the scaling factors for both topologies werechosen such that the max. allowed 500 V across the resonantcapacitor is attained for the optimal values of fn and Q inorder to minimize resonant tank current.

TABLE II: Optimal resonant tank parameter.

Maximum tank capacitor voltage (VC1,p/VC1,s) 500 V

Resonant tank natural frequency (fn) 38.9 kHz

Resonant tank quality factor (Q) 1.81

MOD1

S1 S2

vd

vq

0

vα

θo

vβ Cpll

S3 S4 S5 S6 S7 S8

SOGIdq

αβvo

ωs*

ω1

ω2ω1 ω2

ωo*

ωo Cω

Cv

MOD2 MOD30.5

vd*

ω1

ω2

ωo*

k

ωo

vo vα

vβ

(a)

(b)

ωoc

ωsc

Fig. 6: (a) Combined amplitude and frequency control loop. A second-order generalized integrator (SOGI) phase locked loop (PLL) measuresthe output frequency ωo and feeds a controller Cω to impose the correct desired frequency-shift between ω1 and ω2. A second controllerCv changes both frequencies ω1 and ω2 simultaneously to compensate output voltage amplitude variations. The block diagram of (b) detailsthe SOGI block internal structure.

Once optimum values for fn and Q are found, the quantitiesn, L1 and C1 are calculated with Eq. (6)-(20) according to thespecifications in Table I. The optimized circuit parameters aresummarized in Table III.

TABLE III: Voltage (p) and current (s) based links main parameters.

Transformer turns ratio (np) 0.860Tank inductance (L1,p) 49.9 µH

Tank capacitance (C1,p) 336 nF

Output inductance (Lo,p) 500 µH

Output capacitance (Co,p) 2 µF

Transformer turns ratio (ns) 1.96Tank inductance (L1,s) 82.4 µH

Tank capacitance (C1,s) 203 nF

Output capacitance (Co,s) 4 µF

The input impedance (Zi) and transfer functions (v1/vAO

and i1/vAO) Bode plots of both parallel and series resonantconverters with optimized circuit parameters are depicted inFig. 5. An increase in the equivalent tank resistance R1

represented by dashed lines in the plots reveals how themagnitude and the phase changes with varying load. The PRCtransfer function gain near the natural frequency fn increasesfor higher R1 values, while the opposite behaviour is found inthe SRC. Since R1(t) varies over the output period (cf. Eq. (9)and Eq. (10)) it is not feasible to operate the converters withfs = fn where the magnitude varies strongly with R1. Theoperation above resonance is the preferred option (positivephase of Zi) since it also enables ZVS of the half-bridgeMOSFETs. The Bode plot of the PRC and SRC transferfunctions in Fig. 5 (a) and Fig. 5 (c) also exhibit a differencein the slope of the magnitude above resonance frequency. Incase of the PRC the magnitude decreases with −40 dB/decwhile the SRC features a slope of just −20 dB/dec. The se-lectivity (quality factor) of the PRC improves with increasingresistance R1 while it decreases in case of the SRC. Thus, thePRC features better harmonic attenuation and more sinusoidal

HF-link waveforms. This renders the PRC better suited forapplications that require very low THD in the output voltage,particularly at light loads.

B. Proposed control strategy

Using FS modulation, the resonant links are excited bysquare-wave voltage waveforms with frequency ω1 = (ωs+ωo)

and ω2 = (ωs−ωo), respectively. The center frequency of bothresonant links,

ωs = (ω1 + ω2)/2, (31)

sets the prevailing gain of the PRC and SRC transfer functions(cf. Eq. (15) and Eq. (19)) and allows to adjust the amplitudeof the output voltage vo. The angular frequency of the outputvoltage,

ωo = (ω1 − ω2)/2, (32)

can be controlled by precisely adjusting the difference betweenω1 and ω2.

Fig. 6 depicts the developed control system to regulate theoutput voltage vo. A phase-locked-loop (PLL) [24] algorithmis applied to determine the angular frequency ωo of the outputvoltage vo. A deviation of ωo from its reference value ω∗

o

is compensated by means of PI controller Cω with addi-tional feed-forward term (ω∗

o ). The amplitude of the outputvoltage vo is obtained from the dq-transformation (vd) andcontrolled to meet the amplitude reference v∗d by means ofcompensator Cv with additional feed-forward of the angularswitching frequency value (ω∗

s ). The excitation frequenciesof the respective bridge-legs, ω1 and ω2, are then computedaccording to Eq. (31) and Eq. (32). The control signals ofthe HF link MOSFETs, S1-S4, are then obtained from PWMwith 50 % duty cycle and the respective frequency. The PWMunit generating the control signals for the cycloconverter stage,S5-S8, is parametrized with ωs in order to synchronize thecycloconversion to HF voltage v3, as explained in Sec. II.

IV. SIMULATION RESULTS AND PERFORMANCE

COMPARISON

Fig. 7 illustrates circuit simulation results of the voltagebased SAM HF link converter designed in Sec. III for station-ary operation at rated output power. The characteristic voltagewaveforms are shown in Fig. 7 (a) over a mains period and inFig. 7 (b) over two resonant periods. Considering Fig. 7 (a),it can be seen that the individual resonant tank voltages,v1 and v2, exhibit a fluctuating amplitude with twice theoutput frequency which can be explained by the time-varyingequivalent resistance R1(t) (cf. Sec. III-A) which essentiallyalters the transfer characteristics of the resonant tank over time(cf. Fig. 5 (a)). Note, that this fluctuation would become moresevere if the resonant tank would be operated closer to itsresonance frequency. Voltage v3 presents the desired SAMshape, which is then cycloconverted (vr) and low-pass filteredto generate vo. The waveforms with respect to the resonantperiod are depicted in Fig. 7 (b). Exciting the resonant tankabove the resonance frequency, the input impedance becomesinductive (positive phase) and an increasingly triangular ratherthan sinusoidal shape of the currents iL1 and iL2 can berecognized. Note, that the results of the HF current link basedconverter are omitted since the waveforms are very similarto the voltage link based converter and the main discrepanciesare highlighted in the performance comparison presented at theend of this section. The performance of the voltage link basedconverter subject to several stepwise load changes is shownin Fig. 8, demonstrating the excellent performance of theproposed FS control system described in Sec. III. At t = 25 ms

a stepwise decrease to 50 % of the load is initiated followedby another 25 % reduction at 85 ms. At t = 145 ms, a stepwiseincrease of the load back to 2 kW rated power is shown. It canbe seen that even under severe load changes, the output voltageis controlled tightly. Also shown in Fig. 8 are the computedcontrol variables, switching (fsc) and output (foc) frequencies,required to ensure the correct output frequency and amplitude.The low values of converter passive components explain thefast dynamic response of the circuit, which leads to vo spikesduring abrupt load transients. Also note, how the amplitudefluctuation of v1and v2 depends on the prevailing load.

TABLE IV: TCM inverter parameters.

Inductance 62.2 µH

Capacitance 26.6 µF

Lower current boundary 5 A

Lower switching frequency 50 kHz

In order to compare the performance of the voltage andcurrent SAM HF link converters, several performance indi-cators were computed. The performance of a two-level full-bridge inverter operating in triangular current mode (TCM)

206time (ms)

time (ms)

v1

208.05 208.06 208.07 208.08

(a)

(b)

Vol

tage

(V

)V

olta

ge (

V)

Vol

tage

(V

)

Curr

ent

(A)

Curr

ent

(A)

600400200

0-200-400-600

400

-400

-800

0

800

600400200

0-200-400-600

v2

v3

vr

vo

210 214 218 220

Vol

tage

(V

)V

olta

ge (

V)

Vol

tage

(V

)

300200100

0-100-200-300

600400200

0-200-400-600

300200100

0-100-200-300

6040200-20-40-60

6040200-20-40-60

iL1

vBO

vAO

iL2

v3

vrvo

600400200

0-200

i3

Curr

ent

(A)

12840-4-8-12

Fig. 7: Steady-state simulation results of the voltage-based SAM HFlink inverter at rated output power for a mains period (a) and tworesonant periods (b).

[25] is included as a benchmark, designed for the technicalspecifications shown in Table I which results in the parametervalues summarized in Table IV. Since TCM features a variableswitching frequency, the inductance value is chosen such thatthe minimum switching frequency corresponds to the 50 kHz

of the SAM converter for a similar size of the passives. Fig. 9shows the performance indicators with respect to output powerand in the form of a radar chart. The indicators were chosenin order to easily recognize features and drawbacks of each

0time (ms)

Vol

tage

(V

)V

olta

ge (

V)

Vol

tage

(V

)600400200

0-200-400-600

400

-400

-800

0

800

400

200

0

-200

-400

20 40 60 80

Fre

q. (

kHz) 58

5654

Fre

q. (

Hz)

525048

5251504948

v1 v2

v3

vo

io

fsc

foc

100 120 140 160 180 200

Curr

ent

(A)

20

10

0

-10

-20

Fig. 8: Transient response simulation results for a 50 % stepwise loadreduction after 25 ms followed by another 25 % reduction at 85 msand a final stepwise increase to the 2 kW rated power at 145 ms,demonstrating the performance of the proposed control strategy.

topology. The inductor RMS current (IL1/IL2), the switchingfrequency (fs) and the output voltage THD (THDvo) provide agauge of the conduction losses, switching losses and harmonicdistortions, respectively. The average switching frequency overa vo period was computed in case of the TCM inverter.

Concerning conduction losses, the current link inverterpresents a better figure of merit compared to the voltage linkdue to the lower tank inductor RMS currents (IL1/IL2). Theoutput voltage THD is around 2 % at rated power, but increasesdrastically in case of the current link converter if Po is reducedbelow 1 kW, exceeding typical THD limits when operating atlight loads. This is explained by the huge dependency of theSRC tank gain on the output load (cf. Fig. 5), which requires alarge increase of fs to keep the amplitude of vo at its nominalvalue under light load. In contrast, the THDvo in case ofthe voltage link converter is almost independent of the outputpower. Finally, regarding the fs indicator, it can be seen thatthe average switching frequency of the TCM inverter is clearlyabove both SAM converters.

V. CONCLUSIONS

In this paper an alternative approach to conventional PWMwith varying duty cycle to generate a low frequency sinusoidaloutput voltage in dc/ac converter applications is studied indetail. By means of constant duty cycle frequency shift (FS)control of a HF inverter stage at the dc side, an intermediateHF voltage or current link is established which exhibits asinusoidally varying amplitude at the desired output frequency.A second cycloconversion stage with subsequent low-passfilter yields the desired ac output. Two variants of the HFinverter stage, a voltage or current link implemented by meansof parallel or series resonant converters, respectively, havebeen analyzed. Based on a derived mathematical model ofthe converter, the resonant tank passives and transformerturns-ratio were chosen considering a minimization of thecurrent stress for a given maximum resonant capacitor volt-age in a 2 kW 400 V dc/ac application. A novel close-loopcontrol systems is proposed which allows to tightly regu-late the frequency and amplitude of the ac voltage. A dq-transformation based PLL and two individual PI controllersare implemented to compensate both amplitude and frequencydeviations by adjusting the switching frequency of the re-spective HF inverters. The presented simulation results showexcellent transient performance of the converter. In case ofthe PRC-based HF inverter, an abrupt load step of 75 % ofnominal power settles within an output period and requiresa shift of the center frequency (avg. frequency of both HFinverters) by roughly 4 kHz. Moreover, the performance ofPRC and SRC implementations were compared to a single-stage TCM inverter regarding current stress, THD of the outputvoltage and switching frequency. Interestingly, the resonantinductor current is significantly higher in case of the PRCimplementation compared to the SRC which exhibits valuesjust slightly above the TCM inverter. As a consequence highconduction losses must be expected in case of the PRCimplementation which leads to reduced efficiency particularlyat light loads since the current stress in the resonant stageremains high. At nominal output power both HF inverterimplementation show low output voltage THD values in thesame range as the TCM inverter. Unfortunately, in case ofthe SRC implementation the THD increases significantly atlight loads. It can be concluded that the HF current link basedconverter with FS control is a viable option to realize aboveMHz, kW-scale dc/ac power conversion. However, dedicatedtiming ICs are needed to realize FS control and the exactsynchronization of the cycloconverter to the HF current linkby means of current zero-crossing detection is crucial.

REFERENCES

[1] Google, “Little box challenge,” www.littleboxchallenge.com, 2016, ac-cessed: 2017-07-26.

THD

vo (

%)

7

56

4

2

0

3

1

35

2015105

2530

I L1/I

L2 (

A)

0.5 1.0 1.5 2.0 2.50

Po (kW)

Voltage SAM HF link (I)Current SAM HF link (II)TCM inverter (III)

0.8Po0.4Po

IL1/IL2 (A)

fs (kHz)

THDvo

(%)

Nswitches

250

200

100

0

150

50

f s (

kHz)

0.5 1.0 1.5 2.0 2.50

Po (kW)

00.5 1.0 1.5 2.0 2.50

Po (kW)

II

I

III

I

II

III

I

II

III

6

12

18

24

50

100

150

200

2 4 6 824 13

I

IIIII

Fig. 9: Performance indicators for comparing both voltage (I) and current (II) SAM HF link converters and the triangular current mode(TCM) inverter (III) [25]. The current-based inverter shows better results regarding tank inductor RMS current values (IL1/IL2) which leadsto lower conduction losses. In contrast, the voltage-based inverter has lower output voltage total harmonic distortion (THDvo).

[2] K. A. Kim, Y.-C. Liu, M.-C. Chen, and H.-J. Chiu, “Opening the box:survey of high power density inverter techniques from the little boxchallenge,” CPSS Trans. Power Electron. and Appl., vol. 2, no. 2, pp.131–139, 2017.

[3] D. Neumayr, M. Guacci, D. Bortis, and J. W. Kolar, “New calorimetriepower transistor soft-switching loss measurement based on accurate tem-perature rise monitoring,” in Proc. of the 29th International Symposiumon Power Semiconductor Devices and IC’s (ISPSD), 2017.

[4] TDK Ferrites and Accessories, “Pc 200,” https://goo.gl/C3R7FZ, ac-cessed: 2017-11-12.

[5] P. Savary, M. Nakaoka, and T. Maruhashi, “Novel type of high-frequencylink inverter for photovoltaic residential applications,” IEE Proc. B -Electric Power Appl., vol. 133, no. 4, pp. 279–284, July 1986.

[6] I. J. Pitel, “Phase-modulated resonant power conversion techniques forhigh-frequency link inverters,” IEEE Trans. Ind. Appl., vol. IA-22, no. 6,pp. 1044–1051, Nov 1986.

[7] X. Li and A. K. S. Bhat, “A comparison study of high-frequency isolateddc/ac converter employing an unfolding lci for grid-connected alternativeenergy applications,” IEEE Trans. Power Electron., vol. 29, no. 8, pp.3930–3941, Aug 2014.

[8] C. A. F. Ferreira and B. V. Borges, “Sine-wave amplitude-modulationconcept for linear behavior of phase-modulated resonant converters,”IEEE Trans. Ind. Electron., vol. 60, no. 5, pp. 2074–2083, May 2013.

[9] V. T. Ranganathan, P. D. Ziogas, and V. R. Stefanovic, “A dc-ac powerconversion technique using twin resonant high-frequency links,” IEEETrans. Ind. Appl., vol. IA-19, no. 3, pp. 393–400, May 1983.

[10] A. K. S. Bhat and S. D. Dewan, “Resonant inverters for photovoltaicarray to utility interface,” IEEE Trans. Aerosp. and Electron. Syst.,vol. 24, no. 4, pp. 377–386, 1988.

[11] A. Trubitsyn, B. J. Pierquet, A. K. Hayman, G. E. Gamache, C. R.Sullivan, and D. J. Perreault, “High-efficiency inverter for photovoltaicapplications,” in Proc. of the IEEE Energy Conversion Congress andExposition (ECCE), Atlanta, USA, 2010.

[12] Silicon Labs, “Any-frequency i2c programmable xo (100 kHzto 250 MHz),” https://www.silabs.com/documents/public/data-sheets/Si514.pdf, 2012, accessed: 2017-11-12.

[13] Analog Devices, “Low power, 12.65mW, 2.3V to 5.5V,programmable waveform generator,” http://www.analog.com/media/en/technical-documentation/data-sheets/AD9833.pdf, 2012, accessed:2017-11-14.

[14] P. Savary, M. Nakaoka, and T. Maruhashi, “A high-frequency resonantinverter using current-vector control scheme and its performance evalu-ations,” IEEE Trans. Ind. Electron., vol. IE-34, no. 2, pp. 247–256, May1987.

[15] R. J. King, “A design procedure for the phase-controlled parallel-loadedresonant inverter,” IEEE Trans. Aerosp. and Electron. Syst., vol. 25,no. 4, pp. 497–507, Jul 1989.

[16] A. K. S. Bhat, “Fixed frequency pwm series-parallel resonant converter,”in Conference Record of the IEEE Industry Applications Society AnnualMeeting, 1989.

[17] K. Oguchi, E. Ikawa, and Y. Tsukiori, “A three-phase sine wave invertersystem using multiple phase-shifted single-phase resonant inverters,” inConference Record of the IEEE Industry Applications Society AnnualMeeting, 1990.

[18] K. Oguchi and E. Ikawa, “A three-phase dual-inverter system with high-frequency links and sinusoidal current outputs,” in Proc. of the 13thIntern. Telecom. Energy Conf. (INTELEC), Kyoto, Japan, 1991.

[19] A. K. S. Bhat, “Fixed-frequency pwm series-parallel resonant converter,”IEEE Trans. Ind. Appl., vol. 28, no. 5, pp. 1002–1009, Sep 1992.

[20] S. N. Vaishnav and H. Krishnaswami, “Single-stage isolated bi-directional converter topology using high frequency ac link for chargingand v2g applications of phev,” in Proc. of the IEEE Vehicle Power andPropulsion Conference (VPPC), Chicago, USA, 2011.

[21] Y. Du and A. K. S. Bhat, “Analysis and design of a high-frequencyisolated dual-tank lcl resonant ac-dc converter,” IEEE Trans. Ind. Appl.,vol. 52, no. 2, pp. 1566–1576, March 2016.

[22] R. L. Steigerwald, “A comparison of half-bridge resonant convertertopologies,” IEEE Trans. Power Electron., vol. 3, no. 2, pp. 174–182,Apr 1988.

[23] R. Erickson and D. Maksimovic, Fundamentals of Power Electronics.Springer US, 2001.

[24] M. Ciobotaru, R. Teodorescu, and F. Blaabjerg, “A new single-phase pllstructure based on second order generalized integrator,” in Proc. of the37th IEEE Power Electron. Spec. Conf. (PESC), Jeju, S. Korea, 2006.

[25] D. Neumayr, D. Bortis, E. Hatipoglu, J. W. Kolar, and G. Deboy, “Novelefficiency-optimal frequency modulation for high power density dc/acconverter systems,” in Proc. of the 3rd IEEE International Future EnergyElectronics Conference (IFEEC), Kaohsiung, Taiwan, 2017.