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PWM (full voltage on and off) through low pass filter, we get smaller voltage!!!!

==============================================Kp -> reduces the rise time of the close lopp system responses. It also reducesthe steady state error (but it doesn't elliminate the steady state error).

Ki -> it elliminates the steady state error for constant or step input (note not ramp, or parabolla). But it makes the transient erresponse slower.

Kd -> it increases the stability of the syste,, reduces the overshoot and improves the transient response.

effect of PID gains on responses:=========================================Kp -> decreases the rise time, increases the overshoot, changes the setlling time by very little and reduces the steady state error.

Ki -> decreases the rise time, increases the overshhot, increases the settling time, eliminates the steady state error.

Kd -> have small chage in rise time, decreases the overshhot, decreases the setlling time, no effect of steady state error.

** effect of one gain is depended on other. So they cant be thought as independent.

controller making procedure:===========================================

1) Obtain an open loop response and determine what needs to be improved.2) add proportional control to improve the rise time.3) Add a derivative control to improve the overshoot.4) Add an integral control to eliminate the steady-state error.5) Adjust each of Kp, Ki, and Kd until you obtain a desired overall response.

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-> higher bandwidth (0 dB crossover of the open-loop) results in a faster rise time.-> higher phase margin reduces the overshoot and improves the system stability.=========================================================

-> root locus is a plot of location off possible closed loop poles with proportional ain k and unity feedback

-> dominent pole has the biggest effect on the performance of any system.

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-> The gain margin is defined as the change in open-loop gain required to make t

he system unstable.

-> The phase margin is defined as the change in open-loop phase shift required to make a closed-loop  system unstable. -> Systems with greater gain margins can withstand greater changes in system parameters before becomingunstable in closed-loop.

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-> The phase margin also measures the system's tolerance to time delay.If there is a time delay greater than 180/Wpc in the loop the system will become unstable in closed-loop.Wpc is the frequency where phase shift is 180 degree.