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Controller Area Network CAN part 1

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Page 1: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Controller Area Network

CANpart 1

Page 2: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

We will talk about:

• General features• CAN messages• Bitwise arbitration• CAN synchronisation

Page 3: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Controller Area Network

CAN General features

Page 4: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN features• Bus-access by message priority

– CSMA/CRCarrier Sense Multiple Access / Collision Resolution

• Bus access conflicts resolved by arbitration– Bit-wise– Non-destructive– Allows for guaranteed latency time

• Message identifier– CAN has no node addresses

Every node receive every message and decides itself whether to use it or not

Page 5: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN features• Extensive ERROR checking

– Five different checks– Every connected node participate

• Data consistency secured– A message is accepted by all nodes or none

• Different Bus Management Methods can be applied for CAN systems, e.g.,– Bit-wise arbitration– Master/Slave– Daisy Chain– TDMA

Page 6: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN features• A Higher Layer Protocol is always

required– CAN is only a low level specification

• The capability of CAN is restricted by the Higher Layer Protocol chosen– Market segment– Real-time requirements– Product Administration requirements– etc

Page 7: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Controller Area Network

CANmessages

Page 8: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN message

Data Frame

CAN Id/Priority

11 or 29 bits 0 - 8 bytes

DLC4bits

Page 9: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN Data Frame Std

1 4 0 - 64 15 1 1 7 311

IdentifierField

Start OfFrame

RTR-bit

Data Field CRCField

CRC Delimiter

1

ACK DelimiterACK Slot

End Of Frame Intermission

min. 2

Inter-framespace

Inter-framespace

DLC

00/11

Bit values

ControlField

r1 r0

1 2

TransmitterReceiver

1

0

Page 10: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

A CAN frame

•Priority and Identification field.•Control field.•Data field.•CRC field.•Acknowledgement field.•Fixed part.

Page 11: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

Priority and/or Identification

Identifier Field•11 bit or 29 bit. 11 bit is shown above•Arbitration is done in this part•This part sets the priority of the message in case of collision•The Remote Transmit Request bit (RTR) is a part of this field•CAN-controllers support this part of the message as an identification by which filtration can be made

Page 12: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Control and Data length field

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

Control Field•Main function Data Length Code DLC•DLC can have the value 0..8 (Values above 8 are interpreted as 8)•Two bits are reserved and used to indicate Extended frames•In Standard frames the reserved bits are fix dominant bits

Page 13: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Data field

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

Data Field•The field can be from zero up to eight byte•It is always full 8 bit bytes•The bytes can have any value•Some CAN controllers can extend ID filtration into the data field

Page 14: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CRC field

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

CRC Field•A Checksum of the bits in the message•The CRC is optimised for this short type of message•The CRC check is only one of the error checks in the CAN communication

Page 15: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Acknowledgement field

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

Acknowledgement Field•It is an acknowledgement of reception, securing at least one receiver has got the message OK•The transmitter sets the ACK bit to 1•Any receiver set the ACK bit to 0 when the message is found OK

Page 16: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Fixed value bits

1 4 0 - 64 15 1 1 7 311

IdentifierField Data Field CRC

Field

1

ACKfield

Inter-framespace

Inter-framespace

DLC

ControlField

1 2

•These bits have a fixed value for all message frames•There is additional rules for the intermission bits

Page 17: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

IdentifierField

Start Of Frame

RTR-bit

CRCField

CRC Delimiter

ACK DelimiterACK Slot

End Of Frame Intermission

min. 2

Inter-framespace

Inter-framespace

DLC

00/11

Bit values

Control Fieldr1 r0

r1 = IDE

2 4 115 1 311 11 1 7

CAN Remote Frame Std

Page 18: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

1 4 0 - 64 15 1 1 7 311

Identifier Field

Start OfFrame RTR

-bit

Data Field CRCField

CRC Delimiter

1

ACK DelimiterACK Slot

End Of Frame

Intermissionmin. 2

Inter-framespace

Inter-framespace

DLC

ControlField

r1 r0

1 2

2 4 115 1 311 11 1 7

Remote compared to data frame, Std

NOTE: DLC in all remote requests must be identical to DLC in corresponding DATA Message!

Page 19: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN Data Frame Ext.

1 11 4 0 - 64 15 1 7 318

Identifier FieldStart OfFrame

RTR-bit

Data Field CRC Field CRC Delimiter

1

ACK DelimiterACK Slot

End Of Frame Intermission

min. 2

Inter-framespace

Inter-framespace

DLC

SubstituteRemoteRequest

IdentifierExtensionBit

00/11

Bit values

Control Fieldr1, r0

2 1 2 1

Page 20: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN Data Frame Ext. and Std

1 4 0 - 6411 1 1

1 4 0 - 64 15 1 1 7 311

IdentifierField

Start OfFrame

RTR-bit

Data Field CRCField

CRC Delimiter

1

ACK DelimiterACK Slot

End Of Frame Intermission

min. 2

Inter-framespace

DLC

ControlField

r1 r0

1 2

18

1

1 2

SubstituteRemoteRequest

IdentifierExtensionBit

Page 21: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Controller Area Network

CAN Arbitration

Page 22: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

0

1

Arbitration Lost

Module 1

Module 2

Bus Line

Bit-wise Arbitration

Page 23: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Bit-wise arbitration

The green node starts transmissonof a recessive bit on the idle bus.

Page 24: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Bit-wise arbitration

The wave from the green node has not yet reached the rednode. To this the bus is still free and the red node startstransmitting a dominant bit.

Termination Termination

Page 25: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Bit-wise arbitration

Now the green node can see that there is a dominant bit onthe bus and that it has lost arbitration. Thus a transmitter has to wait until the wave has reached themost distant node and back (plus internal delays) beforejudging the bus-line level

TerminationTermination

Page 26: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Maximum bit rate is depending on wave propagation delays

•Bus length•Opto couplers•Internal delays•Oscillator accuracy(Often not specified)

Bit-wise arbitration

Page 27: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Arbitration field

1 11 4 0 - 64 15 1 7 318

Identifier FieldStart OfFrame

RTR-bit

Data Field CRC Field CRC Delimiter

1

ACK DelimiterACK Slot

End Of Frame Intermission

min. 2

Inter-framespace

Inter-framespace

DLC

00/11

Bit values

Control Fieldr1, r0

2 1 2 1

TransmitterReceiver

1

0

A Std has higher priority than anExt with the first 11 bits equal

But then a lot of Ext messages areinterlaced before the next Stdappears

CAN Data Frame Ext.

Page 28: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Std Identifier wins over Ext. Identifierwhen the first 11 bits are equal

1 11 4 0 - 64 15 1 7 318 12 1 2 1

Inter-framespace

1 11 4 0 - 64 15 1 7 312 11

Std RTR wins the arbitration here

Std wins the arbitration here

Arbitration field

Start Of Frame

00/11

Bit values But then each Std isinterlaced by 218 Extmessages

Page 29: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Std vs. Ext. priority

1 11 1 1

1 11

IdentifierField

Start OfFrame

RTR-bit

r1 r0

1 2

18

1

SubstituteRemoteRequest

IdentifierExtensionBit

Prio Bit -29 - -19 Bit -18 - -1Hi 0 std

0 00 10 …0 2621431 std1 01 1… …

Low 2047 262143

Page 30: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Controller Area Network

CAN Synchronisation

Page 31: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

BIT TIMINGA bit time is built up by four parts:Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Those parts are built up by a number of time quantasBit Time = Synch_Seg + Prop_Seg + Phase_Seg1 + Phase_Seg2

Often alternatively expressed asTBIT = TSYNC + TSEG1 + TSEG2where •TSYNC = 1•TSEG1 = [2..16]•TSEG2 = [1..8]•TBIT = [4..25]

Page 32: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Sync_Seg 1Prop_Seg 1 - 8 (min)

Phase_Seg 1 1 - 8 (min)

Phase_Seg 2 1 - 8 (min)

Min timequantum(derivedfrom osc.)

1 - 32 (min)

Total 4 - 25 Time quanta (min)

Sample Point

Synch_Seg + Prop_Seg + Phase_Seg1 + Phase_Seg2

Bit Time =

Page 33: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

0 1 1 1 0 0 1 0 0 1

(Manchester Coding) CAN is NRZ which hasEMC advantagescompared with MC

NRZNon Return to Zero

Page 34: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Bit Stuffing0

1

Stuff Bit

Stuff Bit

Five consecutive bits of samepolarity render a stuff bit

6

5 5 5 5 5

10 5

Page 35: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

0

1

29 bits

36 bits

Stuff Bit

Stuff Bit

36/29 = 1.24 !!

Five consecutive bits of samepolarity renders a stuff bit

5 4 4

5 5 5

Bit Stuffing

Page 36: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CAN Data Frame Ext.

Bit stuffing fields

1 11 4 0 - 64 15 1 7 318

Identifier Field

Start OfFrame

RTR-bit

Data Field CRC Field CRC Delimiter

1

ACK DelimiterACK Slot

End Of Frame Intermission

min. 2

Inter-framespace

Inter-framespace

DLC

00/11

Bit values

Control Fieldr1, r0

2 1 2 1

TransmitterReceiver

1

0

Page 37: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Synchronisation

6 10 12

Sync. flank at falling edges

Hardsync

Resync

deadreckoning

Dead reckoning betweensyncs. (Max 29 bits)

2 8

(At end of message)3

Page 38: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Sync_Seg

1 Time quantum

Synchronize the various CAN nodeson the bus. An edge is expected withinthis segment.

Page 39: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Prop_Seg

1 - 8 Time quanta (min)

Compensate for physical delaytimes on the bus and nodeinterfaces

Page 40: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Phase_Seg1 & 2

Phase_Seg 1Phase_Seg 2

Phase_Seg1 1 - 8 Time quanta (min)Phase_Seg2 = Phase_Seg1 (or information

processing time)

Compensate for phase errors

Page 41: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

ResynchronisationSynch flank detected after samplingpoint (prematurely)

e = 0

e neg, shortenPhase_Seg2

e < 0e = Phase error

Bus level expected timefor synch flank

Resynchronized timer

Page 42: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Resynchronisation

e > 0e = 0

e pos, lengthenPhase_Seg2

Expected sample pointe = Phase error

expected timefor synch flank

Bus level

Resynchronizedtimer

Synch flank detected before samplingpoint (later than expected)

Page 43: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Sync Jump Width

SJW = Max phase correction

Max 4(min),Phase seg 2

Maximum synchcompensationallowed in one step

Page 44: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

Oscillator tolerance range

Conditions:•df min(Phase_Seg1, Phase_Seg2)/[2(13·TBIT - Phase_Seg2)]•df SJW/(20TBIT)•Max diff. between two osc. is 2dffnom

(1-df)·fnom fosc (1+df)·fnom

Page 45: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

CALCULATIONS•Tscl = Tclk * BRP * 2 = Tclk*(BRP + 1)*2

•BRP the value in CAN-controller•(clk = 16 MHz and BRP = 0: Tclk = 62.5ns and Tscl =125 ns )

•Tseg1 = Tscl * (TSEG1) = Tscl * (TSEG1 + 1)•TSEG1 the value in CAN-controller

•Tseg2 = Tscl * (TSEG2) = Tscl * (TSEG2 + 1)•TSEG2 the value in CAN-controller

•Tsjw = Tscl * (TSJW1) = Tscl * (TSJW + 1)•TSJW the value in CAN-controller

•SJW = [1..4]

Page 46: Controller Area Network CAN - Kvaser · Controller Area Network CAN Synchronisation. BIT TIMING A bit time is built up by four parts: Synch_Seg, Prop_Seg, Phase_Seg1 and Phase_Seg2

RULES

•TProp_Seg > (All delays) * 2• TSeg2 >= 1 Tscl, CAN controller may demand minimum 2 Tscl.• TSeg2 >= Tsjw• TSeg1 >= Tsjw + TProp

Suggestion: Keep Phase segment Tsjw+1