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COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

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Page 1: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

COP 5611 Operating Systems Spring 2010

Dan C. Marinescu

Office: HEC 439 B

Office hours: M-Wd 2:00-3:00 PM

Page 2: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

22222

Lecture 6

Last time: Virtualization Today:

Thread coordination Scheduling

Next Time: Multi-level memories I/O bottleneck

Page 3: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Evolution of ideas regarding communication among threads using a bounded buffer

1. Use locks does not address the busy waiting problem

2. YIELD based on voluntary release of the processor by individual threads

3. Use WAIT (for an event ) and NOTIFY (when the event occurs) primitives .

4. Use AWAIT (for an event) and ADVANCE (when the event occurs)

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Page 4: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Primitives for thread sequence coordination

YIELD requires the thread to periodically check if a condition has occurred.

Basic idea use events and construct two before-or-after actions WAIT(event_name) issued by the thread which can continue only after the

occurrence of the event event_name. NOTIFY(event_name) search the thread_table to find a thread waiting for the

occurrence of the event event_name.

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Page 5: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

shared structure buffer message instance message[N] integer in initially 0 integer out initially 0 lock instance buffer_lock initially UNLOCKED event instance room event instance notempty

procedure SEND (buffer reference p, message instance msg) ACQUIRE (p_buffer_lock) while p.in – p.out = N do /* if buffer full wait RELEASE (p_buffer_lock) WAIT (p.room) ACQUIRE (p_buffer_lock) p.message [p.in modulo N] ß msg /* insert message into buffer cell if p.in= p.out then NOTIFY(p.notempty) p.in ß p.in + 1 /* increment pointer to next free cell RELEASE (p_buffer_lock)

procedure RECEIVE (buffer reference p) ACQUIRE (p_buffer_lock) while p.in = p.out do /* if buffer empty wait for message RELEASE (p_buffer_lock) WAIT (p.notempty) ACQUIRE (p_buffer_lock) msgß p.message [p.in modulo N] /* copy message from buffer cell if (p.in- p.out=N) then NOTIFY(p.room) p.out ß p.out + 1 /* increment pointer to next message RELEASE (p_buffer_lock) return msg

Page 6: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

This solution does not work

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The NOTIFY should always be sent after the WAIT. If the sender and the receiver run on two different processor there could be a race condition for the notempty event. The NOTIFY could be sent before the WAIT.

Tension between modularity and locks Several possible solutions: AWAIT/ADVANCE, semaphores, etc

Page 7: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

AWAIT - ADVANCE solution

A new state, WAITING and two before-or-after actions that take a RUNNING thread into the WAITING state and back to RUNNABLE state.

eventcount variables with an integer value shared between threads and the thread manager; they are like events but have a value.

A thread in the WAITING state waits for a particular value of the eventcount

AWAIT(eventcount,value) If eventcount >value the control is returned to the thread calling AWAIT and this

thread will continue execution If eventcount ≤value the state of the thread calling AWAIT is changed to WAITING

and the thread is suspended.

ADVANCE(eventcount) increments the eventcount by one then searches the thread_table for threads waiting for this eventcount if it finds a thread and the eventcount exceeds the value the thread is waiting for then

the state of the thread is changed to RUNNABLE

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Page 8: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Solution for a single sender and multiple receivers

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Page 9: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Supporting multiple senders: the sequencer

Sequencer shared variable supporting thread sequence coordination -it allows threads to be ordered and is manipulated using two before-or-after actions.

TICKET(sequencer) returns a negative value which increases by one at each call. Two concurrent threads calling TICKET on the same sequencer will receive different values based upon the timing of the call, the one calling first will receive a smaller value.

READ(sequencer) returns the current value of the sequencer

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Page 10: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Multiple sender solution; only the SEND must be modified

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Page 11: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

shared structure thread_table[7] integer topstack integer state eventcount reference event long integer value

shared lock instance thread_table_lock

structure everntcount long integer count

procedure AWAIT(eventcount reference event, value) ACQUIRE (thread_table_lock) idß GET_THREAD_ID() thread_table[id].event ß event thread_table[id].value ß value if event_count <= value then thread_table[id].state ß WAITING ENTER_PROCESSOR_LAYER(id,CPUID) RELEASE(thread_table_lock)

procedure ADVANCE(eventcount reference event) ACQUIRE (thread_table_lock) eventcount ß eventcount +1 for i from 0 until 7 do if thread_table[i].state =WAITING and thread_table[i].event =event and event.count > thread_table[i].value then thread_table[i].state ß RUNNABLE RELEASE(thread_table_lock)

Page 12: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

structure sequencer long integer ticket

procedure TICKET(sequence reference s) ACQUIRE (thread_table_lock) tß s.ticket s.ticket ß s.ticket + 1 RELEASE(thread_table_lock)return t

procedure READ(eventcount reference event) ACQUIRE (thread_table_lock) e ß event.count RELEASE(thread_table_lock)return

Page 13: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

time

Operations of Thread A

Buffer is empty

in=out=0

on=out=0

Fill entry 0 at time t1 with item b

0

Operations of Thread B

Fill entry 0 at time t2with item a

Increment pointer at time t3

inß 1

Increment pointer at time t4

inß 2

Two senders execute the code concurrently

Processor 1 runs thread A

Processor 2 runs thread B

Memory contains shared dataBuffer

Inout

Processor-memory bus

Item b is overwritten, it is lost

Page 14: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

More about thread creation and termination What if want to create/terminate threads dynamically we have to:

Allow a tread to self-destroy and clean-up -> EXIT_THREAD Allow a thread to terminate another thread of the same application DESTRY_THREAD

What if no thread is able to run create a dummy thread for each processor called a processor_thread which is scheduled to run

when no other thread is available the processor_thread runs in the thread layer the SCHEDULER runs in the processor layer The procedure followed when a kernel starts

----------------------------------------------------------------------- Procedure RUN_PROCESSORS()

for each processor do

allocate stack and setup processor thread /*allocation of the stack done at processor layer

shutdown FALSE

SCHEDULER()

deallocate processor_thread stack /*deallocation of the stack done at processor layer

halt processor

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Page 15: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Switching threads with dynamic thread creation

Switching from one user thread to another requires two steps Switch from the thread releasing the processor to the processor thread Switch from the processor thread to the new thread which is going to have the

control of the processor The last step requires the SCHEDULER to circle through the thread_table until a

thread ready to run is found

The boundary between user layer threads and processor layer thread is crossed twice

Example: switch from thread 1 to thread 6 using YIELD ENTER_PROCESSOR_LAYER EXIT_PROCESSOR_LAYER

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Page 16: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

shared structure processor_table(2) integer thread_idshared structure thread_table(7) integer topstack integer stateshared lock instance thread_table_lock

procedure GET_THREAD_ID() return processor_table(CPUID).thread_id

procedure YIELD() ACQUIRE (thread_table_lock) ENTER_PROCESSOR_LAYER(GET_THREAD_ID()) RELEASE(thread_table_lock)return

procedure ENTER_PROCESSOR_LAYER(this_thread) thread_table(this_thread).state ß RUNNABLE thread_table(this_thread).topstackß SP SCHEDULER()return

procedure SCHEDULER() jß _GET_THREAD_ID() do jß j+1 (mod 7) while thread_table(j).state¬= RUNNABLE thread_table(j).state ß RUNNING processor_table(CPUID).thread_idß j EXIT_PROCESSOR_LAYER(j) return

procedure EXIT_PROCESSOR_LAYER(new) SP,-- thread_table(new).topstack return

Page 17: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

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Page 18: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Lecture 19 18

Page 19: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Thread scheduling policies

Non-preemptive scheduling a running thread releases the processor at its own will. Not very likely to work in a greedy environment.

Cooperative scheduling a thread calls YIEALD periodically Preemptive scheduling a thread is allowed to run for a time slot. It is

enforced by the thread manager working in concert with the interrupt handler. The interrupt handler should invoke the thread exception handler. What if the interrupt handler running at the processor layer invokes directly the

thread? Imagine the following sequence: Thread A acquires the thread_table_lock An interrupt occurs The YIELD call in the interrupt handler will attempt to acquire the thread_table_lock

Solution: the processor is shared between two threads: The processor thread The interrupt handler thread

Recall that threads have their individual address spaces so the scheduler when allocating the processor to thread must also load the page map table of the thread into the page map table register of the processor

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Page 20: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Polling and interrupts

Polling periodically checking the status of a subsystem. How often should the polling be done?

Too frequently large overhead After a large time interval the system will appear non-responsive

Interrupts could be implemented in hardware as polling before executing the next

instruction the processor checks an “interrupt” bit implemented as a flip-flop If the bit is ON invoke the interrupt handler instead of executing the next

instruction Multiple types of interrupts multiple “interrupts” bits checked based upon the

priority of the interrupt. Some architectures allow the interrupts to occur durin the execution of an

instruction The interrupt handler should be short and very carefully written.

Interrupts of lower priority could be masked.

Page 21: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Virtual machines

First commercial product IBM VM 370 originally developed as CP-67 Advantages:

One could run multiple guest operating systems on the same machine An error in one guest operating system does not bring the machine down An ideal environment for developing operating systems

VM Monitor

Windows GNU/Linux

Kernel Mode

User Mode

FirefoxInternetExplorer

X WindowsWord

Page 22: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Thread Layer

Processor Layer

Thread 1 Thread 2 Thread 7

Processor A Processor B

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID

SP

PC

PMAP

Page 23: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Virtual Machine Layer

Processor Layer

Guest OS1

Processor A Processor B

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID

SP

PC

PMAP

ID.1

SP

PC

PMAP

Guest OS2 Guest OSn

ID.n

SP

PC

PMAP

Thread of OS1

Thread Layer

Thread of OSn

Page 24: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

Performance metrics

Wide range, sometimes correlated, other times with contradictory goals : Throughput, utilization, waiting time, fairness Latency (time in system) Capacity Reliability as a ultimate measure of performance

Some measures of performance reflect physical limitations: capacity, bandwidth (CPU, memory, communication channel), communication latency.

Often measures of performance reflect system organization and policies such as scheduling priorities.

Resource sharing is an enduring problem; recall that one of the means for virtualization is multiplexing physical resources. The workload can be characterized statistically Queuing Theory can be used for analytical performance evaluation.

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Page 25: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

System design for performance

When you have a clear idea of the design, simulate the system before actually implementing it.

Identify the bottlenecks. Identify those bottlenecks likely to be removed naturally by the technologies expected

to be embedded in your system. Keep in mind that removing one bottleneck exposes the next.

Concurrency helps a lot both in hardware and in software. in hardware implies multiple execution units

Pipelining multiple instructions are executed concurrently Multiple exaction units in a processor: integer, floating point, pixels Graphics Processors – geometric engines. Multi-processor system Multi-core processors Paradigm: SIMD (Single instruction multiple data), MIMD (Multiple Instructions

Multiple Data.

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Page 26: COP 5611 Operating Systems Spring 2010 Dan C. Marinescu Office: HEC 439 B Office hours: M-Wd 2:00-3:00 PM

System design for performance (cont’d)

in software complicates writing and debugging programs. SPMD (Same Program Multiple data) paradigm

Design a well balanced system: The bandwidth of individual sub-systems should be as close as poosible The execution time of pipeline stages as close as poosible

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