co_qb.docx

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COMPUTER ORGANIZATION

UNIT -1

1. Derive the circuits for a 3-bit parity generator and 4-bit parity checker using an even-parity bit.2. With a neat diagram and example of an operation, explain clearly how the basicoperations are performed in a computer in terms of the processor and memory.

3. Explain about the different bus structures.4. Discuss the different factors which effect the performance of a system.5. Define the following terms:

a) Computer Organizationb) Computer Designc) Computer Architectured) Multiprogramminge) Multiprocessorf) Multicomputer

6. Briefly explain about the different functional units of a computer.7. Discuss about the different types of computers.8. Perform the subtraction with the following unsigned binary numbers by taking 2s

complement of the subtrahend

a) 1101010000b) 110101101c) 100110000d) 1010100 - 1010100

9. Perform the arithmetic operations in binary using signed 2s complement representationfor negative numbers.

a) (+42) + (-13)b) (-42)(-13)c) (+70) + (+80)d) (-70) + (-80)

10.A 36-bit floating-point binary number has eight bits plus sign for exponent and 26 bitsplus sign for the mantissa. The mantissa is a normalized fraction. Numbers in the

mantissa and exponent are in signed-magnitude representation. What are the largest and

smallest positive quantities that can be represented, excluding zero?11.Convert the hexadecimal number F3A7C2 to binary and octal.12.Represent the number (+46.5)10 as a floating point binary number with 24 bits. The

normalized mantissa has 16-bits and the exponent has 8 bits number.

13.Explain about the signed magnitude and 2s compliment representations used for thefixed point numbers. Which among the above is most preferred and why?

14.Explain the following terms:i) Clock rate ii) Instruction set iii) Processor clock iv) Pipelining


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15.Obtain the 1's and 2's complement of the following:i. 10101110

ii. 10000001iii. 10000000

iv. 10101010.

16.List the functions need to the performed by system software?

17.Show the bit configuration of a 24-bit register when its content represents the decimalequivalent of 295

a) In binaryb) In BCDc) In ASCII using 8 bits with even parity

18.Represent decimal number 8620 ina) BCDb) Excess-3 codec) 2421 coded) As a binary number

19.Obtaina) Gray code numbers for 16 through 31b) Excess-3 code for decimals 10 to 19

20.Convert the following bases to decimala) (101110)2b) (4310)5c) (50)7d) (198)12

21.Convert the decimal numbers to the bases indicateda) 175 to binaryb) 7562 to octalc) 1938 to hexadecimal


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UNIT II

1. a) Write a note on Stack operations.b) List some data transfer instructions and explain with examples.

2. Explain briefly about arithmetic logic shift unit with the help of functional table.3. a) Let register A holds the 8-bit binary 11011001. Determine the B operand and the logic

micro operation to be performed in order to change the value in A to:

i. 01101101

ii. 11111101

b) What is a stack? Explain push and pop instructions using stack with examples.

4. a)With the help of neat block diagram explain the hardware that implementations thefollowing register transfer language:yT2: R2R1, R1R2

b) What is a register stack? Explain with relevant illustrations and examples.

5. Explain about the different addressing modes: Implied/implicit mode, immediate mode,register mode, register indirect mode, direct addressing mode, indirect addressing mode,relative address mode, auto-increment or auto-decrement mode, indexed address mode,

base register addressing mode.

6. a) Write about memory stack and explain with relevant illustrations and examples.b) Represent the following conditional control statement by two register transfer

statements and control functions:

If (P=1) then (R1 R2) else if (Q=1) then (R1 R3)

7. a) Define a micro-operation. Explain clearly at least four logic micro-operations withexamples

b) Define addressing mode. What is the purpose of addressing modes and explain

different types of addressing modes.8. Write a short notes on

a) Data transfer instructions

b) Data Manipulation instructions.

9. a) What are the applications of logical micro-operations.10.a) Explain the implementation of common bus using tri-state buffers.

b) Differentiate between logical shift and arithmetic shift with an example.


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UNIT III

1. Explain the variety of techniques available for sequencing of micro instructions based onthe format of address information in the micro instruction with a neat diagram.

2. a) Explain about control memory in detail.b) Compare and contrast hardwired and micro-programmed control unit.

3. a) Define the following:i) Micro-instructionii) Micro-operationiii) Micro-programiv) Control word

b) Explain about the design of control unit.4. a) With a neat diagram explain the following with respect to address sequencing

i) Conditional branchingii) Mapping of instructioniii) Subroutinesb) Explain about micro-instruction format with example.

5. a) Discuss the advantages and disadvantages of horizontal and vertical micro-codedsystems.

b) Explain the following terms:i) Mapping process

ii) Control memory

iii) Control wordiv) Control Address register

6. a) What are the major design considerations in micro-instruction sequencing? Explain.b) Discuss micro-instruction sequencing techniques, especially variable format address

micro-instruction.7. Explain micro-program control organization with necessary diagrams.


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UNIT IV

1. Draw and explain in detail the hardware implementation of signed-magnitude additionand subtraction. Explain the decimal multiplication algorithm with suitable example.

2. Derive an algorithm in flowchart for the non-restoring method of fixed-point binary

division.3. Design an array multiplier that multiplies two 4-bit numbers using binary adders and

AND gates.

4. Multiply 32 by 18 using Booth algorithm and explain step by step process.5. Divide -145 by 3 in binary 2s complement notation, using 12-bit words. Explain the

division process with necessary algorithm

6. Explain the decimal division algorithm with a suitable example. Explain the binarynumbers multiplication process using booths algorithm in a step-by-step manner with asuitable example. Assume 5-bit registers that hold signed numbers.

7. Draw and explain in detail the hardware implementation of signed-2s complementaddition and subtraction. Describe 4-bit by 3-bit array multiplier.

8. Derive an algorithm for evaluating the square root of a binary fixed-point number.9. Discuss about BCD addition and subtraction operation with suitable block diagrams.


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