cpre 583 reconfigurable computing lecture 3: wed 9/1/2010 (reconfigurable computing hardware)
DESCRIPTION
CPRE 583 Reconfigurable Computing Lecture 3: Wed 9/1/2010 (Reconfigurable Computing Hardware). Instructor: Dr. Phillip Jones ([email protected]) Reconfigurable Computing Laboratory Iowa State University Ames, Iowa, USA. http://class.ece.iastate.edu/cpre583/. Announcements/Reminders. - PowerPoint PPT PresentationTRANSCRIPT
1 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
CPRE 583Reconfigurable Computing
Lecture 3: Wed 9/1/2010(Reconfigurable Computing Hardware)
Instructor: Dr. Phillip Jones([email protected])
Reconfigurable Computing LaboratoryIowa State University
Ames, Iowa, USA
http://class.ece.iastate.edu/cpre583/
2 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• Send me top 3 choices for topic for mini literary survey– PowerPoint tree due: Fri 9/17 by class, so try to have to
me by 9/16 night. My current plan is to summarize some of the classes findings during class.
– Final 5-10 page write up on your tree due: Fri 9/24 midnight.
Announcements/Reminders
3 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• Logic
• Interconnect/Routing
• Optimized resources– Adders, Multipliers– Memory– System-on-chip building blocks
• Example Commercial FPGA structure
Overview
4 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• Basic understanding of the major components that make up an FPGA device.
What you should learn
5 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Basic FPGA Architectural Components
• FPGA: Field Programmable Gate Array• Sea of general purpose logic gates
CLB CLB CLB CLB
CLB CLB CLB CLB
CLB CLB CLB CLB
CLB CLB CLB CLB
Configurable Logic Block(CLB)
6 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
00000001
11101111
ABCD Z
BCD
A
00000001
11101111
ABCD Z00
01
ANDZA
BCD
00000001
11101111
ABCD Z01
11
ORZA
BCD
X000X001X010
X101X110X111
ABCD Z010
011
B
2:1Mux
CD
Z10
7 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to OR 32-bits
Draw
32
1
8 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to OR 32-bits
Draw
32
1
4LUT
4LUT
4LUT
4 LUT4 LUT4 LUT4 LUT
4 LUT4 LUT4 LUT4 LUT
9 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to AND 2-bits with the 32-bit OR
Draw
32
1
4LUT
4LUT
4LUT
4 LUT4 LUT4 LUT4 LUT
4 LUT4 LUT4 LUT4 LUT
10 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to AND 2-bits with the 32-bit OR
Draw
32
1
4LUT
4LUT
4LUT
4 LUT4 LUT4 LUT4 LUT
4 LUT4 LUT4 LUT4 LUT
11 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to AND 2-bits with the 32-bit OR
Draw
32
1
4LUT
4LUT
4LUT
4 LUT4 LUT4 LUT4 LUT
4 LUT4 LUT4 LUT4 LUT
0000000100100011010001010110011110001001101010111100110111101111
Write out the Truth tableABCD Z
12 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to AND 2-bits with the 32-bit OR
Draw
32
1
4LUT
4LUT
4LUT
4 LUT4 LUT4 LUT4 LUT
4 LUT4 LUT4 LUT4 LUT
0000000100100011010001010110011110001001101010111100110111101111
000000
000000
Write out the Truth tableABCD Z
13 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many 4-LUTs needed to AND 2-bits with the 32-bit OR
Draw
32
1
4LUT
4LUT
4LUT
4 LUT4 LUT4 LUT4 LUT
4 LUT4 LUT4 LUT4 LUT
0000000100100011010001010110011110001001101010111100110111101111
0000000100000011
Write out the Truth tableABCD Z
14 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How could one build a 4-LUT?
000
001
1x16 Memory
16:1Mux
4ABCD
Z
15 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many different 4 input functions can a 4-LUT implement?
000
001
1x16 Memory
16:1Mux
4ABCD
Z
216 = 65536
16 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many different N input functions can a N-LUT implement?
000
001
1x16 Memory
16:1Mux
4ABCD
Z
17 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many different N input functions can a N-LUT implement?
000
001
1x16 Memory
16:1Mux
NABCD
Z
18 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - LUT
4-LUT
Z LUT = Look up Table
BCD
A
How many different N input functions can a N-LUT implement?
000
001
1x2N Memory
16:1Mux
NABCD
Z
216 =224=65536
N = 4
= 22N
19 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUTMicroprocessor
20 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUTMicroprocessor
4
3
3AB
op3
21 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUTMicroprocessor
4
3
3AB
op3
4
3
3AB
op3
4
3
3AB
op3
22 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUTMicroprocessor
4
3
3AB
op
3
4
3
3AB
op
3
3
3
3AB
op
23 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUTMicroprocessor
4
3
3AB
op
3
4
3
3AB
op
3
4
3
3AB
op
3
24 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUT
Bit logic and constants
25 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUT
Bit logic and constants
(A and “1100”) or (B or “1000”)
26 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUT
Bit logic and constants
(A and “1100”) or (B or “1000”)
A
B
27 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Granularity of ComputationTrade-offs associated with LUT size
Example: 2-LUT (4=2x2 bits) vs. 10-LUT (1024=32x32 bits)1024-bits
1024-bits
2-LUT
10-LUT
Bit logic and constants
(A and “1100”) or (B or “1000”)
A AND
OR
OR
1
0
B
4
4
It’s much worse, each 10-LUT only has one output
Area that wasrequired using
2-LUTS
28 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• LUTs are fine for implementing any arbitrary combinational logic (output is ONLY a function of its inputs) function. But what about sequential logic (output is a function of input AND previous state information)?
Computational Fabric - DFF
4-LUT
ZBCD
A
Need Memory!!
29 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - DFF
4-LUT
Z(t)BCD
A
DFF
Z(t+1)
1/0
0/0 1 11 110 1101
1/0 0/0
1/1
0/0Start 1/0
Input/output
Detect the pattern “1101”
DFF = D Flip Flop
30 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Computational Fabric - DFF
4-LUT
Z(t)BCD
A
DFF
Z(t+1)
Increase circuit performance (pipelining)
4-LUTBCD
A
DFF4-LUT
DFF
4-LUT
DFF
4-LUT
DFF
4 LUT delays per output
4-LUTBCD
A
DFF4-LUT
DFF
4-LUT
DFF
4-LUT
DFF
1 DFF delay per output
DFF = D Flip Flop
31 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Need a mechanism to move results of computation around.
Communication: Interconnect & Routing
CLB
CLB
CLB
CLB
CLB
CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
32 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Need a mechanism to move results of computation around.
Communication: Interconnect & Routing
Nearest Neighbor:
CLB
CLB
CLB
CLB
CLB
CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
33 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Need a mechanism to move results of computation around.
Communication: Interconnect & Routing
CLB
Nearest Neighbor:
Segmented:
CLB
CLB
CLB
CLB
CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
34 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Need a mechanism to move results of computation around.
Communication: Interconnect & Routing
Nearest Neighbor:
Segmented:
Hierarchical:
CLB
CLB
CLB
CLB
CLB
CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
CLB CLB CLB CLB CLB
35 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
LUTs + DFFs can implement any arbitrary digital logic. But not optimally (ASICs give make much better use of silicon area for Power, Speed, routing resources)• Arithmetic
– Add, Multiply• On chip memory• System on chip building blocks
– Processor, PCI-express, Gigabit Ethernet, ADC, etc.
Optimized Resources: Dedicated Logic
36 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Optimized Resources: Dedicated Logic
Carry Look Aheadc4
Carry in
Carry out
6-LUT
6-LUT
6-LUT
A3
B3
A2
B2
A1
B1
Sum 3
Sum 2
Sum 1
G1
P1
Sum1
CLB P2
Carry2 G2
CLB Sum2
A1
B1
A1
B1
A1B1
Carry1
Carry1
Carry1
A2 B2
Fast AdditionTwo output LUT
generate propagatelogic
Dedicated routingresources
37 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Optimized Resources: Dedicated LogicEmbedded Memory
8
12
96 bits, 300 MHz
38 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Optimized Resources: Dedicated Logic
Dedicated memory
block
Embedded Memory8
12
18 Kbits, 550 MHz
39 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Optimized Resources: Dedicated LogicMultiplication
Type # LUTs Latency SpeedLUT ~400 5 clks 380 MHz
Dedicated 18x18 Multiplier 0 3 clks 450 MHz
Virtex-5 (6-LUTs)
18x18 multiply
Very rough estimate of Silicon area comparison (assuming SX95 andLX110 have about the same die size)
6-LUT 6-LUT
6-LUT 6-LUT
18x18Multiplier
In other word you can replace one LUT based 18x18 multiplier With 100 dedicated 18x18 Multipliers!!!
40 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Optimized Resources: Dedicated LogicProcessor
PowerPC hard-core MicroBlaze soft-core
• 500 MHz•Super scalor•Highspeed 2x5 switch fabric
• 250 MHz• Simple scalar
41 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Optimized Resources: Dedicated LogicSystem on Chip
EthernetMAC
RAM
MotorPIDController
SensorAD
C
Sensor
DataBuffer
Dedicated LogicReconfigurable Logic
Matrix MultiplierCoprocessor
Also see Actel Fusion:http://www.actel.com/products/fusion/default.aspx
42 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Xilinx CLB Architecture• Virtex 5 FPGA User Guide
43 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
Questions/Comments/Concerns
44 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• N-Lut, 3,4…6,…8-LUT– AND, XOR, NOT– Exercises
• How many 4-LUTs to OR 32 bits (draw)• How many 4-LUTs to AND 2 bits with the OR of
these 32 bits (draw)• Draw the truth table for the 4-LUT that gives the final
output– How could one implement a LUT (Memory + MUX)– How many ways can a 4-LUT be programmed– How many ways can a N-LUT be programmed
• Granularity trade-off: Functionality vs. propagation delay (2-LUT -> CPU), bit-level vs. datapath
Computational Fabric - LUT
45 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• Enable building circuits that can store information (sequential circuits, state machines)
• Enables pipelining to increase operating frequency/ throughput
Computational Fabric - DFF
46 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• Need a mechanism to move the results of a LUT to other LUTs.
• Island stale (Array of CB)– Nearest neighbor (paper on reconfigure arch that uses
this)• Not scalable (large delays, and uses logic elements for
routing?)– Segmented (different length for latency trade-off)
• Multi hop scales < O(N)?• Avoid using logic
– Hierarchical (good for apps with lots of local communication and little remote communication)
• Typical an FPGA silicon area will be 10% logic and 90% interconnect!!
Communication: Interconnect & Routing
47 - CPRE 583 (Reconfigurable Computing): Reconfigurable Computing Hardware Iowa State University (Ames)
• LUTs + DFFs can implement any arbitrary digital logic. But not optimally (ASICs give make much better use of silicon area for Power, Speed, routing resources)
• Arithmetic– Add, Mult
• On chip memory• System on chip building blocks
– Processor, PCI-express, Gigbit Ethernet, A/D
Optimized Resources: Hard Cores