cs533 concepts of operating systems class 14

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CS533 Concepts of Operating Systems Class 14 Extensible Virtual Memory Management

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CS533 Concepts of Operating Systems Class 14. Extensible Virtual Memory Management. Questions. What is an inverted page table? Why are they good for large sparse address spaces? - PowerPoint PPT Presentation

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Page 1: CS533 Concepts of Operating Systems Class 14

CS533 Concepts of Operating Systems

Class 14

Extensible Virtual Memory Management

Page 2: CS533 Concepts of Operating Systems Class 14

CS533 - Concepts of Operating Systems 2

Questions

What is an inverted page table?o Why are they good for large sparse address spaces?

How are address maps, memory allocation queues, memory object lists, memory objects, resident page tables, and pmap used to

o Handle a page fault?o Page out a page?o Allocate memoryo Deallocate memory

Page 3: CS533 Concepts of Operating Systems Class 14

CS533 - Concepts of Operating Systems 3

Questions

Why does Mach distinguish between current and maximum protection for pages?

Why are shadow objects and sharing maps needed?

o How would task A share a page copy-on-write with task B and read-write with task C?

o Why might you end up with long chains of shadow objects?

o Why is this a problem?o How could you optimize them?

Page 4: CS533 Concepts of Operating Systems Class 14

CS533 - Concepts of Operating Systems 4

Questions

How can Mach support lazy modification of pmap?

Why don’t inverted page tables support aliasing well?

What three strategies can Mach use to maintain TLB consistency on multiprocessors that do not support inter-CPU TLB flush operations?

o Which one reminds you of RCU and why?

Page 5: CS533 Concepts of Operating Systems Class 14

CS533 - Concepts of Operating Systems 5

Questions

Why push virtual memory fault handling to user level?

o What kind of user-level instructions can it replace?o Is it always more efficient to use VM faults than user-

level interpretation?o What are the performance trade-offs?

Can VM fault handling be used to implement synchronization?

o i.e., instead of locks? If so, how?

Page 6: CS533 Concepts of Operating Systems Class 14

CS533 - Concepts of Operating Systems 6

Questions

Why are these technique more difficult to use on modern CPUs with deep pipelines, out of order instructions and weak memory consistency?

Why do hardware details such as physically vs virtually indexed caches affect aliasing costs?

Why do OS details such as inverted page tables affect aliasing costs?

Page 7: CS533 Concepts of Operating Systems Class 14

CS533 - Concepts of Operating Systems 7

Reminder

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