csc upgrade
DESCRIPTION
CSC Upgrade. CMS Endcap Region. CSC Upgrade. Scope Original design unfinished – ME4/2 not built 72(67) ME4/2 chambers to complete system Increase redundancy of system – 3 year run without access to do repairs Efficient triggering at high luminosities - PowerPoint PPT PresentationTRANSCRIPT
CSC Upgrade
04/22/23 1Petr Levchenko NEC 2011, Varna
CMS Endcap Region
CSC Upgrade
Scope Original design unfinished – ME4/2 not built 72(67) ME4/2 chambers to complete system
Increase redundancy of system – 3 year run without access to do repairs
Efficient triggering at high luminosities New digital CFEB boards for ME1/1 (part of M&O)
Increased capacity for data rate Ungang the ME1/1 strips – 7 CFEBs per chamber instead of 5 72 New Datamother (DMB) boards
Replace of 72 ME1/1 Trigger Mother Boards (M&O) Improve triggering for = 2.1 to 2.4
04/22/23 3Petr Levchenko NEC 2011, Varna
ME1/1 Upgrade Overview ME1/1 Electronics replacement is designed to
Eliminate ME1/1a strip ganging Provide deadtimeless readout (including at SLHC rates) Improve triggering for ||>2.1 Liberate CFEBs for ME4/2
Major components New Digital Cathode Front End Boards (DCFEBs), 7/ME11 chamber New Trigger Mother Board (TMB) Mezzanine card New Optical Data Motherboard (ODMB) Optical transmission of signals from DFEB to ODMB and TMB New Low Voltage Distribution Boards (LVDB) and Low Voltage
Mother Boards (LVMB)
04/22/23 4Petr Levchenko NEC 2011, Varna
Strip Ganging in ME1/1a
66 77
Channel 16
…ElectronicsChannel 1
… …
Strips: 1 16 17 32 33 48
…
48 strips of ME1/1a are ganged 3:1 into 16 readout channels: 1+17+33 strips into the 1st channel 2+18+34 strips into the 2nd channel etcThis feature leads to triple ambiguity (ghost segments) and compromises trigger efficiency at high ratesSolution: use of 3 CFEB boards instead of one for ME1/1a
04/22/23 5Petr Levchenko NEC 2011, Varna
Overview of CSC readout
Trigger Motherboard
● Need to implement more complex algorithms to increase trigger stub finding efficiency for high eta 2.1 < I η I < 2.4 with unganged ME1/1a● Compatibility with seven new DCFEBs which provide comparator outputs for the CLCT processorNew components of TMB Mezzanine => extra optical transceivers, EPROM are the platform for radiation tests of these components at the Texas A&M cyclotron (60 MeV protons)04/22/23 7Petr Levchenko NEC 2011, Varna
TMB Mezzanine prototype
DAQ Motherboard
● Replace 5 copper cables to CFEB with 7 optical links to DCFEB● Developing radiation tolerant FF-EMU ASIC (IBM CMOS 130 nm) for the integrated distribution of TTC signals and for the data readout ● Implement all FIFO buffers inside the Virtex-6 FPGA● Custom backplane connections remain unchanged
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Present CFEB
04/22/23 9Petr Levchenko NEC 2011, Varna
Present Cathode Front-End Board
● 4..5 CFEBs per chamber● 6 planes x 16 strips = 96 strips per CFEB● 96 switch capacitors per channel, or 96 x 50 ns = 4.8 us
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New DCFEB
04/22/23 11Petr Levchenko NEC 2011, Varna
DCFEB Prototype
● Same size as old CFEB board● Same input connections and 6 BUCKEYE amplifier-shaper ASICs● 12 Texas Instruments ADS5281 ADC (8-channel, 12-bit, 50 MSPS, serial LVDS output) ● 4 options for preamp/ADC interface to evaluate ● 2 legacy skewclear connectors compatible with old TMB and DMB● 3.2Gbps optical links to new TMB and new DMB● Xilinx XC6VLX130T-FFG1156 FPGA (~$1,200)● 20-layer PCB
04/22/23 12Petr Levchenko NEC 2011, Varna
DCFEB R&D prototype Two cards received in mid-
March Fab: Compunetics assembly: Dynalab
Prototype tests at OSU: many initial problems
(odd/even pedestal differences, some FADC’s not working, PROM not working, bad voltage regulators, but all working now
analog part tested and input coupling scheme decided
One board currently at CERN for testing with real CSC chamber in Bat 904
(see following slides from Stan Durkin)
04/22/23 13Petr Levchenko NEC 2011, Varna
Channel
AD
C c
ount
s
Channel
RM
S(A
DC
cou
nts)
CFEB 1DCFEB
DCFEB Pedestals – Typical Chip DCFEB and CFEB1 Noise
DCFEB Prototype Quieter than Old CFEBNo SCA so noise reduces by 1.3 ADC counts in quadrature
Stan Durkin
DCFEB Prototype Channel Noise
04/22/23 14Petr Levchenko NEC 2011, Varna
LVDB and LVMB boards New Low Voltage Distribution
Boards for ME1/1 Changes
7 DCFEBs additional temperature sensors additional DAC reference voltage new connector types Latch-up protection diodes
JINR/NCpHEP responsibility Prototypes set up for production Test setup in ISR
New Low Voltage Mother Board
New interface to ODMB Support for additional voltage
controls Under study by UC Davis (Britt
Holbrook)
Old LVDB
Section of layout of new LVDB prototype
04/22/23 15Petr Levchenko NEC 2011, Varna
Mockup of the new LVDB and DCFEBs on ME1/1CSC
Physical Installation Mockup
Vladimir Karjavine
Chambers Build 72 chambers to
complete the 4th station
Build & operate a new factory in B904
Use some on-chamber electronics from ME1/1
Construct/build infrastructure (electronics, power, cooling, etc.) to operate these chambers
Scope of ME4/2 Project
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pa
ne
l s
tora
ge
Incoming parts
5m
Loadingarea20
m
Gas
Panel cleaning/gluing
Str
ip g
luin
g
25m
hand soldering Kit preparation
10m
10mL
on
g t
erm
gas
&
HVElectronics
assemblyFast site testing
10m 10m15m 15m
7m
6m
7mPacking
Chamber storage
area6m
C
ham
ber
rac
k
clean Lab 1 clean Lab 2 platform
• Incoming parts
• Kit preparation
• Panel bar gluing
• Wire wiring, gluing, soldering (Lab 1)
• Electrical components hand soldering
• Chamber assembly & test (Lab 2)
• Long term gas, HV tests
• Electronics assembly & Fast site test
• Final inspection packing, storing
Chamber production workflow
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Panel gluing
Anode wire fixation bars
Cathode gap bars
Glue dispenser
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Clean room 1: Winding
• About 1000 50μm thick AuW wires are winded on the anode panel with a ~3.16mm pitch. Total wire length ~2600 m per panel. Winding time: ~4h per panel. 200 μm thick field-shaping CuBe wires are tensioned (500g) and soldered beforehand
• Then, mylar fixation strips are glued onto the wire-end before wire soldering
04/22/23 20Petr Levchenko NEC 2011, Varna
Clean room 1: Automatic wire soldering
• Automatic wire soldering is done using the Panasonic machine. Re-commissioning of the machine was successfully done (O. Prokofiev FNAL)
04/22/23 21Petr Levchenko NEC 2011, Varna
Component soldering area
• 2 fully equipped soldering stations with local smoke extractors
Hand soldering of components (R, C), connectors, ground strip on panels
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Completed anode panel
04/22/23 23Petr Levchenko NEC 2011, Varna
Clean room 2: Panel assembly
• 4 Cathode and 3 anode panels are cleaned, tested, assembled and sealed using two assembly tables (surveyed to better than 1mm flatness)• Chamber is tested for leaks and HV (1 day)
Ionized air gun
Assembly tables
HV rackgas
04/22/23 24Petr Levchenko NEC 2011, Varna
TMB Mezzanine
Chamber assembly
• Assembly operations:• cathode panels continuity check• anode panels electrical tests (wire capacitance, HV, • prepare for chamber assembly • clean panels using ionized air knife• position chamber frames and dry assembly• continue electrical tests• chamber RTV sealing• install HV cables and ground foil• assembly chamber frames • short term HV training and leak test (with Ar)
• Benchmark ~28h chamber for assembly + ~1day for testing.
FNAL factory !
04/22/23 25Petr Levchenko NEC 2011, Varna
Long term test area
• Assembled chambers will be placed on a 8 chamber rack to undergo long term (~2 months) HV training (3.6-3.8 KV) and leak test
• Standard ArCO2CF4 gas mixture is used. Anticipated gas costs are ~12 KCHF/year
PSL design
04/22/23 26Petr Levchenko NEC 2011, Varna
June 30, 2011 ME4/2 Project Progress Review (AL UW) 27
• On-chamber electronics integration and full (fast-site) testing will be part of the production workflow:
• mount/test cooling plate• strip/wire r/o electronics and cables• LV distribution & monitoring boards
• For chamber testing we will use upgraded test stand with the new h/w and s/w
Electronics integration & chamber testing
AFEB Test Stand has been revised:● Measure basic characteristics of AFEB amplifier-discriminator chip (CMP16) and board (AD16)● Tabletop setup● Developed at Carnegie Mellon University ~10 years ago
Present FTEs 1 FTE from UW (Factory Manager) 1 FTE from CERN (Floor Manager) 3 FTE from PNPI (Production Eng. + 2 production Eng/Tech)
Should become 4 FTE from September (+1 prod. Tech) 2 FTE from IHEP (Production Tech + Student/Supervisor) 1 FTE from UCSB (Production Tech) ~2 FTE from UCLA+PNPI (Physicists, Prod. Eng, Prod. Tech)
Tot: ~11 FTE
Expected FTEs:
Tot: ~ 13 FTE
Caveat: Some of the people are key experts within CMS TC and will be required to intervene during extended technical stops for detector and infrastructure maintenance [S. Kreyer (tracker cooling), S. Di Vincenzo (beam pipe, infra), AL(CSC)]
inventory/kits 1FTE long term test 0.5 FTE
panel gluing 2 FTE integration+test 2 FTE
winding/soldering 1.5 FTE packing/storage 0.5 FTE
Component soldering 2 FTE QC/QA 0.5 FTE
Tension+assembly+test 2FTE Factory Manager 1 FTE
Factory labor
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people
The golden team
04/22/23 29Petr Levchenko NEC 2011, Varna
Summary
CSC Upgrade will be essential as luminosity increases.
ME1/1 electronics design, prototyping etc.. In progress.
ME4/2 Factory site available & operational in 2011.
Delays will make it difficult to install CSC according to CMS plans
04/22/23 30Petr Levchenko NEC 2011, Varna